Add a testcase for PR bootstrap/66978

PR bootstrap/66978
* gcc.target/i386/pr66978.c: New test.

From-SVN: r226150

S/390: Fix cfi for GPR 2 FPR saves

gcc/ChangeLog:

2015-07-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

    * config/s390/s390.c (s390_save_gprs_to_fprs): Add CFA_REGISTER
    reg note to the GPR -> FPR save instructions.

gcc/testsuite/ChangeLog:

2015-07-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

    * gcc.target/s390/gpr2fprsavecfi.c: New test.

From-SVN: r226149

[PATCH] S/390: Improve risbg usage

gcc/ChangeLog:

2015-07-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

    * config/s390/s390.c (s390_rtx_costs): Make risbg patterns
    cheaper.
    (s390_expand_insv): Don't generate risbg pattern for constant zero
    sources.
    * config/s390/s390.md ("*insv<mode>_zEC12_appendbitsleft")
    ("*insv<mode>_z10_appendbitsleft"): New pattern definitions.  New
    splitters.

gcc/testsuite/ChangeLog:

2015-07-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

    * gcc.target/s390/insv-1.c: New test.
    * gcc.target/s390/insv-2.c: New test.
    * gcc.target/s390/insv-3.c: New test.

From-SVN: r226148

[PATCH 4/4] S390 -march=native related fixes

gcc/ChangeLog

* config/s390/s390.c (s390_reorg): Clean up handling of processors with
-mtune=
(s390_issue_rate): Likewise.
(s390_sched_reorder): Likewise.
(s390_sched_variable_issue): Likewise.
(s390_loop_unroll_adjust): Likewise.
(s390_option_override):  Likewise.

From-SVN: r226147

[PATCH 3/4] S390 -march=native related fixes

gcc/ChangeLog

* config/s390/driver-native.c (s390_host_detect_local_cpu): Handle
processor capabilities with -march=native.
* config/s390/s390.h (MARCH_MTUNE_NATIVE_SPECS): Likewise.
(DRIVER_SELF_SPECS): Likewise.  Join specs for 31 and 64 bit.
(S390_TARGET_BITS_STRING): Macro to simplify specs.

From-SVN: r226146

[PATCH 2/4] S390 -march=native related fixes

gcc/ChangeLog

* config/s390/s390.c (s390_issue_rate): Handle PROCESSOR_2094_Z9_EC.
(s390_option_override): Likewise.
(s390_adjust_priority): Likewise.

From-SVN: r226145

S390 -march=native related fixes

gcc/ChangeLog:

* config/s390/s390.h: S390: Do not define EXTRA_SPEC_FUNCTIONS when
cross compiling.

From-SVN: r226144

fold-const.c (maybe_canonicalize_comparison_1): Move A code CST canonicalization ...

2015-07-24  Richard Biener  <rguenther@suse.de>

* fold-const.c (maybe_canonicalize_comparison_1): Move
A code CST canonicalization ...
* match.pd: ... to a pattern here.

cp/
* init.c (build_vec_init): Build iterator bound in the same
type as the iterator.

From-SVN: r226143

Remove xfail in autopar/uns-outer-4.c

2015-07-24  Tom de Vries  <tom@codesourcery.com>

* gcc.dg/autopar/uns-outer-4.c: Remove loopfn xfail.

From-SVN: r226142

[AArch64] Revert REG_ALLOC_ORDER/HONOR_REG_ALLOC_ORDER

2015-07-24  Jiong Wang  <jiong.wang@arm.com>

  Revert:
  2015-07-22  Jiong Wang  <jiong.wang@arm.com>
  PR target/63521
  * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
  (HONOR_REG_ALLOC_ORDER): Define.

From-SVN: r226141

genmatch.c (add_operator): Allow SSA_NAME as predicate.

2015-07-24  Richard Biener  <rguenther@suse.de>

* genmatch.c (add_operator): Allow SSA_NAME as predicate.
* fold-const.c (fold_comparison): Move parameter does not
alias &local simplification ...
* match.pd: ... as a pattern here.

From-SVN: r226140

gimple-fold.c (replace_stmt_with_simplification): Special-case valueizing call operands.

2015-07-24  Richard Biener  <rguenther@suse.de>

* gimple-fold.c (replace_stmt_with_simplification): Special-case
valueizing call operands.
* gimple-match-head.c (maybe_push_res_to_seq): Take
number of call arguments from ops array.
(do_valueize): New function.
(gimple_simplify): Return true if valueization changed
any operand even if the result didn't simplify further.

From-SVN: r226139

libstdc++-v3/fragment.am (AM_CPPFLAGS): Add CPPFLAGS

2015-07-24  Michael Haubenwallner  <michael.haubenwallner@ssi-schaefer.com>

* fragment.am (AM_CPPFLAGS): Add CPPFLAGS.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* include/Makefile.in: Regenerate.
* libsupc++/Makefile.in: Regenerate.
* po/Makefile.in: Regenerate.
* python/Makefile.in: Regenerate.
* src/Makefile.in: Regenerate.
* src/c++11/Makefile.in: Regenerate.
* src/c++98/Makefile.in: Regenerate.
* src/filesystem/Makefile.in: Regenerate.
* testsuite/Makefile.in: Regenerate.

From-SVN: r226138

re PR middle-end/25530 ((unsigned / 2)*2 is not changed into unsigned &~1)

PR middle-end/25530
2015-07-24  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

gcc/testsuite/ChangeLog:
* gcc.dg/pr25530.c: New test.

gcc/ChangeLog:
* match.pd (mult (trunc_div @0 integer_pow2p@1) @1) : New simplifier.

From-SVN: r226137

re PR middle-end/25529 ((unsigned * 2)/2 is not changed into unsigned &0x7FFFFFFF)

PR middle-end/25529
2015-07-24  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

gcc/testsuite/ChangeLog:
* gcc.dg/pr25529.c: New test.

gcc/ChangeLog:
* match.pd (trunc_div (mult @0 integer_pow2p@1) @1) : New simplifier.

From-SVN: r226136

reg_equal_test.c: New test.

gcc/testsuite/ChangeLog:

2015-07-23  Kugan Vivekanandarajah  <kuganv@linaro.org>

* gcc.target/arm/reg_equal_test.c: New test.

gcc/ChangeLog:

2015-07-23  Kugan Vivekanandarajah  <kuganv@linaro.org>

* config/arm/arm.c (arm_emit_movpair): Add REG_EQUAL notes to
instruction.

From-SVN: r226135

cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor clean up.

gcc/ChangeLog:

2015-07-23  Kugan Vivekanandarajah  <kuganv@linaro.org>

* cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor
clean up.

From-SVN: r226134

Daily bump.

From-SVN: r226132

i386.c (ix86_build_builtin_va_list_64): Rename from ix86_build_builtin_va_list_abi.

* config/i386/i386.c (ix86_build_builtin_va_list_64): Rename
from ix86_build_builtin_va_list_abi.  Handle only 64bit non-MS_ABI
targets here.
(ix86_build_builtin_va_list): Rewrite sysv_va_list_type_node and
ms_va_list_type_node initialization.

From-SVN: r226127

jit: supply MULTILIB_DEFAULTS as arguments when invoking driver

gcc/jit/ChangeLog:
* jit-playback.c (invoke_driver): Convert local "argvec"
to an auto_argvec, so that it owns copies of the strings,
rather than borrows them, updating ADD_ARG to use xstrdup
and special-casing the NULL terminator to avoid
xstrdup (NULL).  Call add_multilib_driver_arguments at the front
of the arguments.
(MULTILIB_DEFAULTS): Provide a default definition.
(multilib_defaults_raw): New constant array.
(gcc::jit::playback::context::add_multilib_driver_arguments): New
method.
* jit-playback.h
(gcc::jit::playback::context::add_multilib_driver_arguments): New
method.
* docs/internals/test-hello-world.exe.log.txt: Update.
* docs/_build/texinfo/libgccjit.texi: Regenerate.

From-SVN: r226126

re PR lto/66752 (spec2000 255.vortex performance compiled with GCC is ~20% lower than with CLANG)

PR lto/66752
* tree-ssa-threadedge.c (simplify_conrol_stmt_condition): If we are
unable to find X NE 0 in the tables, return X as the simplified
condition.
(fsm_find_control_statement_thread_paths): If nodes in NEXT_PATH are
in VISISTED_BBS, then return failure.  Else add nodes from NEXT_PATH
to VISISTED_BBS.  */
* tree-ssa-threadupdate.c (duplicate_thread_path): Fix up edge flags
after removing the control flow statement and unnecessary edges.

testsuite/
PR lto/66752
* gcc.dg/tree-ssa/pr66752-2.c: New test.
* gcc.dg/torture/pr66752-1.c: New test
* g++.dg/torture/pr66752-2.C: New test.

From-SVN: r226125

compiler: Make empty interface types for vars during parse time.

    When making the type for a variable with an empty interface type,
    the parser makes an interface type with a NULL method set and relies
    on later passes to correct this.

    For sink variables, which are ignored in later passes, the interface
    method table is never finalized and a compile time assertion is issued.
    Instead, the initial type generated by the parser should be the empty
    interface type.

    Fixes golang/go#11579.

    Reviewed-on: https://go-review.googlesource.com/12049

From-SVN: r226123

compiler: Check for errors in the underlying types of unary expressions.

    Fixes golang/go#11592.

    Reviewed-on: https://go-review.googlesource.com/12044

From-SVN: r226122

tree-pass.h (get_current_pass_name): Removed.

2015-07-23  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * tree-pass.h (get_current_pass_name): Removed.

From-SVN: r226121

re PR c++/66572 (Bogus Wlogical-op warning for operands coming from template instantiations)

PR c++/66572
* pt.c (tsubst_copy_and_build): Add warn_logical_op sentinel.

* g++.dg/warn/Wlogical-op-2.C: New test.

From-SVN: r226120

* MAINTAINERS: Update my email address.

From-SVN: r226118

functional_hash.h: Add specializations for __intN types.

* include/bits/functional_hash.h: Add specializations for __intN
types.

* include/ext/pb_ds/detail/thin_heap_/thin_heap_.hpp (__gnu_pbds):
Guard against values that might exceed size_t's precision.

From-SVN: r226117

c-ubsan.c (ubsan_instrument_division): Use unshare_expr throughout.

* c-ubsan.c (ubsan_instrument_division): Use unshare_expr throughout.
(ubsan_instrument_shift): Likewise.

From-SVN: r226116

[PR64164] Drop copyrename, use coalescible partition as base when optimizing.

for  gcc/ChangeLog

PR rtl-optimization/64164
* Makefile.in (OBJS): Drop tree-ssa-copyrename.o.
* tree-ssa-copyrename.c: Removed.
* opts.c (default_options_table): Drop -ftree-copyrename.  Add
-ftree-coalesce-vars.
* passes.def: Drop all occurrences of pass_rename_ssa_copies.
* common.opt (ftree-copyrename): Ignore.
(ftree-coalesce-inlined-vars): Likewise.
* doc/invoke.texi: Remove the ignored options above.
* gimple-expr.h (gimple_can_coalesce_p): Move declaration
* tree-ssa-coalesce.h: ... here.
* tree-ssa-uncprop.c: Include tree-ssa-coalesce.h and other
headers required by it.
* gimple-expr.c (gimple_can_coalesce_p): Allow coalescing
across variables when flag_tree_coalesce_vars.  Check register
use and promoted modes to allow coalescing.  Moved to
tree-ssa-coalesce.c.
* tree-ssa-live.c (struct tree_int_map_hasher): Move along
with its member functions to tree-ssa-coalesce.c.
(var_map_base_init): Likewise.  Renamed to
compute_samebase_partition_bases.
(partition_view_normal): Drop want_bases parameter.
(partition_view_bitmap): Likewise.
* tree-ssa-live.h: Adjust declarations.
* tree-ssa-coalesce.c: Include explow.h.
(build_ssa_conflict_graph): Process PARM_ and RESULT_DECLs's
default defs at the entry point.
(dump_part_var_map): New.
(compute_optimized_partition_bases): New, called by...
(coalesce_ssa_name): ... when flag_tree_coalesce_vars, instead
of compute_samebase_partition_bases.  Adjust.
* alias.c (nonoverlapping_memrefs_p): Disregard gimple-regs.
* cfgexpand.c (leader_merge): New.
(get_rtl_for_parm_ssa_default_def): New.
(set_rtl): Merge exprs and attrs, even for MEMs and non-SSA
vars.  Update DECL_RTL for PARM_DECLs and RESULT_DECLs too.
(expand_one_stack_var_at): Handle anonymous SSA_NAMEs.  Drop
redundant MEM attr setting.
(expand_one_stack_var_1): Handle anonymous SSA_NAMEs.  Renamed
from...
(expand_one_stack_var): ... this.  New wrapper to check and
skip already expanded SSA partitions.
(record_alignment_for_reg_var): New, factored out of...
(expand_one_var): ... this.
(expand_one_ssa_partition): New.
(adjust_one_expanded_partition_var): New.
(expand_one_register_var): Check and skip already expanded SSA
partitions.
(expand_used_vars): Don't create DECLs for anonymous SSA
names.  Expand all SSA partitions, then adjust all SSA names.
(pass::execute): Replace the loops that set
SA.partition_to_pseudo from partition leaders and cleared
DECL_RTL for multi-location variables, and that which used to
rename vars and set attrs, with one that clears DECL_RTL and
checks that PARMs and RESULTs default_defs match DECL_RTL.
* cfgexpand.h (get_rtl_for_parm_ssa_default_def): Declare.
* emit-rtl.c (set_reg_attrs_for_parm): Handle NULL decl.
* explow.c (promote_ssa_mode): New.
* explow.h (promote_ssa_mode): Declare.
* expr.c (expand_expr_real_1): Handle anonymous SSA_NAMEs.
* function.c: Include cfgexpand.h.
(use_register_for_decl): Handle SSA_NAMEs, anonymous or not.
(use_register_for_parm_decl): Wrapper for the above to
special-case the result_ptr.
(rtl_for_parm): Ditto for get_rtl_for_parm_ssa_default_def.
(split_complex_args): Take assign_parm_data_all argument.
Pass it to rtl_for_parm.  Set up rtl and context for split
args.
(assign_parms_augmented_arg_list): Adjust.
(maybe_reset_rtl_for_parm): Reset DECL_RTL of parms with
multiple locations.  Recognize split complex args.
(assign_parm_adjust_stack_rtl): Add all and parm arguments,
for rtl_for_parm.  For SSA-assigned parms, zero stack_parm.
(assign_parm_setup_block): Prefer SSA-assigned location.
(assign_parm_setup_reg): Likewise.  Use entry_parm for equiv
if stack_parm is NULL.
(assign_parm_setup_stack): Prefer SSA-assigned location.
(assign_parms): Maybe reset DECL_RTL of params.  Adjust stack
rtl before testing for pointer bounds.  Special-case result_ptr.
(expand_function_start): Maybe reset DECL_RTL of result.
Prefer SSA-assigned location for result and static chain.
Factor out DECL_RESULT and SET_DECL_RTL.
* tree-outof-ssa.c (insert_value_copy_on_edge): Handle
anonymous SSA names.  Use promote_ssa_mode.
(get_temp_reg): Likewise.
(remove_ssa_form): Adjust.
* stor-layout.c (layout_decl): Don't set mem attributes of
non-MEMs.
* var-tracking.c (dataflow_set_clear_at_call): Take call_insn
and get its reg_usage for reg invalidation.
(compute_bb_dataflow): Pass it insn.
(emit_notes_in_bb): Likewise.

for  gcc/testsuite/ChangeLog

* gcc.dg/guality/pr54200.c: Add -fno-tree-coalesce-vars.
* gcc.dg/ssp-1.c: Make counter a register.
* gcc.dg/ssp-2.c: Likewise.
* gcc.dg/torture/parm-coalesce.c: New.

From-SVN: r226113

re PR target/66217 (PowerPC rotate/shift/mask instructions not optimal)

PR target/66217
* config/rs6000/rs6000-protos.h (rs6000_emit_2insn_and): Change
prototype.
* config/rs6000/rs6000.c (rs6000_emit_dot_insn): New function.
(rs6000_emit_2insn_and): Handle dot forms.
* config/rs6000/rs6000.md (and<mode>3): Adjust.
(*and<mode>3_2insn): Remove TODO.  Adjust.  Add "type" attr.
(*and<mode>3_2insn_dot, *and<mode>3_2insn_dot2): New.

From-SVN: r226112

generic-match-head.c: Include cgraph.h.

2015-07-23  Richard Biener  <rguenther@suse.de>

* generic-match-head.c: Include cgraph.h.
* gimple-match-head.c: Likewise.
* tree-ssa-sccvn.c (free_scc_vn): Guard against newly created
SSA names.
* fold-const.c (fold_binary_loc): Move &A ==/!= &B simplification...
* match.pd: ...to a pattern here.  Add &A ==/!= 0 simplification
pattern.

From-SVN: r226111

re PR sanitizer/66908 (Uninitialized variable when compiled with UBsan)

PR sanitizer/66908
* c-ubsan.c: Include gimplify.h.
(ubsan_instrument_division): Unshare OP0 and OP1.
(ubsan_instrument_shift): Likewise.

* c-c++-common/ubsan/pr66908.c: New test.

From-SVN: r226110

gimple-fold.c (fold_gimple_cond): Do not require folding results to pass valid_gimple_rhs_p.

2015-07-23  Richard Biener  <rguenther@suse.de>

* gimple-fold.c (fold_gimple_cond): Do not require folding
results to pass valid_gimple_rhs_p.
* tree-cfg.h (fold_cond_expr_cond): Remove.
* tree-cfg.c (fold_cond_expr_cond): Likewise.
(make_edges): Do not call it.
* tree-inline.c (tree_function_versioning): Likewise.

From-SVN: r226109

Check TYPE_OVERFLOW_WRAPS for parloops reductions

2015-07-23  Tom de Vries  <tom@codesourcery.com>

* tree-parloops.c (gather_scalar_reductions): Add arg to call to
vect_force_simple_reduction.
* tree-vect-loop.c (vect_analyze_scalar_cycles_1): Same.
(vect_is_simple_reduction_1): Add and handle
need_wrapping_integral_overflow parameter.
(vect_is_simple_reduction, vect_force_simple_reduction): Add and pass
need_wrapping_integral_overflow parameter.
(vectorizable_reduction): Add arg to call to vect_is_simple_reduction.
* tree-vectorizer.h (vect_force_simple_reduction): Add parameter to decl.

* gcc.dg/autopar/outer-4.c: Add xfail.
* gcc.dg/autopar/outer-5.c: Same.
* gcc.dg/autopar/outer-6.c: Same.
* gcc.dg/autopar/reduc-2.c: Same.
* gcc.dg/autopar/reduc-2char.c: Same.
* gcc.dg/autopar/reduc-2short.c: Same.
* gcc.dg/autopar/reduc-8.c: Same.
* gcc.dg/autopar/uns-outer-4.c: New test.
* gcc.dg/autopar/uns-outer-5.c: New test.
* gcc.dg/autopar/uns-outer-6.c: New test.

From-SVN: r226107

re PR tree-optimization/66952 (wrong code at -O2 and -O3 on x86_64-linux-gnu)

2015-07-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/66952
* gcc.dg/torture/pr66952.c: Use signed char.

From-SVN: r226104

PR tree-optimization/66926,66951

gcc/

PR tree-optimization/66926,66951
* tree-vect-loop-manip.c (slpeel_tree_peel_loop_to_edge): Delete
INNER_LOOP and fix up condition for renaming virtual operands.

gcc/testsuite/

PR tree-optimization/66926,66951
* gcc.dg/vect/pr66951.c: New test.

From-SVN: r226103

re PR c++/52987 (bogus expected ; before for undeclared type)

/cp
2015-07-23  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/52987
* parser.c (cp_parser_simple_declaration): Robustify check avoiding
redundant error messages.

/testsuite
2015-07-23  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/52987
* g++.dg/parse/error57.C: New.
* g++.dg/expr/string-2.C: Update.

From-SVN: r226097

[combine][obvious] Use std::swap in try_combine

* combine.c (try_combine): Use std::swap instead of manually
swapping.

From-SVN: r226094

I6400 scheduling.

gcc/
* config/mips/i6400.md: New file.
* config/mips/mips-cpus.def (mips32r6): Change to PROCESSOR_I6400.
(mips64r6): Likewise.
(i6400): Define.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.c (mips_rtx_cost_data): Add I6400 processor.
(mips_issue_rate): Add support for i6400.
(mips_multipass_dfa_lookahead): Likewise.
* config/mips/mips.h (TUNE_I6400): Define.
* config/mips/mips.md: Include i6400.md.
(processor): Add i6400.
* doc/invoke.texi (-march=@var{arch}): Add i6400.

From-SVN: r226090

re PR middle-end/66916 (FAIL: gcc.target/arm/pr43920-2.c object-size text <= 54)

2015-07-23  Richard Biener  <rguenther@suse.de>

PR middle-end/66916
* match.pd: Guard widen and sign-change comparison simplification
with single_use.

From-SVN: r226089

re PR middle-end/66945 (ICE in generic_simplify (generic-match.c:24790))

2015-07-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/66945
* tree-ssa-propagate.c (substitute_and_fold_dom_walker
::before_dom_children): Force the propagators idea of
non-executable edges to materialize, not what the folder
chooses.

* gcc.dg/torture/pr66945.c: New testcase.

From-SVN: r226088

gimple.h (gimple_cond_make_false): Use 0 != 0.

2015-07-23  Richard Biener  <rguenther@suse.de>

* gimple.h (gimple_cond_make_false): Use 0 != 0.
(gimple_cond_make_true): Use 1 != 0.

From-SVN: r226087

t-msp430 (MULTILIB_DIRNAMES): Remove trailing slashes.

* config/msp430/t-msp430 (MULTILIB_DIRNAMES): Remove trailing
slashes.

* config/msp430/msp430.md (ashlhi3): Optimize shifts of subregs.
(ashrhi3): Likewise.
(lshrhi3): Likewise.
(movhi): Take advantage of zero-extend to load small constants.
(movpsi): Likewise.
(and<mode>3): Likewise.
(zero_extendqihi2): Likewise.
(zero_extendqisi2): New.
* config/msp430/constraints.md (N,O): New.
* config/msp430/msp430.h (WORD_REGISTER_OPERATIONS): Define.

From-SVN: r226085

Daily bump.

From-SVN: r226084

re PR target/66954 (function multiversioning fails for target "aes")

libgcc/ChangeLog:

PR target/66954
* config/i386/cpuinfo.c (enum processor_features): Add FEATURE_AES.
(get_available_features): Handle FEATURE_AES.

gcc/ChangeLog:

PR target/66954
* config/i386/i386.c (get_builtin_code_for_version): Add P_AES
to enum feature_priority and feature_list.
(fold_builtin_cpu): Add F_AES to enum processor_features
and isa_names_table.

gcc/testsuite/ChangeLog:

PR target/66954
* g++.dg/ext/mv24.C: New test.

From-SVN: r226081

re PR libgomp/66950 (FAIL: libgomp.fortran/examples-4/simd-7.f90   -O0  execution test)

2015-07-22  Maxim Blumenthal  <maxim.blumenthal@intel.com>

PR libgomp/66950
* testsuite/libgomp.c/examples-4/simd-7.c (N): Change to 30 from 45.
(fib_ref): New function.
(fib): Correct corner cases in the recursion.
(main): Replace the non-simd loop with fib_ref call.
* testsuite/libgomp.fortran/examples-4/simd-7.f90: (fib_ref): New
subroutine.
(fibonacci): Lower the parameter N to 30.  Correct accordingly check
for the last array element value.  Replace the non-simd loop with
fib_ref call.  Remove redundant b_ref array.  Remove the comparison
of the last array element with according Fibonacci sequence element.
(fib): Correct corner cases in the recursion.

From-SVN: r226080

unpack.c: Use dg-additional-options rather than dg-options.

* gcc.dg/vmx/unpack.c: Use dg-additional-options rather than
dg-options.

From-SVN: r226078

re PR driver/66737 (ld: warning: -z bndplt ignored)

PR driver/66737
* config/i386/linux-common.h (MPX_SPEC): Use linker option
for 64bit target only.

From-SVN: r226076

* config/nvptx/nvptx.c: Expand some comments.

From-SVN: r226075

Fix r225926's iso_varying_string ICE regression

PR fortran/61831
PR fortran/66929
gcc/fortran/
* trans-array.c (gfc_get_proc_ifc_for_expr): Use esym as procedure
symbol if available.
gcc/testsuite/
* gfortran.dg/generic_30.f90: New.

From-SVN: r226074

[Patch ARM/AArch64 obvious] Fix typo: Rename insn_reservation cortex_53_advsimd to cortex_a53_advsimd

gcc/

* config/arm/cortex-a53 (cortex_53_advsimd): Rename to...
(cortex_a53_advsimd): ...This.

From-SVN: r226069

genmatch.c (expr::gen_transform): Clarify error message and display location.

2015-07-22  Richard Biener  <rguenther@suse.de>

* genmatch.c (expr::gen_transform): Clarify error message
and display location.

From-SVN: r226068

genmatch.c (struct operand): Add location member.

2015-07-22  Richard Biener  <rguenther@suse.de>

* genmatch.c (struct operand): Add location member.
(predicate, expr, c_expr, capture, if_expr, with_expr): Adjust
constructors.
(struct simplify): Remove match_location and result_location
members.
(elsehwere): Adjust.

From-SVN: r226067

Add scheduling for M51xx core family.

gcc/
* config/mips/m5100.md: New file.
* config/mips/mips-cpus.def (m5100, m5101): Define.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.c (mips_rtx_cost_data): Add costs for m5100.
* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Map -march=m5100 and
-march=m5101 to -mips32r5.
(MIPS_ARCH_FLOAT_SPEC): Map -m5101 to -msoft-float.
(MIPS_ISA_NAN2008_SPEC): Map -march=m51* to -mnan=2008 if
!-msoft-float.
* config/mips/mips.md: Include m5100.md.
(processor): Add m5100.
* doc/invoke.texi (-march=@var{arch}): Add m5100, m5101.

From-SVN: r226066

Add -march=interaptiv.

gcc/
* config/mips/mips-cpus.def (interaptiv): Define.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Map -march=interaptiv to
-mips32r2.
(BASE_DRIVER_SELF_SPECS): Likewise but map to -mdsp.
* doc/invoke.texi (-march=@var{arch}): Add interaptiv.

From-SVN: r226065

[AArch64] PR target/63521 Define REG_ALLOC_ORDER

2015-07-22  Jiong Wang  <jiong.wang@arm.com>

gcc/
  PR target/63521
  * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
  (HONOR_REG_ALLOC_ORDER): Define.

From-SVN: r226064

linux-atomic.c (<asm/unistd.h>): Remove #include.

2015-07-22  Chung-Lin Tang  <cltang@codesourcery.com>

libgcc/
* config/nios2/linux-atomic.c (<asm/unistd.h>): Remove #include.
(EFAULT,EBUSY,ENOSYS): Delete unused #defines.

From-SVN: r226063

re PR tree-optimization/66952 (wrong code at -O2 and -O3 on x86_64-linux-gnu)

2015-07-22  Richard Biener  <rguenther@suse.de>

PR tree-optimization/66952
* tree-ssa-ifcombine.c (pass_tree_ifcombine::execute): For
blocks we end up executing unconditionally reset all SSA
info such as range and alignment.
* tree-ssanames.h (reset_flow_sensitive_info): Declare.
* tree-ssanames.c (reset_flow_sensitive_info): New function.

* gcc.dg/torture/pr66952.c: New testcase.

From-SVN: r226062

aarch64-simd.md (vec_store_lanesoi_lane<mode>): Fix typo in attribute.

2015-07-22  Charles Baylis  <charles.baylis@linaro.org>

* config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): Fix
typo in attribute.

From-SVN: r226061

genmatch.c (parser::parse_result): Properly handle match with result operands and conditions.

2015-07-22  Richard Biener  <rguenther@suse.de>

* genmatch.c (parser::parse_result): Properly handle
match with result operands and conditions.

From-SVN: r226060

re PR target/63870 ([Aarch64] [ARM] Errors in use of NEON intrinsics are reported incorrectly)

gcc/ChangeLog:

2015-07-22  Charles Baylis  <charles.baylis@linaro.org>

PR target/63870
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
Add qualifier_struct_load_store_lane_index.
(aarch64_types_loadstruct_lane_qualifiers): Use
qualifier_struct_load_store_lane_index for lane index argument for
last argument.
(aarch64_types_storestruct_lane_qualifiers): Ditto.
(builtin_simd_arg): Add SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_args): Add new argument describing mode of
builtin. Check lane bounds for arguments with
SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_builtin): Emit error for incorrect lane indices
if marked with SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX.
(aarch64_simd_expand_builtin): Handle arguments with
qualifier_struct_load_store_lane_index. Pass machine mode of builtin to
aarch64_simd_expand_args.
* config/aarch64/aarch64-simd-builtins.def: Declare ld[234]_lane and
vst[234]_lane with BUILTIN_VALLDIF.
* config/aarch64/aarch64-simd.md:
(aarch64_vec_load_lanesoi_lane<mode>): Use VALLDIF iterator. Perform
endianness reversal on lane index.
(aarch64_vec_load_lanesci_lane<mode>): Ditto.
(aarch64_vec_load_lanesxi_lane<mode>): Ditto.
(vec_store_lanesoi_lane<mode>): Use VALLDIF iterator.
(vec_store_lanesci_lane<mode>): Ditto.
(vec_store_lanesxi_lane<mode>): Ditto.
(aarch64_ld2_lane<mode>): Use VALLDIF iterator. Remove endianness
reversal of lane index.
(aarch64_ld3_lane<mode>): Ditto.
(aarch64_ld4_lane<mode>): Ditto.
(aarch64_st2_lane<mode>): Ditto.
(aarch64_st3_lane<mode>): Ditto.
(aarch64_st4_lane<mode>): Ditto.
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rename mode parameter
to qmode. Add new mode parameter. Update uses.
        (__LD3_LANE_FUNC): Ditto.
(__LD4_LANE_FUNC): Ditto.
(__ST2_LANE_FUNC): Ditto.
(__ST3_LANE_FUNC): Ditto.
(__ST4_LANE_FUNC): Ditto.

gcc/testsuite/ChangeLog:

2015-07-22  Charles Baylis  <charles.baylis@linaro.org>

        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c: New
test.
        * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c: New
test.

From-SVN: r226059

invoke.texi (Language Independent Options): Rename node to Diagnostic Message Formatting Options.

* doc/invoke.texi (Language Independent Options): Rename node to
Diagnostic Message Formatting Options.

From-SVN: r226058

Daily bump.

From-SVN: r226057

decl.c (grokdeclarator): For an erroneous template parameter propagate error_mark_node as type.

/cp
2015-07-21  Paolo Carlini  <paolo.carlini@oracle.com>

* decl.c (grokdeclarator): For an erroneous template parameter
propagate error_mark_node as type.

/testsuite
2015-07-21  Paolo Carlini  <paolo.carlini@oracle.com>

* g++.dg/template/crash81.C: Update.

From-SVN: r226054

re PR ipa/66424 (wrong code at -O2 and -O3 on x86_64-linux-gnu in 32-bit mode)

2015-07-21  Vladimir Makarov  <vmakarov@redhat.com>

PR ipa/66424.
* lra-remat.c (operand_to_remat): Prevent using insns with input
subregs processed separately by IRA.

2015-07-21  Vladimir Makarov  <vmakarov@redhat.com>

PR ipa/66424.
* gcc.target/i386/pr66424.c: New.

From-SVN: r226053

ssa-iterators.h (has_zero_uses, [...]): Implement as straight loops.

2015-07-21  Andrew MacLeod  <amacleod@redhat.com>

* ssa-iterators.h (has_zero_uses, has_single_use): Implement as
straight loops.
(single_imm_use): Check for iterator node.
(num_imm_uses): Likewise.
* tree-ssa-operands.c (has_zero_uses_1): Delete.
(single_imm_use_1): Check for iterator node.

From-SVN: r226051

configure.ac: Add check for new options in isl-0.15.

* configure.ac: Add check for new options in isl-0.15.
* config.in, configure: Rebuilt.
* graphite-blocking.c: Include <isl/constraint.h>
* graphite-interchange.c,  graphite-poly.c: Likewise.
* graphhite-scop-detection.c, graphite-sese-to-poly.c: Likewise.
* graphite.c: Likewise.
* graphite-isl-ast-to-gimple.c: Include <isl/constraint.h> and
<isl/union_set.h>.
* graphite-dependences.c: Include <isl/constraint.h>.
(max_number_of_out_dimensions): Returns isl_stat.
(extend_schedule_1): Likewise
(extend_schedule): Corresponding changes.
* graphite-optimize-isl.c: Include <isl/constraint.h> and
<isl/union_set.h>.
(getSingleMap): Change return type of isl_stat.
(optimize_isl): Conditionally use
isl_options_set_schedule_serialize_sccs.
* graphite-poly.h (isl_stat, isl_stat_ok): Define fallbacks
if not HAVE_ISL_OPTIONS_SET_SCHEDULE_SERIALIZE_SCCS.

Co-Authored-By: Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
From-SVN: r226050

re PR target/66956 ([avr] Using 32*32=64 multiplicatiion (umulsidi3) for 32=32*32 without MUL.)

PR target/66956
* config/avr/avr-dimode.md (<extend_u>mulsidi3_insn)
(<extend_u>mulsidi3): Don't use if !AVR_HAVE_MUL.

From-SVN: r226046

thumb-bitfld1.c (foo): Add explicit return type.

2015-07-21  Alex Velenko  <Alex.Velenko@arm.com>

* gcc.target/arm/thumb-bitfld1.c (foo): Add explicit return type.

From-SVN: r226043

re PR tree-optimization/66948 (Performance regression in bit manipulation code)

2015-07-21  Richard Biener  <rguenther@suse.de>

PR tree-optimization/66948
* genmatch.c (capture_info::walk_match): Also recurse to
captures.  Properly compute expr state from captures of
captures.
* match.pd: Add single-use guards to
(X & C2) >> C1 into (X >> C1) & (C2 >> C1) transform.

From-SVN: r226041

target.c (gomp_offload_image_to_device): Rename to ...

libgomp/
* target.c (gomp_offload_image_to_device): Rename to ...
(gomp_load_image_to_device): ... here.
(GOMP_offload_register): Adjust call.
(gomp_init_device): Likewise.
(gomp_unload_image_from_device): New.  Broken out of ...
(GOMP_offload_unregister): ... here.  Call it.
(gomp_unload_device): New.
* libgomp.h (gomp_unload_device): Declare.
* oacc-init.c (acc_shutdown_1): Unload from device before deleting
mem maps.

gcc/
* config/nvptx/mkoffload.c (process): Add static destructor call.

From-SVN: r226039

Fix r225926's broken testcase

gcc/testsuite/
PR fortran/61831
* gfortran.dg/derived_constructor_comps_6.f90: Fix dg directive.
Drop address sanitization.

From-SVN: r226038

split-live-ranges-for-shrink-wrap.c (dg-skip-if): Skip -march=armv4t.

2015-07-21  Alex Velenko  <Alex.Velenko@arm.com>
gcc/testsuite/
        * gcc.target/arm/split-live-ranges-for-shrink-wrap.c (dg-skip-if):
Skip -march=armv4t.
        (dg-additional-options): Set armv5t flag.

From-SVN: r226036

Fix ChangeLog of r225926 (PR fortran/61831)

From-SVN: r226033

unpack-be-order.c: Use -Wno-shift-overflow.

* gcc.dg/vmx/unpack-be-order.c: Use -Wno-shift-overflow.
* gcc.dg/vmx/unpack.c: Likewise.
* gcc.target/powerpc/quad-atomic.c: Likewise.

From-SVN: r226032

[match.pd] PR middle-end/66915 Restrict A - B -> A + (-B) to non-fixed-point types

PR middle-end/66915
* match.pd (A - B -> A + (-B)): Don't allow folding
when type if a fixed-point type.

From-SVN: r226028

Daily bump.

From-SVN: r226026

rl78-real.md (andqi3_real): Expand operands for clr1.

* config/rl78/rl78-real.md (andqi3_real): Expand operands for clr1.
(iorqi3_real): Likewise for set1.

From-SVN: r226023

* include/bits/c++config: Fix abi_tag in special modes.

From-SVN: r226022

i386.c (ix86_md_asm_adjust): Handle DImode dest_mode for !TARGET_64BIT.

* config/i386/i386.c (ix86_md_asm_adjust): Handle DImode dest_mode
for !TARGET_64BIT.

testsuite/ChangeLog:

* gcc.target/i386/asm-flag-5.c (f_ll): New.

From-SVN: r226017

add missing changelog

From-SVN: r226015

Refactor graphite-isl-ast-to-gimple.c

Refactor graphite-isl-ast-to-gimple.c:
Refactor so that each function can access 'region'. This will help
maintain a parameter rename_map within a region. No functional change intended.
This patch will be followed by another set of patches
where translate_isl_ast_to_gimple::region is used to keep parameters which need
renaming. Since we are planning to remove limit_scops, we now have to maintain a
set of parameters which needs renaming. This refactoring helps avoid passing
`region' to all the functions in this file.

It passes bootstrap and regtest.

gcc/ChangeLog:

2015-07-19  Aditya Kumar  <hiraditya@msn.com>

        * graphite-isl-ast-to-gimple.c:
Refactor so that each function can access 'region'. This will help
maintain a parameter rename_map within a region.

From-SVN: r226014

Missed a difference between gomp4 and trunk

From-SVN: r226012

oacc-parallel.c (GOACC_parallel): Move variadic handling into wait=-specific if.

* oacc-parallel.c (GOACC_parallel): Move variadic handling into
wait=-specific if.
(GOACC_enter_exit_data, GOACC_update): Use consistent num_waits
!=0 condition.
(goacc_waits): Move !num_waits handling to ...
(GOACC_wait): ... here, the only caller that might have zero waits.

From-SVN: r226011

compiler: Create dummy labels for blank labels.

    Fixes golang/go#11591.

    Reviewed-on: https://go-review.googlesource.com/12043

From-SVN: r226009

compiler: Remove unnecessary check for GCC-specific issue.

    Reviewed-on: https://go-review.googlesource.com/11800

    compiler: remove name of unused parameter to avoid warning

    Reviewed-on: https://go-review.googlesource.com/12367

From-SVN: r226007

* config/rs6000/rs6000.md (*lt0_disi): New.

From-SVN: r226006

re PR target/66217 (PowerPC rotate/shift/mask instructions not optimal)

PR target/66217
* config/rs6000/constraints.md ("S", "T", "t"): Delete.  Update
"available letters" comment.
* config/rs6000/predicates.md (mask_operand, mask_operand_wrap,
mask64_operand, mask64_2_operand, any_mask_operand, and64_2_operand,
and_2rld_operand):  Delete.
(and_operand): Adjust.
(rotate_mask_operator): New.
* config/rs6000/rs6000-protos.h (build_mask64_2_operands,
includes_lshift_p, includes_rshift_p, includes_rldic_lshift_p,
includes_rldicr_lshift_p, insvdi_rshift_rlwimi_p, extract_MB,
extract_ME): Delete.
(rs6000_is_valid_mask, rs6000_is_valid_and_mask,
rs6000_is_valid_shift_mask, rs6000_is_valid_insert_mask,
rs6000_insn_for_and_mask, rs6000_insn_for_shift_mask,
rs6000_insn_for_insert_mask, rs6000_is_valid_2insn_and,
rs6000_emit_2insn_and): New.
* config/rs6000/rs6000.c (num_insns_constant): Adjust.
(build_mask64_2_operands, includes_lshift_p, includes_rshift_p,
includes_rldic_lshift_p, includes_rldicr_lshift_p,
insvdi_rshift_rlwimi_p, extract_MB, extract_ME): Delete.
(rs6000_is_valid_mask, rs6000_is_valid_and_mask,
rs6000_insn_for_and_mask, rs6000_is_valid_shift_mask,
s6000_insn_for_shift_mask, rs6000_is_valid_insert_mask,
rs6000_insn_for_insert_mask, rs6000_is_valid_2insn_and,
rs6000_emit_2insn_and): New.
(print_operand) <'b', 'B', 'm', 'M', 's', 'S', 'W'>: Delete.
(rs6000_rtx_costs) <CONST_INT>: Delete mask_operand and mask64_operand
handling.
<NOT>: Don't fall through to next case.
<AND>: Handle the various rotate-and-mask cases directly.
<IOR>: Always cost as one insn.
* config/rs6000/rs6000.md (splitter for bswap:SI): Adjust.
(and<mode>3): Adjust expander for the new patterns.
(and<mode>3_imm, and<mode>3_imm_dot, and<mode>3_imm_dot2,
and<mode>3_imm_mask_dot, and<mode>3_imm_mask_dot2): Adjust condition.
(*and<mode>3_imm_dot_shifted): New.
(*and<mode>3_mask): Delete, rewrite as ...
(and<mode>3_mask): ... New.
(*and<mode>3_mask_dot, *and<mode>3_mask_dot): Rewrite.
(andsi3_internal0_nomc): Delete.
(*andsi3_internal6): Delete.
(*and<mode>3_2insn): New.
(insv, insvsi_internal, *insvsi_internal1, *insvsi_internal2,
*insvsi_internal3, *insvsi_internal4, *insvsi_internal5,
*insvsi_internal6, insvdi_internal, *insvdi_internal2,
*insvdi_internal3): Delete.
(*rotl<mode>3_mask, *rotl<mode>3_mask_dot, *rotl<mode>3_mask_dot2,
*rotl<mode>3_insert, *rotl<mode>3_insert_2, *rotl<mode>3_insert_3,
*rotl<mode>3_insert_4, two splitters for multi-precision shifts,
*ior<mode>_mask): New.
(extzv, extzvdi_internal, *extzvdi_internal1, *extzvdi_internal2,
*rotlsi3_mask, *rotlsi3_mask_dot, *rotlsi3_mask_dot2,
*ashlsi3_imm_mask, *ashlsi3_imm_mask_dot, *ashlsi3_imm_mask_dot2,
*lshrsi3_imm_mask, *lshrsi3_imm_mask_dot, *lshrsi3_imm_mask_dot2):
Delete.
(ashr<mode>3): Delete expander.
(*ashr<mode>3): Rename to ...
(ashr<mode>3): ... This.
(ashrdi3_no_power, *ashrdisi3_noppc64be): Delete.
(*rotldi3_internal4, *rotldi3_internal5 and split,
*rotldi3_internal6 and split, *ashldi3_internal4, ashldi3_internal5
and split, *ashldi3_internal6 and split, *ashldi3_internal7,
ashldi3_internal8 and split, *ashldi3_internal9 and split): Delete.
(*anddi3_2rld, *anddi3_2rld_dot, *anddi3_2rld_dot2): Delete.
(splitter for loading a mask): Adjust.
* doc/md.texi (Machine Constraints): Remove q, S, T, t constraints.

From-SVN: r226005

plugin-nvptx.c (struct targ_fn_descriptor): Move later.

* plugin/plugin-nvptx.c (struct targ_fn_descriptor): Move later.
(struct ptx_image_data): Move earlier, add fns field.
(struct ptx_device): Add images and image_lock fields.
(ptx_images, ptx_image_lock): Delete.
(nvptx_open_device): Initialize images and image_lock fields.
(nvptx_close_device): Destroy image_lock.
(GOMP_OFFLOAD_load_image): Register image to device-specific fields.
(GOMP_OFFLOAD_unload_image): Unregister image from device-specific
fields.

From-SVN: r226004

genemit.c (print_code, [...]): Remove declarations.

* genemit.c (print_code, gen_exp, gen_insn, gen_expand, gen_split,
output_add_clobbers, output_added_clobbers_hard_reg_p,
gen_rtx_scratch): Remove declarations.

From-SVN: r226003

[AArch64][testcase] Restrict got_mem_hoist_1.c with small memory model

From-SVN: r225999

re PR c++/55095 (Wshift-overflow)

PR c++/55095
* c-common.c (c_fully_fold_internal): Warn about left shift overflows.
Use EXPR_LOC_OR_LOC.
(maybe_warn_shift_overflow): New function.
* c-common.h (maybe_warn_shift_overflow): Declare.
* c-opts.c (c_common_post_options): Set warn_shift_overflow.
* c.opt (Wshift-overflow): New option.

* c-typeck.c (digest_init): Pass OPT_Wpedantic to pedwarn_init.
(build_binary_op): Warn about left shift overflows.

* typeck.c (cp_build_binary_op): Warn about left shift overflows.

* doc/invoke.texi: Document -Wshift-overflow and -Wshift-overflow=.

* c-c++-common/Wshift-overflow-1.c: New test.
* c-c++-common/Wshift-overflow-2.c: New test.
* c-c++-common/Wshift-overflow-3.c: New test.
* c-c++-common/Wshift-overflow-4.c: New test.
* c-c++-common/Wshift-overflow-5.c: New test.
* g++.dg/cpp1y/left-shift-1.C: New test.
* gcc.dg/c90-left-shift-2.c: New test.
* gcc.dg/c90-left-shift-3.c: New test.
* gcc.dg/c99-left-shift-2.c: New test.
* gcc.dg/c99-left-shift-3.c: New test.
* gcc.dg/pr40501.c: Use -Wno-shift-overflow.
* gcc.c-torture/execute/pr40386.c: Likewise.
* gcc.dg/vect/pr33373.c: Likewise.
* gcc.dg/vect/vect-shift-2-big-array.c: Likewise.
* gcc.dg/vect/vect-shift-2.c: Likewise.

Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>
From-SVN: r225998

[simplify-rtx][2/2] Simplify - (y ? -x : x) -> (!y ? -x : x)

* simplify-rtx.c (simplify_unary_operation_1, NEG case):
(neg (x ? (neg y) : y)) -> !x ? (neg y) : y.

* gcc.target/aarch64/neg_abs_1.c: New test.

From-SVN: r225997

[PATCH][combine][1/2] Try to simplify before substituting

* combine.c (combine_simplify_rtx): Move simplification step
before various transformations/substitutions.

From-SVN: r225996

Fix partial specialization syntax of wide int traits.

gcc/
* wide-int.h (struct binary_traits): Fix partial specialization syntax.
(struct int_traits): Likewise.

From-SVN: r225993

Daily bump.

From-SVN: r225992

status_cxx2017.xml: Fix URL for N4279.

* doc/xml/manual/status_cxx2017.xml: Fix URL for N4279.
* doc/html/manual/status.html: Regenerate.

From-SVN: r225988

Daily bump.

From-SVN: r225987

fix compilation of vmsdbgout.c

The debug-early branch renamed vmsdbgout_decl to
vmsdbgout_function_decl, but didn't update its prototype.

gcc/ChangeLog:

2015-07-18  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* vmsdbgout.c (vmsdbgout_decl): Change name of prototyped
function to vmsdbgout_function_decl.

From-SVN: r225983

re PR target/66922 (wrong code for bit-field struct at -O1 and above on x86_64-linux-gnu)

PR target/66922
* config/i386/i386.c (ix86_expand_pextr): Reject extractions
from misaligned positions.
(ix86_expand_pinsr): Reject insertions to misaligned positions.

testsuite/ChangeLog:

PR target/66922
* gcc.target/i386/pr66922.c: New test.

From-SVN: r225980