agx: Add agx_read_registers helper

To be used for inserting waits post-RA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Compact st_tile argument per mask

Otherwise the number of read registers won't match the vector we input, which
will trigger validation errors.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Insert waits post-RA

This is the first step towards reducing stalling.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Pack texture scoreboard slots

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Pack wait instructions

For different scoreboard slots.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Remove unused idiv const func

This was used for instancing, but has been unused since 8dcf7648f15 ("agx: Lower VBOs in NIR")

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Use metadata for VS varying linking

Rather than variables. This gets rid of all backend nir_variable use.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Don't use nir_variable when gathering flat varyings

Walk the IR instead. This happens when preprocessing so it doesn't really
matter, but it complicates the nir_variable audit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Hash agx_instr faster

Prior to this change, agx_opt_cse is our most expensive backend pass, due to the
time spent hashing instructions. hash_instr was calling into XXH32 a massive
number of times, often to hash only a single bit. It's much faster to hash
entire blocks of memory at a time. Optimize to do just that.

With this change, agx_opt_cse is now cheaper than instruction selection as
it should be.

No shader-db changes (except CPU time decrease).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Use texture write mask

We do need to use undefs instead of zeroes in this internal collect. While this
vector gets copypropped out, it'd cause us to fail compilation if noopt is on.
Fix that.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Note that textures clobber even masked

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

agx: Plumb in store instruction

This will be used for compute kernels (and transform feedback) in the (near)
future. For now, let's get the opcode plumbed in the backend to reduce some of
the rebase pain.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi/lower_tilebuffer: Avoid loading sample mask

If a render target isn't written to, we don't use the sample mask. Avoid
generating the intermediate instructions, common with gl_FragColor. It will get
DCE'd, but this means less work for DCE, which should help for shader jank since
this pass gets called per-variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Remove outdated comment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Implement linear 2D array textures

These are useful for layered staging resources. Tested by forcing linear
textures and running dEQP-GLES3.functional.texture.format.sized.2d_array.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Correct acceleration_buffer for layered images

The old calculation was wrong if layer != 0.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Add XML for linear 2D arrays

These look a bit like compressed images, and elucidate one of the common fields.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Add XML required for vertex shader side effects

Basically for rasterizer discard. We'll use these in a moment to implement
transform feedback.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Dump uniforms when decoding

These often have addresses in them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

asahi: Check box implement NV_conditional_render

Use the freedreno lowering. It'll be slow but I don't know of any apps that
actually use this and it's required for GL 3.0.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

ail: Add compression_layer_stride_B field

So we can index into the compression buffer of layered images.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

ail: Support linear 2D arrays

These are straightforward.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

docs/features: Add more missed asahi

Should already be there.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>

freedreno/decode: Deal with suballocated buffers

We can end up logging both the buffer that the toplevel cmdstream is
allocated, as well as the sub-allocated part of that buffer.  Possibly
the kernel could do better about this, but to avoid undecodeable
cmdstream dumps and devcores, detect this case and deal with it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>

freedreno: Limit max draws per batch

Mostly so that piglit drawoverhead doesn't OoM itself with absurd # of
draws.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>

freedreno/drm: Add nr_suballoc_bos size check

We also want to ensure we don't hit the limit of max suballoc BOs.
Piglit drawoverhead would manage to hit this.

Fixes: 48610676897 ("freedreno/drm: Add sub-allocator")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>

freedreno: Fix FD_MESA_DEBUG=nohw

We need to construct a dummy fence in this case.

Fixes: 48b5164356c ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>

freedreno/drm: Mark ring heap buffers for dumping

Ensure that these get FD_RELOC_DUMP flag set so cmdstream dumps and
devcore's capture them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>

radv: Always compile accel structure shaders on demand.

Some CTS tests enable all extensions ... , which combined with having
no shader cache on some platforms results in some CTS tests timing
out (in particular tests recreating the device all the time).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20422>

radv: Support on demand compilation of fmask shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20422>

r300: lower fsign in nir

Nothing significant in shader-db on RV530:
total instructions in shared programs: 134963 -> 134957 (<.01%)
instructions in affected programs: 1108 -> 1102 (-0.54%)
helped: 7
HURT: 1
total temps in shared programs: 17153 -> 17154 (<.01%)
temps in affected programs: 38 -> 39 (2.63%)
helped: 2
HURT: 3

Just some fluctuations from pair scheduling due to different code order.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20208>

r300: move some ftrunc lowering to nir

There are still some ftruncs left as most of them originates in
nir_lower_int_to_float and that is currently called after nir_opt_algebraic
in ntt.

No change in shader-db.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20208>

r300: use nir lowering for ffloor

Negligible amount of instructions saved on RV530:
total instructions in shared programs: 134970 -> 134963 (<.01%)
instructions in affected programs: 2273 -> 2266 (-0.31%)
helped: 9
HURT: 1

The one hurt shader is when we fail to recognize the x - ffract(x)
pattern and skip the don't emit ftrunc optimization as implemented
in the previous patch due to some non-trivial swizzles going on.

Signed-off-by: Pavel Ondračka <pave.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20208>

nir: check for x - ffract(x) patterns when lowering f2i32

We already skip emitting ftrunc in nir_lower_int_to_float when there is
ffloor, fround or any other integer-making opcode preceding f2i32. However
if lower_ffloor is set for driver that doesn't support integers, the lowered
x - ffract(x) patterns would not be recognized and extra ftruct would be
emitted, doing unnecessary rounding.

This optimization only works if there is no non-trivial swizzling used for
the fadd, fneg and ffract involved, which seems to be 99% of the cases according
to my testing.

This is needed to enable nir ffloor lowering on r300 driver without regressions.

I'm not sure if this helps anybody else, the only hardware which sets
lower_ffloor and converts ints to floats (and can't do trunc) are some old
etnaviv cards, so maybe it will help there a bit.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20208>

egl: handle NULL loaderPrivate in dri_is_thread_safe

This can happen when a context is created from
loader_dri3_blit_context_get and glthread is enabled.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7949
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7960
Cc: mesa-stable
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20479>

radv: use vk_dynamic_graphics_state for the color blend state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: rework some color blend state fields for vk_dynamic_graphics_state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the multisample state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the depth stencil state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the rasterization state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the discard rectangles state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphic_state for the viewport state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the input assembly state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the tessellation state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: use vk_dynamic_graphics_state for the fragment shading rate state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

radv: move viewport pre-computed xform outside of radv_viewport_state

I think we should distinguish between dynamic states (applications) and
hardware states, and this will allow us to use vk_viewport_state
instead of our own structs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20314>

vbo/save: avoid dangling_attr_ref situation

dangling_attr_ref=true can be set when the following happens:

  glBegin(GL_TRIANGLES)
  glVertex(...)
  glVertex(...)
  glColor4(...)
  glVertex(...)

When glColor4 is hit, the first 2 vertices are copied to the vertex_store
by upgrade_vertex, but since this is done before glColor4 new values are
copied, we make a note to fixup these attribute laters using dangling_attr_ref.

This causes very slow rendering. What this commit does instead, is in this
situation, the new attribute value are backported to the vertex store for the
copied vertices after upgrade_vertex is done updating the layout.

This avoids the slow corner case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7912

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20495>

vbo: simplify current_init since VBO_ATTRIB_POS is 0

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20495>

intel_noop_drm_shim: add ability to specify device id

Given a GPU platform, there are multiple device ids. This commit
adds ability to specify device id for the shim, instead of using
one of the hard-coded device ids per platform.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20526>

v3dv: initialize fd variable for proper error handling

Currently, process_singlesync_signals() checks if fd == -1 to handle
possible errors in the drmSyncobjExportSyncFile function. But, fd is not
initialized, which means that drmSyncobjExportSyncFile might fail and
the error will not be handled as fd might not be equal to -1.

Therefore, initialize the fd variable with value -1 to ensure proper
error handling.

cc: mesa-stable

Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20475>

ci/b2c: start making use of the harbor.fd.o

A new container registry was added recently in the fd.o infrastructure.
It is located in a datacenter that does not charge for bandwidth usage,
and aims to become the canonical registry in the future. It is however
currently configured to be a partial mirror of registry.fd.o, where
only the most-downloaded container images can be found.

The address of the new registry is specified in mesa/mesa's CI
variables, which means forks will default to registry.fd.o. However,
Valve Infra DUTs do not have access to the internet, and instead use
another cache proxy hosted locally on the CI gateways. This forced
Benjamin to overwrite the registry URL from harbor.freedesktop.org to
registry.freedesktop.org in 0bd9a062e1ab ("CI: Overwrite valve infra's
registry").

After adding support for the new registry in valve infra, then
deploying the update, we are now able to make use of the new container
registry. This commit simply rewrites the URL harbor.freedesktop.org
into `{{ harbor_fdo_registry }}`. This variable is set in the valve
infra to point to the `host:ip` of the service, which means changes to
the way we deploy this service can be done on the valve-infra side
without needing to make changes to every project that makes use of our
machines.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7913
Acked-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20450>

ac/nir: handle 16bit varying streamout for legacy vs and gs copy shader

This is for VARYING_SLOT_VARx_16BIT slots varying streamout.

OpenGL ES will store 16bit medium precision varying to these slots.
Vulkan is not allowed to streamout varying less than 32bit.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20157>

ac/nir,radv: use ac_nir_gs_output_info

We are also going to add more fields in it.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20157>

nir/xfb: save high_16bits output info

It is combined with slot location to identify a varying
when using VARYING_SLOT_VARx_16BIT.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20157>

zink: Only expose PIPE_CAP_SHADER_ATOMIC_INT64 if we can do shared and ssbos.

Fixes: 3ac0706aa83b ("zink: export PIPE_CAP_SHADER_ATOMIC_INT64")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20506>

zink: Only expose PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD if we can actually add.

Drivers may expose the ext without the add capability, if they can
load/store/exchange.

Fixes: c32f046ab669 ("zink: export PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20506>

util/00-mesa-defaults: add Metal Slug XX workaround

The game uses texture2D() in glsl 4.40 shaders, but texture2D()
was moved to compat in 4.20.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20511>

hasvk: Emit CS stall on INTEL_MEASURE timestamp

For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573b ("anv: implement u_trace support")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>

anv: Emit CS stall on INTEL_MEASURE timestamp

For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573b ("anv: implement u_trace support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>

ci/zink: Add trace testing on anv TGL.

For now the restricted traces aren't available to the intel devs, so it
won't actually run for them, but I can manage that part for a bit until we
get the policy updated on the minio side (issue filed to do so).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>

ci/zink: Add a manual full run of CTS+piglit on tgl.

If we want to ship zink on anv for ChromeOS, we've got to be able to know
that the tree is green when we uprev.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>

ci/zink: Refactor a bit of test configuration yaml.

I'm adding more zink tests shortly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>

ci: Set the path to the VK drivers during HWCI_START_XORG/WESTON.

If the test is running with zink, we want zink to be able to find the
vulkan driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>

ci/iris: Add some recent flakes.

APL are clearly part of the existing set, glx-swap-copy on KBL is
plausibly new but it's a flake on other drivers too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>

mesa: set NewVertexElements when changing IsDynamic

Fixes: 0fbd82bdc45 - mesa: move calling _mesa_update_vao_derived_arrays into st_update_array
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7938

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20432>

dzn: Handle split front/back compare/write masks for dynamic state

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>

dzn: For CmdBindIndexBuffer, look at the graphics pipeline instead of last used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>

dzn: Don't touch pMultisampleState if rasterizerDiscardEnable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>

dzn: Remove spammy logging during device create

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>

dzn: Flip on enhanced barrier code paths based on D3D capability

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Add an "enhanced" version of CmdPipelineBarrier2

This allows us to *much* more accurately express the app's barrier
requests. Unfortunately, there's still a few mismatches, so in those
cases we'll end up conservatively over-synchronizing/flushing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Add an enhanced barrier path for internal and fixup barriers

While enhanced barriers is a *much* closer model to Vulkan's, there's
still one big mismatch: Vulkan's "transfer" concept supports clears,
copies, and resolves, while D3D's closest match only supports copies.
So when doing clears and resolves, we need to transition from the copy
layout to the correct layout, and then back.

Internal barriers are done for some meta scenarios as well as render
pass initial layout transitions. These look more or less the same as
non-enhanced, we just want to avoid mixing the two paradigms if possible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: CmdWaitForEvents needs to submit barriers too

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Fix aspects used for blit barriers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Remove unnecessary read -> read transition barriers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Respect sharing mode

D3D's "simultaneous access" concept pretty closely matches
Vulkan's concurrent sharing mode, except that we don't
support simultaneous access for depth buffers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Store valid BARRIER_ACCESS flag masks for a few objects

A subset of total access flags are valid based on command list
type and resource flags, so store that set during object creation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Store command list type in the command buffer object

We'll want to use this for choosing queue-type-specific
layouts in the new pipeline barrier implementation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Create all buffers in COMMON state

Since they promote/decay, there's no point in using any
other initial state value.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

dzn: Delete initial_state which is always COMMON

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>

pvr: Remove PVR_STATIC_CLEAR_.*_BIT and use VkImageAspectFlags.

This commit removes the PVR_STATIC_CLEAR_.*_BIT used to index the
static clear templates in the device. Now we use the Vulkan flags
so no need for any conversion of the flags.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Implement color/depth/depth+stencil attachment clear.

The depth/depth+stencil clear was already implemented. This adds
the z replication and color attachment clear branches.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add clear attachment programs in device.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add comments documenting large/normal clear words.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add empty clear attachment usc programs.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Implement depth/stencil/depth+stencil attachment clear.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Fix typo in 'err_free_verices_buffer'.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add pvr_clear_vertices_upload().

This function allows to easily setup and upload the vertices
required to clear a specific area. The vertices are
arranged in a triangle strip.

This will also be used in following commits implementing
vkCmdClearAttachments().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Move static clear state into pvr_clear.c .

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add layer count support to pvr_clear_vdm_state().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Move clear VDM state into pvr_clear.h .

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add clear rta vert shader pds program.

The rta program will be used in following commits adding support
for vkCmdClearAttachments().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add pvr_clear.{h,c} .

This moves some clear related functionality into a new
pvr_clear.{h,c} just to for better organisation and allow for
easier reusability.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Add multi layer passthough vert shader upload in device.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

pvr: Change "ID" to "id" in instance_ID_modifier.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>

ci: Remove MESA_ARM_BUILD_TAG environment variable

Its value is already the same as MESA_IMAGE_TAG so no need to duplicate it.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20488>

ci: Bump crosvm and virglrenderer versions

Update virglrenderer and crosvm to the latest version on time.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20488>

r600/sfn: make sure we return a non-negative number of registers

If a shader doesn't use any register and only ssa values we might
end up with zero minimum registers, and because a unsigned is
returned that goes wrong.

Fixes: 565816dfa15214abbeef9a9d94e44f30507ca4d7
    r600/sfn: Set minimum required registers based on array allocation

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8008

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20516>

radv: rework generating the PS epilog key

Generating a PS epilog key will also be used when compiling PS epilogs
on-demand. This introduces a new helper that generates it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20485>

radv: simplify removing unused color exports

If CB_TARGET_MASK (color write mask) is 0 for a given MRT, this implies
that the color format is 0 because the driver compacts MRTs.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20485>