LLVM GN Syncbot [Mon, 4 Nov 2019 17:20:23 +0000 (17:20 +0000)]
gn build: Merge
40d0d4e2335
Oliver Stannard [Mon, 4 Nov 2019 13:10:37 +0000 (13:10 +0000)]
Fix static analysis warnings in ARM calling convention lowering
Fixes https://bugs.llvm.org/show_bug.cgi?id=43891
Jinsong Ji [Mon, 4 Nov 2019 16:27:23 +0000 (16:27 +0000)]
Lower generic MASSV entries to PowerPC subtarget-specific entries
This patch (second of two patches) lowers the generic PowerPC vector
entries to PowerPC subtarget-specific entries.
For instance, the PowerPC generic entry 'cbrtd2_massv' is lowered to
'cbrtd2_P9' or Power9 subtarget.
The first patch enables the vectorizer to recognize the IBM MASS vector
library routines. This patch specifically adds support for recognizing
the '-vector-library=MASSV' option, and defines mappings from IEEE
standard scalar math functions to generic PowerPC MASS vector
counterparts.
For instance, the generic PowerPC MASS vector entry for double-precision
'cbrt' function is '__cbrtd2_massv'
The overall support for MASS vector library is presented as such in two
patches for ease of review.
Patch by pjeeva01 (Jeeva P.)
Differential Revision: https://reviews.llvm.org/D59883
Amy Huang [Thu, 31 Oct 2019 16:15:53 +0000 (09:15 -0700)]
Recommit "[CodeView] Add option to disable inline line tables."
This reverts commit
004ed2b0d1b86d424643ffc88fce20ad8bab6804.
Original commit hash
6d03890384517919a3ba7fe4c35535425f278f89
Summary:
This adds a clang option to disable inline line tables. When it is used,
the inliner uses the call site as the location of the inlined function instead of
marking it as an inline location with the function location.
https://reviews.llvm.org/D67723
Peter Collingbourne [Sat, 2 Nov 2019 01:48:59 +0000 (18:48 -0700)]
ELF: Discard .ARM.exidx sections for empty functions instead of misordering them.
The logic added in r372781 caused ARMExidxSyntheticSection::addSection()
to return false for exidx sections without a link order dep that passed
isValidExidxSectionDep(). This included exidx sections for empty functions. As
a result, such exidx sections would end up treated like ordinary sections and
would end up being laid out before the ARMExidxSyntheticSection, most likely in
the wrong order relative to the exidx entries in the ARMExidxSyntheticSection,
breaking the orderedness invariant relied upon by unwinders. Fix this by
simply discarding such sections.
Differential Revision: https://reviews.llvm.org/D69744
Ulrich Weigand [Mon, 4 Nov 2019 16:42:32 +0000 (17:42 +0100)]
[FPEnv][SelectionDAG] Refactor strict FP node construction
Small refactoring in visitConstrainedFPIntrinsic that should make
it easier to create DAG nodes requiring extra arguments. That is
the case currently only for STRICT_FP_ROUND, but may be the case
for additional nodes (in particular compares) in the future.
Extracted from the patch for D69281.
NFC.
Ilya Biryukov [Mon, 4 Nov 2019 08:20:38 +0000 (09:20 +0100)]
[Sema] Make helper in TreeTransform.h 'inline' instead of 'static'. NFC
Summary:
There seems to be no evidence that having internal linkage for the function
was intentional. Since 'static' functions are normally used only in .cpp
files, using 'inline' in the header file is more appropriate.
Reviewers: Anastasia
Reviewed By: Anastasia
Subscribers: merge_guards_bot, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69242
Jonas Paulsson [Mon, 4 Nov 2019 15:52:41 +0000 (16:52 +0100)]
Fix buildbots troubled by b7b170c.
Add '# REQUIRES: systemz-registered-target' in the new tests.
Alexey Bataev [Wed, 30 Oct 2019 16:51:58 +0000 (12:51 -0400)]
[SLP]Fix PR43799: Crash on different sizes of GEP indices.
Summary:
If the GEP instructions are going to be vectorized, the indices in those
GEP instructions must be of the same type. Otherwise, the compiler may
crash when trying to build the vector constant.
Reviewers: RKSimon, spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69627
Simon Pilgrim [Mon, 4 Nov 2019 15:32:57 +0000 (15:32 +0000)]
[X86] Convert ShrinkMode to scoped enum class. NFCI.
Simon Pilgrim [Mon, 4 Nov 2019 15:30:18 +0000 (15:30 +0000)]
AliasSetTracker - fix uninitialized variable warnings. NFCI.
Dávid Bolvanský [Mon, 4 Nov 2019 15:26:21 +0000 (16:26 +0100)]
[Diagnostics] Improve some error messages related to bad use of dynamic_cast
Thomas Preud'homme [Thu, 10 Oct 2019 11:48:30 +0000 (11:48 +0000)]
[test] Use system locale for mri-utf8.test
Summary:
llvm-ar's mri-utf8.test test relies on the en_US.UTF-8 locale to be
installed for its last RUN line to work. If not installed, the unicode
string gets encoded (interpreted) as ascii which fails since the most
significant byte is non zero. This commit changes the test to only rely
on the system being able to encode the pound sign in its default
encoding (e.g. UTF-16 for Microsoft Windows) by always opening the file
via input/output redirection. This avoids forcing a given locale to be
present and supported. A Byte Order Mark is also added to help
recognizing the encoding of the file and its endianness. Finally the
XFAIL on system-darwin is removed since the test actually passes fine on
Mac OS X and XFAIL was only added because it failed before.
Reviewers: gbreynoo, MaskRay, rupprecht, JamesNagurne, jfb
Subscribers: dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68472
Jonas Paulsson [Mon, 4 Nov 2019 15:11:12 +0000 (16:11 +0100)]
[SystemZ] Use LivePhysRegs instead of isCCLiveOut() in SystemZElimCompare.cpp
Review: Ulrich Weigand
https://reviews.llvm.org/D68267
Jonas Paulsson [Mon, 4 Nov 2019 14:59:18 +0000 (15:59 +0100)]
[MachineVerifier] Improve verification of live-in lists.
MachineVerifier::visitMachineFunctionAfter() is extended to check the
live-through case for live-in lists. This is only done for registers without
aliases and that are neither allocatable or reserved, such as the SystemZ::CC
register.
The MachineVerifier earlier only catched the case of a live-in use without
an entry in the live-in list (as "using an undefined physical register").
A comment in LivePhysRegs.h has been added stating a guarantee that
addLiveOuts() can be trusted for a full register both before and after
register allocation.
Review: Quentin Colombet
https://reviews.llvm.org/D68267
Simon Pilgrim [Mon, 4 Nov 2019 15:07:37 +0000 (15:07 +0000)]
SanitizerMask::bitPosToMask - fix operator precedence warnings. NFCI.
Fix static analyzer operator precedence warnings with suitable bracketing. Pull out the mask generation code so clang-format doesn't make such a mess of it.
Simon Pilgrim [Mon, 4 Nov 2019 13:17:14 +0000 (13:17 +0000)]
[X86] Regenerate known-signbits-vector.ll tests.
Use X86 instead of X32 and add a common CHECK prefix
Sven van Haastregt [Mon, 4 Nov 2019 14:51:24 +0000 (14:51 +0000)]
[OpenCL] Fix FileCheck pattern
For this test, FileCheck is not run with the CHECK prefix; it seems
COMMON was intended here.
David Green [Mon, 4 Nov 2019 14:06:04 +0000 (14:06 +0000)]
[ARM] Use isFMAFasterThanFMulAndFAdd for MVE
The Arm backend will usually return false for isFMAFasterThanFMulAndFAdd,
where both the fused VFMA.f32 and a non-fused VMLA.f32 are usually
available for scalar code. For MVE we don't have the non-fused version
though. It makes more sense for isFMAFasterThanFMulAndFAdd to return
true, allowing us to simplify some of the existing ISel patterns.
The tests here are that non of the existing tests failed, and so we are
still selecting VFMA and VFMS. The one test that changed shows we can
now select from fast math flags, as opposed to just relying on the
isFMADLegalForFAddFSub option.
Differential Revision: https://reviews.llvm.org/D69115
Sanjay Patel [Mon, 4 Nov 2019 15:02:08 +0000 (10:02 -0500)]
[IR] adjust assert when replacing undef elements in vector constant
As noted in follow-up to:
rGa1e8ad4f2fa7
It's not safe to assume that an element of the constant is always
non-null. It's definitely not an expected case for the current
instcombine user, but that may not hold if this function is
eventually called from arbitrary places.
Michael Liao [Mon, 4 Nov 2019 14:59:39 +0000 (09:59 -0500)]
Fix compilation warning. NFC.
Ulrich Weigand [Mon, 4 Nov 2019 15:00:32 +0000 (16:00 +0100)]
[SystemZ] Fix typo
Typo in comment. NFC.
Nico Weber [Mon, 4 Nov 2019 14:51:41 +0000 (09:51 -0500)]
gn build: (manually) merge
51b4b17eb
Also reverts r353980 since that duplicated the GenAsmMatcher target for
AArch64. Instead use visiblity.
Nico Weber [Mon, 4 Nov 2019 14:50:16 +0000 (09:50 -0500)]
gn build: run "gn format"
Nico Weber [Mon, 4 Nov 2019 14:18:05 +0000 (09:18 -0500)]
gn build: add deps, see discussion on D69130
Benjamin Kramer [Mon, 4 Nov 2019 14:04:42 +0000 (15:04 +0100)]
Revert "[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)"
This reverts commit
2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b. Fails ASAN.
David Green [Mon, 4 Nov 2019 13:38:09 +0000 (13:38 +0000)]
[ARM] More MVE shuffle tests for sequences that can be converted to VMOVS. NFC.
David Green [Mon, 4 Nov 2019 13:33:22 +0000 (13:33 +0000)]
[ARM] Add vrev32 NEON fp16 patterns
Fill in the gaps for vrev32.16 f16 patterns, extending the existing i16
patterns.
Differential Revision: https://reviews.llvm.org/D69508
Sanjay Patel [Mon, 4 Nov 2019 13:29:56 +0000 (08:29 -0500)]
[InstSimplify] use FMF to improve fcmp+select fold
This is part of a series of patches needed to solve PR39535:
https://bugs.llvm.org/show_bug.cgi?id=39535
Sanjay Patel [Mon, 4 Nov 2019 13:23:08 +0000 (08:23 -0500)]
[InstSimplify] add more tests for fcmp+select; NFC
The easy code fix won't catch non-canonical mismatched
constant patterns, so adding extra coverage for those in
case we decide that's important (but seems unlikely).
Sven van Haastregt [Mon, 4 Nov 2019 13:12:17 +0000 (13:12 +0000)]
[OpenCL] Fix address space for const method call from nonconst (PR43145)
Patch by Anastasia Stulova and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D68781
Ulrich Weigand [Mon, 4 Nov 2019 12:26:38 +0000 (13:26 +0100)]
[SystemZ] Add GHC calling convention
This is a special calling convention to be used by the GHC compiler.
Author: Stefan Schulze Frielinghaus
Differential Revision: https://reviews.llvm.org/D69024
Sanjay Patel [Mon, 4 Nov 2019 12:36:03 +0000 (07:36 -0500)]
[InstSimplify] add more tests for fcmp+select; NFC
The addition of FMF for select allows more folding for these
kinds of patterns.
James Henderson [Mon, 4 Nov 2019 12:00:39 +0000 (12:00 +0000)]
[llvm-readobj] Change errors to warnings for symbol section name dumping
Also only print each such warning once.
LLVM-style output will now print "<?>" for sections it cannot identify,
e.g. because the section index is invalid. GNU output continues to print
the raw index. In both cases where the st_shndx value is SHN_XINDEX and
the index cannot be looked up in the SHT_SYMTAB_SHNDX section (e.g.
because it is missing), the symbol is printed like other symbols with
st_shndx >= SHN_LORESERVE.
Reviewed by: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D69671
Simon Pilgrim [Mon, 4 Nov 2019 11:37:42 +0000 (11:37 +0000)]
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (REAPPLIED)
If we don't demand all elements, then attempt to combine to a simpler shuffle.
At the moment we can only do this if Depth == 0 as combineX86ShufflesRecursively uses Depth to track whether the shuffle has really changed or not - we'll need to change this before we can properly start merging combineX86ShufflesRecursively into SimplifyDemandedVectorElts (see D66004).
This reapplies rL368307 (reverted at rL369167) after the fix for the infinite loop reported at PR43024 was applied at rG3f087e38a2e7b87a5adaaac1c1b61e51220e7ff3
Diogo Sampaio [Mon, 4 Nov 2019 10:41:32 +0000 (10:41 +0000)]
[FIX] Removed duplicated v4f16 and v8f16 declarations
Reviewers: RKSimon, ostannard
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69795
Luís Marques [Mon, 4 Nov 2019 11:21:51 +0000 (11:21 +0000)]
[RISCV] Implement the TargetLowering::getRegisterByName hook
Summary: The hook should work for any RISC-V register. Non-allocatable registers
do not need to be reserved, for the remaining the hook will only succeed
if you pass clang the -ffixed-xX flag. This builds upon D67185, which
currently only allows reserving GPRs.
Reviewers: asb, lenary
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69130
David Spickett [Mon, 4 Nov 2019 10:58:46 +0000 (10:58 +0000)]
[hwasan] Remove lazy thread-initialisation
This was an experiment made possible by a non-standard feature of the
Android dynamic loader.
It required introducing a flag to tell the compiler which ABI was being
targeted.
This flag is no longer needed, since the generated code now works for
both ABI's.
We leave that flag untouched for backwards compatibility. This also
means that if we need to distinguish between targeted ABI's again
we can do that without disturbing any existing workflows.
We leave a comment in the source code and mention in the help text to
explain this for any confused person reading the code in the future.
Patch by Matthew Malcomson
Differential Revision: https://reviews.llvm.org/D69574
Raphael Isemann [Mon, 4 Nov 2019 10:14:26 +0000 (11:14 +0100)]
[lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind
Ocaml support was removed.
Raphael Isemann [Mon, 4 Nov 2019 10:12:27 +0000 (11:12 +0100)]
[lldb][NFC] Remove unused ExpressionParser::Parse
Summary:
This function is only used internally by ClangExpressionParser. By putting it in the ExpressionParser class all languages
that implement ExpressionParser::Parse have to share the same signature (which forces us in downstream to add
swift-specific arguments to ExpressionParser::Parse which then propagate to ClangExpressionParser and so on).
Reviewers: davide
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69710
Jonas Paulsson [Sat, 2 Nov 2019 08:38:25 +0000 (09:38 +0100)]
[SystemZ] Improve handling of huge PC relative immediate offsets.
Demand that an immediate offset to a PC relative address fits in 32 bits, or
else load it into a register and perform a separate add.
Verify in the assembler that such immediate offsets fit the bitwidth.
Even though the final address of a Load Address Relative Long may fit in 32
bits even with a >32 bit offset (depending on where the symbol lives relative
to PC), the GNU toolchain demands the offset by itself to be in range. This
patch adapts the same behavior for llvm.
Review: Ulrich Weigand
https://reviews.llvm.org/D69749
Gil Rapaport [Mon, 7 Oct 2019 14:24:33 +0000 (17:24 +0300)]
[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)
The sink-after and interleave-group vectorization decisions were so far applied to
VPlan during initial VPlan construction, which complicates VPlan construction – also because of
their inter-dependence. This patch refactors buildVPlanWithRecipes() to construct a simpler
initial VPlan and later apply both these vectorization decisions, in order, as VPlan-to-VPlan
transformations.
Differential Revision: https://reviews.llvm.org/D68577
Raphael Isemann [Mon, 4 Nov 2019 08:25:01 +0000 (09:25 +0100)]
[lldb][NFC] Make test/python_api/module_section test smaller
Summary:
I don't see why this test needs to compile this rather complicated file for just testing module sections. This just removes all this code with a simple
"Hello world!" program which should be faster to compile
Reviewers: labath, davide, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: jfb, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69705
Raphael Isemann [Mon, 4 Nov 2019 08:23:37 +0000 (09:23 +0100)]
[lldb] Also disable de-registration of EHFrames in IRExecutionUnit
Summary:
We disabled registration by providing an empty `registerEHFrames`, so we should also provide an empty `deregisterEHFrames`
in case that function relies on `registerEHFrames` being called before. Currently `deregisterEHFrames` is a no-op anyway
as it just iterates over the (empty( list of registered EHFrames and then clear the empty list.
Reviewers: davide, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69713
Raphael Isemann [Mon, 4 Nov 2019 08:05:24 +0000 (09:05 +0100)]
[lldb] Provide a getter for m_materializer_up in LLVMUserExpression instead of relying on it being accessible.
Summary:
Motivated by Swift using the materializer in a few places which requires us to add this getter ourselves.
We also need a setter, but let's keep this minimal to unblock the downstream reverts in Swift.
Reviewers: davide
Reviewed By: davide
Subscribers: abidh, JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69714
Raphael Isemann [Mon, 4 Nov 2019 07:35:56 +0000 (08:35 +0100)]
[lldb] Add trailing dots to comments in Value.cpp
Reviewers: JDevlieghere
Reviewed By: JDevlieghere
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69717
Pengfei Wang [Mon, 4 Nov 2019 07:13:51 +0000 (23:13 -0800)]
Set the floating point status register as reserved
Summary:
This patch sets the FPSW (X87 floating-point status register) as a reserved
physical register and fix the test failure caused by [[ https://reviews.llvm.org/D68854| D68854 ]].
Before this patch, some tests will fail because it implicit uses FPSW without
define it. Setting the FPSW as a reserved physical register will skip liveness
analysis because it is always live.
Reviewers: pengfei, craig.topper
Reviewed By: craig.topper
Subscribers: craig.topper, hiraditya, llvm-commits
Patch by LiuChen.
Differential Revision: https://reviews.llvm.org/D69784
Duncan P. N. Exon Smith [Mon, 4 Nov 2019 03:29:29 +0000 (19:29 -0800)]
clang/Modules: Sink CompilerInstance::KnownModules into ModuleMap
Avoid use-after-frees when FrontendAction::BeginSourceFile is called
twice on the same CompilerInstance by sinking
CompilerInstance::KnownModules into ModuleMap. On the way, rename the
map to CachedModuleLoads. I considered (but rejected) merging this with
ModuleMap::Modules, since that only has top-level modules and this map
includes submodules.
This is an alternative to https://reviews.llvm.org/D58497. Thanks to
nemanjai for the detailed analysis of the problem!
Kamil Rytarowski [Mon, 4 Nov 2019 00:10:59 +0000 (01:10 +0100)]
[compiler-rt] [msan] Correct the __libc_thr_keycreate prototype
Fixes build with GCC8.
Kamil Rytarowski [Mon, 4 Nov 2019 00:08:53 +0000 (01:08 +0100)]
[compiler-rt] [msan] Support POSIX iconv(3) on NetBSD 9.99.17+
Fixes build of test.
Simon Atanasyan [Sun, 3 Nov 2019 18:46:57 +0000 (21:46 +0300)]
[mips] Move test case for Octeon instructions to cnmips sub-folder. NFC
Simon Atanasyan [Sun, 3 Nov 2019 16:12:19 +0000 (19:12 +0300)]
[mips] Add disassembler tests for `octeon` CPU. NFC
Simon Atanasyan [Sun, 3 Nov 2019 15:22:32 +0000 (18:22 +0300)]
[mips] Add disassembler tests for `sigrie` instruction. NFC
Simon Pilgrim [Sun, 3 Nov 2019 21:10:22 +0000 (21:10 +0000)]
[X86][SSE] combineX86ShufflesRecursively - at Depth==0, only resolve KnownZero if it removes an input.
This stops infinite loops where KnownUndef elements are converted to Zeroable, resulting in KnownZero elements which are then simplified (via SimplifyDemandedElts etc.) back to KnownUndef elements........
Prep fix for PR43024 which will allow rL368307 to be re-applied.
Dávid Bolvanský [Sun, 3 Nov 2019 19:40:53 +0000 (20:40 +0100)]
[SIMachineScheduler] Fixed ''then' statement is equivalent to the 'else' statement.' warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:38:29 +0000 (20:38 +0100)]
[SILoadStoreOptimizer] Fixed typo. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:34:54 +0000 (20:34 +0100)]
Reland '[InstructionCombining] Fixed null check after dereferencing warning. NFCI.'
Dávid Bolvanský [Sun, 3 Nov 2019 19:31:05 +0000 (20:31 +0100)]
Revert "[InstructionCombining] Fixed null check after dereferencing warning. NFCI."
This reverts commit
8308187fd9bfa08ffad0a636d4dd1d25e7de5a76. This exposed a bug.
Dávid Bolvanský [Sun, 3 Nov 2019 19:28:45 +0000 (20:28 +0100)]
[SCEV] Fixed 'Uninitialized variable 'ContainsAddRec' used.' warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:27:40 +0000 (20:27 +0100)]
[MemorySSA] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:24:01 +0000 (20:24 +0100)]
Revert "[InstructionCompares] Fixed null check after dereferencing warning. NFCI."
This reverts commit
b8685cf3042f6a2e129061922bd6b18e3c42258e.
Dávid Bolvanský [Sun, 3 Nov 2019 19:13:45 +0000 (20:13 +0100)]
[InstructionCompares] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:10:46 +0000 (20:10 +0100)]
[InstructionCombining] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:06:38 +0000 (20:06 +0100)]
[CHR] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:03:54 +0000 (20:03 +0100)]
[LoopUnrollRuntime] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 19:02:54 +0000 (20:02 +0100)]
[LoopUnrollAndJam] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 18:45:25 +0000 (19:45 +0100)]
[BitcodeReader] Fixed use after move warnings. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 18:42:11 +0000 (19:42 +0100)]
[BitcodeReader] Fixed null check after dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 18:40:26 +0000 (19:40 +0100)]
[BitcodeReader] Fixed null pointer dereferencing warning. NFCI.
Dávid Bolvanský [Sun, 3 Nov 2019 18:34:03 +0000 (19:34 +0100)]
[SelectionDAG] Fixed null check after dereferencing warning. NFCI.
Craig Topper [Sun, 3 Nov 2019 17:30:08 +0000 (09:30 -0800)]
[opaque pointer types] Add element type argument to IRBuilder CreatePreserveStructAccessIndex and CreatePreserveArrayAccessIndex
Summary:
These were the only remaining users of the GetElementPtrInst::getGEPReturnType
method that gets the element type from the pointer type.
Remove that method since its now dead.
Reviewers: jyknight, t.p.northover, arsenm
Reviewed By: arsenm
Subscribers: wdng, arsenm, arphaman, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D69756
Nico Weber [Sun, 3 Nov 2019 17:52:12 +0000 (12:52 -0500)]
gn build: (manually) merge
3a399c09 /
add76dd3c
Simon Pilgrim [Sun, 3 Nov 2019 17:45:32 +0000 (17:45 +0000)]
[X86][SSE] combineX86ShufflesRecursively - don't bother merging shuffles with empty roots. NFCI.
This doesn't affect actual codegen, but is a minor refactor toward fixing PR43024 where we need to avoid excess changes (folding zeroables etc.) to the shuffle mask at Depth == 0.
Simon Pilgrim [Sun, 3 Nov 2019 17:27:51 +0000 (17:27 +0000)]
[X86] Convert PICStyles::Style to scoped enum class. NFCI.
Fixes MSVC static analyzer warnings about enum safety, this enum performs no integer math so it'd be better to fix its scope.
Bjorn Pettersson [Sun, 3 Nov 2019 16:37:34 +0000 (17:37 +0100)]
[DebugInfo] Fix for DW_OP_LLVM_fragment in DIExpression::isImplicit()
DIExpression::isImplicit() did not handle DW_OP_LLVM_fragment
correctly. It was scanning the elements in the expression by
iterating from the end. But we do not know the position of
ops unless we iterate from the beginning of the expression,
since DW_OP:s and their operands are stored flat in the expression
list. The old code also assumed that a DW_OP_LLVM_fragment
only occupied one element in the expression list, but it actually
occupies three elements.
Yonghong Song [Sun, 3 Nov 2019 14:54:39 +0000 (06:54 -0800)]
[BPF] fix a bug in __builtin_preserve_field_info() with FIELD_BYTE_SIZE
During deriving proper bitfield access FIELD_BYTE_SIZE,
function Member->getStorageOffsetInBits() is used to
get llvm IR type storage offset in bits so that
the byte size can permit aligned loads/stores with previously
derived FIELD_BYTE_OFFSET.
The function should only be used with bitfield members and it will
assert if ASSERT is turned on during cmake build.
Constant *getStorageOffsetInBits() const {
assert(getTag() == dwarf::DW_TAG_member && isBitField());
if (auto *C = cast_or_null<ConstantAsMetadata>(getExtraData()))
return C->getValue();
return nullptr;
}
This patch fixed the issue by using Member->isBitField()
directly and a test case is added to cover this missing case.
This issue is discovered when running Andrii's linux kernel CO-RE
tests.
Differential Revision: https://reviews.llvm.org/D69761
Kamil Rytarowski [Sun, 3 Nov 2019 15:47:03 +0000 (16:47 +0100)]
[compiler-rt] Harmonize __sanitizer_addrinfo with the NetBSD headers
Add missing pad for sparc, alpha and a variation of i386.
Kamil Rytarowski [Sun, 3 Nov 2019 15:17:26 +0000 (16:17 +0100)]
[compiler-rt] Sync NetBSD syscall hooks with 9.99.17
Document the minimal version supported as 9.0 and add compat code for
renamed syscalls after 9.0.
Aaron Puchert [Sun, 3 Nov 2019 13:29:59 +0000 (14:29 +0100)]
Drop spurious self-include [NFC]
This was introduced in D61357, probably by accident.
Simon Pilgrim [Sun, 3 Nov 2019 11:33:57 +0000 (11:33 +0000)]
ModuleMap::findHeader - fix null dereference warning. NFCI.
We were checking M for a null value after we'd already dereferenced it multiple times.
Simon Pilgrim [Sun, 3 Nov 2019 11:27:57 +0000 (11:27 +0000)]
SymbolRecord - fix more uninitialized variable warnings. NFCI.
Simon Pilgrim [Sun, 3 Nov 2019 11:23:53 +0000 (11:23 +0000)]
Fix uninitialized variable warnings. NFCI.
Simon Pilgrim [Sun, 3 Nov 2019 11:20:12 +0000 (11:20 +0000)]
Fix line_iterator uninitialized variable warnings. NFCI.
Allows us to auto define the default constructor as well.
Simon Pilgrim [Sun, 3 Nov 2019 11:17:05 +0000 (11:17 +0000)]
Ensure VPlanPrinter::Depth is initialized to fix static analyzer warning. NFCI.
Simon Pilgrim [Sun, 3 Nov 2019 11:15:55 +0000 (11:15 +0000)]
Fix uninitialized variable warning. NFCI.
shkzhang [Sun, 3 Nov 2019 03:59:12 +0000 (23:59 -0400)]
[CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when vector size isn't power of 2
Summary:
For below test case, we will get assert error except for AArch64 and ARM:
declare i8 @llvm.experimental.vector.reduce.and.i8.v3i8(<3 x i8> %a)
define i8 @test_v3i8(<3 x i8> %a) nounwind {
%b = call i8 @llvm.experimental.vector.reduce.and.i8.v3i8(<3 x i8> %a)
ret i8 %b
}
In the function getShuffleReduction (), we can see it needs the vector size must be power of 2.
This patch is fix below error when the number of element is not power of 2 for those llvm.experimental.vector.reduce.* function.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D68625
Fangrui Song [Sat, 2 Nov 2019 22:57:10 +0000 (15:57 -0700)]
[CodeGenCXX][test] Use -fno-experimental-new-pass-manager for CodeGenCXX/union-tbaa2.cpp after D68593/llvmorg-10-init-8907-gcecc0d27ad5
It fails with -DENABLE_EXPERIMENTAL_NEW_PASS_MANAGER=0 builds. Temporarily use -fno-experimental-new-pass-manager while we are investigating the root cause.
Simon Pilgrim [Sat, 2 Nov 2019 22:38:07 +0000 (22:38 +0000)]
Stop static analyzer warnings about using bitwise operators on booleans. NFCI.
Call each of the rebase_if() calls separately.
Simon Pilgrim [Sat, 2 Nov 2019 22:26:00 +0000 (22:26 +0000)]
TargetParserTest - testARMArch - stop bitwise operators on boolean warnings. NFCI.
Ensure the test still runs all target checks but stop the static analyzer warnings.
Fangrui Song [Sat, 2 Nov 2019 21:54:59 +0000 (14:54 -0700)]
CodeGen/DIE.h: prefer the default member initializer to the member initializers in the constructor. NFC
Simon Atanasyan [Sat, 2 Nov 2019 13:35:52 +0000 (16:35 +0300)]
[mips] Remove trailing spaces. NFC
Simon Atanasyan [Sat, 2 Nov 2019 13:33:10 +0000 (16:33 +0300)]
[mips] Split long lines in the code. NFC
Simon Pilgrim [Sat, 2 Nov 2019 21:49:12 +0000 (21:49 +0000)]
A15SDOptimizer::getPrefSPRLane - fix null dereference warning. NFCI
Simon Pilgrim [Sat, 2 Nov 2019 21:28:37 +0000 (21:28 +0000)]
isConditionalBranch/isUnconditionalBranch - use boolean operators. NFCI.
Stop static analyzer warnings about using bitwise operators on booleans.
Florian Hahn [Sat, 2 Nov 2019 17:45:33 +0000 (18:45 +0100)]
[LV] Generalize conditions for sinking instrs for first order recurrences.
If the recurrence PHI node has a single user, we can sink any
instruction without side effects, given that all users are dominated by
the instruction computing the incoming value of the next iteration
('Previous'). We can sink instructions that may cause traps, because
that only causes the trap to occur later, but not on any new paths.
With the relaxed check, we also have to make sure that we do not have a
direct cycle (meaning PHI user == 'Previous), which indicates a
reduction relation, which potentially gets missed by
ReductionDescriptor.
As follow-ups, we can also sink stores, iff they do not alias with
other instructions we move them across and we could also support sinking
chains of instructions and multiple users of the PHI.
Fixes PR43398.
Reviewers: hsaito, dcaballe, Ayal, rengolin
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D69228
Simon Pilgrim [Sat, 2 Nov 2019 21:03:36 +0000 (21:03 +0000)]
isImmPCRel/isImmSigned - both functions should return bool not unsigned. NFCI.
Simon Pilgrim [Sat, 2 Nov 2019 21:01:45 +0000 (21:01 +0000)]
MatchTableRecord::emit - fix boolean operator precedence warnings from PVS Studio. NFCI.
Make it clear that (Flags & MTRF_????) should resolve to a boolean.
Johannes Doerfert [Sat, 2 Nov 2019 19:47:45 +0000 (14:47 -0500)]
[Attributor][NFCI] Do not track unnecessary dependences
If we do not look at assumed information there is no need to track
dependences.
Johannes Doerfert [Sat, 2 Nov 2019 07:48:05 +0000 (02:48 -0500)]
[Attributor][NFCI] Distinguish optional and required dependences
Dependences between two abstract attributes SRC and TRG come naturally in
two flavors:
Either (1) "some" information of SRC is *required* for TRG to derive
information, or (2) SRC is just an *optional* way for TRG to derive
information.
While it is not strictly necessary to distinguish these types
explicitly, it can help us to converge faster, in terms of iterations,
and also cut down the number of `AbstractAttribute::update` calls.
As far as I can tell, we only use optional dependences for liveness so
far but that might change in the future. With this change the Attributor
can be informed about the "dependence class" and it will perform
appropriate actions when an Attribute is set to an invalid state, thus
one that cannot be used by others to derive information from.
Simon Pilgrim [Sat, 2 Nov 2019 20:12:35 +0000 (20:12 +0000)]
Fix -Wreorder warnings. NFCI.