Dmitry Baryshkov [Wed, 31 May 2023 01:16:12 +0000 (04:16 +0300)]
arm64: dts: qcom: sm8450-hdk: remove useless enablement of mdss_mdp
The MDP/DPU device is not disabled by default, so there is not point in
enabling it in the board DTS file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-4-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Wed, 31 May 2023 01:16:11 +0000 (04:16 +0300)]
arm64: dts: qcom: sm8350-hdk: remove useless enablement of mdss_mdp
The MDP/DPU device is not disabled by default, so there is not point in
enabling it in the board DTS file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-3-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Wed, 31 May 2023 01:16:10 +0000 (04:16 +0300)]
arm64: dts: qcom: sc7280: Don't disable MDP explicitly
MDSS and all its subdevices are useless without DPU/MDP, so disabling
MDP doesn't make any sense. Remove explicit disabling of the DPU device.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-2-dmitry.baryshkov@linaro.org
Poovendhan Selvaraj [Wed, 31 May 2023 03:26:48 +0000 (08:56 +0530)]
arm64: dts: qcom: ipq9574: add support for RDP454 variant
Add the initial device tree support for the Reference Design Platform (RDP)
454 based on IPQ9574 family of SoCs. This patch adds support for Console
UART, SPI NOR and SMPA1 regulator node.
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531032648.23816-3-quic_poovendh@quicinc.com
Poovendhan Selvaraj [Wed, 31 May 2023 03:26:47 +0000 (08:56 +0530)]
dt-bindings: arm: qcom: document AL02-C9 board based on IPQ9574 family
Document AL02-C9 (Reference Design Platform 454) board based on IPQ9574
family of SoCs.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531032648.23816-2-quic_poovendh@quicinc.com
Konrad Dybcio [Wed, 31 May 2023 15:04:24 +0000 (17:04 +0200)]
arm64: dts: qcom: sm6375: Add GPUCC and Adreno SMMU
Add GPUCC and Adreno SMMU nodes in preparation for adding the GPU
itself.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-sm6375_gpusmmu-v1-2-860943894c71@linaro.org
Abel Vesa [Thu, 1 Jun 2023 10:38:17 +0000 (13:38 +0300)]
arm64: dts: qcom: sm8550: Add missing interconnect path to USB HC
The USB HC node is missing the interconnect paths, so add them.
Fixes:
7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601103817.4066446-1-abel.vesa@linaro.org
Komal Bajaj [Thu, 1 Jun 2023 11:11:28 +0000 (16:41 +0530)]
arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc
Add sdhci node for emmc in qdu1000-idp.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601111128.19562-4-quic_kbajaj@quicinc.com
Komal Bajaj [Thu, 1 Jun 2023 11:11:27 +0000 (16:41 +0530)]
arm64: dts: qcom: qdu1000: Add SDHCI node
Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs. Also add
required pins for SDHCI, so that the interface can work reliably.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601111128.19562-3-quic_kbajaj@quicinc.com
Abel Vesa [Fri, 2 Jun 2023 06:20:16 +0000 (09:20 +0300)]
arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC
The USB HC node is missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-6-abel.vesa@linaro.org
Abel Vesa [Fri, 2 Jun 2023 06:20:15 +0000 (09:20 +0300)]
arm64: dts: qcom: sm8350: Add missing interconnect paths to USB HCs
The USB HCs nodes are missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-5-abel.vesa@linaro.org
Abel Vesa [Fri, 2 Jun 2023 06:20:14 +0000 (09:20 +0300)]
arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs
The USB HCs nodes are missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-4-abel.vesa@linaro.org
Abel Vesa [Fri, 2 Jun 2023 06:20:13 +0000 (09:20 +0300)]
arm64: dts: qcom: sm8250: Use 2 interconnect cells
Use two interconnect cells in order to optionally support a path tag.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-3-abel.vesa@linaro.org
Abel Vesa [Fri, 2 Jun 2023 06:20:12 +0000 (09:20 +0300)]
arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs
The USB HCs nodes are missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-2-abel.vesa@linaro.org
Abel Vesa [Fri, 2 Jun 2023 06:20:11 +0000 (09:20 +0300)]
arm64: dts: qcom: sm8150: Use 2 interconnect cells
Use two interconnect cells in order to optionally support a path tag.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-1-abel.vesa@linaro.org
Marijn Suijten [Tue, 6 Jun 2023 21:14:18 +0000 (23:14 +0200)]
arm64: dts: qcom: sm8250-edo: Panel framebuffer is 2.5k instead of 4k
The framebuffer configuration for edo pdx203, written in edo dtsi (which
is overwritten in pdx206 dts for its smaller panel) has to use a
1096x2560 configuration as this is what the panel (and framebuffer area)
has been initialized to. Downstream userspace also has access to (and
uses) this 2.5k mode by default, and only switches the panel to 4k when
requested.
This is similar to commit
be8de06dc397 ("arm64: dts: qcom:
sm8150-kumano: Panel framebuffer is 2.5k instead of 4k") which fixed the
same for the previous generation Sony platform.
Fixes:
69cdb97ef652 ("arm64: dts: qcom: sm8250: Add support for SONY Xperia 1 II / 5 II (Edo platform)")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230606211418.587676-1-marijn.suijten@somainline.org
Konrad Dybcio [Tue, 6 Jun 2023 23:04:19 +0000 (01:04 +0200)]
arm64: dts: qcom: qcm2290: Add CPU idle states
Add the (scarce) idle states for the individual CPUs, as well as the
whole cluster. This enables deeper-than-WFI cpuidle
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230606-topic-qcm2290_idlestates-v2-1-580a5a2d28c9@linaro.org
Rudraksha Gupta [Wed, 7 Jun 2023 05:00:20 +0000 (01:00 -0400)]
dt-bindings: arm: qcom: Add Samsung Galaxy Express
Add a compatible for Samsung Galaxy Express SGH-I437.
Signed-off-by: Rudraksha Gupta <guptarud@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230607050025.86636-2-guptarud@gmail.com
Varadarajan Narayanan [Wed, 7 Jun 2023 08:53:10 +0000 (14:23 +0530)]
arm64: dts: qcom: ipq9574: add thermal zone nodes
This patch adds thermal zone nodes for the various
sensors present in IPQ9574
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/404c88e9746b3f25585aef078861ec2c273232d5.1686125196.git.quic_varada@quicinc.com
Varadarajan Narayanan [Wed, 7 Jun 2023 08:53:09 +0000 (14:23 +0530)]
arm64: dts: qcom: ipq9574: add tsens node
IPQ9574 has a tsens v2.3.1 peripheral which monitors temperatures
around the various subsystems on the die.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/00fa16039db78dcb919bd15444bbf86ff3a340d6.1686125196.git.quic_varada@quicinc.com
Robert Marko [Wed, 7 Jun 2023 18:44:48 +0000 (20:44 +0200)]
arm64: dts: qcom: ipq8074: add critical thermal trips
According to bindings, thermal zones must have associated trips as well.
Since we currently dont have CPUFreq support and thus no passive cooling
lets start by defining critical trips to protect the devices against
severe overheating.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230607184448.2512179-1-robimarko@gmail.com
Yassine Oudjana [Sat, 27 May 2023 09:39:33 +0000 (12:39 +0300)]
arm64: dts: qcom: msm8996pro: Add CBF scaling support
Add opp-peak-kBps to CPU OPPs to allow for CBF scaling, and change the
CBF compatible to reflect the difference between it and the one on
MSM8996.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230527093934.101335-3-y.oudjana@protonmail.com
Joel Selvaraj [Fri, 26 May 2023 21:50:24 +0000 (22:50 +0100)]
arm64: dts: qcom: sdm845-xiaomi-beryllium: enable pmi8998 charger
Enable the pmi8998 charger and define some basic battery properties.
Signed-off-by: Joel Selvaraj <joelselvaraj.oss@gmail.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524-pmi8998-charger-dts-v2-5-2a5c77d2ff0c@linaro.org
Caleb Connolly [Fri, 26 May 2023 21:50:23 +0000 (22:50 +0100)]
arm64: dts: qcom: sdm845-shift-axolotl: enable pmi8998 charger
Enable the PMI8998/smb2 charger, and denote the secondary SMB1355
charger which is used for parallel charging.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524-pmi8998-charger-dts-v2-4-2a5c77d2ff0c@linaro.org
Caleb Connolly [Fri, 26 May 2023 21:50:22 +0000 (22:50 +0100)]
arm64: dts: qcom: sdm845-oneplus: enable pmi8998 charger
Enable the pmi8998 charger on both devices, enabling charging speeds
above the default 500mA limit the bootloader sets.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524-pmi8998-charger-dts-v2-3-2a5c77d2ff0c@linaro.org
Caleb Connolly [Fri, 26 May 2023 21:50:21 +0000 (22:50 +0100)]
arm64: dts: qcom: pmi8998: add charger node
Add a node for the smb2 charger hardware found on the pmi8998 pmic
following the DT bindings.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524-pmi8998-charger-dts-v2-2-2a5c77d2ff0c@linaro.org
Caleb Connolly [Fri, 26 May 2023 21:50:20 +0000 (22:50 +0100)]
arm64: dts: qcom: pmi8998: enable rradc by default
There is no need for the RRADC to be disabled by default,
lets just enable it by default and not clutter up DT.
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524-pmi8998-charger-dts-v2-1-2a5c77d2ff0c@linaro.org
Anusha Rao [Fri, 26 May 2023 16:11:29 +0000 (21:41 +0530)]
arm64: dts: qcom: ipq9574: Enable crypto nodes
Enable crypto support for ipq9574.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526161129.1454-5-quic_anusha@quicinc.com
Bjorn Andersson [Tue, 13 Jun 2023 22:17:30 +0000 (15:17 -0700)]
Merge branch '
20230526161129.1454-2-quic_anusha@quicinc.com' into arm64-for-6.5
Merge IPQ9574 Crypto Engine-related DeviceTree bindings, to gain the
additional clock defines needed to add the related nodes.
Anusha Rao [Fri, 26 May 2023 16:11:26 +0000 (21:41 +0530)]
dt-bindings: clock: Add crypto clock and reset definitions
Add crypto clock and reset ID definitions for ipq9574.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526161129.1454-2-quic_anusha@quicinc.com
Komal Bajaj [Mon, 22 May 2023 15:12:06 +0000 (20:42 +0530)]
arm64: dts: qcom: qdu1000: Add IMEM and PIL info region
Add a simple-mfd representing IMEM on QDU1000 and define the PIL
relocation info region, so that post mortem tools will be able
to locate the loaded remoteprocs.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230522151206.22654-3-quic_kbajaj@quicinc.com
Artur Weber [Fri, 19 May 2023 18:07:28 +0000 (20:07 +0200)]
arm64: dts: adapt to LP855X bindings changes
Change underscores in ROM node names to dashes, and remove deprecated
pwm-period property.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230519180728.2281-5-aweber.kernel@gmail.com
Kathiravan T [Fri, 19 May 2023 13:38:44 +0000 (19:08 +0530)]
arm64: dts: qcom: ipq5332: add few more reserved memory region
In IPQ SoCs, bootloader will collect the system RAM contents upon crash for
the post morterm analysis. If we don't reserve the memory region used by
bootloader, obviously linux will consume it and upon next boot on crash,
bootloader will be loaded in the same region, which will lead to loose some
of the data, sometimes we may miss out critical information. So lets
reserve the region used by the bootloader.
Similarly SBL copies some data into the reserved region and it will be
used in the crash scenario. So reserve 1MB for SBL as well.
While at it, drop the size padding in the smem memory region.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230519133844.23512-4-quic_kathirav@quicinc.com
Kathiravan T [Fri, 19 May 2023 13:38:43 +0000 (19:08 +0530)]
arm64: dts: qcom: ipq5332: define UART1
Add the definition for the UART1 found on IPQ5332 SoC.
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230519133844.23512-3-quic_kathirav@quicinc.com
Kathiravan T [Fri, 19 May 2023 13:38:42 +0000 (19:08 +0530)]
arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441
To align with ipq5332-rdp468.dts, lets rename the mi01.2 dts as well to
ipq5332-rdp441.dts.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230519133844.23512-2-quic_kathirav@quicinc.com
Luca Weiss [Fri, 12 May 2023 13:58:26 +0000 (15:58 +0200)]
arm64: dts: qcom: sm7225-fairphone-fp4: Add Bluetooth
The device has a WCN3988 chip for WiFi and Bluetooth. Configure the
Bluetooth node and enable the UART it is connected to, plus the
necessary pinctrl that has been borrowed with comments from
sc7280-idp.dtsi.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230421-fp4-bluetooth-v2-4-3de840d5483e@fairphone.com
Luca Weiss [Fri, 12 May 2023 13:58:25 +0000 (15:58 +0200)]
arm64: dts: qcom: sm6350: add uart1 node
Add the node describing uart1 incl. opp table and pinctrl.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230421-fp4-bluetooth-v2-3-3de840d5483e@fairphone.com
Konrad Dybcio [Wed, 31 May 2023 13:22:42 +0000 (15:22 +0200)]
arm64: dts: qcom: sm8550: Flush RSC sleep & wake votes
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes:
ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-8-b4a985f57b8b@linaro.org
Konrad Dybcio [Wed, 31 May 2023 13:22:41 +0000 (15:22 +0200)]
arm64: dts: qcom: sm6350: Flush RSC sleep & wake votes
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes:
5f82b9cda61e ("arm64: dts: qcom: Add SM6350 device tree")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-7-b4a985f57b8b@linaro.org
Konrad Dybcio [Wed, 31 May 2023 13:22:40 +0000 (15:22 +0200)]
arm64: dts: qcom: sdm845: Flush RSC sleep & wake votes
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes:
c83545d95376 ("arm64: dts: sdm845: Add rpmh-rsc node")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-6-b4a985f57b8b@linaro.org
Konrad Dybcio [Wed, 31 May 2023 13:22:39 +0000 (15:22 +0200)]
arm64: dts: qcom: sdm670: Flush RSC sleep & wake votes
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes:
07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-5-b4a985f57b8b@linaro.org
Konrad Dybcio [Wed, 31 May 2023 13:22:38 +0000 (15:22 +0200)]
arm64: dts: qcom: sc8180x: Flush RSC sleep & wake votes
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes:
8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-4-b4a985f57b8b@linaro.org
Konrad Dybcio [Wed, 31 May 2023 13:22:37 +0000 (15:22 +0200)]
arm64: dts: qcom: qdu1000: Flush RSC sleep & wake votes
The rpmh driver will cache sleep and wake votes until the cluster
power-domain is about to enter idle, to avoid unnecessary writes. So
associate the apps_rsc with the cluster pd, so that it can be notified
about this event.
Without this, only AMC votes are being commited.
Fixes:
6bd20c54b589 ("arm64: dts: qcom: Add base QDU1000/QRU1000 DTSIs")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-3-b4a985f57b8b@linaro.org
Konrad Dybcio [Wed, 31 May 2023 13:22:36 +0000 (15:22 +0200)]
arm64: dts: qcom: sm6350: Add PSCI idle states
Add the PSCI idle states so that the CPU (among other things) can
reach lower power states.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531-topic-rsc-v1-2-b4a985f57b8b@linaro.org
Anusha Rao [Fri, 2 Jun 2023 08:44:31 +0000 (14:14 +0530)]
arm64: dts: qcom: ipq9574: add few more reserved memory region
In IPQ SoCs, bootloader will collect the system RAM contents upon crash
for post-morterm analysis. If we don't reserve the memory region used
by bootloader, obviously linux will consume it and upon next boot on
crash, bootloader will be loaded in the same region, which will lead to
loss of some data, sometimes we may miss out critical information.
So lets reserve the region used by the bootloader.
Similarly SBL copies some data into the reserved region and it will be
used in the crash scenario. So reserve 1MB for SBL as well.
While at it, drop the size padding in the reserved memory region,
wherever applicable
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Reviewed-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602084431.19134-1-quic_anusha@quicinc.com
Kathiravan T [Mon, 5 Jun 2023 08:05:31 +0000 (13:35 +0530)]
arm64: dts: qcom: ipq5332: add support for the RDP474 variant
Add the initial device tree support for the Reference Design
Platform(RDP) 474 based on IPQ5332 family of SoC. This patch carries
the support for Console UART, eMMC, I2C and GPIO based buttons.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230605080531.3879-5-quic_kathirav@quicinc.com
Kathiravan T [Mon, 5 Jun 2023 08:05:30 +0000 (13:35 +0530)]
dt-bindings: arm: qcom: document MI01.9 board based on IPQ5332 family
Document the MI01.9 (Reference Design Platform 474) board based on IPQ5332
family of SoCs.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230605080531.3879-4-quic_kathirav@quicinc.com
Srinivas Kandagatla [Thu, 8 Jun 2023 12:53:14 +0000 (13:53 +0100)]
arm64: dts: qcom: sc8280xp: add resets for soundwire controllers
Soundwire controllers on sc8280xp needs an explicit reset, add
support for this.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-6-srinivas.kandagatla@linaro.org
Bjorn Andersson [Tue, 13 Jun 2023 18:12:02 +0000 (11:12 -0700)]
Merge branch '
20230608125315.11454-2-srinivas.kandagatla@linaro.org' into arm64-for-6.5
Merge the SC8280XP LPASSCC DeviceTree bindings in order to get access
to the newly added reset defines.
Srinivas Kandagatla [Thu, 8 Jun 2023 12:53:11 +0000 (13:53 +0100)]
dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) Audio clock controller provides reset
support when it is under the control of Q6DSP.
Add support for those resets and adds IDs for clients to request the reset.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-3-srinivas.kandagatla@linaro.org
Srinivas Kandagatla [Thu, 8 Jun 2023 12:53:10 +0000 (13:53 +0100)]
dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
The LPASS (Low Power Audio Subsystem) clock controller provides reset
support when it is under the control of Q6DSP.
Add support for those resets and adds IDs for clients to request the reset.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-2-srinivas.kandagatla@linaro.org
Krzysztof Kozlowski [Mon, 12 Jun 2023 17:37:58 +0000 (19:37 +0200)]
arm64: dts: qcom: sm8550-mtp: add sound card
Add the sound card node with tested playback over WSA8845 speakers and
WCD9385 headset over USB Type-C. The recording links were not tested,
but should be similar to previous platforms.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230612173758.286411-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Mon, 12 Jun 2023 17:37:57 +0000 (19:37 +0200)]
arm64: dts: qcom: sm8550-qrd: add sound card
Add the sound card node with tested playback over WSA8845 speakers and
WCD9385 headset over USB Type-C. The recording links were not tested,
but should be similar to previous platforms.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230612173758.286411-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 8 Jun 2023 09:43:23 +0000 (11:43 +0200)]
arm64: dts: qcom: sm8550-mtp: add WSA8845 speakers
Add Qualcomm WSA8845 Soundwire smart speaker amplifiers.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608094323.267278-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 8 Jun 2023 09:43:22 +0000 (11:43 +0200)]
arm64: dts: qcom: sm8550-qrd: add WSA8845 speakers
Add Qualcomm WSA8845 Soundwire smart speaker amplifiers.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608094323.267278-1-krzysztof.kozlowski@linaro.org
Rohit Agarwal [Fri, 9 Jun 2023 11:50:38 +0000 (17:20 +0530)]
arm64: dts: qcom: Add SDX75 platform and IDP board support
Add basic devicetree support for SDX75 platform and IDP board from
Qualcomm. The SDX75 platform features an ARM Cortex A55 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, UART, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-6-git-send-email-quic_rohiagar@quicinc.com
Rohit Agarwal [Fri, 9 Jun 2023 11:50:34 +0000 (17:20 +0530)]
dt-bindings: arm: qcom: Document SDX75 platform and boards
Document the SDX75 platform binding and also the boards using it.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-2-git-send-email-quic_rohiagar@quicinc.com
Bjorn Andersson [Tue, 13 Jun 2023 18:04:23 +0000 (11:04 -0700)]
Merge branch '
20230512122347.1219-3-quic_tdas@quicinc.com' into arm64-for-6.5
Merge the SDX75 GCC DeviceTree binding, in order to get access to the
clock defines in the DeviceTree source.
Neil Armstrong [Mon, 12 Jun 2023 15:22:52 +0000 (17:22 +0200)]
arm64: dts: qcom: sm8550-qrd: enable PMIC Volume and Power buttons
The Volume Down & Power buttons are controlled by the PMIC via
the PON hardware, and the Volume Up is connected to a PMIC gpio.
Enable the necessary hardware and setup the GPIO state for the
Volume Up gpio key.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-topic-sm8550-upstream-pm8550-lpg-dt-v4-4-a288f24af81b@linaro.org
Neil Armstrong [Mon, 12 Jun 2023 15:22:51 +0000 (17:22 +0200)]
arm64: dts: qcom: pmk8550: always enable RTC PMIC device
There's no reason to keep the RTC disabled, it has been tested
and is functional on the SM8550 QRD and MTP boards.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-topic-sm8550-upstream-pm8550-lpg-dt-v4-3-a288f24af81b@linaro.org
Neil Armstrong [Mon, 12 Jun 2023 15:22:50 +0000 (17:22 +0200)]
arm64: dts: qcom: sm8550-qrd: add notification RGB LED
The QRD features a notification LED connected to the pm8550.
Configure the RGB led controlled by the PMIC PWM controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-topic-sm8550-upstream-pm8550-lpg-dt-v4-2-a288f24af81b@linaro.org
Neil Armstrong [Mon, 12 Jun 2023 15:22:49 +0000 (17:22 +0200)]
arm64: dts: qcom: pm8550: add PWM controller
Add the PWM function to the pm8550 dtsi, this is usually used
to drive RGB leds on platforms using this PMIC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-topic-sm8550-upstream-pm8550-lpg-dt-v4-1-a288f24af81b@linaro.org
Bjorn Andersson [Mon, 12 Jun 2023 22:07:39 +0000 (15:07 -0700)]
arm64: dts: qcom: sc8180x: Move DisplayPort for MMCX
The DisplayPort blocks are powered by MMCX and should be described as
such to ensure that power votes are done on the right resource.
This also solves the problem that sync_state is unaware of the DP
controllers needing MMCX to be kept alive during boot. As such this
change also fixes occasionally seen crashes during boot due to
undervoltage of MMCX.
Fixes:
494dec9b6f54 ("arm64: dts: qcom: sc8180x: Add display and gpu nodes")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230612220739.1886155-1-quic_bjorande@quicinc.com
Bjorn Andersson [Mon, 12 Jun 2023 22:05:32 +0000 (15:05 -0700)]
arm64: dts: qcom: sc8180x: Fix adreno smmu compatible
The adreno smmu should be compatible with qcom,adreno-smmu as well for
per-process page tables to work.
Fixes:
8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230612220532.1884860-1-quic_bjorande@quicinc.com
Bjorn Andersson [Mon, 12 Jun 2023 22:04:20 +0000 (15:04 -0700)]
arm64: dts: qcom: sc8180x-primus: dispcc is already okay
&dispcc status was changed to okay by default in the platform, no need
to do it again in the board.
Fixes:
2ce38cc1e8fe ("arm64: dts: qcom: sc8180x: Introduce Primus")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230612220420.1884631-1-quic_bjorande@quicinc.com
Neil Armstrong [Tue, 13 Jun 2023 07:30:13 +0000 (09:30 +0200)]
arm64: dts: qcom: sm8550: add display port nodes
Add the Display Port controller subnode to the MDSS node.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-dp-v4-2-ac2c6899d22c@linaro.org
Neil Armstrong [Tue, 13 Jun 2023 07:30:12 +0000 (09:30 +0200)]
arm64: dts: qcom: sm8550: fix low_svs RPMhPD labels
"low" was written "lov", fix this.
Fixes:
99d33ee61cb0 ("arm64: dts: qcom: sm8550: Add missing RPMhPD OPP levels")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-dp-v4-1-ac2c6899d22c@linaro.org
Andrew Halaney [Thu, 8 Jun 2023 20:15:13 +0000 (15:15 -0500)]
arm64: dts: qcom: sa8540p-ride: Specify ethernet phy OUI
With wider usage on more boards, there have been reports of the
following:
[ 315.016174] qcom-ethqos 20000.ethernet eth0: no phy at addr -1
[ 315.016179] qcom-ethqos 20000.ethernet eth0: __stmmac_open: Cannot attach to PHY (error: -19)
which has been fairly random and isolated to specific boards.
Early reports were written off as a hardware issue, but it has been
prevalent enough on boards that theory seems unlikely.
In bring up of a newer piece of hardware, similar was seen, but this
time _consistently_. Moving the reset to the mdio bus level (which isn't
exactly a lie, it is the only device on the bus so one could model it as
such) fixed things on that platform. Analysis on sa8540p-ride shows that
the phy's reset is not being handled during the OUI scan if the reset
lives in the phy node:
# gpio 752 is the reset, and is active low, first mdio reads are the OUI
modprobe-420 [006] ..... 154.738544: mdio_access: stmmac-0 read phy:0x08 reg:0x02 val:0x0141
modprobe-420 [007] ..... 154.738665: mdio_access: stmmac-0 read phy:0x08 reg:0x03 val:0x0dd4
modprobe-420 [004] ..... 154.741357: gpio_value: 752 set 1
modprobe-420 [004] ..... 154.741358: gpio_direction: 752 out (0)
modprobe-420 [004] ..... 154.741360: gpio_value: 752 set 0
modprobe-420 [006] ..... 154.762751: gpio_value: 752 set 1
modprobe-420 [007] ..... 154.846857: gpio_value: 752 set 1
modprobe-420 [004] ..... 154.937824: mdio_access: stmmac-0 write phy:0x08 reg:0x0d val:0x0003
modprobe-420 [004] ..... 154.937932: mdio_access: stmmac-0 write phy:0x08 reg:0x0e val:0x0014
Moving it to the bus level, or specifying the OUI in the phy's
compatible ensures the reset is handled before any mdio access
Here is tracing with the OUI approach (which skips scanning the OUI):
modprobe-549 [007] ..... 63.860295: gpio_value: 752 set 1
modprobe-549 [007] ..... 63.860297: gpio_direction: 752 out (0)
modprobe-549 [007] ..... 63.860299: gpio_value: 752 set 0
modprobe-549 [004] ..... 63.882599: gpio_value: 752 set 1
modprobe-549 [005] ..... 63.962132: gpio_value: 752 set 1
modprobe-549 [006] ..... 64.049379: mdio_access: stmmac-0 write phy:0x08 reg:0x0d val:0x0003
modprobe-549 [006] ..... 64.049490: mdio_access: stmmac-0 write phy:0x08 reg:0x0e val:0x0014
The OUI approach is taken given the description matches the situation
perfectly (taken from ethernet-phy.yaml):
- pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
description:
If the PHY reports an incorrect ID (or none at all) then the
compatible list may contain an entry with the correct PHY ID
in the above form.
The first group of digits is the 16 bit Phy Identifier 1
register, this is the chip vendor OUI bits 3:18. The
second group of digits is the Phy Identifier 2 register,
this is the chip vendor OUI bits 19:24, followed by 10
bits of a vendor specific ID.
With this in place the sa8540p-ride's phy is probing consistently, so
it seems the floating reset during mdio access was the issue. In either
case, it shouldn't be floating so this improves the situation. The below
link discusses some of the relationship of mdio, its phys, and points to
this OUI compatible as a way to opt out of the OUI scan pre-reset
handling which influenced this decision.
Link: https://lore.kernel.org/all/dca54c57-a3bd-1147-63b2-4631194963f0@gmail.com/
Fixes:
57827e87be54 ("arm64: dts: qcom: sa8540p-ride: Add ethernet nodes")
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608201513.882950-1-ahalaney@redhat.com
Bjorn Andersson [Tue, 30 May 2023 16:24:54 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
Introduce support for the Lenovo Flex 5G laptop, built on the Qualcomm
SC8180X platform. Supported peripherals includes keyboard, touchpad,
UFS storage, external USB and WiFi.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-16-vkoul@kernel.org
Bjorn Andersson [Tue, 30 May 2023 16:24:53 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Introduce Primus
Introduce support for the SC8180X reference device, aka Primus, with
debug UART, regulators, UFS and USB support.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-15-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:52 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add pmics
SC8180X based platforms have PM8150, PM8150C, PMC8180 and SMB2351 PMICs,
so add these as well
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-14-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:51 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add display and gpu nodes
This patch adds gpu, gmu, gpucc, dispcc and finally the mdss node with
dsi0/1, dp0/1 and edp subnodes as found in this SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-13-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:50 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes
This patch adds remoteprocs, wifi and usb and usb phy nodes
for this SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-12-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:49 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add PCIe instances
This patch adds PCIe instances found on this SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-11-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:48 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add QUPs
This patch adds qup instances and i2c, spi, serial ports
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-10-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:47 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add thermal zones
This patch adds tsens nodes and thermal zones for sc8180x SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-9-vkoul@kernel.org
Vinod Koul [Tue, 30 May 2023 16:24:46 +0000 (21:54 +0530)]
arm64: dts: qcom: sc8180x: Add interconnects and lmh
This add interconnect nodes and add LMH to sc8180x SoC dtsi
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-8-vkoul@kernel.org
Bjorn Andersson [Tue, 30 May 2023 16:24:45 +0000 (21:54 +0530)]
arm64: dts: qcom: Introduce the SC8180x platform
Introduce a base dtsi for the Qualcomm SC8180x platform, with CPUs,
global clock controller, SMMU, rpmh clocks, rpmh power-domains,
CPUfreq etc
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-7-vkoul@kernel.org
Stephan Gerhold [Mon, 29 May 2023 12:47:03 +0000 (14:47 +0200)]
arm64: dts: qcom: msm8916: Move aliases to boards
MSM8939 has the aliases defined separately for each board (because
there could be (theoretically) a board where the slots are numbered
differently. To make MSM8916 and MSM8939 more consistent do the same
for all MSM8916 boards and move aliases there.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-6-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:47:02 +0000 (14:47 +0200)]
arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec
All definitions in pm8916.dtsi use the &pm8916_ label prefix, only the
codec uses the &wcd_codec label. &wcd_codec is confusing because the
codec on MSM8916 is split into a "wcd-digital" and "wcd-analog" part
and both could be described with &wcd_codec.
Let's just name it &pm8916_codec so it's consistent with all other PMIC
device nodes.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-5-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:47:01 +0000 (14:47 +0200)]
arm64: dts: qcom: msm8916/39: Clean up MDSS labels
Right now MDSS related definitions cannot be properly grouped together
in board DTs because the labels do not use consistent prefixes. The DSI
PHY label is particularly weird because the DSI number is at the end
(&dsi_phy0) while DSI itself is called &dsi0.
Follow the example of more recent SoCs and give all the MDSS related
nodes a consistent label that allows proper grouping.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-4-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:47:00 +0000 (14:47 +0200)]
arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl
Make the labels for the BLSP I2C/SPI pinctrl consistent with the one
used for UART by adding the missing blsp_ prefix. This allows having
them properly grouped together.
The nodes are only reordered in msm8939.dtsi for now since the pinctrl
definitions in msm8916-pins.dtsi are currently still unordered anyway.
(I will try fixing this in a future patch.)
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-3-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:46:59 +0000 (14:46 +0200)]
arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
For some reason the BLSP UART controllers have a label with a number
behind blsp (&blsp1_uartN) while I2C/SPI are named without (&blsp_i2cN).
This is confusing, especially for proper node ordering in board DTs.
Right now all board DTs are ordered as if the number behind blsp does
not exist (&blsp_i2cN comes before &blsp1_uartN). Strictly speaking
correct ordering would be the other way around ('1' comes before '_').
End this confusion by giving the UART controllers consistent labels.
There is just one BLSP on MSM8916/39 so the number is redundant.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-2-bec0f5fb46fb@gerhold.net
Stephan Gerhold [Mon, 29 May 2023 12:46:58 +0000 (14:46 +0200)]
arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm
MSM8916 is the only ARM64 Qualcomm SoC that is still using the old
&msmgpio name. Change this to &tlmm to avoid confusion.
Note that the node ordering does not change because the MSM8916 device
trees have pinctrl separated at the bottom (similar to sc7180).
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230525-msm8916-labels-v1-1-bec0f5fb46fb@gerhold.net
Bhupesh Sharma [Tue, 16 May 2023 15:05:11 +0000 (20:35 +0530)]
arm64: dts: qcom: qrb4210-rb2: Enable USB node
Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516150511.2346357-5-bhupesh.sharma@linaro.org
Bhupesh Sharma [Tue, 16 May 2023 15:05:10 +0000 (20:35 +0530)]
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
Add USB superspeed qmp phy node to dtsi.
Make sure that the various board dts files (which include sm4250.dtsi file)
continue to work as intended.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516150511.2346357-4-bhupesh.sharma@linaro.org
Kathiravan T [Tue, 9 May 2023 16:01:33 +0000 (21:31 +0530)]
arm64: dts: qcom: ipq5332: add support for the RDP442 variant
Add the initial device tree support for the Reference Design
Platform(RDP) 442 based on IPQ5332 family of SoC. This patch carries
the support for Console UART, SPI NOR, eMMC and I2C.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230509160133.3794-3-quic_kathirav@quicinc.com
Kathiravan T [Tue, 9 May 2023 16:01:32 +0000 (21:31 +0530)]
dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family
Document the MI01.3 (Reference Design Platform 442) board based on IPQ5332
family of SoCs.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230509160133.3794-2-quic_kathirav@quicinc.com
Jagadeesh Kona [Wed, 24 May 2023 18:18:00 +0000 (23:48 +0530)]
arm64: dts: qcom: sm8550: Add graphics clock controller
Add device node for graphics clock controller on Qualcomm
SM8550 platform.
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-4-quic_jkona@quicinc.com
Bjorn Andersson [Sat, 27 May 2023 01:27:58 +0000 (18:27 -0700)]
Merge branch 'sm8450-sm8550-gpucc-binding' into arm64-for-6.5
Introduce DeviceTree bindings for SM8450 and SM8550 GPU clock
controller, to introduce the constants necessary to referr to these
clocks.
Jagadeesh Kona [Wed, 24 May 2023 18:17:58 +0000 (23:47 +0530)]
dt-bindings: clock: qcom: Add SM8550 graphics clock controller
Add device tree bindings for the graphics clock controller on
Qualcomm SM8550 platform.
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-2-quic_jkona@quicinc.com
Konrad Dybcio [Wed, 17 May 2023 16:40:38 +0000 (18:40 +0200)]
dt-bindings: clock: Add Qcom SM8450 GPUCC
Add device tree bindings for the graphics clock controller on Qualcomm
Technology Inc's SM8450 SoCs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-1-4f40e282af1d@linaro.org
Shazad Hussain [Fri, 26 May 2023 13:31:21 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p-ride: enable i2c11
This enables the i2c11 node on sa8775p-ride board for A2B controller
and audio port expander.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-6-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:20 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add uart5 and uart9 nodes
Add remaining uart5 and uart9 nodes for UART bus present on sa8775p
SoC.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-5-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:19 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add missing spi nodes
Add the missing nodes of the SPI buses present on sa8775p platform.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-4-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:18 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add missing i2c nodes
Add the missing nodes for the i2c buses present on sa8775p Soc.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-3-quic_shazhuss@quicinc.com
Shazad Hussain [Fri, 26 May 2023 13:31:17 +0000 (19:01 +0530)]
arm64: dts: qcom: sa8775p: add the QUPv3 #0 and #3 node
Add zeroth and third instance of the QUPv3 engine to the sa8775p.dtsi.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230526133122.16443-2-quic_shazhuss@quicinc.com
Krzysztof Kozlowski [Sun, 7 May 2023 17:45:16 +0000 (19:45 +0200)]
arm64: dts: qcom: apq8096: fix fixed regulator name property
Correct the typo in 'regulator-name' property.
apq8096-ifc6640.dtb: v1p05-regulator: 'regulator-name' is a required property
apq8096-ifc6640.dtb: v1p05-regulator: Unevaluated properties are not allowed ('reglator-name' was unexpected)
Fixes:
6cbdec2d3ca6 ("arm64: dts: qcom: msm8996: Introduce IFC6640")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507174516.264936-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 7 May 2023 17:45:15 +0000 (19:45 +0200)]
arm64: dts: qcom: msm8996: correct MMCC clocks order
Re-order the clocks for MMCC clock controller node to match the bindings (Linux
driver takes by name):
msm8996-mtp.dtb: clock-controller@8c0000: clock-names:1: 'gpll0' was expected
msm8996-mtp.dtb: clock-controller@8c0000: clock-names:2: 'gcc_mmss_noc_cfg_ahb_clk' was expected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507174516.264936-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 7 May 2023 17:45:14 +0000 (19:45 +0200)]
arm64: dts: qcom: msm8916: correct LPASS CPU clocks order
Re-order the clocks for LPASS CPU node to match the bindings (Linux
driver takes by name):
msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:1: 'mi2s-bit-clk0' was expected
msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:2: 'mi2s-bit-clk1' was expected
msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:3: 'mi2s-bit-clk2' was expected
msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:4: 'mi2s-bit-clk3' was expected
msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:5: 'pcnoc-mport-clk' was expected
msm8916-asus-z00l.dtb: audio-controller@7708000: clock-names:6: 'pcnoc-sway-clk' was expected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230507174516.264936-1-krzysztof.kozlowski@linaro.org