Rakesh Iyer [Tue, 17 Apr 2012 09:01:35 +0000 (09:01 +0000)]
tegra: Add tegra keyboard driver
Add support for internal matrix keyboard controller for Nvidia Tegra
platforms. This driver uses the fdt decode function to obtain its key
codes.
Support for the Ctrl modifier is provided. The left and right ctrl keys are
dealt with in the same way.
This uses the new keyboard input library (drivers/input/input.c) to decode
keys and handle most of the common input logic. The new key matrix library
is also used to decode (row, column) key positions into key codes.
The intent is to make this driver purely about dealing with the hardware.
Key detection before the driver is loaded is supported. This key will be
picked up when the keyboard driver is initialized.
Modified by Bernie Thompson <bhthompson@chromium.org> and
Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix
and various other things.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Anton Staff [Tue, 17 Apr 2012 09:01:34 +0000 (09:01 +0000)]
tegra: fdt: Add keyboard definitions for Seaboard
Seaboard uses a QUERTY keyboard. We add key codes for this to
enable key scanning to work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Anton Staff [Tue, 17 Apr 2012 09:01:33 +0000 (09:01 +0000)]
tegra: fdt: Add keyboard controller definition
The Tegra keyboard controller provides a simple interface to a matrix
keyboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Tue, 17 Apr 2012 09:01:32 +0000 (09:01 +0000)]
tegra: Add keyboard support to funcmux
Add funcmux support for the default keyboard mapping.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Bernie Thompson [Tue, 17 Apr 2012 09:01:31 +0000 (09:01 +0000)]
input: Add support for keyboard matrix decoding from an fdt
Matrix keyboards require a key map to be set up, and must also deal with
key ghosting.
Create a keyboard matrix management implementation which can be leveraged
by various keyboard drivers. This includes code to read the keymap from
the FDT and perform debouncing.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Tue, 17 Apr 2012 09:01:30 +0000 (09:01 +0000)]
input: Add generic keyboard input handler
Add a module which understands converting key codes (or scan codes)
to ASCII characters. It includes FIFO support and can call back to
drivers to read new characters when its FIFO is empty.
Keycode maps are provided for un-modified, shift and ctrl keys.
The plan is to use this module where such mapping is required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Tue, 17 Apr 2012 09:01:29 +0000 (09:01 +0000)]
input: Add linux/input.h for key code support
We want to able to decode Linux fdt keymaps, so bring part of this
enormous header file over to U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Anton Staff [Tue, 17 Apr 2012 09:01:28 +0000 (09:01 +0000)]
fdt: Add fdtdec functions to read byte array
Sometimes we don't need a full cell for each value. This provides
a simple function to read a byte array, both with and without
copying it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:19:03 +0000 (13:19 +0000)]
tegra: Enable LP0 on Seaboard
This enables LP0 to support suspend / resume on Seaboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Thu, 5 Apr 2012 11:55:15 +0000 (11:55 +0000)]
tegra: fdt: Add EMC data for Tegra2 Seaboard
This adds timings for T20 and T25 Seaboards, using the bindings found here:
http://patchwork.ozlabs.org/patch/132928/
We supply both full speed options for normal running, and half speed options
for testing / development.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:19:01 +0000 (13:19 +0000)]
tegra: i2c: Add function to find DVC bus
Add tegra_i2c_get_dvc_bus_num() to obtain the I2C bus number of DVC bus.
This allows us to talk to the PMU.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:19:00 +0000 (13:19 +0000)]
fdt: tegra: Add EMC node to device tree
Add a definition of the memory controller node according to the bindings
here:
http://patchwork.ozlabs.org/patch/132928/
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Jimmy Zhang [Tue, 10 Apr 2012 05:17:06 +0000 (05:17 +0000)]
tegra: Add EMC settings for Seaboard
Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Wei Ni [Mon, 2 Apr 2012 13:18:58 +0000 (13:18 +0000)]
tegra: Turn off power detect in board init
Tegra core power rail has leakage voltage around 0.2V while system in
suspend mode. The source of the leakage should be coming from PMC power
detect logic for IO rails power detection.
That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0'
to PWR_DET (APBDEV_PMC_PWR_DET_0).
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:57 +0000 (13:18 +0000)]
tegra: Set up warmboot code on Nvidia boards
Call the function to put warmboot boot in a suitable place for resume.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Yen Lin [Mon, 2 Apr 2012 13:18:56 +0000 (13:18 +0000)]
tegra: Setup PMC scratch info from ap20 setup
Save SDRAM parameters into the warmboot scratch registers
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Yen Lin [Tue, 10 Apr 2012 05:17:02 +0000 (05:17 +0000)]
tegra: Add warmboot implementation
Add code to set up the warm boot area in the Tegra CPU ready for a
resume after suspend.
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:54 +0000 (13:18 +0000)]
tegra: Set up PMU for Nvidia boards
Adjust PMU to permit maximum frequency operation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Jimmy Zhang [Mon, 2 Apr 2012 13:18:53 +0000 (13:18 +0000)]
tegra: Add PMU to manage power supplies
Power supplies must be adjusted in line with clock frequency. This code
provides a simple routine to set the voltage to allow operation at maximum
frequency.
- Split PMU code into separate TPS6586X driver
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Jimmy Zhang [Mon, 2 Apr 2012 13:18:52 +0000 (13:18 +0000)]
tegra: Add EMC support for optimal memory timings
Add support for setting up the memory controller parameters. Boards
can set up an appropriate table in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:51 +0000 (13:18 +0000)]
tegra: Add header file for APB_MISC register
Add a basic header file for this register, to be filled in as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:50 +0000 (13:18 +0000)]
tegra: Add tegra_get_chip_type() to detect SKU
We want to know which type of chip we are running on - the Tegra
family has several SKUs. This can be determined by reading a
fuse register, so add this function to ap20.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Yen Lin [Mon, 2 Apr 2012 13:18:49 +0000 (13:18 +0000)]
tegra: Add flow, gp_padctl, fuse, sdram headers
These headers provide access to additional Tegra features.
flow - start/stop CPUs
sdram - parameters for SDRAM
fuse - access to on-chip fuses / security settings
gp_padctl - pad control and general purpose registers
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Yen Lin [Mon, 2 Apr 2012 13:18:48 +0000 (13:18 +0000)]
tegra: Add crypto library for warmboot code
Provides an interface to aes.c for the warmboot code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:47 +0000 (13:18 +0000)]
tegra: Add functions to access low-level Osc/PLL details
Add clock_ll_read_pll() to read PLL parameters and clock_get_osc_bypass()
to find out if the Oscillator is bypassed. These are needed by warmboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:46 +0000 (13:18 +0000)]
tegra: Move ap20.h header into arch location
We want to include this from board code, so move the header into
an easily-accessible location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Yen Lin [Thu, 5 Apr 2012 11:54:58 +0000 (11:54 +0000)]
Add AES crypto library
Add support for AES using an implementation from Karl Malbrain.
This offers small code size (around 5KB on ARM) and supports 128-bit
AES only.
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:44 +0000 (13:18 +0000)]
i2c: Add TPS6586X driver
This power management chip supports battery charging and a large number
of power supplies. This initial driver only provides the ability to adjust
the two synchronous buck converters SM0 and SM1 in a stepwise manner.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Thu, 10 May 2012 11:37:35 +0000 (11:37 +0000)]
Add abs() macro to return absolute value
This macro is generally useful to make it available in common.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Simon Glass [Mon, 2 Apr 2012 13:18:42 +0000 (13:18 +0000)]
fdt: Add function to return next compatible subnode
We need to iterate through subnodes of a parent, looking only at
compatible nodes. Add a utility function to do this for us.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass [Mon, 2 Apr 2012 13:18:41 +0000 (13:18 +0000)]
fdt: Add function to locate an array in the device tree
fdtdec_locate_array() locates an integer array but does not copy it. This
saves the caller having to allocated wasted space.
Access to array elements should be through the fdt32_to_cpu() macro.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Marek Vasut [Tue, 1 May 2012 11:09:53 +0000 (11:09 +0000)]
i.MX28: Avoid redefining serial_put[cs]()
Do not define serial_putc() and serial_puts() calls if
CONFIG_SPL_SERIAL_SUPPORT is set.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:52 +0000 (11:09 +0000)]
i.MX28: Check if WP detection is implemented at all
If the WP function is NULL, simply assume the card is always RW.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:51 +0000 (11:09 +0000)]
i.MX28: Add battery boot components to SPL
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:50 +0000 (11:09 +0000)]
i.MX28: Reorder battery status functions in SPL
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:49 +0000 (11:09 +0000)]
i.MX28: Add LRADC init to i.MX28 SPL
This code is part of battery boot support for i.MX28.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:48 +0000 (11:09 +0000)]
i.MX28: Add LRADC register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:47 +0000 (11:09 +0000)]
i.MX28: Shut down the LCD controller before reset
If the LCD controller is on before the CPU goes into reset, the traffic on LCDIF
data pins interferes with the BootROM's boot mode sampling. So shut the
controller down.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:46 +0000 (11:09 +0000)]
i.MX28: Add LCDIF register definitions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:45 +0000 (11:09 +0000)]
i.MX28: Implement boot pads sampling and reporting
This patch implements code that samples i.MX28 boot pads and reports boot mode
accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:44 +0000 (11:09 +0000)]
i.MX28: Improve passing of data from SPL to U-Boot
Pass memory size from SPL via structure located in SRAM instead of SCRATCH
registers. This allows passing more data about boot from SPL to U-Boot, like the
boot mode pads configuration.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:43 +0000 (11:09 +0000)]
M28EVK: Add SD update command
Add "update_sd_firmware" command to easily reload the SD card of
m28evk kit. This comes handy when the board boots from SD card.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:42 +0000 (11:09 +0000)]
M28EVK: Implement support for new board V2.0
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Marek Vasut [Tue, 1 May 2012 11:09:41 +0000 (11:09 +0000)]
FEC: Abstract out register setup
Abstract out common register setup. This also configured r_cntrl
to correct value at registration time.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Stefano Babic [Wed, 9 May 2012 10:07:31 +0000 (12:07 +0200)]
MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
After an update to the MX51 reference manual (Rev. 5), the
values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH
are now clearly wrong:
"Bit 13:
High / Low Output Voltage Range. This bit selects the output voltage mode for
SD2_CMD. 0 High output voltage mode
1 Low output voltage mode"
The values are currently negated in code - fixed.
Reported-by: David Jander <david.jander@protonic.nl>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: David Jander <david.jander@protonic.nl>
Acked-by: David Jander <david.jander@protonic.nl>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Fri, 4 May 2012 01:32:50 +0000 (01:32 +0000)]
i.MX28: Add delay after CPU bypass is cleared
This solves issues when larger amount of DRAM is used, like 256MB.
Behave the same in case of CPU bypass as we do in case of EMI
bypass, but wait 15 ms. We need to wait until the clock domain
stabilizes.
This issue seemed to have been caused by not waiting after frobbing
with the CPU bypass, it was unrelated to memory, but had a direct
impact, causing trouble. This was yet another X-File of the
imx-bootlets, sigh. The conclusion is, trying a semi-random delay
(there is delay after the EMI bypass change), the issue is fixed.
Another possible explanation is that we do not do the "simple memory
test" FSL does in their imx-bootlets (1000 R/W cycles to/from piece of
the memory, while also outputing something on the serial port). This
might have caused the similar delay in the imx-bootlets and therefore
they didn't need to add this explicitly.
For now, this seems good fix enough, but to me, whole that memory
init code in imx-bootlets is completely flunked and it'd need deeper
investigation.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Fabio Estevam [Mon, 23 Apr 2012 08:30:50 +0000 (08:30 +0000)]
spi: mxs: Allow other chip selects to work
MXS SSP controller may have up to three chip selects per port: SS0, SS1 and SS2.
Currently only SS0 is supported in the mxs_spi driver.
Allow all the three chip select to work by selecting the desired one
in bits 20 and 21 of the HW_SSP_CTRL0 register.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Fabio Estevam [Mon, 23 Apr 2012 08:30:49 +0000 (08:30 +0000)]
spi: mxs: Introduce spi_cs_is_valid()
Introduce spi_cs_is_valid() for validating spi bus and chip select numbers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Fabio Estevam [Mon, 7 May 2012 10:42:57 +0000 (10:42 +0000)]
mx53loco: Remove unneeded gpio_set_value()
There is no need to set the VBUS power enable to 0 first and then to 1.
Set it to 1 in the gpio_direction_output() function.
While at it, use the standard naming convention for the GPIO comment.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Tue, 8 May 2012 03:40:49 +0000 (03:40 +0000)]
mx53loco: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.
Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 7 May 2012 10:26:00 +0000 (10:26 +0000)]
mx53loco: Turn on VUSB regulator
On the mx53loco board with mc34708 PMIC it is necessary to turn on VUSB regulator
so that the mx53 USBH1 PHY receives the 3.3V voltage.
Tested by inserting a USB pen drive in the upper USB slot (USBH1) and then issued the
commands:
usb start
usb info
,which correctly detected and printed the USB pen drive information.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 7 May 2012 10:25:59 +0000 (10:25 +0000)]
mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
Add mc34708 support and set mx53 core frequency at its maximum value of 1GHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 7 May 2012 10:25:58 +0000 (10:25 +0000)]
pmic: dialog: Avoid name conflicts
As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.
Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Timo Ketola [Wed, 18 Apr 2012 22:55:35 +0000 (22:55 +0000)]
imx: Add u-boot.imx as target for ARM9 i.MX SOCs
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
Timo Ketola [Wed, 18 Apr 2012 22:55:34 +0000 (22:55 +0000)]
i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
types.h must be included in imx-regs.h if one wants to include
imx-regs.h in a board configuration file. That for one's part is
necessary, if one wants to use addresses defined in imx-regs.h.
For example, fsl_esdhc.c needs CONFIG_SYS_FSL_ESDHC_ADDR defined and
a proper thing is to define it with IMX_MMC_SDHCx_BASE in board
configuration file. This patch fixes the build in that case.
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
Timo Ketola [Wed, 18 Apr 2012 22:55:33 +0000 (22:55 +0000)]
imx: usb: There is no such register
The reference manual of i.MX25 (nor i.MX31) does not define such
register. This seems to access read only UH2_CAPLENGTH register (if
CONFIG_MXC_USB_PORT is zero).
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
Timo Ketola [Wed, 18 Apr 2012 22:55:32 +0000 (22:55 +0000)]
i.MX25: usb: Set PORTSCx register
The USB controller in i.MX25 has a PORTSCx registers which should be
set. In this regard it is similar to the controller in i.MX31. As this
file is compiled only with i.MX25 and -31, #ifdef check can be removed.
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
Timo Ketola [Wed, 18 Apr 2012 22:55:31 +0000 (22:55 +0000)]
imx: nand: Support flash based BBT
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Scott Wood <scottwood@freescale.com>
Timo Ketola [Wed, 18 Apr 2012 22:55:29 +0000 (22:55 +0000)]
i.MX25: This architecture has a GPIO4 too
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
Timo Ketola [Wed, 18 Apr 2012 22:55:28 +0000 (22:55 +0000)]
i.MX25: esdhc: Add mxc_get_clock infrastructure
Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's
implement get_clocks function. This is how it seems to be implemented
elsewhere.
Signed-off-by: Timo Ketola <timo@exertus.fi>
Acked-by: Stefano Babic <sbabic@denx.de>
Eric Nelson [Tue, 1 May 2012 09:55:11 +0000 (09:55 +0000)]
i.MX6: mx6q_sabrelite: add SATA bindings
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: stefano Babic <sbabic@denx.de>
Eric Nelson [Tue, 27 Mar 2012 09:52:21 +0000 (09:52 +0000)]
i.MX6: add enable_sata_clock()
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Dirk Behme [Wed, 2 May 2012 02:12:17 +0000 (02:12 +0000)]
i.MX6: Add ANATOP regulator init
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This should be but can't be done in the DCD. The bootloader
prevents access to the ANATOP registers.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Lauri Hintsala [Tue, 17 Apr 2012 00:35:46 +0000 (00:35 +0000)]
mx28evk: add NAND support
NAND support is not enabled by default because Eval Kit is not delivered
with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Acked-by: Marek Vasut <marex@denx.de>
Wolfgang Grandegger [Wed, 2 May 2012 04:36:39 +0000 (04:36 +0000)]
USB: ehci-mx6: Fix broken IO access
To get USB working again on the i.MX6, this patch fixes a bug introduced
with commit 522b2a0 "Add proper IO accessors for mx6 usb registers.".
At that occasion, I also added the missing __iomem directive.
Cc: Marek Vasut <marex@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Marek Vasut [Thu, 3 May 2012 05:47:19 +0000 (05:47 +0000)]
M28: Scan only first 512 MB of DRAM to avoid memory wraparound
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Marek Vasut [Thu, 3 May 2012 05:47:18 +0000 (05:47 +0000)]
Revert "i.MX28: Enable additional DRAM address bits"
This reverts commit
69d26d09de1cb93e0a09ca71d9f0d41a66f0756a.
Apparently, this commit got mainline only because of out-of-tree
port and causes breakage on board that is mainline. Revert.
Reason:
* The OOT board has 512MB of DRAM, enabling this additional address
line enabled it to work fine with 512MB of RAM.
* Every mainline port has max. 256MB of DRAM, therefore this revert
has no impact on any mainline port
* Though this caused a problem with new M28 board with 256MB of DRAM
where the chips are wired differently. The patch-to-be-reverted
caused the DRAM to behave like this:
[128MB chunk #1][128MB chunk #1 again][128MB chunk #2][128MB chunk #2 again]
Therefore to retain the current one-memory-init-rules-them-all situation,
revert this patch until another board emerges and will actually be pushed
mainline that needs different setup.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Marek Vasut [Thu, 3 May 2012 05:47:21 +0000 (05:47 +0000)]
M28: Enable FDT support
This will eventually be needed with Linux 3.5, which will be the point when
MXS will be switched to FDT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Mon, 30 Apr 2012 08:12:04 +0000 (08:12 +0000)]
mx53loco: Add support for 1GHz operation for DA9053-based boards
There are two types of mx53loco boards: initial boards were built with a Dialog
DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC.
Add DA9053 PMIC support and adjust the required voltages and clocks for running
the CPU at 1GHz.
Tested on both versions of mx53loco boards.
In the case of a MC34708-based board the CPU operating voltage remains at 800MHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by : Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 30 Apr 2012 08:12:03 +0000 (08:12 +0000)]
mx53loco: Allow to print CPU information at a later stage
Print CPU information within board_late_init().
This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 30 Apr 2012 08:12:02 +0000 (08:12 +0000)]
mx5: Add clock config interface
mx5: Add clock config interface
Add clock config interface support, so that we
can configure CPU or DDR clock in the later init
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Sun, 29 Apr 2012 08:11:13 +0000 (08:11 +0000)]
imx-common: Factor out get_ahb_clk()
get_ahb_clk() is a common function between mx5 and mx6.
Place it into imx-common directory.
Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Eric Nelson [Wed, 25 Apr 2012 14:14:04 +0000 (14:14 +0000)]
i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
Uses the 'magic_keys' idiom as described in doc/README.kbd:
http://lists.denx.de/pipermail/u-boot/2012-April/122502.html
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 23 Apr 2012 06:31:18 +0000 (06:31 +0000)]
mx31pdk: Allow booting a zImage kernel
Allow booting a zImage kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 23 Apr 2012 06:31:17 +0000 (06:31 +0000)]
mx6qarm2: Allow booting a zImage kernel
Allow booting a zImage kernel.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Fabio Estevam [Mon, 23 Apr 2012 06:31:16 +0000 (06:31 +0000)]
mx6qsabrelite: Allow booting a zImage kernel
Allow booting a zImage kernel.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 23 Apr 2012 06:31:15 +0000 (06:31 +0000)]
mx28evk: Allow booting a zImage kernel
Allow booting a zImage kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 23 Apr 2012 06:06:29 +0000 (06:06 +0000)]
m28evk: Allow to booting a dt kernel
Allow to booting a dt kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 23 Apr 2012 06:06:28 +0000 (06:06 +0000)]
mx28evk: Allow to booting a dt kernel
Allow to booting a dt kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Wed, 11 Apr 2012 10:22:24 +0000 (10:22 +0000)]
mx6qsabrelite: No need to set the direction for GPIO3_23 again
There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is
already established.
Use gpio_set_value() for changing the GPIO output then.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Fabio Estevam [Tue, 20 Mar 2012 11:40:06 +0000 (11:40 +0000)]
pmic: Add support for the Dialog DA9053 PMIC
Add support for the Dialog DA9053 PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Stefano Babic [Wed, 22 Feb 2012 00:24:41 +0000 (00:24 +0000)]
MX53: mx53loco: Add SATA support
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
Stefano Babic [Wed, 22 Feb 2012 00:24:40 +0000 (00:24 +0000)]
MX53: Add support to ESG ima3 board
The ESG ima3-mx53 board is based on the Freescale
i.MX53 SOC. It boots from NOR (128 MB) and
supports Ethernet (FEC), SATA.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Wed, 22 Feb 2012 00:24:39 +0000 (00:24 +0000)]
SATA: add driver for MX5 / MX6 SOCs
This driver is part of Freescale's LTIB for
MX5 / MX6.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Terry Lv <r65388@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
Stefano Babic [Wed, 22 Feb 2012 00:24:38 +0000 (00:24 +0000)]
MX53: add function to set SATA clock to internal
The MX53 SATA interface can use an internal clock (USB PHY1)
instead of an external clock. This is an undocumented feature, but used
on most Freescale's evaluation boards, such as MX53-loco.
As stated by Freescale's support:
Fuses (but not pins) may be used to configure SATA clocks.
Particularly the i.MX53 Fuse_Map contains the next information
about configuring SATA clocks :
SATA_ALT_REF_CLK[1:0] (offset 0x180C)
'00' - 100MHz (External)
'01' - 50MHz (External)
'10' - 120MHz, internal (USB PHY)
'11' - Reserved
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Stefano Babic [Wed, 22 Feb 2012 00:24:37 +0000 (00:24 +0000)]
SATA: check for return value from sata functions
sata functions are called even if previous functions failed
because return value is not checked.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Dirk Behme <dirk.behme@de.bosch.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Stefano Babic [Wed, 22 Feb 2012 00:24:36 +0000 (00:24 +0000)]
MX5: Add definitions for SATA controller
Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
Stefano Babic [Wed, 22 Feb 2012 00:24:35 +0000 (00:24 +0000)]
NET: fec_mxc.c: Add a way to disable auto negotiation
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Stefano Babic [Wed, 22 Feb 2012 00:24:33 +0000 (00:24 +0000)]
Define UART4 and UART5 base addresses
Signed-off-by: Stefano Babic <sbabic@denx.de>
Donghwa Lee [Mon, 23 Apr 2012 15:37:05 +0000 (15:37 +0000)]
EXYNOS: Change bits per pixel value proper for u-boot.
vl_bpix of vidinfo_t was changed proper value for u-boot.
It is used to multiple of 2 by using NBITS() macro.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Thu, 5 Apr 2012 19:36:27 +0000 (19:36 +0000)]
EXYNOS: support TRATS board display function
This patch support TRATS board configuration and display function.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Fri, 6 Apr 2012 05:24:01 +0000 (14:24 +0900)]
LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI
This patch support S6E8AX0 amoled driver based on EXYNOS MIPI DSI interface.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Donghwa Lee [Thu, 5 Apr 2012 19:36:21 +0000 (19:36 +0000)]
EXYNOS: support EXYNOS MIPI DSI interface driver.
EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI
based LCD Panel could be used with it. This patch supports MIPI-DSI driver
based Samsung SoC chip.
LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
board file and LCD panel driver specific function registered to mipi_dsim_ddi
structure at lcd panel init function called system init.
In the MIPI-DSI driver, find lcd panel driver by using registered
lcd panel name, and then initialize lcd panel driver.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Donghwa Lee [Thu, 5 Apr 2012 19:36:17 +0000 (19:36 +0000)]
EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
This patch support EXYNOS FB and FIMD display drivers.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Donghwa Lee [Thu, 5 Apr 2012 19:36:15 +0000 (19:36 +0000)]
LCD: add data structure for EXYNOS display driver
Add vidinfo data structure for EXYNOS display driver
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Donghwa Lee [Thu, 5 Apr 2012 19:36:12 +0000 (19:36 +0000)]
EXYNOS: add LCD and MIPI DSI clock interface.
To sets up lcd and mipi clock in EXYNOS display driver, added clock interface.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Thu, 5 Apr 2012 19:36:10 +0000 (19:36 +0000)]
EXYNOS: definitions of system resgister and power management registers.
This is definitions of system registers and power mananagement registers for EXYNOS SoC.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Minkyu Kang [Mon, 2 Apr 2012 07:51:33 +0000 (16:51 +0900)]
SMDK5250: fix compiler warning
this patch fixed following warning.
tzpc_init.c: In function 'tzpc_init':
tzpc_init.c:35: warning: assignment from incompatible pointer type
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
Łukasz Majewski [Thu, 29 Mar 2012 01:29:18 +0000 (01:29 +0000)]
misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998
TRATS target uses MAX8997 PMIC device instead of MAX8998.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Łukasz Majewski [Thu, 29 Mar 2012 01:29:17 +0000 (01:29 +0000)]
misc:pmic:max8997 MAX8997 support for PMIC driver
This commit adds support for MAX8997 PMIC driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefano Babic <sbabic@denx.de>
projects / platform / kernel / u-boot.git / log