Lucas Stach [Tue, 30 May 2023 22:18:57 +0000 (00:18 +0200)]
etnaviv: don't flush implicit flush resources when forced
Resources only need to become visible when the application requested
the context flush, so we can safely skip the flushing when the flush
is forced internally by running out of commandstream space.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23329>
Lucas Stach [Tue, 30 May 2023 22:15:37 +0000 (00:15 +0200)]
etnaviv: update derived state after forced commandstream flush
If we run out of space in the commandstream while emitting the
current state the drived states won't be recomputed for the
now fully dirty context as the state derivation is called before
any state emitted. Fix this by explicitly updating the derived
state after a forced flush.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8916
CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23329>
Christian Gmeiner [Sun, 28 May 2023 12:42:57 +0000 (14:42 +0200)]
etnaviv: nir: improve uniform usage for ALU opc
The current code in lower_alu(..) counts how many const values
are used by one ALU opc. If there are used more then one the
compiler tries to fix this issues by e.g. resolve with a single
combined const src.
We are doing this as some GPUs only allow one const src per
ISA instruction. But it is allowed to use the same const for
multiple srcs.
Lets have a closer look at a real world shader:
impl main {
/* preds: */
vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
vec1 32 ssa_1 = load_const (0x00000000 = 0.000000)
vec4 32 ssa_2 = intrinsic load_uniform (ssa_1) (base=0, range=1, dest_type=bool32 /*38*/) /* u_var */
vec1 32 ssa_4 = fmul ssa_2.x, ssa_2.y
vec1 32 ssa_11 = load_const (0x00000000 = 0.000000)
vec1 32 ssa_13 = seq ssa_2.w, ssa_11
vec1 32 ssa_6 = fmul ssa_2.z, ssa_13
vec1 32 ssa_7 = fmul ssa_4, ssa_6
vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_0
intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
/* succs: block_1 */
block block_1:
}
The current compiler transforms it to:
impl main {
block block_0:
/* preds: */
vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
vec4 32 ssa_14 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
vec2 32 ssa_15 = load_const (0x00000000, 0x00000001) = (0.000000, 0.000000)
vec1 32 ssa_4 = fmul ssa_15.x, ssa_15.y
vec2 32 ssa_16 = load_const (0x00000003, 0x00000000) = (0.000000, 0.000000)
vec1 32 ssa_13 = seq ssa_16.x, ssa_16.y
vec1 32 ssa_6 = fmul ssa_14.z, ssa_13
vec1 32 ssa_7 = fmul ssa_4, ssa_6
vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
vec1 32 ssa_17 = mov ssa_0
vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_17
intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
/* succs: block_1 */
block block_1:
}
There is no need to create ssa_15 as we can use ssa_14 for the first fmul.
With this change the compiler creates the following shader:
impl main {
block block_0:
/* preds: */
vec1 32 ssa_0 = load_const (0x3f800000 = 1.000000)
vec4 32 ssa_14 = load_const (0x00000000, 0x00000001, 0x00000002, 0x00000003) = (0.000000, 0.000000, 0.000000, 0.000000)
vec1 32 ssa_4 = fmul ssa_14.x, ssa_14.y
vec2 32 ssa_15 = load_const (0x00000003, 0x00000000) = (0.000000, 0.000000)
vec1 32 ssa_13 = seq ssa_15.x, ssa_15.y
vec1 32 ssa_6 = fmul ssa_14.z, ssa_13
vec1 32 ssa_7 = fmul ssa_4, ssa_6
vec1 32 ssa_9 = deref_var &gl_FragColor (shader_out vec4)
vec1 32 ssa_16 = mov ssa_0
vec4 32 ssa_10 = vec4 ssa_7, ssa_7, ssa_7, ssa_16
intrinsic store_deref (ssa_9, ssa_10) (wrmask=xyzw /*15*/, access=0)
/* succs: block_1 */
block block_1:
}
This change reduces immediate pressure and reduces spend CPU cycles.
No piglit or deqp regression seen.
shader-db results for GC2000:
total instructions in shared programs: 955128 -> 955128 (0.00%)
instructions in affected programs: 0 -> 0
helped: 0
HURT: 0
total temps in shared programs: 85689 -> 85689 (0.00%)
temps in affected programs: 0 -> 0
helped: 0
HURT: 0
total immediates in shared programs: 155428 -> 155240 (-0.12%)
immediates in affected programs: 1840 -> 1652 (-10.22%)
helped: 34
HURT: 1
helped stats (abs) min: 4 max: 16 x̄: 5.65 x̃: 4
helped stats (rel) min: 2.94% max: 33.33% x̄: 16.92% x̃: 16.67%
HURT stats (abs) min: 4 max: 4 x̄: 4.00 x̃: 4
HURT stats (rel) min: 14.29% max: 14.29% x̄: 14.29% x̃: 14.29%
95% mean confidence interval for immediates value: -6.57 -4.17
95% mean confidence interval for immediates %-change: -19.83% -12.23%
Immediates are helped.
total loops in shared programs: 0 -> 0
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
LOST: 0
GAINED: 0
Total CPU time (seconds): 102.55 -> 96.35 (-6.05%)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23323>
Hans-Kristian Arntzen [Fri, 26 May 2023 10:31:49 +0000 (12:31 +0200)]
Fix DGC bug where indirect count > maxSequencesCount.
Need to explicitly clamp the indirect count against maxSequencesCount,
or we risk writing bogus commands into spill region.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23252>
Samuel Pitoiset [Tue, 30 May 2023 09:01:50 +0000 (11:01 +0200)]
aco: remove nir_intrinsic_load_barycentric_at_sample occurences
This is lowered earlier and shouldn't get there.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23307>
Dave Airlie [Tue, 30 May 2023 19:23:03 +0000 (05:23 +1000)]
radv/meta: fix uninitialised stack memory usage.
==10199== Conditional jump or move depends on uninitialised value(s)
==10199== at 0xA107B13: radv_resume_queries (radv_meta.c:93)
==10199== by 0xA108097: radv_meta_restore (radv_meta.c:225)
==10199== Uninitialised value was created by a stack allocation
==10199== at 0xA1145B2: fill_buffer_shader (radv_meta_buffer.c:171)
saved_state is never memset, so the value should be inited.
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23327>
Vinson Lee [Mon, 29 May 2023 03:35:54 +0000 (20:35 -0700)]
r600/sfn: Initialize BlockScheduler member m_chip_family.
Fix defect reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member m_chip_family is not initialized
in this constructor nor in any functions that it calls.
Fixes:
e57643cf548 ("r600/sfn: Add handling for R600 indirect access alias handling")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23290>
Lucas Fryzek [Fri, 26 May 2023 18:52:54 +0000 (14:52 -0400)]
v3dv: Update texture padding logic to match v3d changes
Piglit tests for v3d highlighted issues with the padding
computation when allocating memory for slices. This change
moves the fixes from v3d to v3dv.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23260>
Lucas Fryzek [Fri, 26 May 2023 15:41:52 +0000 (11:41 -0400)]
v3d: Add support for ASTC texture compression
Add proper support for ASTC texture compression in the v3d
gallium driver, instead of relying on the fallback software
conversion from gallium, as the hardware has native support
for ASTC compressed textures.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23260>
Mike Blumenkrantz [Tue, 30 May 2023 15:11:21 +0000 (11:11 -0400)]
vulkan: use cmd size array for queued cmd allocations
minor simplification for consistency
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
Mike Blumenkrantz [Tue, 30 May 2023 15:09:45 +0000 (11:09 -0400)]
vulkan/cmd_queue: expose cmd sizes
now that cmds are more precisely allocated, it's necessary for drivers
to have some way to determine what the allocation size is
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
Mike Blumenkrantz [Tue, 30 May 2023 15:04:53 +0000 (11:04 -0400)]
vulkan/cmd_queue: allocate cmds based on the size of the cmd
the base size of a vk_cmd_queue_entry is massive since there are a couple
union entries that have a trillion params. by allocating conditionally using
the union member size, memory can be reduced, which will affect some user-facing
api properties
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
Mike Blumenkrantz [Tue, 30 May 2023 14:51:25 +0000 (10:51 -0400)]
vulkan: reorder vk_cmd_queue_entry
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23322>
Julia Tatz [Tue, 30 May 2023 21:20:32 +0000 (17:20 -0400)]
zink/ci: update expected results
Remove the now passing arb_compute_variable_group_size tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23244>
Julia Tatz [Fri, 26 May 2023 00:28:45 +0000 (20:28 -0400)]
zink: fix layout(local_size_variable) for vk1.3+
Use the correct exec-mode op for LocalSizeId
Corrected typo `gl_LocalGroupSize` -> `gl_LocalGroupSizeARB`
Fixes:
99bd1eaf ("zink: use spir-v 1.6 local-size when needed")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23244>
Yiwei Zhang [Wed, 17 May 2023 22:08:55 +0000 (15:08 -0700)]
docs/venus: advertise VK_EXT_image_2d_view_of_3d
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
Yiwei Zhang [Wed, 17 May 2023 04:53:44 +0000 (21:53 -0700)]
venus: enable VK_EXT_image_2d_view_of_3d
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
Yiwei Zhang [Wed, 17 May 2023 04:39:33 +0000 (21:39 -0700)]
venus: sync protocol for VK_EXT_image_2d_view_of_3d
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
Yiwei Zhang [Wed, 17 May 2023 04:36:22 +0000 (21:36 -0700)]
venus: sync to latest protocol from header v1.3.248
This is to make later protocol update CL to be easily backported to
older branches.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
Yiwei Zhang [Wed, 17 May 2023 04:59:40 +0000 (21:59 -0700)]
venus: silence -Wuninitialized
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23090>
Mark Janes [Wed, 24 May 2023 20:52:15 +0000 (13:52 -0700)]
intel/dev: switch defect identifiers to use lineage numbers
Update existing workarounds when necessary to match changed
identifiers.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23226>
Rob Clark [Tue, 30 May 2023 16:37:15 +0000 (09:37 -0700)]
freedreno: Reallocate on unshared export
If we need to export a handle on a resource which was not originally
allocated with PIPE_BIND_SHARED, then re-allocate with shared flag and
try again.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9110
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
Rob Clark [Tue, 30 May 2023 17:20:53 +0000 (10:20 -0700)]
freedreno: Add aux-context support
A global aux-context can be created on-demand for cases where we need to
(for example) blit a resource when we only have a screen ptr.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
Rob Clark [Tue, 30 May 2023 16:19:50 +0000 (09:19 -0700)]
freedreno: Handle export error handling
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
Rob Clark [Tue, 30 May 2023 16:15:07 +0000 (09:15 -0700)]
freedreno/drm: Don't try to export suballoc bo
Suballoc BOs don't have a real handle, so attempting to dmabuf export
won't work. Likewise for handle or flink-name export.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23324>
Alyssa Rosenzweig [Sat, 27 May 2023 18:32:46 +0000 (14:32 -0400)]
nir/print: Print locations for geometry shader inputs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
Alyssa Rosenzweig [Fri, 26 May 2023 15:31:54 +0000 (11:31 -0400)]
intel/blorp: Use nir_trim_vector
With Coccinelle patch:
@@
expression b, V;
@@
-nir_vec2(b, nir_channel(b, V, 0), nir_channel(b, V, 1))
+nir_trim_vector(b, V, 2)
@@
expression b, V;
@@
-nir_vec3(b, nir_channel(b, V, 0), nir_channel(b, V, 1), nir_channel(b, V, 2))
+nir_trim_vector(b, V, 3)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
Alyssa Rosenzweig [Fri, 26 May 2023 15:31:40 +0000 (11:31 -0400)]
radv/query: Use nir_trim_vector
With Coccinelle patch:
@@
expression b, V;
@@
-nir_vec2(b, nir_channel(b, V, 0), nir_channel(b, V, 1))
+nir_trim_vector(b, V, 2)
@@
expression b, V;
@@
-nir_vec3(b, nir_channel(b, V, 0), nir_channel(b, V, 1), nir_channel(b, V, 2))
+nir_trim_vector(b, V, 3)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
Alyssa Rosenzweig [Fri, 26 May 2023 15:16:58 +0000 (11:16 -0400)]
pan/lower_framebuffer: Use nir_replicate
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
Alyssa Rosenzweig [Fri, 26 May 2023 15:15:36 +0000 (11:15 -0400)]
treewide: Use nir_replicate
Via coccinelle.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
Alyssa Rosenzweig [Fri, 26 May 2023 15:10:58 +0000 (11:10 -0400)]
nir/builder: Add nir_replicate helper
Splat a scalar to all components of a vector.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23259>
Veerabadhran Gopalakrishnan [Wed, 17 May 2023 06:54:40 +0000 (12:24 +0530)]
radeonsi: return kernel queried video capability for HEVC and JPEG
Query and return the values obtained from kernel for VCN_1 and above.
Earlier the HEVC and JPEG capabilities were returned based on
pre-defined values.
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23067>
Veerabadhran Gopalakrishnan [Wed, 17 May 2023 06:54:40 +0000 (12:24 +0530)]
radeonsi: return kernel queried video capability for HEVC and JPEG
Query and return the values obtained from kernel for VCN_1 and above.
Earlier the HEVC and JPEG capabilities were returned based on
pre-defined values.
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23067>
Konstantin Seurer [Fri, 28 Apr 2023 21:15:48 +0000 (23:15 +0200)]
gallivm: Fix gather/scatter types for newer llvm
The types changed with opaque pointer support.
Fixes a bunch of lavapipe regressions.
Cc: mesa-stable
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23293>
Eric Engestrom [Tue, 23 May 2023 20:42:13 +0000 (21:42 +0100)]
docs/calendar: add 23.2 branchpoint and release candidates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23205>
Dylan Baker [Tue, 30 May 2023 17:41:48 +0000 (10:41 -0700)]
docs: update calendar for 23.0.4
At this point I'm calling 23.0 done. Please use 23.1 for future updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23325>
Dylan Baker [Tue, 30 May 2023 17:39:19 +0000 (10:39 -0700)]
docs: Add sha256 sum for 23.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23325>
Dylan Baker [Tue, 30 May 2023 17:11:32 +0000 (10:11 -0700)]
docs: add release notes for 23.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23325>
Jesse Natalie [Fri, 26 May 2023 17:41:27 +0000 (10:41 -0700)]
microsoft/compiler: Use image formats to determine texture types
Fixes some tests when bindless is disabled, where the image format is
R32, we do atomics on it, but we didn't set the "typed UAV load with
additional formats" feature bit because when we loaded from it, we
only loaded one component. Since the image format on the DXIL side
was declared as U32x4, the DXIL validator said that we should have.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
Jesse Natalie [Mon, 29 May 2023 02:53:52 +0000 (19:53 -0700)]
spirv2dxil: Assign formats to image vars before lowering to bindless
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
Jesse Natalie [Fri, 26 May 2023 17:37:48 +0000 (10:37 -0700)]
microsoft/compiler: Add a pass to assign image formats based on number of components
For loads/stores without formats, let's guess one based on how it's used.
The actual format doesn't matter, we just want to use it for the number
of components it has.
Also copy image formats from variables to intrinsics, to ensure that
deref-based intrinsics have formats assigned and lowered intrinsics
are up to date.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
Jesse Natalie [Fri, 26 May 2023 17:37:04 +0000 (10:37 -0700)]
microsoft/compiler: Enable emitting type info for textures with <4 comps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23266>
Hans-Kristian Arntzen [Fri, 26 May 2023 13:11:31 +0000 (15:11 +0200)]
radv/amdgpu: Report 48-bit VAs in bo logs.
More ergonomic when correlating with page fault addresses.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23256>
Chia-I Wu [Fri, 26 May 2023 05:36:51 +0000 (22:36 -0700)]
radv: fix gl_SampleMaskIn for sample shading
When sample shading, we need
gl_SampleMaskIn = SampleCoverage & (PsIterMask << gl_SampleID);
Add a new shader arg, ps_iter_mask, to pass PsIterMask to ps.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23265>
Chia-I Wu [Fri, 26 May 2023 06:11:54 +0000 (23:11 -0700)]
ac, radeonsi: add and use ac_get_ps_iter_mask
It is more natural for ac_get_ps_iter_mask to take sample count.
Replace samplemask_log_ps_iter by ps_iter_smples in
ac_nir_lower_ps_options accordingly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23265>
Chia-I Wu [Thu, 25 May 2023 21:01:44 +0000 (14:01 -0700)]
aco: fix alignment check in emit_load
align_offset already takes const_offset into consideration. Remove the
adjustment.
Fixes:
542733dbbf7 ("aco: add emit_load helper")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9097
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23242>
Lionel Landwerlin [Tue, 30 May 2023 13:29:56 +0000 (16:29 +0300)]
anv: remove unused functions
I thought I removed those, it seems my rebase got screwed up :(
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
64f20cec28 ("anv: prepare image/buffer views for non indirect descriptors")
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23317>
Lionel Landwerlin [Tue, 2 May 2023 17:44:16 +0000 (20:44 +0300)]
anv: add support for VK_EXT_dynamic_rendering_unused_attachments
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23294>
Erik Faye-Lund [Fri, 26 May 2023 08:53:47 +0000 (10:53 +0200)]
zink: do not lower line-smooth for non-lines
We used to do this correctly, but it seems this accidentally got
dropped.
Fixes:
d80a35a7f76 ("zink: unified `zink_set_primitive_emulation_keys` and `zink_create_primitive_emulation_gs`")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23316>
Erik Faye-Lund [Fri, 26 May 2023 07:48:56 +0000 (09:48 +0200)]
zink: compute correct location for line-smooth gs
The GS and the FS needs to agree on the driver_location. But we just
used the num_outputs variable for the GS instead of matching the logic
from lower_aaline_instr in nir_draw_helpers.c.
This does that, but cleans up our copy slightly to avoid computing the
needless location, as well as using unsigned values.
This used to *mostly* work before, but only because we were lucky and
not too much crazy stuff went on with the inputs / outputs in
smooth-line cases.
Fixes:
edecb66b018 ("nir: avoid generating conflicting output variables")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23316>
Erik Faye-Lund [Tue, 30 May 2023 10:15:00 +0000 (12:15 +0200)]
zink: keep gl46_optimal extensions/features sorted
These are mostly sorted, which makes it easy to know where to insert new
stuff. Let's make them completely sorted.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23316>
Mike Blumenkrantz [Tue, 30 May 2023 13:13:56 +0000 (09:13 -0400)]
zink: explicitly avoid ci errors due to unrecognized extensions in VVL
lavapipe still had this from shader object, but this should always be in
place for all drivers so that old VVL doesn't block merges
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23315>
Erik Faye-Lund [Tue, 30 May 2023 09:43:25 +0000 (11:43 +0200)]
zink: update profiles schema
We technically need the 251 version, but the schema for that version
is not released yet, so this is the best we can do.
See https://github.com/KhronosGroup/Vulkan-Profiles/issues/437
This gets rid of some JSON schema-validation warnings.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23308>
Georg Lehmann [Sun, 28 May 2023 07:12:46 +0000 (09:12 +0200)]
nir/opt_if: use nir_alu_instr_is_comparison directly
Since
2d6233d0 ("nir: Check all sizes in nir_alu_instr_is_comparison"),
nir_alu_instr_is_comparison already returns true for comparisons with 32bit
result.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23287>
Rhys Perry [Wed, 24 May 2023 15:24:35 +0000 (16:24 +0100)]
aco: improve printing of s_delay_alu
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
Rhys Perry [Tue, 23 May 2023 13:04:41 +0000 (14:04 +0100)]
aco: insert s_delay_alu on the linear CFG
fossil-db (gfx1100):
Totals from 10498 (7.87% of 133428) affected shaders:
Instrs:
22274711 ->
22277717 (+0.01%); split: -0.01%, +0.03%
CodeSize:
114557040 ->
114569064 (+0.01%); split: -0.01%, +0.02%
Latency:
236505186 ->
236497338 (-0.00%); split: -0.00%, +0.00%
InvThroughput:
33425052 ->
33423876 (-0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
Rhys Perry [Mon, 22 May 2023 16:44:32 +0000 (17:44 +0100)]
aco: use pass_flags to recover s_delay_alu cycles
This is simpler and more accurate.
fossil-db (gfx1100):
Totals from 11678 (8.75% of 133428) affected shaders:
Instrs:
25448655 ->
25436028 (-0.05%)
CodeSize:
130364728 ->
130314220 (-0.04%)
Latency:
325247603 ->
325231064 (-0.01%); split: -0.01%, +0.00%
InvThroughput:
45901166 ->
45900022 (-0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
Rhys Perry [Mon, 22 May 2023 15:32:00 +0000 (16:32 +0100)]
aco: fix update_alu(clear=true) for exports
For:
v_mov_b32_e32 v0, 1.0
exp mrtz v0, off, off, off
we should completely remove the ALU entry before creating the EXP's WaR entry for v0.
Otherwise, the two will be combined into an entry which will wait for
expcnt(0) for later uses of v0.
gen_alu() should also be before gen(), since gen_alu() performs the clear
while gen() creates the WaR entry.
fossil-db (gfx1100):
Totals from 3589 (2.69% of 133428) affected shaders:
Instrs: 5591041 -> 5589047 (-0.04%); split: -0.04%, +0.00%
CodeSize:
28580840 ->
28572864 (-0.03%); split: -0.03%, +0.00%
Latency:
65427923 ->
65427543 (-0.00%); split: -0.00%, +0.00%
InvThroughput:
11109079 ->
11109065 (-0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
Teng, Jin Chung [Fri, 26 May 2023 05:54:47 +0000 (13:54 +0800)]
d3d12: HEVC Encode - Fix num_subregions_per_scanline rounding
num_subregions_per_scanline need to be round up
Signed-off-by: Teng, Jin Chung <jin.chung.teng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23247>
Matt Coster [Mon, 15 May 2023 08:07:16 +0000 (09:07 +0100)]
pvr: Fix page faults in occlusion query tests
This does not fix the tests completely, but does allow them to run to
completion and fail "properly".
Also contains a few trivial bugfixes in the same codepath.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23100>
Karmjit Mahil [Mon, 5 Dec 2022 16:06:03 +0000 (16:06 +0000)]
pvr: Handle barrier load and store flags.
This commit adds handling for {s,z}loaden and {s,z}storeen to
control loading from and storing to the stencil and depth buffer.
This commit also addressed the FIXMEs around barrier_{load,store}
which control the {s,z}{load,store}en.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20487>
Matt Coster [Tue, 16 May 2023 08:37:46 +0000 (09:37 +0100)]
pvr: Reorder execution in pvr_cmd_buffer_end_sub_cmd()
This allows sub_cmd->job.run_frag to be setup before calling
pvr_sub_cmd_gfx_requires_split_submit().
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
Matt Coster [Tue, 16 May 2023 08:32:33 +0000 (09:32 +0100)]
pvr: Fix out of range stream errors for geometry-only jobs on pvrsrvkm
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
Matt Coster [Tue, 16 May 2023 08:29:36 +0000 (09:29 +0100)]
pvr: Do not free deferred pvr_transfer_cmd instances
Deferred pvr_transfer_cmd instances are allocated from a dyn_array on
the owning pvr_cmd_buffer and must not be freed directly.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
Matt Coster [Tue, 16 May 2023 08:24:09 +0000 (09:24 +0100)]
pvr: Rename shadowing loop variable in pvr_add_deferred_rta_clear()
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
Matt Coster [Tue, 16 May 2023 08:22:39 +0000 (09:22 +0100)]
pvr: Use correct surface for deferred RTA clear
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23125>
Matt Coster [Thu, 18 May 2023 10:33:08 +0000 (11:33 +0100)]
pvr: Correct error flow in pvr_compute_pipeline_compile()
Fixes:
dEQP-VK.api.object_management.alloc_callback_fail.compute_pipeline
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
Matt Coster [Thu, 18 May 2023 10:09:41 +0000 (11:09 +0100)]
pvr: Correct error flow in pvr_graphics_pipeline_compile()
Fixes:
dEQP-VK.api.object_management.alloc_callback_fail.graphics_pipeline
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
Matt Coster [Thu, 18 May 2023 08:10:34 +0000 (09:10 +0100)]
pvr: Fix memory leaks on realloc failure in pvr_pipeline.c
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
Matt Coster [Thu, 18 May 2023 09:26:23 +0000 (10:26 +0100)]
pvr: Fix allocation scopes in vkCreateRenderPass2() code path
These previously COMMAND scoped allocations are stored on the
VkRenderPass and must therefore be OBJECT scoped.
Fixes: dEQP-VK.api.object_management.single_alloc_callbacks.render_pass
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23130>
Iago Toral Quiroga [Tue, 30 May 2023 08:36:17 +0000 (10:36 +0200)]
v3d: only warn about bining sync for indirect draw once
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23306>
Felix DeGrood [Mon, 15 May 2023 22:44:45 +0000 (22:44 +0000)]
anv: override vendorID for Cyberpunk 2077
A recent update to Cyberpunk 2077 enables XeSS code for Intel GPUs
which is causing the game to crash in the XeSS libraries. As a
temporary work around, stop identifying as Intel for Cyberpunk so
XeSS falls back to the cross-vendor path.
References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8860
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23271>
Lionel Landwerlin [Fri, 24 Feb 2023 21:11:07 +0000 (23:11 +0200)]
anv: enable direct descriptors on platforms with extended bindless offset
Aka. DG2
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Tue, 25 Apr 2023 13:39:02 +0000 (16:39 +0300)]
anv: ensure descriptor addresses are used with bindless stages
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Mon, 27 Feb 2023 15:02:11 +0000 (17:02 +0200)]
anv: descriptor binding for direct descriptors
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Thu, 9 Feb 2023 14:58:58 +0000 (16:58 +0200)]
anv: bring back the max number of sets to 8
Not sure we bumped it to 32 for the right reasons. This generates more
push constant data and because we're not tighly packing our push
constant data this can generate more register pressure.
We could tightly pack things at the cost of some CPU cycles but only
for some stages. RT stages would have to retain the current "sparse"
version of push constants.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 24 Feb 2023 18:02:57 +0000 (20:02 +0200)]
anv: add direct descriptor support to apply_layout
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Thu, 2 Mar 2023 09:10:36 +0000 (11:10 +0200)]
anv: track descriptor data size
descriptor_stride includes multiple plane size, this new field tracks
just the data of one plane.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 24 Feb 2023 11:42:25 +0000 (13:42 +0200)]
anv: simplify ycbcr bti computations
To make BTI indexing simpler with ycbcr samplers, stop doing packing
calculations in the apply_layout. We'll insert NULL bindings for the
few ycbcr cases where it's needed.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 24 Feb 2023 11:00:40 +0000 (13:00 +0200)]
anv: implement binding table emission for direct descriptors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 24 Feb 2023 10:23:23 +0000 (12:23 +0200)]
anv: factor out dynamic buffer bti emission
No functional change. Will reuse in the followup commit.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 24 Feb 2023 09:45:04 +0000 (11:45 +0200)]
anv: handle null surface in the binding table with direct descriptors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 24 Feb 2023 09:20:53 +0000 (11:20 +0200)]
anv: add helpers to build pipeline bindings
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Thu, 23 Feb 2023 19:37:59 +0000 (21:37 +0200)]
anv: add support for direct descriptor in allocation/writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Thu, 23 Feb 2023 13:19:11 +0000 (15:19 +0200)]
anv: prepare image/buffer views for non indirect descriptors
When in direct descriptor mode, the descriptor pool buffers will hold
surface states directly. We won't allocate surface states in image &
buffer views.
Instead views will hold a packed RENDER_SURFACE_STATE ready to copied
into the descriptor buffers.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Tue, 10 Jan 2023 08:18:06 +0000 (10:18 +0200)]
anv: bound load descriptor mem better
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Mon, 9 Jan 2023 19:15:08 +0000 (21:15 +0200)]
nir: expose a couple of address format add helpers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Thu, 22 Dec 2022 18:44:07 +0000 (20:44 +0200)]
anv: add a pass to partially lower resource_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Tue, 13 Dec 2022 09:28:19 +0000 (11:28 +0200)]
anv: new structure to hold surface states
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Wed, 15 Mar 2023 14:10:25 +0000 (16:10 +0200)]
anv: reduce push constant size for descriptor sets
Now that descriptor sets are located a in a 1Gb area, we can avoid
storing the whole address to the descriptor and add the base address
of the area to a 32bit offset.
Replay a bunch of fossils with this and changes not really significant
one way or another :
Totals:
Instrs: 9278246 -> 9277148 (-0.01%); split: -0.01%, +0.00%
Cycles:
3547598421 ->
3547579435 (-0.00%); split: -0.00%, +0.00%
Totals from 353 (1.14% of 31021) affected shaders:
Instrs: 581546 -> 580448 (-0.19%); split: -0.23%, +0.04%
Cycles:
25885422 ->
25866436 (-0.07%); split: -0.31%, +0.24%
No difference on send messages or spills/fills.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Wed, 22 Feb 2023 07:00:35 +0000 (09:00 +0200)]
anv: create a pool for indirect descriptors
We'll use the fact that the pool is aligned to 4Gb to limit the amount
of address computations to build the address in the shaders.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Mon, 27 Mar 2023 14:11:44 +0000 (17:11 +0300)]
anv: introduce a new descriptor set layout type
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Thu, 23 Feb 2023 12:18:51 +0000 (14:18 +0200)]
anv: add an option for using indirect descriptors
This is the default for now. It needs to be part the pipeline hashing
as we will allow this to be tweaked per application.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Tue, 6 Dec 2022 13:31:26 +0000 (15:31 +0200)]
docs/anv: some binding table explanations
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Fri, 14 Oct 2022 14:49:58 +0000 (17:49 +0300)]
anv: toggle extended bindless surface state on Gfx12.5+
We bump the max surfaces to ~16 million instead of ~1 million on
Gfx9-12. We could do more but that'll come later.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Mon, 20 Mar 2023 11:57:15 +0000 (13:57 +0200)]
anv: increase workaround BO so that we can hold a full 4Kb page of 0s
At the beginning of the buffer is located the driver identifier for
error states.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Wed, 22 Mar 2023 14:29:58 +0000 (16:29 +0200)]
anv: move pipeline active_stages to common structure
And fill it out for all types of pipelines.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Mon, 20 Mar 2023 14:35:46 +0000 (16:35 +0200)]
anv: track pipeline in anv_cmd_pipeline_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Wed, 22 Mar 2023 15:32:29 +0000 (17:32 +0200)]
anv: bail flush_gfx_state when not gfx push constant is dirty
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
Lionel Landwerlin [Mon, 27 Mar 2023 09:46:09 +0000 (12:46 +0300)]
anv: remove incorrect ifdef
This is a leftover from a previous fix attempt. We don't need this.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
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