Jakub Jelinek [Mon, 24 Oct 2022 15:53:16 +0000 (17:53 +0200)]
c, c++: Fix up excess precision handling of scalar_to_vector conversion [PR107358]
As mentioned earlier in the C++ excess precision support mail, the following
testcase is broken with excess precision both in C and C++ (though just in C++
it was triggered in real-world code).
scalar_to_vector is called in both FEs after the excess precision promotions
(or stripping of EXCESS_PRECISION_EXPR), so we can then get invalid
diagnostics that say float vector + float involves truncation (on ia32
from long double to float).
The following patch fixes that by calling scalar_to_vector on the operands
before the excess precision promotions, let scalar_to_vector just do the
diagnostics (it does e.g. fold_for_warn so it will fold
EXCESS_PRECISION_EXPR around REAL_CST to constants etc.) but will then
do the actual conversions using the excess precision promoted operands
(so say if we have vector double + (float + float) we don't actually do
vector double + (float) ((long double) float + (long double) float)
but
vector double + (double) ((long double) float + (long double) float)
2022-10-24 Jakub Jelinek <jakub@redhat.com>
PR c++/107358
gcc/c/
* c-typeck.cc (build_binary_op): Pass operands before excess precision
promotions to scalar_to_vector call.
gcc/cp/
* typeck.cc (cp_build_binary_op): Pass operands before excess precision
promotions to scalar_to_vector call.
gcc/testsuite/
* c-c++-common/pr107358.c: New test.
* g++.dg/cpp1y/pr68180.C: Remove -fexcess-precision=fast from
dg-options.
Tobias Burnus [Mon, 24 Oct 2022 14:58:43 +0000 (16:58 +0200)]
libgomp/nvptx: Prepare for reverse-offload callback handling
This patch adds a stub 'gomp_target_rev' in the host's target.c, which will
later handle the reverse offload.
For nvptx, it adds support for forwarding the offload gomp_target_ext call
to the host by setting values in a struct on the device and querying it on
the host - invoking gomp_target_rev on the result.
include/ChangeLog:
* cuda/cuda.h (enum CUdevice_attribute): Add
CU_DEVICE_ATTRIBUTE_UNIFIED_ADDRESSING.
(CU_MEMHOSTALLOC_DEVICEMAP): Define.
(cuMemHostAlloc): Add prototype.
libgomp/ChangeLog:
* config/nvptx/icv-device.c (GOMP_DEVICE_NUM_VAR): Remove
'static' for this variable.
* config/nvptx/libgomp-nvptx.h: New file.
* config/nvptx/target.c: Include it.
(GOMP_ADDITIONAL_ICVS): Declare extern var.
(GOMP_REV_OFFLOAD_VAR): Declare var.
(GOMP_target_ext): Handle reverse offload.
* libgomp-plugin.h (GOMP_PLUGIN_target_rev): New prototype.
* libgomp-plugin.c (GOMP_PLUGIN_target_rev): New, call ...
* target.c (gomp_target_rev): ... this new stub function.
* libgomp.h (gomp_target_rev): Declare.
* libgomp.map (GOMP_PLUGIN_1.4): New; add GOMP_PLUGIN_target_rev.
* plugin/cuda-lib.def (cuMemHostAlloc): Add.
* plugin/plugin-nvptx.c: Include libgomp-nvptx.h.
(struct ptx_device): Add rev_data member.
(nvptx_open_device): Remove async_engines query, last used in
r10-304-g1f4c5b9b; add unified-address assert check.
(GOMP_OFFLOAD_get_num_devices): Claim unified address
support.
(GOMP_OFFLOAD_load_image): Free rev_fn_table if no
offload functions exist. Make offload var available
on host and device.
(rev_off_dev_to_host_cpy, rev_off_host_to_dev_cpy): New.
(GOMP_OFFLOAD_run): Handle reverse offload.
Wilco Dijkstra [Mon, 24 Oct 2022 14:14:14 +0000 (15:14 +0100)]
[AArch64] Improve immediate expansion [PR106583]
Improve immediate expansion of immediates which can be created from a
bitmask immediate and 2 MOVKs. Simplify, refactor and improve efficiency
of bitmask checks. Move various immediate handling functions together
to avoid forward declarations.
This reduces the number of 4-instruction immediates in SPECINT/FP by 10-15%.
gcc/
PR target/106583
* config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
Add support for a bitmask immediate with 2 MOVKs.
(aarch64_check_bitmask): New function after refactorization.
(aarch64_bitmask_imm): Simplify replication of small modes.
Split function into 64-bit only version for efficiency.
(aarch64_move_imm): Move near other immediate functions.
(aarch64_uimm12_shift): Likewise.
(aarch64_clamp_to_uimm12_shift): Likewise.
(aarch64_movk_shift): Likewise.
(aarch64_replicate_bitmask_imm): Likewise.
(aarch64_and_split_imm1): Likewise.
(aarch64_and_split_imm2): Likewise.
(aarch64_and_bitmask_imm): Likewise.
(aarch64_movw_imm): Likewise.
gcc/testsuite/
PR target/106583
* gcc.target/aarch64/pr106583.c: Add new test.
Jakub Jelinek [Mon, 24 Oct 2022 14:25:29 +0000 (16:25 +0200)]
c++: Fix up constexpr handling of char/signed char/short pre/post inc/decrement [PR105774]
signed char, char or short int pre/post inc/decrement are represented by
normal {PRE,POST}_{INC,DEC}REMENT_EXPRs in the FE and only gimplification
ensures that the {PLUS,MINUS}_EXPR is done in unsigned version of those
types:
case PREINCREMENT_EXPR:
case PREDECREMENT_EXPR:
case POSTINCREMENT_EXPR:
case POSTDECREMENT_EXPR:
{
tree type = TREE_TYPE (TREE_OPERAND (*expr_p, 0));
if (INTEGRAL_TYPE_P (type) && c_promoting_integer_type_p (type))
{
if (!TYPE_OVERFLOW_WRAPS (type))
type = unsigned_type_for (type);
return gimplify_self_mod_expr (expr_p, pre_p, post_p, 1, type);
}
break;
}
This means during constant evaluation we need to do it similarly (either
using unsigned_type_for or using widening to integer_type_node).
The following patch does the latter.
2022-10-24 Jakub Jelinek <jakub@redhat.com>
PR c++/105774
* constexpr.cc (cxx_eval_increment_expression): For signed types
that promote to int, evaluate PLUS_EXPR or MINUS_EXPR in int type.
* g++.dg/cpp1y/constexpr-105774.C: New test.
Arsen Arsenović [Fri, 14 Oct 2022 10:04:51 +0000 (12:04 +0200)]
c-family: Implicitly return zero from main even on freestanding
... unless marked noreturn.
This should not get in anyone's way, but should permit the use of main()
in freestanding more easily, especially for writing test cases that
should work both in freestanding and hosted modes.
gcc/c/ChangeLog:
* c-decl.cc (finish_function): Ignore hosted when deciding
whether to implicitly return zero, but check noreturn.
* c-objc-common.cc (c_missing_noreturn_ok_p): Loosen the
requirements to just MAIN_NAME_P when hosted, or `int main'
otherwise.
gcc/cp/ChangeLog:
* cp-tree.h (DECL_MAIN_P): Move most logic, besides the hosted
check, from here...
(DECL_MAIN_ANY_P): ... to here, so that it can be reused ...
(DECL_MAIN_FREESTANDING_P): ... here, with an additional
constraint on (hosted OR return type == int)
* decl.cc (finish_function): Use DECL_MAIN_FREESTANDING_P
instead of DECL_MAIN_P, to loosen the hosted requirement, but
check noreturn, before adding implicit returns.
gcc/testsuite/ChangeLog:
* gcc.dg/noreturn-4.c: Removed.
* g++.dg/freestanding-main.C: New test.
* g++.dg/freestanding-nonint-main.C: New test.
* gcc.dg/freestanding-main.c: New test.
* gcc.dg/freestanding-nonint-main.c: New test.
Aldy Hernandez [Mon, 24 Oct 2022 10:37:25 +0000 (12:37 +0200)]
[PR tree-optimization/107355] Handle NANs in abs range-op entry.
The problem here is that the threader is coming up with a path where
the only valid result is a NAN. When the abs op1_range entry is
trying to add the negative posibility, it attempts to get the bounds
of the working range. NANs don't have bounds so they need to be
special cased.
PR tree-optimization/107355
gcc/ChangeLog:
* range-op-float.cc (foperator_abs::op1_range): Handle NAN.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr107355.c: New test.
Tobias Burnus [Mon, 24 Oct 2022 13:19:00 +0000 (15:19 +0200)]
OpenMP: Fix reverse offload GOMP_TARGET_REV IFN corner cases [PR107236]
For 'target parallel' and similarly nested directives, cgraph_node's
calls_declare_variant_alt was not set in the parent region node but in
cfun->decl. Hence, pass_omp_device_lower did not process handle the
internal function GOMP_TARGET_REV. - Solution is to set it to the
DECL_CONTEXT, which is set in adjust_context_and_scope.
The cgraph_node::create_clone issue is exposed with -O2 for the existing
libgomp.fortran/reverse-offload-1.f90.
PR middle-end/107236
gcc/ChangeLog:
* omp-expand.cc (expand_omp_target): Set calls_declare_variant_alt
in DECL_CONTEXT and not to cfun->decl.
* cgraphclones.cc (cgraph_node::create_clone): Copy also the
node's calls_declare_variant_alt value.
gcc/testsuite/ChangeLog:
* gfortran.dg/gomp/target-device-ancestor-6.f90: New test.
Kito Cheng [Fri, 30 Sep 2022 02:05:23 +0000 (10:05 +0800)]
RISC-V: Support --target-help for -mcpu/-mtune
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (riscv_tunes): New.
(riscv_get_valid_option_values): New.
(TARGET_GET_VALID_OPTION_VALUES): New.
* config/riscv/riscv-cores.def (RISCV_TUNE): New, define options
for tune here.
(RISCV_CORE): Fix comment.
* config/riscv/riscv.cc (riscv_tune_info_table): Move definition to
riscv-cores.def.
Aldy Hernandez [Sun, 23 Oct 2022 14:51:17 +0000 (16:51 +0200)]
Check HONOR_NANS instead of flag_finite_math_only in frange:verify_range.
[Jakub and other FP experts, would this be OK, or am I missing
something?]
Vax does not seem to have !flag_finite_math_only, but float_type_node
does not HONOR_NANS. The check in frange::verify_range dependend on
flag_finite_math_only, which is technically not correct since
frange::set_varying() checks HONOR_NANS instead of
flag_finite_math_only.
I'm actually getting tired of flag_finite_math_only and
!flag_finite_math_only discrepancies in the selftests (Vax and rx-elf
come to mind). I think we should just test both alternatives in the
selftests as in this patch.
We could also check flag_finite_math_only=0 with a float_type_node
that does not HONOR_NANs, but I have no idea how to twiddle
FLOAT_MODE_FORMAT temporarily, and that may be over thinking it.
PR tree-optimization/107365
gcc/ChangeLog:
* value-range.cc (frange::verify_range): Predicate NAN check in
VARYING range on HONOR_NANS instead of flag_finite_math_only.
(range_tests_floats): Same.
(range_tests_floats_various): New.
(range_tests): Call range_tests_floats_various.
Torbjörn SVENSSON [Fri, 21 Oct 2022 10:29:13 +0000 (12:29 +0200)]
lto: Always quote path to touch
When generating the makefile, make sure that the paths are quoted so
that a native Windows path works within Cygwin.
Without this patch, this error is reported by the DejaGNU test suite:
make: [T:\ccMf0kI3.mk:3: T:\ccGEvdDp.ltrans0.ltrans.o] Error 1 (ignored)
The generated makefile fragment without the patch:
T:\ccGEvdDp.ltrans0.ltrans.o:
@T:\build\bin\arm-none-eabi-g++.exe '-xlto' ... '-o' 'T:\ccGEvdDp.ltrans0.ltrans.o' 'T:\ccGEvdDp.ltrans0.o'
@-touch -r T:\ccGEvdDp.ltrans0.o T:\ccGEvdDp.ltrans0.o.tem > /dev/null 2>&1 && mv T:\ccGEvdDp.ltrans0.o.tem T:\ccGEvdDp.ltrans0.o
.PHONY: all
all: \
T:\ccGEvdDp.ltrans0.ltrans.o
With the patch, the touch line would be replace with:
@-touch -r "T:\ccGEvdDp.ltrans0.o" "T:\ccGEvdDp.ltrans0.o.tem" > /dev/null 2>&1 && mv "T:\ccGEvdDp.ltrans0.o.tem" "T:\ccGEvdDp.ltrans0.o"
gcc/ChangeLog:
* lto-wrapper.cc: Quote paths in makefile.
Co-Authored-By: Yvan ROUX <yvan.roux@foss.st.com>
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Ju-Zhe Zhong [Mon, 24 Oct 2022 02:03:12 +0000 (10:03 +0800)]
RISC-V: Support (set (mem) (const_poly_int))
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_legitimize_move): Support (set (mem) (const_poly_int)).
Ju-Zhe Zhong [Mon, 24 Oct 2022 02:20:28 +0000 (10:20 +0800)]
RISC-V: Replace CONSTEXPR with constexpr
Move away from the pre-C++11 compatibility macro CONSTEXPR.
This patch is inspired by aarch64:
https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603974.html.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: Replace CONSTEXPR
with constexpr throughout.
* config/riscv/riscv-vector-builtins-shapes.cc (SHAPE): Likewise.
* config/riscv/riscv-vector-builtins.cc
(struct registered_function_hasher): Likewise.
* config/riscv/riscv-vector-builtins.h (struct rvv_arg_type_info):
Likewise.
Ju-Zhe Zhong [Mon, 24 Oct 2022 02:05:24 +0000 (10:05 +0800)]
RISC-V: Remove unused TI/TF vector modes.
gcc/ChangeLog:
* config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes.
Ju-Zhe Zhong [Mon, 24 Oct 2022 01:39:16 +0000 (09:39 +0800)]
RISC-V: Fix REG_CLASS_CONTENTS.
Include V_REGS for ALL_REGS.
gcc/ChangeLog:
* config/riscv/riscv.h (REG_CLASS_CONTENTS): Fix ALL_REGS.
GCC Administrator [Mon, 24 Oct 2022 00:16:31 +0000 (00:16 +0000)]
Daily bump.
LIU Hao [Sat, 22 Oct 2022 09:31:46 +0000 (17:31 +0800)]
libgcc: Update 'gthr-mcf.h' to include a dedicated header for libobjc
'libobjc/thr.c' includes 'gthr.h'. While all the other gthread headers
have `#ifdef _LIBOBJC` checks, and provide a different set of inline
functions, I think having one header provide two completely unrelated
set of APIs is unsatisfactory, complicates maintenance, and hinders
further development.
This commit references a new header for libobjc, and adds a copyright
notice, as in other headers.
libgcc/ChangeLog:
* config/i386/gthr-mcf.h: Include 'gthr_libobjc.h' when building
libobjc, instead of 'gthr.h'
GCC Administrator [Sun, 23 Oct 2022 00:16:38 +0000 (00:16 +0000)]
Daily bump.
Michael Eager [Sat, 22 Oct 2022 23:23:16 +0000 (16:23 -0700)]
Fix uninitialized variable warnings.
Check for use of previously uninitialized variables; call gcc_unreachable().
Replace abort() with gcc_unreachable().
2022-10-22 Michael Eager <eager@eagercon.com>
gcc/
* config/microblaze/microblaze.cc
(microblaze_legitimize_address): Initialize 'reg' to NULL, check for NULL.
(microblaze_address_insns): Replace abort() with gcc_unreachable().
(print_operand_address): Same.
(microblaze_expand_move): Initialize 'p1' to NULL, check for NULL.
(get_branch_target): Replace abort() with gcc_unreachable().
Aldy Hernandez [Sat, 22 Oct 2022 14:22:50 +0000 (16:22 +0200)]
Update selftest such that [-Inf, +Inf] is always VARYING for -ffinite-math-only.
[-Inf, +Inf] +-NAN gets normalized as VARYING. There is a test that
drops the NAN possibility, and tests that the range is no longer
VARYING but [-Inf, +Inf]. However, for -ffinite-math-only targets
(Vax, RX, etc) the range would still be VARYING because the VARYING
range never had a NAN to begin with. This fixes the test.
I have a precommit hook that does self-tests with
-fno-finite-math-only, -ffinite-math-only, and -ffast-math as a sanity
check, but my precommit hook last week was disabled because there was
a tree-ssa.exp in mainline failing which was throwing off my scripts.
My apologies.
gcc/ChangeLog:
* value-range.cc (range_tests_floats): Predicate [-Inf, +Inf] test
with !flag_finite_math_only.
Takayuki 'January June' Suwa [Fri, 21 Oct 2022 22:46:13 +0000 (07:46 +0900)]
xtensa: Make register A0 allocable for the CALL0 ABI
This patch offers an additional allocable register by RA for the CALL0
ABI.
> Register a0 holds the return address upon entry to a function, but
> unlike the windowed register ABI, it is not reserved for this purpose
> and may hold other values after the return address has been saved.
- Xtensa ISA Reference Manual,
8.1.2 "CALL0 Register Usage and Stack Layout" [p.589]
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_conditional_register_usage):
Remove register A0 from FIXED_REGS if the CALL0 ABI.
(xtensa_expand_epilogue): Change to emit '(use (reg:SI A0_REG))'
unconditionally after restoring callee-saved registers for
sibling-call functions, in order to prevent misleading that
register A0 is free to use.
GCC Administrator [Sat, 22 Oct 2022 00:17:11 +0000 (00:17 +0000)]
Daily bump.
José Rui Faustino de Sousa [Tue, 18 Oct 2022 20:29:59 +0000 (22:29 +0200)]
Fortran: Add missing TKR initialization to class variables [PR100097, PR100098]
gcc/fortran/ChangeLog:
PR fortran/100097
PR fortran/100098
* trans-array.cc (gfc_trans_class_array): New function to
initialize class descriptor's TKR information.
* trans-array.h (gfc_trans_class_array): Add function prototype.
* trans-decl.cc (gfc_trans_deferred_vars): Add calls to the new
function for both pointers and allocatables.
gcc/testsuite/ChangeLog:
PR fortran/100097
PR fortran/100098
* gfortran.dg/PR100097.f90: New test.
* gfortran.dg/PR100098.f90: New test.
Jakub Jelinek [Fri, 21 Oct 2022 16:34:37 +0000 (18:34 +0200)]
i386: Fix up BFmode comparisons in conditional moves [PR107322]
As the testcase shows, when cbranchbf4/cstorebf4 patterns are defined,
we can get ICEs for conditional moves.
The problem is that the generic conditional move expansion just calls
prepare_cmp_insn which just checks that such a cbranch<mode>4 exists
and returns directly such comparison and passes it down to the conditional
move optabs.
The following patch fixes it by punting if the comparisons aren't
ix86_fp_comparison_operator (to tell the generic code it should separately
compare) and to handle the promotion of BFmode comparison operands to
SFmode such that comparison is performed in SFmode.
2022-10-21 Jakub Jelinek <jakub@redhat.com>
PR target/107322
* config/i386/i386-expand.cc (ix86_prepare_fp_compare_args): For
BFmode comparisons promote arguments to SFmode and recurse.
(ix86_expand_int_movcc, ix86_expand_fp_movcc): Return false early
if comparison operands are BFmode and operands[1] is not
ix86_fp_comparison_operator.
* gcc.target/i386/pr107322.c: New test.
Jakub Jelinek [Fri, 21 Oct 2022 16:04:54 +0000 (18:04 +0200)]
c++: Don't shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_constant_expression [PR107295]
The excess precision support broke building skia (dependency of firefox)
on ia32 (it has something like the a constexpr variable), but as the other
cases show, it is actually a preexisting problem if one uses casts from
constants with wider floating point types.
The problem is that cxx_eval_constant_expression tries to short-cut
processing of TREE_CONSTANT CONSTRUCTORs if they satisfy
reduced_constant_expression_p - instead of calling cxx_eval_bare_aggregate
on them it just verifies flags and if they are TREE_CONSTANT even after
that, just fold.
Now, on the testcase we have a TREE_CONSTANT CONSTRUCTOR containing
TREE_CONSTANT NOP_EXPR of REAL_CST. And, fold, which isn't recursive,
doesn't optimize that into VECTOR_CST, while later on we are only able
to optimize VECTOR_CST arithmetics, not arithmetics with vector
CONSTRUCTORs.
The following patch fixes that by rejecting CONSTRUCTORs with vector type
in reduced_constant_expression_p regardless of whether they have
CONSTRUCTOR_NO_CLEARING set or not, folding result in cxx_eval_bare_aggregate
even if nothing has changed but it wasn't non-constant and removing folding
from the TREE_CONSTANT reduced_constant_expression_p short-cut.
2022-10-21 Jakub Jelinek <jakub@redhat.com>
PR c++/107295
* constexpr.cc (reduced_constant_expression_p) <case CONSTRUCTOR>:
Return false for VECTOR_TYPE CONSTRUCTORs even without
CONSTRUCTOR_NO_CLEARING set on them.
(cxx_eval_bare_aggregate): If constant but !changed, fold before
returning VECTOR_TYPE_P CONSTRUCTOR.
(cxx_eval_constant_expression) <case CONSTRUCTOR>: Don't fold
TREE_CONSTANT CONSTRUCTOR, just return it.
* g++.dg/ext/vector42.C: New test.
Tejas Joshi [Tue, 28 Jun 2022 11:03:53 +0000 (16:33 +0530)]
Enable AMD znver4 support and add instruction reservations
2022-09-28 Tejas Joshi <TejasSanjay.Joshi@amd.com>
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver4.
* common/config/i386/i386-common.cc (processor_names): Add znver4.
(processor_alias_table): Add znver4 and modularize old znvers.
* common/config/i386/i386-cpuinfo.h (processor_subtypes):
AMDFAM19H_ZNVER4.
* config.gcc (x86_64-*-* |...): Likewise.
* config/i386/driver-i386.cc (host_detect_local_cpu): Let
-march=native recognize znver4 cpus.
* config/i386/i386-c.cc (ix86_target_macros_internal): Add znver4.
* config/i386/i386-options.cc (m_ZNVER4): New definition.
(m_ZNVER): Include m_ZNVER4.
(processor_cost_table): Add znver4.
* config/i386/i386.cc (ix86_reassociation_width): Likewise.
* config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER4.
(PTA_ZNVER1): New definition.
(PTA_ZNVER2): Likewise.
(PTA_ZNVER3): Likewise.
(PTA_ZNVER4): Likewise.
* config/i386/i386.md (define_attr "cpu"): Add znver4 and rename
md file.
* config/i386/x86-tune-costs.h (znver4_cost): New definition.
* config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver4.
(ix86_adjust_cost): Likewise.
* config/i386/znver1.md: Rename to znver.md.
* config/i386/znver.md: Add new reservations for znver4.
* doc/extend.texi: Add details about znver4.
* doc/invoke.texi: Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.target/i386/mv29.C: Likewise.
Arsen Arsenović [Wed, 12 Oct 2022 19:47:35 +0000 (21:47 +0200)]
libstdc++: respect with-{headers, newlib} for default hosted value
This saves us a build flag when building for freestanding targets.
libstdc++-v3/ChangeLog:
* acinclude.m4: Default hosted to off if building without
headers and without newlib.
* configure: Regenerate.
Jonathan Wakely [Tue, 18 Oct 2022 19:49:42 +0000 (20:49 +0100)]
libstdc++: Fix std::move_only_function for incomplete parameter types
The std::move_only_function::__param_t alias template attempts to
optimize argument passing for the invoker, by passing by rvalue
reference for types that are non-trivial or large. However, the
precondition for is_trivally_copyable makes it unsuitable for using
here, and can cause ODR violations. Just use is_scalar instead, and pass
all class types (even small, trivial ones) by value.
libstdc++-v3/ChangeLog:
* include/bits/mofunc_impl.h (move_only_function::__param_t):
Use __is_scalar instead of is_trivially_copyable.
* testsuite/20_util/move_only_function/call.cc: Check parameters
involving incomplete types.
Thomas Schwinge [Sat, 15 Oct 2022 22:07:20 +0000 (00:07 +0200)]
Restore 'libgomp.oacc-c-c++-common/nvptx-sese-1.c' SESE regions checking [PR107195, PR107344]
That is, adjust for optimization introduced with recent
commit r13-3217-gc4d15dddf6b9eacb36f535807ad2ee364af46e04
"[PR107195] Set range to zero when nonzero mask is 0", where GCC now
understands that after 'r *= 2;', 'r & 1' will never hold here, and thus
transforms/optimizes/"disturbs" the original code such that GCC/nvptx's later
"Neuter whole SESE regions" optimization no longer is applicable to it:
UNSUPPORTED: libgomp.oacc-c/../libgomp.oacc-c-c++-common/nvptx-sese-1.c -DACC_DEVICE_TYPE_nvidia=1 -DACC_MEM_SHARED=0 -foffload=nvptx-none -O0
PASS: libgomp.oacc-c/../libgomp.oacc-c-c++-common/nvptx-sese-1.c -DACC_DEVICE_TYPE_nvidia=1 -DACC_MEM_SHARED=0 -foffload=nvptx-none -O2 (test for excess errors)
PASS: libgomp.oacc-c/../libgomp.oacc-c-c++-common/nvptx-sese-1.c -DACC_DEVICE_TYPE_nvidia=1 -DACC_MEM_SHARED=0 -foffload=nvptx-none -O2 execution test
[-PASS:-]{+FAIL:+} libgomp.oacc-c/../libgomp.oacc-c-c++-common/nvptx-sese-1.c -DACC_DEVICE_TYPE_nvidia=1 -DACC_MEM_SHARED=0 -foffload=nvptx-none -O2 scan-nvptx-none-offload-rtl-dump mach "SESE regions:.* [0-9]+{[0-9]+->[0-9]+(\\.[0-9]+)+}"
Same for C++.
It's unclear to me if this is an actual "problem", which optimization is "more
important", so I've filed PR107344 "GCC/nvptx SESE region optimization" to
capture this question, and here restore what we intend to be testing (to my
understanding) in 'libgomp.oacc-c-c++-common/nvptx-sese-1.c'.
PR tree-optimization/107195
PR target/107344
libgomp/
* testsuite/libgomp.oacc-c-c++-common/nvptx-sese-1.c: Restore SESE
regions checking.
Thomas Schwinge [Mon, 17 Oct 2022 07:10:03 +0000 (09:10 +0200)]
Add 'gcc.dg/tree-ssa/pr107195-3.c' [PR107195]
... to display optimization performed as of recent
commit r13-3217-gc4d15dddf6b9eacb36f535807ad2ee364af46e04
"[PR107195] Set range to zero when nonzero mask is 0".
PR tree-optimization/107195
gcc/testsuite/
* gcc.dg/tree-ssa/pr107195-3.c: New.
Richard Biener [Fri, 21 Oct 2022 07:45:44 +0000 (09:45 +0200)]
tree-optimization/107323 - loop distribution partition ordering issue
The following reverts part of the PR94125 fix which causes us to
use a bogus partition ordering after applying versioning for
alias to the testcase in PR107323. Instead PR94125 is fixed by
appropriately considering to be merged SCCs when skipping edges
we want to ignore because of the alias versioning.
PR tree-optimization/107323
* tree-loop-distribution.cc (pg_unmark_merged_alias_ddrs):
New function.
(loop_distribution::break_alias_scc_partitions): Revert
postorder save/restore from the PR94125 fix. Instead
make sure to not ignore edges from SCCs we are going to
merge.
* gcc.dg/tree-ssa/pr107323.c: New testcase.
Monk Chiang [Fri, 21 Oct 2022 05:01:59 +0000 (13:01 +0800)]
RISC-V: Add type attribute for atomic instructions.
gcc/ChangeLog:
* config/riscv/riscv.md: Add atomic type attribute.
* config/riscv/sync.md: Add atomic type for atomic instructions.
Jakub Jelinek [Fri, 21 Oct 2022 07:16:44 +0000 (09:16 +0200)]
match.pd: Fix up gcc.dg/pr54346.c on i686-linux [PR54346]
The pr54346.c testcase FAILs on i686-linux (without -msse*) for multiple
reasons. One is the trivial missing -Wno-psabi which the following patch
adds, but that isn't enough. The thing is that without native vector
support, we have VEC_PERM_EXPRs in the IL and are actually considering
the nested VEC_PERM_EXPRs into one VEC_PERM_EXPR optimization, but punt
because can_vec_perm_const_p (result_mode, op_mode, sel2, false) is false.
Such a test makes sense to prevent "optimizing" two VEC_PERM_EXPRs
that can be handled by the backend natively into one VEC_PERM_EXPR
that can't be handled. But if both of the original VEC_PERM_EXPRs
can't be handled natively either, having just one VEC_PERM_EXPR that will be
lowered by generic vec lowering is IMHO still better than 2.
Or even if we trade just one VEC_PERM_EXPR that can't be handled plus
one that can to one that can't be handled.
Also, removing the testcase's executable permissions...
2022-10-21 <jakub@redhat.com>
PR tree-optimization/54346
* match.pd ((vec_perm (vec_perm@0 @1 @2 VECTOR_CST) @0 VECTOR_CST)):
Optimize nested VEC_PERM_EXPRs even if target can't handle the
new one provided we don't increase number of VEC_PERM_EXPRs the
target can't handle.
* gcc.dg/pr54346.c: Add -Wno-psabi to dg-options.
Jakub Jelinek [Fri, 21 Oct 2022 07:00:41 +0000 (09:00 +0200)]
c++: Fix up mangling ICE with void{} [PR106863]
We ICE on the following testcase during mangling, finish_compound_literal
returns for void{} void_node and the mangler doesn't handle it.
Handling void_node in the mangler seems problematic to me, because
we don't know for which case it has been created.
The following patch arranges to mangle it as other compound literals
with no operands, so it demangles as void{}, by returning a void type
COMPOUND_LITERAL_P with no elements if processing_template_decl.
Otherwise it keeps returning void_node.
2022-10-21 Jakub Jelinek <jakub@redhat.com>
PR c++/106863
* semantics.cc (finish_compound_literal): For void{}, if
processing_template_decl return a COMPOUND_LITERAL_P
CONSTRUCTOR rather than void_node.
* g++.dg/cpp0x/dr2351-2.C: New test.
Дилян Палаузов [Thu, 20 Oct 2022 15:05:04 +0000 (17:05 +0200)]
Don't build readline/libreadline.a, when --with-system-readline is supplied
https://sourceware.org/bugzilla/show_bug.cgi?id=18632
The bundled libreadline is always built, even if the system is
./configure'd --with-system-readline and the build libreadline.a is not
used.
Proposed patch:
Fix ./configure.ac not to proceed readline/, when --with-system-
readline is provided
* configure.ac: Don't configure readline if --with-system-readline is
used.
* configure: Re-generate.
Ju-Zhe Zhong [Mon, 17 Oct 2022 08:36:42 +0000 (16:36 +0800)]
RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
gcc/ChangeLog:
* config.gcc: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New macro.
(DEF_RVV_FUNCTION): Ditto.
(handle_pragma_vector): Add intrinsic framework.
* config/riscv/riscv.cc (riscv_print_operand): Add operand print for vsetvl/vsetvlmax.
* config/riscv/riscv.md: include vector.md.
* config/riscv/t-riscv: Add riscv-vector-builtins-bases.o and riscv-vector-builtins-shapes.o
* config/riscv/riscv-vector-builtins-bases.cc: New file.
* config/riscv/riscv-vector-builtins-bases.h: New file.
* config/riscv/riscv-vector-builtins-functions.def: New file.
* config/riscv/riscv-vector-builtins-shapes.cc: New file.
* config/riscv/riscv-vector-builtins-shapes.h: New file.
* config/riscv/riscv-vector-builtins-types.def: New file.
* config/riscv/vector.md: New file.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vsetvl-1.c: New test.
Ju-Zhe Zhong [Mon, 17 Oct 2022 08:20:43 +0000 (16:20 +0800)]
RISC-V: Add RVV intrinsic basic framework.
gcc/ChangeLog:
* config.gcc: Add gt files since function_instance is GTY ((user)).
* config/riscv/riscv-builtins.cc (riscv_init_builtins): Add RVV intrinsic framework.
(riscv_builtin_decl): Ditto.
(riscv_expand_builtin): Ditto.
* config/riscv/riscv-protos.h (builtin_decl): New function.
(expand_builtin): Ditto.
(enum riscv_builtin_class): New enum to classify RVV intrinsic and RISC-V general built-in.
* config/riscv/riscv-vector-builtins.cc (class GTY): New declaration.
(struct registered_function_hasher): New struct.
(DEF_RVV_OP_TYPE): New macro.
(DEF_RVV_TYPE): Ditto.
(DEF_RVV_PRED_TYPE): Ditto.
(GTY): New declaration.
(add_attribute): New function.
(check_required_extensions): Ditto.
(rvv_arg_type_info::get_tree_type): Ditto.
(function_instance::function_instance): Ditto.
(function_instance::operator==): Ditto.
(function_instance::any_type_float_p): Ditto.
(function_instance::get_return_type): Ditto.
(function_instance::get_arg_type): Ditto.
(function_instance::hash): Ditto.
(function_instance::call_properties): Ditto.
(function_instance::reads_global_state_p): Ditto.
(function_instance::modifies_global_state_p): Ditto.
(function_instance::could_trap_p): Ditto.
(function_builder::function_builder): Ditto.
(function_builder::~function_builder): Ditto.
(function_builder::allocate_argument_types): Ditto.
(function_builder::register_function_group): Ditto.
(function_builder::append_name): Ditto.
(function_builder::finish_name): Ditto.
(function_builder::get_attributes): Ditto.
(function_builder::add_function): Ditto.
(function_builder::add_unique_function): Ditto.
(function_call_info::function_call_info): Ditto.
(function_expander::function_expander): Ditto.
(function_expander::add_input_operand): Ditto.
(function_expander::generate_insn): Ditto.
(registered_function_hasher::hash): Ditto.
(registered_function_hasher::equal): Ditto.
(builtin_decl): Ditto.
(expand_builtin): Ditto.
(gt_ggc_mx): Define for using GCC garbage collect.
(gt_pch_nx): Define for using GCC garbage collect.
* config/riscv/riscv-vector-builtins.def (DEF_RVV_OP_TYPE): New macro.
(DEF_RVV_PRED_TYPE): Ditto.
(vbool64_t): Add suffix.
(vbool32_t): Ditto.
(vbool16_t): Ditto.
(vbool8_t): Ditto.
(vbool4_t): Ditto.
(vbool2_t): Ditto.
(vbool1_t): Ditto.
(vint8mf8_t): Ditto.
(vuint8mf8_t): Ditto.
(vint8mf4_t): Ditto.
(vuint8mf4_t): Ditto.
(vint8mf2_t): Ditto.
(vuint8mf2_t): Ditto.
(vint8m1_t): Ditto.
(vuint8m1_t): Ditto.
(vint8m2_t): Ditto.
(vuint8m2_t): Ditto.
(vint8m4_t): Ditto.
(vuint8m4_t): Ditto.
(vint8m8_t): Ditto.
(vuint8m8_t): Ditto.
(vint16mf4_t): Ditto.
(vuint16mf4_t): Ditto.
(vint16mf2_t): Ditto.
(vuint16mf2_t): Ditto.
(vint16m1_t): Ditto.
(vuint16m1_t): Ditto.
(vint16m2_t): Ditto.
(vuint16m2_t): Ditto.
(vint16m4_t): Ditto.
(vuint16m4_t): Ditto.
(vint16m8_t): Ditto.
(vuint16m8_t): Ditto.
(vint32mf2_t): Ditto.
(vuint32mf2_t): Ditto.
(vint32m1_t): Ditto.
(vuint32m1_t): Ditto.
(vint32m2_t): Ditto.
(vuint32m2_t): Ditto.
(vint32m4_t): Ditto.
(vuint32m4_t): Ditto.
(vint32m8_t): Ditto.
(vuint32m8_t): Ditto.
(vint64m1_t): Ditto.
(vuint64m1_t): Ditto.
(vint64m2_t): Ditto.
(vuint64m2_t): Ditto.
(vint64m4_t): Ditto.
(vuint64m4_t): Ditto.
(vint64m8_t): Ditto.
(vuint64m8_t): Ditto.
(vfloat32mf2_t): Ditto.
(vfloat32m1_t): Ditto.
(vfloat32m2_t): Ditto.
(vfloat32m4_t): Ditto.
(vfloat32m8_t): Ditto.
(vfloat64m1_t): Ditto.
(vfloat64m2_t): Ditto.
(vfloat64m4_t): Ditto.
(vfloat64m8_t): Ditto.
(vv): Ditto.
(vx): Ditto.
(v): Ditto.
(wv): Ditto.
(wx): Ditto.
(x_x_v): Ditto.
(vf2): Ditto.
(vf4): Ditto.
(vf8): Ditto.
(vvm): Ditto.
(vxm): Ditto.
(x_x_w): Ditto.
(v_v): Ditto.
(v_x): Ditto.
(vs): Ditto.
(mm): Ditto.
(m): Ditto.
(vf): Ditto.
(vm): Ditto.
(wf): Ditto.
(vfm): Ditto.
(v_f): Ditto.
(ta): Ditto.
(tu): Ditto.
(ma): Ditto.
(mu): Ditto.
(tama): Ditto.
(tamu): Ditto.
(tuma): Ditto.
(tumu): Ditto.
(tam): Ditto.
(tum): Ditto.
* config/riscv/riscv-vector-builtins.h (GCC_RISCV_VECTOR_BUILTINS_H): New macro.
(RVV_REQUIRE_RV64BIT): Ditto.
(RVV_REQUIRE_ZVE64): Ditto.
(RVV_REQUIRE_ELEN_FP_32): Ditto.
(RVV_REQUIRE_ELEN_FP_64): Ditto.
(enum operand_type_index): New enum.
(DEF_RVV_OP_TYPE): New macro.
(enum predication_type_index): New enum.
(DEF_RVV_PRED_TYPE): New macro.
(enum rvv_base_type): New enum.
(struct rvv_builtin_suffixes): New struct.
(struct rvv_arg_type_info): Ditto.
(struct rvv_type_info): Ditto.
(struct rvv_op_info): Ditto.
(class registered_function): New class.
(class function_base): Ditto.
(class function_shape): Ditto.
(struct function_group_info): New struct.
(class GTY): New class.
(class function_builder): Ditto.
(class function_call_info): Ditto.
(function_call_info::function_returns_void_p): New function.
(class function_expander): New class.
(function_instance::operator!=): New function.
(function_expander::expand): Ditto.
(function_expander::add_input_operand): Ditto.
(function_base::call_properties): Ditto.
Haochen Jiang [Thu, 26 May 2022 07:46:40 +0000 (15:46 +0800)]
i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.
gcc/ChangeLog:
* config/i386/sse.md (ssedvecmode): Rename from VI1SI.
(ssedvecmodelower): Rename from vi1si.
(sdot_prod<mode>): New define_expand.
(udot_prod<mode>): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/vnniint8-auto-vectorize-1.c: New test.
* gcc.target/i386/vnniint8-auto-vectorize-2.c: Ditto.
Kong Lingling [Wed, 29 Sep 2021 01:48:20 +0000 (09:48 +0800)]
Support Intel AVX-VNNI-INT8
gcc/ChangeLog
* common/config/i386/cpuinfo.h (get_available_features): Detect
avxvnniint8.
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AVXVNNIINT8_SET): New.
(OPTION_MASK_ISA2_AVXVNNIINT8_UNSET): Ditto.
(ix86_handle_option): Handle -mavxvnniint8.
* common/config/i386/i386-cpuinfo.h (enum processor_features):
Add FEATURE_AVXVNNIINT8.
* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
avxvnniint8.
* config.gcc: Add avxvnniint8intrin.h.
* config/i386/avxvnniint8intrin.h: New file.
* config/i386/cpuid.h (bit_AVXVNNIINT8): New.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
__AVXVNNIINT8__.
* config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint8.
(ix86_valid_target_attribute_inner_p): Handle avxvnniint8.
* config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT8) New..
* config/i386/i386.opt: Add option -mavxvnniint8.
* config/i386/immintrin.h: Include avxvnniint8intrin.h.
* config/i386/sse.md (UNSPEC_VPMADDUBSWACCD
UNSPEC_VPMADDUBSWACCSSD,UNSPEC_VPMADDWDACCD,
UNSPEC_VPMADDWDACCSSD): Rename according to new style.
(vpdp<vpdotprodtype>_<mode>): New define_insn.
* doc/extend.texi: Document avxvnniint8.
* doc/invoke.texi: Document -mavxvnniint8.
* doc/sourcebuild.texi: Document target avxvnniint8.
gcc/testsuite/ChangeLog
* g++.dg/other/i386-2.C: Add -mavxvnniint8.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/avx-check.h: Add avxvnniint8 check.
* gcc.target/i386/sse-12.c: Add -mavxvnniint8.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/funcspec-56.inc: Add new target attribute.
* lib/target-supports.exp
(check_effective_target_avxvnniint8): New.
* gcc.target/i386/avxvnniint8-1.c: Ditto.
* gcc.target/i386/avxvnniint8-vpdpbssd-2.c: Ditto.
* gcc.target/i386/avxvnniint8-vpdpbssds-2.c: Ditto.
* gcc.target/i386/avxvnniint8-vpdpbsud-2.c: Ditto.
* gcc.target/i386/avxvnniint8-vpdpbsuds-2.c: Ditto.
* gcc.target/i386/avxvnniint8-vpdpbuud-2.c: Ditto.
* gcc.target/i386/avxvnniint8-vpdpbuuds-2.c: Ditto.
Co-authored-by: Hongyu Wang <hongyu.wang@intel.com>
Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
Hongyu Wang [Tue, 28 Sep 2021 07:30:14 +0000 (15:30 +0800)]
Support Intel AVX-IFMA
gcc/
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA_AVXIFMA_SET, OPTION_MASK_ISA2_AVXIFMA_UNSET,
OPTION_MASK_ISA2_AVX2_UNSET): New macro.
(ix86_handle_option): Handle -mavxifma.
* common/config/i386/i386-cpuinfo.h (processor_types): Add
FEATURE_AVXIFMA.
* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
avxifma.
* common/config/i386/cpuinfo.h (get_available_features):
Detect avxifma.
* config.gcc: Add avxifmaintrin.h
* config/i386/avx512ifmavlintrin.h: (_mm_madd52lo_epu64): Change
to macro.
(_mm_madd52hi_epu64): Likewise.
(_mm256_madd52lo_epu64): Likewise.
(_mm256_madd52hi_epu64): Likewise.
* config/i386/avxifmaintrin.h: New header.
* config/i386/cpuid.h (bit_AVXIFMA): New.
* config/i386/i386-builtin.def: Add new builtins, and correct
pattern names for AVX512IFMA.
* config/i386/i386-builtins.cc (def_builtin): Handle AVX-IFMA
builtins like AVX-VNNI.
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
__AVXIFMA__.
* config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
Relax ISA masks for AVXIFMA.
* config/i386/i386-isa.def: Add AVXIFMA.
* config/i386/i386-options.cc (isa2_opts): Add -mavxifma.
(ix86_valid_target_attribute_inner_p): Handle avxifma.
* config/i386/i386.md (isa): Add attr avxifma and avxifmavl.
* config/i386/i386.opt: Add option -mavxifma.
* config/i386/immintrin.h: Inculde avxifmaintrin.h.
* config/i386/sse.md (avx_vpmadd52<vpmadd52type>_<mode>):
Remove.
(vpamdd52<vpmadd52type><mode><sd_maskz_name>): Remove.
(vpamdd52huq<mode>_maskz): Rename to ...
(vpmadd52huq<mode>_maskz): ... this.
(vpamdd52luq<mode>_maskz): Rename to ...
(vpmadd52luq<mode>_maskz): ... this.
(vpmadd52<vpmadd52type><mode>): New define_insn.
(vpmadd52<vpmadd52type>v8di): Likewise.
(vpmadd52<vpmadd52type><mode>_maskz_1): Likewise.
(vpamdd52<vpmadd52type><mode>_mask): Rename to ...
(vpmadd52<vpmadd52type><mode>_mask): ... this.
* doc/invoke.texi: Document -mavxifma.
* doc/extend.texi: Document avxifma.
* doc/sourcebuild.texi: Document target avxifma.
gcc/testsuite/
* gcc.target/i386/avx-check.h: Add avxifma check.
* gcc.target/i386/avx512ifma-vpmaddhuq-1.c: Remane..
* gcc.target/i386/avx512ifma-vpmaddhuq-1a.c: To this.
* gcc.target/i386/avx512ifma-vpmaddluq-1.c: Ditto.
* gcc.target/i386/avx512ifma-vpmaddluq-1a.c: Ditto.
* gcc.target/i386/avx512ifma-vpmaddhuq-1b.c: New Test.
* gcc.target/i386/avx512ifma-vpmaddluq-1b.c: Ditto.
* gcc.target/i386/avx-ifma-1.c: Ditto.
* gcc.target/i386/avx-ifma-2.c: Ditto.
* gcc.target/i386/avx-ifma-3.c: Ditto.
* gcc.target/i386/avx-ifma-4.c: Ditto.
* gcc.target/i386/avx-ifma-5.c: Ditto.
* gcc.target/i386/avx-ifma-6.c: Ditto.
* gcc.target/i386/avx-ifma-vpmaddhuq-2.c: Ditto.
* gcc.target/i386/avx-ifma-vpmaddluq-2.c: Ditto.
* gcc.target/i386/sse-12.c: Add -mavxifma.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/funcspec-56.inc: Add new target attribute.
* lib/target-supports.exp
(check_effective_target_avxifma): New.
GCC Administrator [Fri, 21 Oct 2022 00:17:52 +0000 (00:17 +0000)]
Daily bump.
Harald Anlauf [Wed, 19 Oct 2022 20:37:56 +0000 (22:37 +0200)]
Fortran: error recovery with references of bad array constructors [PR105633]
gcc/fortran/ChangeLog:
PR fortran/105633
* expr.cc (find_array_section): Move check for NULL pointers so
that both subscript triplets and vector subscripts are covered.
gcc/testsuite/ChangeLog:
PR fortran/105633
* gfortran.dg/pr105633.f90: New test.
Co-authored-by: Steven G. Kargl <kargl@gcc.gnu.org>
Aldy Hernandez [Thu, 20 Oct 2022 16:26:42 +0000 (18:26 +0200)]
[PR c++/106654] Handle non-irange ranges in get_range_global for default defs.
With the upcoming [[assume]] work, Andrew has pointed out that
non-irange ranges are not handled in get_range_global for
SSA_NAME_IS_DEFAULT_DEF. This patch fixes the oversight.
PR c++/106654
gcc/ChangeLog:
* value-query.cc (get_range_global): Handle non integer ranges for
default def SSA names.
Aldy Hernandez [Wed, 19 Oct 2022 15:06:41 +0000 (17:06 +0200)]
Add op[12]_range for UNORDERED_LT entries in range-op.
gcc/ChangeLog:
* range-op-float.cc (foperator_unordered_lt::op1_range): New.
(foperator_unordered_lt::op2_range): New.
Torbjörn SVENSSON [Fri, 23 Sep 2022 17:08:30 +0000 (19:08 +0200)]
testsuite: Sanitize fails for SP FPU on Arm
This patch stops reporting fails for Arm targets with single
precision floating point unit for types wider than 32 bits (the width
of float on arm-none-eabi).
As reported in PR102017, fenv is reported as supported in recent
versions of newlib. At the same time, for some Arm targets, the
implementation in libgcc does not support exceptions and thus, the
test fails with a call to abort().
gcc/testsuite/ChangeLog:
* lib/target-supports.exp
(check_effective_target_fenv_exceptions_double): New.
(check_effective_target_fenv_exceptions_long_double): New.
* gcc.dg/c2x-float-7.c: Split into 3 tests...
* gcc.dg/c2x-float-7a.c: Float part of c2x-float-7.c.
* gcc.dg/c2x-float-7b.c: Double part of c2x-float-7.c.
* gcc.dg/c2x-float-7c.c: Long double part of c2x-float-7.c.
* gcc.dg/pr95115.c: Switch to fenv_exceptions_double.
* gcc.dg/torture/float32x-nan-floath.c: Likewise.
* gcc.dg/torture/float32x-nan.c: Likewise.
* gcc.dg/torture/float64-nan-floath.c: Likewise.
* gcc.dg/torture/float64-nan.c: Likewise.
* gcc.dg/torture/inf-compare-1.c: Likewise.
* gcc.dg/torture/inf-compare-2.c: Likewise.
* gcc.dg/torture/inf-compare-3.c: Likewise.
* gcc.dg/torture/inf-compare-4.c: Likewise.
* gcc.dg/torture/inf-compare-5.c: Likewise.
* gcc.dg/torture/inf-compare-6.c: Likewise.
* gcc.dg/torture/inf-compare-7.c: Likewise.
* gcc.dg/torture/inf-compare-8.c: Likewise.
* gcc.dg/torture/pr52451.c: Likewise.
* gcc.dg/torture/pr82692.c: Likewise.
* gcc.dg/torture/inf-compare-1-float.c: New test.
* gcc.dg/torture/inf-compare-2-float.c: New test.
* gcc.dg/torture/inf-compare-3-float.c: New test.
* gcc.dg/torture/inf-compare-4-float.c: New test.
* gcc.dg/torture/inf-compare-5-float.c: New test.
* gcc.dg/torture/inf-compare-6-float.c: New test.
* gcc.dg/torture/inf-compare-7-float.c: New test.
* gcc.dg/torture/inf-compare-8-float.c: New test.
Co-Authored-By: Yvan ROUX <yvan.roux@foss.st.com>
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Patrick Palka [Thu, 20 Oct 2022 18:13:10 +0000 (14:13 -0400)]
c++: constraint matching, TEMPLATE_ID_EXPR, current inst
Here we're crashing during constraint matching for the instantiated
hidden friends due to two issues with dependent substitution into a
TEMPLATE_ID_EXPR that names a template from the current instantiation
(as for C<1> with T=T from maybe_substitute_reqs_for):
* tsubst_copy substitutes into such a TEMPLATE_DECL by looking it up
from the substituted class scope. But for this lookup to work when
the args are dependent, we need to substitute the class scope with
entering_scope=true so that we obtain the primary template type
A<T> (which has TYPE_BINFO) instead of the implicit instantiation
A<T> (which doesn't).
* lookup_and_finish_template_variable shouldn't instantiate a
TEMPLATE_ID_EXPR that names a TEMPLATE_DECL which has more than
one level of (unsubstituted) parameters (such as A<T>::C).
gcc/cp/ChangeLog:
* pt.cc (lookup_and_finish_template_variable): Don't
instantiate if the template's scope is dependent.
(tsubst_copy) <case TEMPLATE_DECL>: Pass entering_scope=true
when substituting the class scope.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-friend10.C: New test.
Artem Klimov [Wed, 6 Jul 2022 14:02:01 +0000 (17:02 +0300)]
ipa-visibility: Optimize TLS access [PR99619]
Fix PR99619, which asks to optimize TLS model based on visibility.
The fix is implemented as an IPA optimization: this allows to take
optimized visibility status into account (as well as avoid modifying
all language frontends).
2022-04-17 Artem Klimov <jakmobius@gmail.com>
gcc/ChangeLog:
PR middle-end/99619
* ipa-visibility.cc (function_and_variable_visibility): Promote
TLS access model afer visibility optimizations.
* varasm.cc (have_optimized_refs): New helper.
(optimize_dyn_tls_for_decl_p): New helper. Use it ...
(decl_default_tls_model): ... here in place of 'optimize' check.
gcc/testsuite/ChangeLog:
PR middle-end/99619
* gcc.dg/tls/vis-attr-gd.c: New test.
* gcc.dg/tls/vis-attr-hidden-gd.c: New test.
* gcc.dg/tls/vis-attr-hidden.c: New test.
* gcc.dg/tls/vis-flag-hidden-gd.c: New test.
* gcc.dg/tls/vis-flag-hidden.c: New test.
* gcc.dg/tls/vis-pragma-hidden-gd.c: New test.
* gcc.dg/tls/vis-pragma-hidden.c: New test.
Co-Authored-By: Alexander Monakov <amonakov@gcc.gnu.org>
Signed-off-by: Artem Klimov <jakmobius@gmail.com>
Aldy Hernandez [Wed, 19 Oct 2022 15:14:02 +0000 (17:14 +0200)]
A false UNORDERED_<cond> means neither operand can be a NAN.
The false side of UNORDERED_<cond> means neither operand can be a NAN.
Adjust all the op[12]_range entries for the UNORDERED operators such
that a known NAN on one operands means the other operands is
undefined.
gcc/ChangeLog:
* range-op-float.cc (foperator_unordered_le::op1_range): Adjust
false side with a NAN operand.
(foperator_unordered_le::op2_range): Same.
(foperator_unordered_gt::op1_range): Same.
(foperator_unordered_gt::op2_range): Same.
(foperator_unordered_ge::op1_range): Same.
(foperator_unordered_ge::op2_range): Same.
(foperator_unordered_equal::op1_range): Same.
Patrick Palka [Thu, 20 Oct 2022 15:33:39 +0000 (11:33 -0400)]
c++ modules: handle CONCEPT_DECL in node_template_info [PR102963]
Here node_template_info is overlooking that CONCEPT_DECL has TEMPLATE_INFO
too, which causes get_originating_module_decl for the CONCEPT_DECL to not
return the corresponding TEMPLATE_DECL, which leads to an ICE from
import_entity_index while pretty printing the CONCEPT_DECL's module
suffix as part of the static assert failure elaboration.
PR c++/102963
gcc/cp/ChangeLog:
* module.cc (node_template_info): Handle CONCEPT_DECL.
gcc/testsuite/ChangeLog:
* g++.dg/modules/concept-7_a.C: New test.
* g++.dg/modules/concept-7_b.C: New test.
Andre Vieira [Thu, 20 Oct 2022 14:54:39 +0000 (15:54 +0100)]
vect: Fix vectype when widening container type in bitfield pattern [PR107326]
The 'vect_recog_bitfield_ref_pattern' was not correctly adapting the vectype
when widening the container.
gcc/ChangeLog:
PR tree-optimization/107326
* tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Change
vectype when widening container.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/pr107326.c: New test.
* gcc.dg/vect/vect-bitfield-read-7.c: New test.
Patrick Palka [Thu, 20 Oct 2022 14:30:31 +0000 (10:30 -0400)]
libstdc++: Redefine __from_chars_alnum_to_val's table
After the C++23 constexpr <charconv> patch r13-3313-g378a0f1840e694 we
have some modules testsuite regressions:
FAIL: g++.dg/modules/xtreme-header-4_b.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++2b (test for excess errors)
Like with PR105297, the cause seems to be the deduced type of __table
resolving ahead of time to a local class type, which trips up modules.
And unfortunately that PR's minimal workaround of making __tables's
initializer value dependent doesn't help in this case.
So this patch works around this by avoiding using a local class for the
table type. And I suppose we should use a static data member to define
the table once for all dialects (including C++14) instead of having to
define it twice in C++23 mode (once as a static local variable and again
as a variable template for sake of constexpr evaluation).
libstdc++-v3/ChangeLog:
* include/std/charconv (__detail::__from_chars_alnum_to_val_table):
Redefine as a class template containing the members type, value and
_S_make_table. Don't use a local class as the table type.
(__detail::__table): Remove.
(__detail::__from_chars_alnum_to_val): Adjust after the above.
Aldy Hernandez [Thu, 20 Oct 2022 06:55:36 +0000 (08:55 +0200)]
Do not set NAN flags for VARYING ranges when !HONOR_NANS.
Since NANs can't appear in ranges for !HONOR_NANS, there's no reason
to set them in a VARYING range.
gcc/ChangeLog:
* value-range.h (frange::set_varying): Do not set NAN flags for
!HONOR_NANS.
* value-range.cc (frange::normalize_kind): Adjust for no NAN when
!HONOR_NANS.
(frange::verify_range): Same.
* range-op-float.cc (maybe_isnan): Remove flag_finite_math_only check.
Aldy Hernandez [Wed, 19 Oct 2022 17:28:09 +0000 (19:28 +0200)]
Replace finite_operands_p with maybe_isnan.
The finite_operands_p function was incorrectly named, as it only
returned TRUE when !NAN. This was leftover from the initial
implementation of frange. Using the maybe_isnan() nomenclature is
more consistent and easier to understand.
gcc/ChangeLog:
* range-op-float.cc (finite_operand_p): Remove.
(finite_operands_p): Rename to...
(maybe_isnan): ...this.
(frelop_early_resolve): Use maybe_isnan instead of finite_operands_p.
(foperator_equal::fold_range): Same.
(foperator_equal::op1_range): Same.
(foperator_not_equal::fold_range): Same.
(foperator_lt::fold_range): Same.
(foperator_le::fold_range): Same.
(foperator_gt::fold_range): Same.
(foperator_ge::fold_range): Same.
Jakub Jelinek [Thu, 20 Oct 2022 11:58:13 +0000 (13:58 +0200)]
testsuite: Add some missing -Wno-psabi options
The following testcases FAIL on i686-linux due to excess diagnostics
for -Wpsabi.
2022-10-20 Jakub Jelinek <jakub@redhat.com>
* gcc.target/i386/pr107271.c: Add -Wno-psabi to dg-options.
* gcc.dg/debug/btf/btf-function-3.c: Likewise.
Jakub Jelinek [Thu, 20 Oct 2022 11:55:35 +0000 (13:55 +0200)]
passes: Fix a comment typo
This patch fixes a single typo in comment.
2022-10-20 Jakub Jelinek <jakub@redhat.com>
* passes.cc (pass_manager::register_pass): Fix a comment
typo - copmilation -> compilation.
Tobias Burnus [Thu, 20 Oct 2022 10:58:52 +0000 (12:58 +0200)]
libgomp: Add offload_device_gcn check, add requires-4a.c test
Duplicate libgomp.c-c++-common/requires-4.c (as ...-4a.c) but
with using a heap-allocated instead of static memory for a variable.
This change and the added offload_device_gcn check prepare for
pseudo-USM, where the device hardware cannot access all host
memory but only managed and pinned memory; for those, requires-4.c
will fail and the new check permits to add
target { ! { offload_device_nvptx || offload_device_gcn } }
to requires-4.c; however, it has not been added yet as pseuo-USM
support is not yet on mainline. (Review is pending for the USM
patches.)
include/ChangeLog:
* gomp-constants.h (GOMP_DEVICE_HSA): Comment out unused define.
libgomp/ChangeLog:
* testsuite/lib/libgomp.exp (check_effective_target_offload_device_gcn):
New.
* testsuite/libgomp.c-c++-common/on_device_arch.h (device_arch_gcn,
on_device_arch_gcn): New.
* testsuite/libgomp.c-c++-common/requires-4a.c: New test; copied from
requires-4.c but using heap-allocated memory.
Richard Biener [Thu, 20 Oct 2022 09:04:21 +0000 (11:04 +0200)]
Avoid PHI - PHI recurrence in vectorization
The reported regression of libgomp loop-14.C shows that there isn't
generally a good reliable place to insert the permute upfront so
the following simply restricts recurrence vectorization to the cases
where the latch value isn't defined by a PHI.
* tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
Disallow latch PHI defs.
(vectorizable_recurr): Revert previous change.
Thomas Schwinge [Mon, 17 Oct 2022 22:13:47 +0000 (00:13 +0200)]
Add 'libgomp.oacc-c-c++-common/private-big-1.c' [PR105421]
After commit r13-3404-g7c55755d4c760de326809636531478fd7419e1e5
"amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421]",
"big" private data now works for GCN offloading, too.
PR target/105421
libgomp/
* testsuite/libgomp.oacc-c-c++-common/private-big-1.c: New.
Julian Brown [Fri, 14 Oct 2022 11:06:07 +0000 (11:06 +0000)]
amdgcn: Use FLAT addressing for all functions with pointer arguments [PR105421]
The GCN backend uses a heuristic to determine whether to use FLAT or
GLOBAL addressing in a particular (offload) function: namely, if a
function takes a pointer-to-scalar parameter, it is assumed that the
pointer may refer to "flat scratch" space, and thus FLAT addressing must
be used instead of GLOBAL.
I came up with this heuristic initially whilst working on support for
moving OpenACC gang-private variables into local-data share (scratch)
memory. The assumption that only scalar variables would be transformed in
that way turned out to be wrong. For example, prior to the next patch in
the series, Fortran compiler-generated temporary structures were treated
as gang private and moved to LDS space, typically overflowing the region
allocated for such variables. That will no longer happen after that
patch is applied, but there may be other cases of structs moving to LDS
space now or in the future that this patch may be needed for.
2022-10-14 Julian Brown <julian@codesourcery.com>
PR target/105421
gcc/
* config/gcn/gcn.cc (gcn_detect_incoming_pointer_arg): Any pointer
argument forces FLAT addressing mode, not just
pointer-to-non-aggregate.
Thomas Schwinge [Tue, 20 Sep 2022 12:27:05 +0000 (14:27 +0200)]
Make 'autoreconf' work for 'gcc', 'libobjc'
With that, we may then run plain 'autoreconf' for all of GCC's subpackages,
instead of for some of those (that don't use Automake) manually having to run
the applicable combination of 'aclocal', 'autoconf', 'autoheader'.
See also 'AC_CONFIG_MACRO_DIRS'/'AC_CONFIG_MACRO_DIR' usage elsewhere.
gcc/
* configure.ac (AC_CONFIG_MACRO_DIRS): Instantiate.
* configure: Regenerate.
libobjc/
* configure.ac (AC_CONFIG_MACRO_DIRS): Instantiate.
* configure: Regenerate.
Richard Sandiford [Thu, 20 Oct 2022 09:37:35 +0000 (10:37 +0100)]
aarch64: Commonise some folding code
Add an aarch64_sve::gimple_folder helper for folding calls
to integer constants. SME will make more use of this.
gcc/
* config/aarch64/aarch64-sve-builtins.h
(gimple_folder::fold_to_cstu): New member function.
* config/aarch64/aarch64-sve-builtins.cc
(gimple_folder::fold_to_cstu): Define.
* config/aarch64/aarch64-sve-builtins-base.cc
(svcnt_bhwd_impl::fold): Use it.
Richard Sandiford [Thu, 20 Oct 2022 09:37:34 +0000 (10:37 +0100)]
aarch64: Use using directives to inherit constructors
Now that the codebase is C++11, we can use using directives
to inherit constructors from base classes.
gcc/
* config/aarch64/aarch64-sve-builtins-functions.h (quiet)
(rtx_code_function, rtx_code_function_rotated, unspec_based_function)
(unspec_based_function_rotated, unspec_based_function_exact_insn)
(unspec_based_fused_function, unspec_based_fused_lane_function):
Replace constructors with using directives.
* config/aarch64/aarch64-sve-builtins-base.cc (svcnt_bhwd_pat_impl)
(svcreate_impl, svdotprod_lane_impl, svget_impl, svld1_extend_impl)
(svld1_gather_extend_impl, svld234_impl, svldff1_gather_extend)
(svset_impl, svst1_scatter_truncate_impl, svst1_truncate_impl)
(svst234_impl, svundef_impl): Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.cc
(svldnt1_gather_extend_impl, svmovl_lb_impl): Likewise.
(svstnt1_scatter_truncate_impl): Likewise.
Richard Sandiford [Thu, 20 Oct 2022 09:37:34 +0000 (10:37 +0100)]
aarch64: Replace CONSTEXPR with constexpr
Move away from the pre-C++11 compatibility macro CONSTEXPR.
gcc/
* config/aarch64/aarch64-sve-builtins-base.cc: Replace CONSTEXPR
with constexpr throughout.
* config/aarch64/aarch64-sve-builtins-functions.h: Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
* config/aarch64/aarch64-sve-builtins.cc: Likewise.
Richard Sandiford [Thu, 20 Oct 2022 09:37:33 +0000 (10:37 +0100)]
aarch64: Prevent generation of /M BRKAS and BRKBS
Bit of a brown-paper-bag bug, but: GCC was generating
non-existent merging forms of BRKAS and BRKBS. Those
instructions only support zero predication (although
BRKA and BRKB support both).
gcc/
* config/aarch64/aarch64-sve.md (*aarch64_brk<brk_op>_cc): Remove
merging alternative.
(*aarch64_brk<brk_op>_ptest): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/brka_1.c: Expect a separate
PTEST instruction.
* gcc.target/aarch64/sve/acle/general/brkb_1.c: Likewise.
Richard Sandiford [Thu, 20 Oct 2022 09:37:33 +0000 (10:37 +0100)]
aarch64: Fix matching of BRKNS
Unlike other flag-setting SVE instructions, BRKNS sets the flags
based on an all-true governing predicate, rather than the GP operand.
gcc/
* config/aarch64/iterators.md (SVE_BRKP): New iterator.
* config/aarch64/aarch64-sve.md (*aarch64_brkn_cc): New pattern.
(*aarch64_brkn_ptest): Likewise.
(*aarch64_brk<brk_op>_cc): Restrict to SVE_BRKP.
(*aarch64_brk<brk_op>_ptest): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/acle/general/brkn_1.c: Expect separate
PTEST instructions.
* gcc.target/aarch64/sve/acle/general/brkn_2.c: New test.
Richard Biener [Wed, 19 Oct 2022 12:12:11 +0000 (14:12 +0200)]
c/107305 - avoid ICEing with invalid GIMPLE input to the GIMPLE FE
The GIMPLE FE was designed to defer semantic error checking to the
GIMPLE IL verifier. But that can end up causing spurious ICEs
earlier and in fact it will report an internal error. The following
tries to improve the situation by explicitely calling into the
verifier from the parser and intructing it to not ICE but instead
zap the parsed body after an error is discovered.
PR c/107305
PR c/107306
gcc/c/
* gimple-parser.cc (c_parser_parse_gimple_body): Verify
the parsed IL and zap the body on error.
gcc/
* tree-cfg.h (verify_gimple_in_seq): Add parameter to
indicate whether to emit an ICE. Add return value.
(verify_gimple_in_cfg): Likewise.
* tree-cfg.cc (verify_gimple_in_seq): Likewise.
(verify_gimple_in_cfg): Likewise.
gcc/testsuite/
* gcc.dg/gimplefe-error-15.c: New testcase.
Kewen Lin [Thu, 20 Oct 2022 09:07:05 +0000 (04:07 -0500)]
vect: Simplify first for shifted value generation [PR107240]
As PR107240 shows, when both the value to be shifted and the
count used for shifting are constants, it can be simplified
to one constant value, and doesn't actually require to check
if the current target supports vector shift operations or not.
This patch uses a canonical way proposed by Richi to generate
the shifted value, if it can be simplified, the shift operation
would be gone, otherwise it's the same as before.
It can help to fix the failures of vect-bitfield-write-{2,3}.c
on Power.
PR tree-optimization/107240
2022-10-20 Richard Biener <rguenther@suse.de>
gcc/ChangeLog:
* tree-vect-patterns.cc (vect_recog_bit_insert_pattern): Attempt to
simplify shifted value first.
Ulrich Drepper [Thu, 20 Oct 2022 08:50:23 +0000 (10:50 +0200)]
Add C++ library interface data
This patch adds a CSV file with information about the API of the
standard C++ library. This information can be used in multiple ways.
So far there are two use cases:
- to generate the module export list for the standard C++ library
- to create the name hints to compiler emits when symbols in the
std namespace are not found
Adding more uses can be easily done by potentially adding more columns
to the CSV file and adding to the Python script which generates the
output file.
contrib/
2022-10-18 Jonathan Wakely <jwakely@redhat.com>
Ulrich Drepper <drepper@redhat.com>
* gcc_update: Add rule for gcc/cp/std-name-hint.gperf.
gcc/cp/
2022-10-18 Jonathan Wakely <jwakely@redhat.com>
Ulrich Drepper <drepper@redhat.com>
* Make-lang.in: Add rules to generate std-name-hint.gperf. Adjust
rule to generate std-name-hint.h to allow chain rule.
* std-name-hint.h: Regenerated.
* std-name-hint.gperf: This file is now generated.
* cxxapi-data.csv: New file. CSV file with C++ API data.
* gen-cxxapi-file.py: New file. Generate std-name-hint.gperf
and module export source (in future).
Andrew MacLeod [Tue, 18 Oct 2022 20:29:49 +0000 (16:29 -0400)]
Add assume support to VRP.
This provides an assume_query class using rangers GORI module to
determine what ranges would be applied to any SSA NAMES in the function
if the return value were [1, 1]. Any parameter ranges are stored in
the SSA_NAME_RANGE_INFO field, and ranger's inferred range machinery is
then used to look these up and match them to assume call parameteres
in the bodies of other functions..
PR c++/106654
gcc/
* gimple-range-gori.h (compute_operand_range): Make public.
* gimple-range-infer.cc (gimple_infer_range::check_assume_func): New.
(gimple_infer_range::gimple_infer_range): Check for assume calls.
* gimple-range-infer.h (check_assume_func): Add prototype.
* gimple-range.cc (assume_query::assume_range_p): New.
(assume_query::range_of_expr): New.
(assume_query::assume_query): New.
(assume_query::calculate_op): New.
(assume_query::calculate_phi): New.
(assume_query::check_taken_edge): New.
(assume_query::calculate_stmt): New.
(assume_query::dump): New.
* gimple-range.h (class assume_query): New.
* tree-vrp.cc (pass_assumptions::execute): Add processing.
gcc/testsuite/
* g++.dg/cpp23/attr-assume-opt.C: New.
GCC Administrator [Thu, 20 Oct 2022 00:17:52 +0000 (00:17 +0000)]
Daily bump.
Joseph Myers [Wed, 19 Oct 2022 21:55:27 +0000 (21:55 +0000)]
c: C2x %wN, %wfN format checking
C2x adds printf and scanf wN and wfN length modifiers (wN for
int_leastN_t / uint_leastN_t, also usable for intN_t and uintN_t which
are now required to be the same type as the "least" versions when both
are supported; wfN for int_fastN_t / uint_fastN_t). Add corresponding
format checking support for those length modifiers, for all the
standard integer conversion speciciers plus the recommended integer
specifier %B.
Note that, as with the %b support, this only deals with format
checking, not other format handling elsewhere in the compiler (in
particular, it doesn't add any -Wformat-overflow support; cf. Frolov
Daniil's patch
<https://gcc.gnu.org/pipermail/gcc-patches/2022-September/600790.html>
adding such support for %b and %B, which I think is still pending
review). And of course library support is a separate matter for each
library implementation (I hope to add corresponding glibc support in
due course).
None of the tables of format conversions for kinds of formats not
supporting the new length modifiers are updated; they don't need
updating because the entries not matching some length modifier listed
for that kind of format can never be accessed, and the tables
generally thus already only explicitly covered a sufficient initial
subsequence of the length modifiers, rather than listing a full 13
possibilities before this patch or 21 after it. %w (as used for
HOST_WIDE_INT in GCC-internal formats) comes after the new modifiers
in the FMT_LEN_* enumeration, but that's not a problem because the
tables don't actually use FMT_LEN_w entries; rather, such entries get
rewritten at runtime once GCC knows the value of HOST_WIDE_INT in the
GCC it's compiling.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
gcc/c-family/
* c-format.h (enum format_lengths): Add FMT_LEN_w8, FMT_LEN_w16,
FMT_LEN_w32, FMT_LEN_w64, FMT_LEN_wf8, FMT_LEN_wf16, FMT_LEN_wf32
and FMT_LEN_wf64.
(NOARGUMENTS, NOLENGTHS): Update definitions.
(T_I8, T2X_I8, T_I16, T2X_I16, T_I32, T2X_I32, T_I64, T2X_I64)
(T_U8, T2X_U8, T_U16, T2X_U16, T_U32, T2X_U32, T_U64, T2X_U64)
(T_IF8, T2X_IF8, T_IF16, T2X_IF16, T_IF32, T2X_IF32, T_IF64)
(T2X_IF64, T_UF8, T2X_UF8, T_UF16, T2X_UF16, T_UF32, T2X_UF32)
(T_UF64, T2X_UF64): New macros.
* c-format.cc (printf_length_specs, scanf_length_specs): Add wN
and wfN length modifiers.
(print_char_table, scan_char_table): Add entries using wN and wfN
length modifiers.
gcc/testsuite/
* gcc.dg/format/format.h (int_least8_t, int_least16_t)
(int_least32_t, int_least64_t, uint_least8_t, uint_least16_t)
(uint_least32_t, uint_least64_t, int_fast8_t, int_fast16_t)
(int_fast32_t, int_fast64_t, uint_fast8_t, uint_fast16_t)
(uint_fast32_t, uint_fast64_t): New typedefs.
* gcc.dg/format/c11-printf-1.c, gcc.dg/format/c11-scanf-1.c,
gcc.dg/format/c2x-printf-1.c, gcc.dg/format/c2x-scanf-1.c,
gcc.dg/format/ext-9.c: Add tests using wN and wfN length
modifiers.
Aldy Hernandez [Wed, 19 Oct 2022 15:05:39 +0000 (17:05 +0200)]
Always check result from build_<COND> in range-op-float.cc
A result of false from build_<COND> in range-ops means the result is
final and needs no further adjustments. This patch documents this,
and changes all uses to check the result. There should be no change
in functionality.
gcc/ChangeLog:
* range-op-float.cc (build_le): Document result.
(build_lt): Same.
(build_ge): Same.
(foperator_ge::op2_range): Check result of build_*.
(foperator_unordered_le::op1_range): Same.
(foperator_unordered_le::op2_range): Same.
(foperator_unordered_gt::op1_range): Same.
(foperator_unordered_gt::op2_range): Same.
(foperator_unordered_ge::op1_range): Same.
(foperator_unordered_ge::op2_range): Same.
David Malcolm [Wed, 19 Oct 2022 20:49:38 +0000 (16:49 -0400)]
analyzer: fix ICE on __builtin_ms_va_copy [PR105765]
gcc/analyzer/ChangeLog:
PR analyzer/105765
* varargs.cc (get_BT_VALIST_ARG): Rename to...
(get_va_copy_arg): ...this, and update logic for determining level
of indirection of va_copy's argument to use type of argument,
rather than looking at va_list_type_node, to correctly handle
__builtin_ms_va_copy.
(get_stateful_BT_VALIST_ARG): Rename to...
(get_stateful_va_copy_arg): ...this.
(va_list_state_machine::on_va_copy): Update for renaming.
(region_model::impl_call_va_copy): Likewise.
gcc/testsuite/ChangeLog:
PR analyzer/105765
* gcc.dg/analyzer/stdarg-1-ms_abi.c: New test, based on stdarg-1.c.
* gcc.dg/analyzer/stdarg-1-sysv_abi.c: Likewise.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Patrick Palka [Wed, 19 Oct 2022 19:43:13 +0000 (15:43 -0400)]
libstdc++: Implement remaining P2474R2 changes to views::take/drop
libstdc++-v3/ChangeLog:
* include/std/ranges (views::__detail::__is_repeat_view): Define
and later define a partial specialization.
(views::__detail::__take_of_repeat_view): Declare and later define.
(views::__detail::__drop_of_repeat_view): Likewise.
(views::_Take::operator()): Return a repeat_view if the argument
is a repeat_view as per P2474R2.
(views::_Drop::operator()): Likewise.
(repeat_view): Befriend __take/drop_of_repeat_view.
* testsuite/std/ranges/repeat/1.cc (test04): New test.
Marek Polacek [Tue, 18 Oct 2022 16:20:14 +0000 (12:20 -0400)]
c++: Mitigate -Wuseless-cast with classes [PR85043]
-Wuseless-cast (not part of -Wall/-Wextra) warns here:
struct S { };
void g (S&&);
void f (S&& arg)
{
g (S(arg)); // warning: useless cast to type 'struct S'
}
which is wrong: the code will not compile without the cast because
"arg" is an lvalue which cannot bind to S&&.
This patch disables the warning when an object that isn't a prvalue
is cast to a non-reference type. Therefore we still warn about the
useless cast in "X(X{})".
PR c++/85043
gcc/cp/ChangeLog:
* typeck.cc (maybe_warn_about_useless_cast): Don't warn when
a glvalue is cast to a non-reference type.
gcc/ChangeLog:
* doc/invoke.texi: Update documentation of -Wuseless-cast.
gcc/testsuite/ChangeLog:
* g++.dg/warn/Wuseless-cast.C: Remove dg-warning.
* g++.dg/warn/Wuseless-cast3.C: New test.
Jakub Jelinek [Wed, 19 Oct 2022 16:55:46 +0000 (18:55 +0200)]
testsuite: Default make check-g++ vs. tests for newest C++ standard
When adding tests for upcoming C++ version, one always has a dilemma
whether to use explicit // { dg-options "-std=c++2b" }
or -std=gnu++2b and similar, then the test works in all modes, but it might
be forgotten later on to be converted into // { dg-do whatever { target c++23 } }
test so that when 23 is tested by default and say 26 or 29 appears too,
we test it also in those modes, or just go with
// { dg-do whatever { target c++23 } }
which has the disadvantage that it is skipped when testing by default and
one only tests it if he asks for the newer version.
The following patch changes it, such that it is safe to add
// { dg-do whatever { target c++23 } }
style tests and make those tested even in the default testing mode
(when GXX_TESTSUITE_STDS or check-c++-all etc. aren't used).
This is by searching for such dg-do lines and if there is an effective
target newer than the latest by default tested language version, it will
just use that language version instead of the default list.
Without this change, the test would be UNSUPPORTED in currently
all of 98 14 17 20 versions, with the patch it will be tested with a single
23 version.
2022-10-19 Jakub Jelinek <jakub@redhat.com>
* lib/g++-dg.exp (g++-dg-runtest): When using defaulted
std_list, if test has { dg-do * { target c++23 } } directive,
use { 23 } with which the test will run instead of { 98 14 17 20 }
which would make it UNSUPPORTED in all cases.
Patrick Palka [Wed, 19 Oct 2022 17:03:25 +0000 (13:03 -0400)]
libstdc++: Fix typo in stride_view's operator- [PR107313]
PR libstdc++/107313
libstdc++-v3/ChangeLog:
* include/std/ranges (stride_view::_Iterator::operator-): Fix typo.
* testsuite/std/ranges/adaptors/stride/1.cc (test03): New test.
Jakub Jelinek [Wed, 19 Oct 2022 16:49:03 +0000 (18:49 +0200)]
testsuite: Fix up c2x-enum-1.c for 32-bit arches [PR107311]
On Wed, Oct 19, 2022 at 02:57:59PM +0000, Joseph Myers wrote:
> I think the type checked for e5a should be conditional on __LONG_MAX__ >
> __INT_MAX__; everything else there should be OK regardless.
This patch does that.
2022-10-19 Jakub Jelinek <jakub@redhat.com>
PR c/107311
* gcc.dg/c2x-enum-1.c (enum e5): Expect e5a type inside of
enum to be int rather than long if long isn't wider than int.
Andrew MacLeod [Wed, 19 Oct 2022 13:21:22 +0000 (09:21 -0400)]
Use Value_Range when applying inferred ranges.
Applying an inferred range is using int_range_ma as the
temporary rather than the general purpose Value_Range. This causes it
to trap if we have a non-integral inferred range.
* gimple-range-cache.cc (ranger_cache::range_from_dom): Use
Value_Range not int_range_max.
LIU Hao [Sat, 1 Oct 2022 16:57:08 +0000 (00:57 +0800)]
libstdc++/thread: Implement `_GLIBCXX_NPROCS` for Windows
This makes `std::thread::hardware_concurrency()` return the number of
logical processors, instead of zero.
libstdc++-v3/ChangeLog:
* src/c++11/thread.cc (get_nprocs): Add new implementation
for native Windows targets
Aldy Hernandez [Wed, 19 Oct 2022 12:27:46 +0000 (14:27 +0200)]
[PR tree-optimization/107312] Make range_true_and_false work with 1-bit signed types.
range_true_and_false() returns a range of [0,1], which for a 1-bit
signed integer gets passed to the irange setter as [0, -1]. These
endpoints are out of order and cause an ICE. Through some dumb luck,
the legacy code swaps out of order endpoints, because old VRP would
sometimes pass endpoints reversed, depending on the setter to fix
them. This swapping does not happen for non-legacy, hence the ICE.
The right thing to do (apart from killing legacy and 1-bit signed
integers ;-)), is to avoid passing out of order endpoints for 1-bit
signed integers. For that matter, a range of [-1, 0] (signed) or
[0, 1] (unsigned) is just varying.
PR tree-optimization/107312
gcc/ChangeLog:
* range.h (range_true_and_false): Special case 1-bit signed types.
* value-range.cc (range_tests_misc): New test.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr107312.c: New test.
LIU Hao [Fri, 15 Apr 2022 16:46:23 +0000 (00:46 +0800)]
gcc: Add 'mcf' thread model support from mcfgthread
This patch adds the new thread model `mcf`, which implements mutexes
and condition variables with the mcfgthread library.
Source code for mcfgthread is available at <https://github.com/lhmouse/mcfgthread>.
config/ChangeLog:
* gthr.m4 (GCC_AC_THREAD_HEADER): Add new case for `mcf` thread
model
gcc/ChangeLog:
* config/i386/mingw-mcfgthread.h: New file
* config/i386/mingw32.h: Add builtin macro and default libraries
for mcfgthread when thread model is `mcf`
* config.gcc: Include 'i386/mingw-mcfgthread.h' when thread model
is `mcf`
* configure.ac: Recognize `mcf` as a valid thread model
* config.in: Regenerate
* configure: Regenerate
libatomic/ChangeLog:
* configure.tgt: Add new case for `mcf` thread model
libgcc/ChangeLog:
* config.host: Add new cases for `mcf` thread model
* config/i386/gthr-mcf.h: New file
* config/i386/t-mingw-mcfgthread: New file
* config/i386/t-slibgcc-cygming: Add mcfgthread for libgcc DLL
* configure: Regenerate
libstdc++-v3/ChangeLog:
* libsupc++/atexit_thread.cc (__cxa_thread_atexit): Use
implementation from mcfgthread if available
* libsupc++/guard.cc (__cxa_guard_acquire, __cxa_guard_release,
__cxa_guard_abort): Use implementations from mcfgthread if
available
* configure: Regenerate
Lewis Hyatt [Fri, 14 Oct 2022 17:52:12 +0000 (13:52 -0400)]
pch: Fix streaming of strings with embedded null bytes
When a GTY'ed struct is streamed to PCH, any plain char* pointers it contains
(whether they live in GC-controlled memory or not) will be marked for PCH
output by the routine gt_pch_note_object in ggc-common.cc. This routine
special-cases plain char* strings, and in particular it uses strlen() to get
their length. Thus it does not handle strings with embedded null bytes, but it
is possible for something PCH cares about (such as a string literal token in a
macro definition) to contain such embedded nulls. To fix that up, add a new
GTY option "string_length" so that gt_pch_note_object can be informed the
actual length it ought to use, and use it in the relevant libcpp structs
(cpp_string and ht_identifier) accordingly.
gcc/ChangeLog:
* gengtype.cc (output_escaped_param): Add missing const.
(get_string_option): Add missing check for option type.
(walk_type): Support new "string_length" GTY option.
(write_types_process_field): Likewise.
* ggc-common.cc (gt_pch_note_object): Add optional length argument.
* ggc.h (gt_pch_note_object): Adjust prototype for new argument.
(gt_pch_n_S2): Declare...
* stringpool.cc (gt_pch_n_S2): ...new function.
* doc/gty.texi: Document new GTY((string_length)) option.
libcpp/ChangeLog:
* include/cpplib.h (struct cpp_string): Use new "string_length" GTY.
* include/symtab.h (struct ht_identifier): Likewise.
gcc/testsuite/ChangeLog:
* g++.dg/pch/pch-string-nulls.C: New test.
* g++.dg/pch/pch-string-nulls.Hs: New test.
Martin Liska [Wed, 19 Oct 2022 13:23:59 +0000 (15:23 +0200)]
avr: remove useless @tie{} directives
gcc/ChangeLog:
* doc/extend.texi: Remove useless @tie{} directives.
Martin Jambor [Wed, 19 Oct 2022 12:43:04 +0000 (14:43 +0200)]
SRA: Limit replacement creation for accesses propagated from LHSs
PR 107206 is fallout from the fix to PR 92706 where we started
propagating accesses across assignments also from LHS to RHS of
assignments so that we would not do harmful total scalarization of the
aggregates on the RHS.
But this can lead to new scalarization of these aggregates and in the
testcase of PR 107206 these can appear in superfluous uses of
un-initialized values and spurious warnings.
Fixed by making sure the the accesses created by propagation in this
direction are only used as a basis for replacements when the structure
would be totally scalarized anyway.
gcc/ChangeLog:
2022-10-18 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/107206
* tree-sra.cc (struct access): New field grp_result_of_prop_from_lhs.
(analyze_access_subtree): Do not create replacements for accesses with
this flag when not toally scalarizing.
(propagate_subaccesses_from_lhs): Set the new flag.
gcc/testsuite/ChangeLog:
2022-10-18 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/107206
* g++.dg/tree-ssa/pr107206.C: New test.
Stefan Schulze Frielinghaus [Wed, 19 Oct 2022 12:28:22 +0000 (14:28 +0200)]
IBM zSystems: Fix function_ok_for_sibcall [PR106355]
For a parameter with BLKmode we cannot use REG_NREGS in order to
determine the number of consecutive registers. Streamlined this with
the implementation of s390_function_arg.
Fix some indentation whitespace, too.
gcc/ChangeLog:
PR target/106355
* config/s390/s390.cc (s390_call_saved_register_used): For a
parameter with BLKmode fix determining number of consecutive
registers.
gcc/testsuite/ChangeLog:
* gcc.target/s390/pr106355.h: Common code for new tests.
* gcc.target/s390/pr106355-1.c: New test.
* gcc.target/s390/pr106355-2.c: New test.
* gcc.target/s390/pr106355-3.c: New test.
Takayuki 'January June' Suwa [Wed, 19 Oct 2022 08:16:24 +0000 (17:16 +0900)]
xtensa: Prepare the transition from Reload to LRA
This patch provides the first step in the transition from Reload to LRA
in Xtensa.
gcc/ChangeLog:
* config/xtensa/xtensa-protos.h
(xtensa_split1_finished_p, xtensa_split_DI_reg_imm): New prototypes.
* config/xtensa/xtensa.cc
(xtensa_split1_finished_p, xtensa_split_DI_reg_imm, xtensa_lra_p):
New functions.
(TARGET_LRA_P): Replace the dummy hook with xtensa_lra_p.
(xt_true_regnum): Rework.
* config/xtensa/xtensa.h (CALL_REALLY_USED_REGISTERS):
Switch from CALL_USED_REGISTERS, and revise the comment.
* config/xtensa/constraints.md (Y):
Use !xtensa_split1_finished_p() instead of can_create_pseudo_p().
* config/xtensa/predicates.md (move_operand): Ditto.
* config/xtensa/xtensa.md: Add two new split patterns:
- splits DImode immediate load into two SImode ones
- puts out-of-constraint SImode constants into the constant pool
* config/xtensa/xtensa.opt (-mlra): New target-specific option
for testing purpose.
Robin Dapp [Tue, 18 Oct 2022 10:27:37 +0000 (12:27 +0200)]
s390: Fix bootstrap error with checking and -m31.
For a while already we hit an ICE when bootstrapping with -m31 and
--enable-checking=all.
../../../../libgfortran/ieee/ieee_helper.c: In function 'ieee_class_helper_16':
../../../../libgfortran/ieee/ieee_helper.c:77:3: internal compiler error: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1932
77 | }
| ^
../../../../libgfortran/ieee/ieee_helper.c:87:1: note: in expansion of macro 'CLASSMACRO'
87 | CLASSMACRO(16)
| ^~~~~~~~~~
This patch fixes the problem by first checking for reload_completed
and also ensuring that REGNO is only called on reg operands rather
than subregs.
gcc/ChangeLog:
* config/s390/s390.md: Move reload_completed and check operands for REG_P.
Jakub Jelinek [Wed, 19 Oct 2022 09:29:44 +0000 (11:29 +0200)]
expr: Fix ICE on BFmode -> SFmode conversion of constant [PR107262]
I forgot to handle the case where lowpart_subreg returns a VOIDmode
CONST_INT, in that case convert_mode_scalar obviously doesn't work.
The following patch fixes that.
2022-10-19 Jakub Jelinek <jakub@redhat.com>
PR middle-end/107262
* expr.cc (convert_mode_scalar): For BFmode -> SFmode conversions
of constants, use simplify_unary_operation if fromi has VOIDmode
instead of recursive convert_mode_scalar.
* gcc.dg/pr107262.c: New test.
Jakub Jelinek [Wed, 19 Oct 2022 09:28:42 +0000 (11:28 +0200)]
match.pd: Add 2 TYPE_OVERFLOW_SANITIZED checks [PR106990]
As requested in the PR, this adds 2 TYPE_OVERFLOW_SANITIZED checks
and corresponding testcase.
2022-10-19 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/106990
* match.pd ((~X - ~Y) -> Y - X, -x & 1 -> x & 1): Guard with
!TYPE_OVERFLOW_SANITIZED (type).
* c-c++-common/ubsan/pr106990.c: New test.
Jakub Jelinek [Wed, 19 Oct 2022 09:25:03 +0000 (11:25 +0200)]
libstdc++-v3: Implement {,b}float16_t nextafter and some fixes [PR106652]
The following patch implements nextafter for std::{,b}float16_t,
though right now only without constexpr support, and adds a testcase for it.
The testcase unfortunately relevealed I've screwed up testing of my last
patch. I've tested earlier version of the patch with
--target_board=unix/-std=c++23
but didn't test the final version with that RUNTESTFLAGS, so missed
an invalid call to std::sph_neumann (too many arguments) in the test.
And, I've made a typo in the guard for numeric_limits (the reason
for the guard is I wanted to avoid defining a large macro that nothing
will then use because the std::{,b}float*_t types are C++23 only) and
so numeric_limits wasn't specialized for the types at all but
testsuite/18_support/headers/limits/synopsis_cxx23.cc test didn't
detect that.
In the nextafter implementation I'm calling __builtin_nextafterf
to get various required side-effects for nextafter from 0/-0, or from max
to inf or from min to largest subnormal to avoid needing to set errno
inline, or use inline asm specific for each processor to force math
evaluation barriers. Dunno if
#ifdef __INT16_TYPE__
using __float16_int_type = __INT16_TYPE__;
#else
using __float16_int_type = short int;
#endif
isn't too ugly, perhaps we could just blindly use short int and hope
or even assert it has the same size as _Float16 or __gnu_cxx::__bfloat16_t?
Only aarch64, arm, csky, gcn, x86, nvptx and riscv support these types
and all of them have 16-bit short (I think the only target with some
other short size is avr with certain command line switches where both
short and int are 8-bit, but such mode isn't compatible with C and C++
requirements).
2022-10-19 Jakub Jelinek <jakub@redhat.com>
PR c++/106652
* include/std/limits: Fix a typo, 202202L -> 202002L.
(numeric_limits::<_Float16>::radix, numeric_limits::<_Float32>::radix,
numeric_limits::<_Float64>::radix, numeric_limits::<_Float128>::radix,
numeric_limits::<__gnu_cxx::__bfloat16_t>::radix): Use __FLT_RADIX__
macro instead of type specific macros.
* include/c_global/cmath (nextafter(_Float16, _Float16)): New
overload.
(nextafter(__gnu_cxx::__bfloat16_t, __gnu_cxx::__bfloat16_t)):
Likewise.
* testsuite/26_numerics/headers/cmath/functions_std_c++23.cc
(test_functions): Uncomment nextafter test. Fix up sph_neumann call.
* testsuite/26_numerics/headers/cmath/nextafter_c++23.cc: New test.
Jakub Jelinek [Wed, 19 Oct 2022 09:22:53 +0000 (11:22 +0200)]
i386: Fix up __bf16 handling on ia32
Last night's testing of the libstdc++ changes revealed a problem
in the __bf16 backend registration (while _Float16 seems ok).
The problem is that for both BFmode and HFmode we require TARGET_SSE2,
the generic code creates {,b}float16_type_node only if that is true
at the start of the TU and the builtins for the type are only
created in that case (many __builtin_*f16 for HFmode and __builtin_nansf16b
for BFmode). Now, for _Float16 I've kept what the code did previously,
if float16_type_node from generic code is NULL, create ix86_float16_type_node
and register _Float16 for it, but for __bf16 I've changed it so that
if bfloat16_type_node from generic code is NULL,
ix86_register_bf16_builtin_type makes bfloat16_type_node non-NULL.
This has an unfortunate consequence though, __STDCPP_BFLOAT16_T__ is
predefined for C++23, __BFLT16_*__ macros are predefined as well, but
the type doesn't really work (errors whenever it is used) and the builtin
isn't defined.
The following patch fixes that by going with what we do for HFmode,
bfloat16_type_node stays as initialized by generic code and we have a local
type for backend use. On the other side, nothing used ix86_bf16_ptr_type_node
so that is now dropped.
2022-10-19 Jakub Jelinek <jakub@redhat.com>
* config/i386/i386-builtins.cc (ix86_bf16_ptr_type_node): Remove.
(ix86_bf16_type_node): New variable.
(ix86_register_bf16_builtin_type): If bfloat16_type_node is NULL
from generic code, set only ix86_bf16_type_node to a new REAL_TYPE
rather than bfloat16_type_node, otherwise set ix86_bf16_type_node
to bfloat16_type_node. Register __bf16 on ix86_bf16_type_node
rather than bfloat16_type_node. Don't initialize unused
ix86_bf16_ptr_type_node.
* config/i386/i386-builtin-types.def (BFLOAT16): Use
ix86_bf16_type_node rather than bfloat16_type_node.
Richard Biener [Wed, 19 Oct 2022 07:01:56 +0000 (09:01 +0200)]
tree-optimization/106781 - adjust cgraph lhs removal
The following matches up the cgraph code removing LHS of a noreturn
call with what fixup_noreturn_call does which gets along without
inserting a definition, fixing the ICE resulting from having no
place to actually insert that new def.
PR tree-optimization/106781
* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): Copy
LHS removal from fixup_noreturn_call.
* gcc.dg/pr106781.c: New testcase.
Martin Liska [Wed, 19 Oct 2022 06:44:20 +0000 (08:44 +0200)]
libsanitizer: regenerate configure
libsanitizer/ChangeLog:
* configure: Regenerate.
liuhongt [Tue, 18 Oct 2022 08:58:52 +0000 (16:58 +0800)]
Canonicalize vec_perm index to make the first index come from the first vector.
Fix unexpected non-canon form from gimple vector selector.
gcc/ChangeLog:
PR target/107271
* config/i386/i386-expand.cc (ix86_vec_perm_index_canon): New.
(expand_vec_perm_shufps_shufps): Call
ix86_vec_perm_index_canon
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr107271.c: New test.
GCC Administrator [Wed, 19 Oct 2022 00:19:08 +0000 (00:19 +0000)]
Daily bump.
Joseph Myers [Tue, 18 Oct 2022 23:25:47 +0000 (23:25 +0000)]
c: Diagnose "enum tag;" after definition [PR107164]
As noted in bug 101764, a declaration "enum tag;" is invalid in
standard C after a definition, as well as when no definition is
visible; we had a pedwarn-if-pedantic for the forward declaration
case, but were missing one for the other case. Add that missing
diagnostic (if pedantic only).
(These diagnostics will need to be appropriately conditioned when
support is added for C2x enums with fixed underlying type, since "enum
tag : type;" is OK both before and after a definition.)
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
PR c/107164
gcc/c/
* c-decl.cc (shadow_tag_warned): If pedantic, diagnose "enum tag;"
with previous declaration visible.
gcc/testsuite/
* gcc.dg/c99-tag-4.c, gcc.dg/c99-tag-5.c, gcc.dg/c99-tag-6.c: New
tests.
Marek Polacek [Tue, 11 Oct 2022 16:51:40 +0000 (12:51 -0400)]
testsuite: Only run -fcf-protection test on i?86/x86_64 [PR107213]
This test fails on non-i?86/x86_64 targets because on those targets
we get
error: '-fcf-protection=full' is not supported for this target
so this patch limits where the test is run.
PR testsuite/107213
gcc/testsuite/ChangeLog:
* c-c++-common/pointer-to-fn1.c: Only run on i?86/x86_64.
Florian Weimer [Tue, 18 Oct 2022 14:58:48 +0000 (16:58 +0200)]
libiberty: Fix C89-isms in configure tests
libiberty/
* acinclude.m4 (ac_cv_func_strncmp_works): Add missing
int return type and parameter list to the definition of main.
Include <stdlib.h> and <string.h> for prototypes.
(ac_cv_c_stack_direction): Add missing
int return type and parameter list to the definitions of
main, find_stack_direction. Include <stdlib.h> for exit
prototype.
* configure: Regenerate.
Florian Weimer [Tue, 18 Oct 2022 14:58:48 +0000 (16:58 +0200)]
libsanitizer: Avoid implicit function declaration in configure test
libsanitizer/
* configure.ac (sanitizer_supported): Include <unistd.h> for
syscall prototype.
* configure: Regenerate.
Patrick Palka [Tue, 18 Oct 2022 14:57:30 +0000 (10:57 -0400)]
c++ modules: stream non-trailing default targs [PR105045]
This fixes the below testcase in which we neglect to stream the default
argument for T only because the subsequent parameter U doesn't also have
a default argument.
PR c++/105045
gcc/cp/ChangeLog:
* module.cc (trees_out::tpl_parms_fini): Don't assume default
template arguments must be trailing.
(trees_in::tpl_parms_fini): Likewise.
gcc/testsuite/ChangeLog:
* g++.dg/modules/pr105045_a.C: New test.
* g++.dg/modules/pr105045_b.C: New test.