ci/bin: Add utility to find jobs dependencies

Use GraphQL API from Gitlab to find jobs dependencies in a pipeline.
E.g: Find all dependencies for jobs starting with "iris-"

```sh
.gitlab-ci/bin/gitlab_gql.py --sha $(git -C ../mesa-fast-fix rev-parse HEAD) --print-dag --regex "iris-.*"
```

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17791>

ci/lava: Add timeout header info for LAVA GL Sections

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17703>

ci/lava: Customise sections timeouts via envvars

Refer to environment variables before falling back to the default
timeouts for each Gitlab section.

This makes more explicit in the job definition that there is a
particular case where the job may obey different timeouts.

Closes: #6908

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17703>

vulkan: extend ALLOWED_ANDROID_VERSION up to api level 31

Compiled from the extension lists on android11-tests-release and
android12-tests-release branches.

v2: remove VK_EXT_color_write_enable that slipped in

Reviewed-by: Emma Anholt <emma@anholt.net> (v1)
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17526>

vulkan: fix ALLOWED_ANDROID_VERSION up to api level 29

Compiled from the extension lists on oreo-mr1-cts-release,
pie-cts-release, and android10-tests-release branches.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17526>

vulkan: fix ALLOWED_ANDROID_VERSION for api level 26

I mainly wanted to document that the list is compiled from
dEQP-VK.info.device_extensions and
dEQP-VK.api.info.android.no_unknown_extensions on various Android CTS
release branches.  But then I noticed that some extensions should have
api level 26.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17526>

vulkan: sort ALLOWED_ANDROID_VERSION by api levels

v2: fix ordering of VK_KHR_driver_properties

Reviewed-by: Emma Anholt <emma@anholt.net> (v1)
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17526>

bin/gen_release_notes.py: bump advertised vulkan version to 1.3

Fixes: df8ac77af8093c87d5d5 ("anv: Advertise Vulkan 1.3")
Fixes: 08c6f437cf63234f4a5d ("radv: advertise Vulkan 1.3")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17759>

radeonsi: implement a non-scaled compute blit+resolve and use it on gfx11

This was written from scratch. Only a few pieces were taken from Indrajit's
code. This is also much simpler, and hopefully easier to review. For example,
out-of-bounds coordinates are handled trivially.

The new blit test proves that this is identical to u_blitter except for
a few precision differences (NaNs, sRGB) where the compute blit should be
more precise.

This is only enabled on gfx11 because it's slower than the gfx blit on gfx10.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17782>

ac/llvm: remove all resinfo code now that it's lowered

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

radeonsi,radv: run ac_nir_lower_resinfo

Emulating image_get_resinfo should be faster than using the hw.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

ac/nir: add ac_nir_lower_resinfo

Emulating image_get_resinfo should be faster than using the hw.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

ac/llvm: implement nir_texop_descriptor_amd

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

ac/llvm: implement nir_intrinsic_image_deref_descriptor_amd

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

ac/llvm: implement nir_intrinsic_image_deref_samples_identical

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

nir: add shader_info::uses_resource_info_query for txs, levels, samples, etc.

AMD will use this to execute a lowering pass conditionally.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

nir: add nir_texop_descriptor_amd

AMD will use it to emulate resinfo.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

nir: add nir_intrinsic_image_descriptor_amd

This returns the AMD shader resource descriptor.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

nir: add nir_intrinsic_image_samples_identical

radeonsi will use it

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17693>

zink: use modifier feature flags during surface creation when necessary

cc: mesa-stable

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17773>

zink: use stored format features for blit functionality

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17773>

zink: store VkFormatFeatureFlags on creation

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17773>

zink: handle mutable swapchain images with dmabuf

if a non-kopper swapchain image supports srgb, add a VkImageFormatListCreateInfo
to permit srgb mutability and avoid violating spec

cc: mesa-stable

Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17773>

docs: reset new features

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17875>

VERSION: bump 22.3.0-devel

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17875>

turnip: Use the GMEM CCU space for attachments when the stores won't.

Since the CCU only gets used for unaligned attachment stores or resolves
with the wrong formats, we can use that space for attachments in many
cases.

This gets two more of vk-5-normal's main renderpass's attachments to fit
in the next gmem_pixels increment, leaving 1 to go.  Other renderpasses do
get better gmem_pixels, and a few get better tile sizes as a result, but
the fps increase from those looks to be <.2% at least.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16921>

turnip: Split the tiling config into separate layouts based on CCU usage.

We now choose between two (equal as of this commit) layouts based on
whether the renderpass's stores will use the CCU space, and assert that we
always know the chosen layout when we go using the gmem offsets.

This required making vkCmdClearAttachments in a secondary take the 3D path
instead of gmem blits, since secondaries only have to be compatible with
the primary's renderpass, rather than equal.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16921>

ci/freedreno: Update a630 s8 resolve xfails.

These tests are all only run in a full vk run.  These removed ones were
fixed in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17684
and I'm betting the bypass ones were pre-existing (we hadn't updated 630's
full vk run list for these new stencil tests, I belive -- my previous full
run update was just from one of the two jobs).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16921>

tu: Restore formatting of tu_clear_blit.c

Conflict resolution appears to have gone awry.  Use my previous resolution
of that rebase instead.

Fixes: 89263fde2057 ("tu: Use common vk_image struct")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16921>

iris: Dedent enum iris_depth_reg_mode

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17859>

iris: Make the D16 reg mode single-sampled

Wa_14010455700 is dependent on the format and sample count, but our
code to track whether or not it had been applied was only dependent on
the format.

As a result, we failed to enable the workaround when an app used a D16
2xMSAA buffer, then a D16 1xMSAA buffer right afterwards.

Make the workaround tracking code sample-dependent to fix this.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17859>

anv: Make the D16 reg mode single-sampled

Wa_14010455700 is dependent on the format and sample count, but our
code to track whether or not it had been applied was only dependent on
the format.

As a result, we failed to enable the workaround when an app used a D16
2xMSAA buffer, then a D16 1xMSAA buffer right afterwards.

Make the workaround tracking code sample-dependent to fix this.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17859>

nir/lower_idiv: Be less creative about signs

I'm sorry to whoever wrote this, but

   (x - (int) (x < 0)) ^ -((int) (x < 0))

is not an acceptable way to write iabs.

Shader-db results on Intel Tiger Lake with lower_idiv enabled:

    total instructions in shared programs: 21122548 -> 21122570 (<.01%)
    instructions in affected programs: 2369 -> 2391 (0.93%)
    helped: 2
    HURT: 8

    total cycles in shared programs: 791609360 -> 791608062 (<.01%)
    cycles in affected programs: 114106 -> 112808 (-1.14%)
    helped: 9
    HURT: 1

If we make the Intel back-end less stupid, we get to 9/1 helped/HURT for
instructions as well but that's for a different MR.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17845>

zink: combine loops for lazy descriptor program deinit

the bindless and push sets don't have update templates stored to
the program, so merging these loops avoids trying to destroy them

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17866>

zink: don't flag lazy push constant set dirty on batch change

this has its own flag

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17866>

zink: fix gfx program cache pruning with generated tcs

if the tcs was generated, then the prgram was added to the non-tcs cache,
which means deleting it from the tcs+tes cache will fail and then
context_destroy will explode

Fixes: 4123ee3c714 ("zink: invoke descriptor_program_deinit for programs on context destroy")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17866>

ir3: Never remove GS_HEADER_IR3 sysval input

Without GS header geometry shader is never invoked which may cause
issues if it has side-effects.

Fixes GL CTS tests running via Zink:
 KHR-GL46.shader_image_load_store.multiple-uniforms
 KHR-GL46.texture_cube_map_array.image_op_geometry_sh

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6940

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17771>

ir3/ra: Always insert interval for precolored inputs

insert_dst checked whether dst is unused, however for precolored
inputs we always want to reserve a reg for them. Input could be
unused only if we explicitly want it.

Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17771>

radeonsi: move small prim precision computation out of si_emit_cull_state

to put it next to its only use and remove the structure fields

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: move the no-AA small prim precision cull constant into an SGPR

This reduces the scalar load from vec4 to vec2.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: add a randomized blit test

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: allow texture_map to upload only 1 sample for MSAA instead of all

Reuse the level parameter to do that, which allows us to keep
the pipe_transfer size unchanged. It's kinda hacky, but it's the simplest
way to do it. This will be used by the blit test to initialize MSAA textures.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: make various blit functions non-static

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: use a better workaround for the export conflict bug

This is recommended for better performance.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: enable shader prefetch except for initial chip revisions

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: rename si_calc_inst_pref_size -> si_get_shader_prefetch_size

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: skip code in si_update_shaders that has no effect

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: use better PRIM_GRP_SIZE_GFX11 setting

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: set SAMPLE_MASK_TRACKER_WATERMARK = 15 and clean up

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi/gfx11: use correct VGT_TESS_DISTRIBUTION settings

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: cosmetic changes around do_hardware_msaa_resolve

- move gfx_level checking into the function
- rename the function
- call it in si_blit later
- set the SQTT event

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: fold async_copy into the preceding conditional in si_blit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: move compute-related code from si_blit.c to si_compute_blit.c

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: check for 16-bit hw support instead of relying on options.fp16

options.fp16 can be true even when the hw doesn't support FP16.
options.fp16 should only affect the CAP because 16-bit ops can still be
used by internal shaders.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: add need_fmask_expand parameter into si_decompress_subresource

This is required by MSAA image stores for internal compute blits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: follow shader_info.float_controls_execution_mode (mostly)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: don't do image stores with RGBX, L, LA, I, and SRGB formats

The only change in behavior is that RGBX stores now overwrite X, which is
what CB does and it's faster.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: remove compute-based DCC decompression because it's broken

The new blit test discovered that it doesn't always work.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: add common helper si_launch_grid_internal_images that is more robust

It does things in the correct order, which isn't easy to get right.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: make si_launch_grid_internal static

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: call pipe->blit instead of util_blitter_blit after MSAA resolving

This fixes a problem where the destination has a DCC-incompatible view
format and triggers a DCC decompression using a custom u_blitter path, which
is disallowed inside u_blitter due to it being a u_blitter recursion that
always crashes.

This is also better because we'll get the best codepath (u_blitter or
compute) instead of just u_blitter,

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: move SI_MAX_VRAM_MAP_SIZE to si_debug_options.h

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

radeonsi: unify VGT_TESS_DISTRIBUTION programming

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

ac/surface: don't forbid 256KB swizzle modes on smaller gfx11 chips

let addrlib make the right choice

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

amd/addrlib: fix 3D texture allocation failures on gfx11

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

util/format: add util_format_rgbx_to_rgba helper

Image stores don't like RGBX on AMD. This is required by compute blits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>

glthread: don't sync on IsEnabled(GL_DEPTH_TEST) by tracking it in glthread

Discovered with viewperf.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17781>

glthread: don't ignore glPushAttrib/glPopAttrib when tracking GL_CULL_FACE

Fixes: f4348ef60d51b07 - glthread: don't sync for glIsEnabled with a few enums

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17781>

r600: increase possible stack size in binary code

With the trace posted in #6969 we get a nesting level of 149,
so make it a round 256 of stack entries.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6969

Fixes: a4840e15ab77b44a72cabd7d503172e8357477eb
  r600: Use nir-to-tgsi instead of TGSI when the NIR debug opt is disabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17849>

freedreno/registers/a6xx: Some reg64 conversion

Reduce the spurious delta from a7xx regs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/registers: Move varset to <enum>

De-noisify the enum values that are generation specific.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/registers: Allow varset to be specified on enum

It gets a bit repetitive to specify the same varset on each value.  The
rnn decode already handles it when specified on the enum, we just need
to relax the schema to allow this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/registers: Whitespace fix for gen_header.py

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/ci: Update unit test reference decodes

Apparently we aren't running unit tests in CI?

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno: Use enum for primtypes table

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/a6xx: De-open-code CACHE_FLUSH enum

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/drm: Combine upper and lower 32b of OR val

The original reason it was split was because of libdrm ABI.  But that no
longer applies since we pulled it into mesa.

While we are at it, remove the c++ workaround.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/autotune: Make 'offset' macro "private"

Otherwise it conflicts with glsl_types.h DEFAULT_CONSTRUCTOR when
included from a c++ file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/ir3: Remove unneeded forward declaration

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno: Extract common helper macros

De-duplicate some macros that had been copy/pasta'd around, etc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/a6xx: Fix enum tag

This wasn't meant to be a variable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

freedreno/a6xx: Remove fd6_format.[ch]

Just use the fdl6 version of the one remaining helper.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

pan/decode: Fix overrun decoding planes

We need to calculate the # of descriptors like we do on Midgard.

Fixes: ae9316f8128 ("pan/decode: Decode Valhall surface descriptor")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17842>

vulkan: Improve the docs for vk_subpass_info

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17858>

vulkan: Always populate vk_render_pass_state::render_pass

This way drivers can at least see whether dynamic rendering is being
used or not even if they use vk_render_pass.  Dynamic rendering only
drivers are expected to ignore those fields anyway.

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17858>

etnaviv: Move nir_shader_compiler_options to compiler

It fits there much better and is an other step to get the
compiler to common code.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17819>

ci: set reasonable amount of wget retries for each download

Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17655>

r300: don't read from output transform_r300_vertex_SEQ/SNE

Native rewrite in current form doesn't check
type of register and may use output as a
temp.

Helps with 218 deqp-gles2 tests.

Cc: mesa-stable
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17736>

radv: Use vk_descriptor_set_layout

Use the common ref counting and the common destroy entrypoint.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>

vulkan: Handle descriptor set layout alloc fails

Fixes: 949ce92 ("vulkan: Add a base struct for descriptor set layouts")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>

vulkan: Fix descriptor set layout allocation scope

Fixes: 949ce92 ("vulkan: Add a base struct for descriptor set layouts")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>

anv: Move Wa_1806527549 and enable by default

Move Wa_1806527549 into `init_render_queue_state` and
set HIZ_CHICKEN (7018h) bit = 1 by default.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6717
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778>

iris: Move Wa_1806527549 and enable by default

Move Wa_1806527549 into `iris_init_render_context` and
set HIZ_CHICKEN (7018h) bit = 1 by default for TGL.

Cc: mesa-stable
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778>

freedreno: WFI after PC_TESSFACTOR_ADDR update

Updating PC_TESSFACTOR_ADDR could race with the next draw which uses it.

Don't know any failures in tests.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17833>

tu: WFI after PC_TESSFACTOR_ADDR update

Updating PC_TESSFACTOR_ADDR could race with the next draw which uses it.

Fixes GL CTS tests running via Zink:
 KHR-Single-GL46.enhanced_layouts.glsl_contant_values
 KHR-GLES32.core.tessellation_shader.tessellation_shader_point_mode.point_rendering
 KHR-GLES32.core.tessellation_shader.winding.quads_cw
 KHR-GLES32.core.tessellation_shader.winding.triangles_cw

And probably more.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6815

Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17833>

intel/dev: remove INTEL_DEVID_OVERRIDE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/dev: add a test verifying that device override works

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/tools/stub: fixup parsing of --platform=

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/tools/drm-shim: fixup eu_stride for topology

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>

intel/dev: move verification function to a header

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>