platform/kernel/opensbi-spacemit.git
4 years agolib: Delegate guest page faults to HS-mode
Anup Patel [Thu, 12 Dec 2019 01:30:59 +0000 (07:00 +0530)]
lib: Delegate guest page faults to HS-mode

As-per RISC-V hypervisor v0.5 spec, we have new guest page faults
which need to be delegated to HS-mode.

Also, we can have bits in in MIDELEG and MEDELEG hardwired to 1
which means we need to fix the sainty check on these CSRs at the
end of delegate_traps() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
4 years agoinclude: Add guest external interrupt related defines
Anup Patel [Thu, 12 Dec 2019 17:35:03 +0000 (23:05 +0530)]
include: Add guest external interrupt related defines

With RISC-V H-extension v0.5 draft, we have special support for guest
external interrupts so this patch adds related defines which were
missed-out previously.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
4 years agoinclude: sbi_platform: fix compilation for GCC-9
Martin Pietryka [Wed, 4 Dec 2019 06:25:51 +0000 (07:25 +0100)]
include: sbi_platform: fix compilation for GCC-9

GCC-9 will throw a warning when using the %s format specifier with a
possible NULL parameter and since -Werror is used, the compilation breaks
for GCC-9.

In function 'sbi_boot_prints',
    inlined from 'init_coldboot' at <redacted>/opensbi/lib/sbi/sbi_init.c:107:3,
    inlined from 'sbi_init' at <redacted>/opensbi/lib/sbi/sbi_init.c:189:3:
<redacted>/opensbi/lib/sbi/sbi_init.c:56:2: error: '%s' directive argument is null [-Werror=format-overflow=]
   56 |  sbi_printf("Platform Name          : %s\n", sbi_platform_name(plat));
      |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

This is one way to fix this, currently there is nothing in the tree
checking for `sbi_platfrom_name() == NULL` so we can just return "Unknown"
instead of NULL on failure.

Signed-off-by: Martin Pietryka <martin@pietryka.at>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
4 years agolib: Add error detection for misa_extension
Xiang W [Wed, 27 Nov 2019 06:16:52 +0000 (14:16 +0800)]
lib: Add error detection for misa_extension

Add assertions for misa_extension to prevent incoming illegal
characters.

Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
4 years agolib: Fix probe extension
Atish Patra [Tue, 26 Nov 2019 03:24:29 +0000 (19:24 -0800)]
lib: Fix probe extension

The break statement is missing in base extension function handling.

Fix the typo.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
4 years agolib: Fix CPU capabilities detection function
Xiang Wang [Tue, 26 Nov 2019 10:36:29 +0000 (16:06 +0530)]
lib: Fix CPU capabilities detection function

On some platforms, misa may not be implemented. On such a platform,
reading misa will get 0. At this time, platform is required to
implement a non-standard function to detect the CPU's capabilities.
Therefore, this modification add interfaces for non-standard function.

The MXL field of misa is always at the highest two bits, whether it
is a 32-bit 64-bit or a 128-bit machine. Therefore, this modification
fixes the use of a fixed offset to detect the machine length.

Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
4 years agolib: Simplify trap parameters in sbi_ecall functions
Anup Patel [Sun, 17 Nov 2019 09:55:41 +0000 (15:25 +0530)]
lib: Simplify trap parameters in sbi_ecall functions

The out_tcause and out_tval parameters are not sufficient for most
sbi_ecall functions because this will grow in-future when we support
RISC-V hypervisor v0.5 draft. We replace these parameters with out_trap
which is a pointer to struct sbi_trap_info.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
4 years agolib: Better naming of unpriv APIs for wider use
Anup Patel [Sun, 17 Nov 2019 08:46:24 +0000 (14:16 +0530)]
lib: Better naming of unpriv APIs for wider use

The unpriv APIs can be useful to external firmware and out-of-tree
platform support code.

This patch adds "sbi_" prefix to unpriv load/store APIs and rename
struct riscv_unpriv to struct sbi_trap_info everywhere. We also
place struct sbi_trap_info in sbi/sbi_trap.h so that we can use
it for sbi_trap_redirect() as well.

Overall, this patch will make naming of unpriv APIs consistent
with other OpenSBI APIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
4 years agolib: No need to set VSSTATUS.MXR bit in get_insn()
Anup Patel [Sat, 16 Nov 2019 11:08:53 +0000 (16:38 +0530)]
lib: No need to set VSSTATUS.MXR bit in get_insn()

We don't need to set VSSTATUS.MXR bit in get_insn() for
unpriv instruction read because MSTATUS.MXR bit applies
to both "Stage1" and "Stage2" page tables.

This also allows us to remove the "virt" parameter of
get_insn() function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
4 years agoinclude: Remove ilen member of struct unpriv_trap
Anup Patel [Sat, 16 Nov 2019 10:38:27 +0000 (16:08 +0530)]
include: Remove ilen member of struct unpriv_trap

We simplify struct unpriv_trap by removing ilen member. This
can be achieved by ensuring that at all unpriv load/store
instructions are 4 bytes long using GCC assembler option.

Additionally, this also reduces few instructions from unpriv
load/store functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
4 years agolib: Remove date and time from init message
Alistair Francis [Tue, 12 Nov 2019 00:40:34 +0000 (16:40 -0800)]
lib: Remove date and time from init message

Building the date and time into the binary means the OpenSBI isn't
reproducible. We don't really need the time so let's remove it.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
4 years agofirmware: Add preferred boot HART field in struct fw_dynamic_info
Anup Patel [Wed, 6 Nov 2019 10:54:35 +0000 (16:24 +0530)]
firmware: Add preferred boot HART field in struct fw_dynamic_info

It has been reported that link address range of previous booting stage
(such as U-Boot SPL) can overlap the link address rage of FW_DYNAMIC.

This means self-relocation in FW_DYNAMIC can potentially corrupt
previous booting stage if any of the secondary HART enter FW_DYNAMIC
before primary HART.

To tackle this, we add preferred boot HART field (i.e boot_hart) in
struct fw_dyanmic_info. We use this field to force secondary HARTs
into relocation wait loop till preferred/primary boot HART enters
FW_DYNAMIC completes self-relocation. If preferred boot HART is not
available then we fall back to relocation lottery approach.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agoinclude: Use _UL() and _ULL() for defines in riscv_encoding.h
Anup Patel [Tue, 5 Nov 2019 06:12:09 +0000 (11:42 +0530)]
include: Use _UL() and _ULL() for defines in riscv_encoding.h

The riscv_encoding.h is shared with assembly sources so we use
_UL() and _ULL() for register fields related defines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agoinclude: Sync-up encoding with priv v1.12-draft and hypervisor v0.5-draft
Anup Patel [Tue, 5 Nov 2019 06:02:57 +0000 (11:32 +0530)]
include: Sync-up encoding with priv v1.12-draft and hypervisor v0.5-draft

This patch sync-up encoding header with the latest privilege
specifications draft v1.12 and hypervisor specifications draft v0.5.

The MSTATUS.MTL and HSTATUS.STL bits are not present anymore and
will be removed by another patch series for hypervisor v0.5-draft.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agofirmware: Introduce relocation lottery
Anup Patel [Thu, 31 Oct 2019 08:41:55 +0000 (14:11 +0530)]
firmware: Introduce relocation lottery

Instead of forcing HART0 to do the relocation and scratch init
work, we should have an atomic lottery to decide which HART does
the relocation and scratch init.

This way any HART can be boot/main HART.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agofirmware: Fix compile error for FW_PAYLOAD with latest GCC binutils
Anup Patel [Wed, 23 Oct 2019 07:14:14 +0000 (12:44 +0530)]
firmware: Fix compile error for FW_PAYLOAD with latest GCC binutils

We get following compile error for FW_PAYLOAD with latest GCC
binutils:
fw_payload.o(.text+0x1961): 15 bytes required for alignment to 16-byte
boundary, but only 14 present

Further investigating, it turn-out to be a known issue with RISC-V
GCC binutils.
(Refer, https://github.com/riscv/riscv-gnu-toolchain/issues/298)

As a work-around, we disable relaxation when including DTB and
PAYLOAD binary in fw_payload.S.

Reported-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agoinclude: Bump-up version to 0.5
Anup Patel [Wed, 9 Oct 2019 06:03:53 +0000 (11:33 +0530)]
include: Bump-up version to 0.5

This patch updates OpenSBI version to 0.5 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Provide a platform hook to implement vendor specific SBI extensions.
Atish Patra [Wed, 2 Oct 2019 20:59:40 +0000 (13:59 -0700)]
lib: Provide a platform hook to implement vendor specific SBI extensions.

SBI v0.2 specification allows vendor extensions and it should be
implemented in a independent of the core sbi library.

Introduce a single platform callback that will let platforms handle
all vendor extensions in platform specific code if they want.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Implement SBI v0.2
Atish Patra [Wed, 2 Oct 2019 20:59:39 +0000 (13:59 -0700)]
lib: Implement SBI v0.2

SBI v0.2 introduces a base specification which is mandatory to
implement for any SBI implementations that is not legacy.

Add support for the base extension.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Remove redundant variable assignment
Atish Patra [Wed, 2 Oct 2019 20:59:38 +0000 (13:59 -0700)]
lib: Remove redundant variable assignment

An ecall handler should only return error if valid SBI function
fails. Otherwise, it should succeed with appropriate error in a0.

Get rid of unnecessary setting of the temporary return variable to
zero for the cases where errors are not expected.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Rename existing SBI implementation as 0.1.
Atish Patra [Wed, 2 Oct 2019 20:59:37 +0000 (13:59 -0700)]
lib: Rename existing SBI implementation as 0.1.

Current SBI implementation is now considered as version 0.1 and will be
removed/replaced with newer extension/functions in future.

Rename the existing implementations accordingly to be in sync with the
specification.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
5 years agolib: Align error codes as per SBI specification.
Atish Patra [Wed, 2 Oct 2019 20:59:36 +0000 (13:59 -0700)]
lib: Align error codes as per SBI specification.

Follow the SBI specification for error codes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agoTest: Move test payload related code out of interface header
Atish Patra [Wed, 2 Oct 2019 20:59:35 +0000 (13:59 -0700)]
Test: Move test payload related code out of interface header

Test payload uses an SBI call and uses the macros defined in interface
header which is not the correct place to have these definitions.
The interface header file should be used to keep SBI specification
related macros.

Keep all the test payload related code in test itself.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Fix coldboot race condition observed on emulators/simulators
Anup Patel [Thu, 26 Sep 2019 04:25:25 +0000 (09:55 +0530)]
lib: Fix coldboot race condition observed on emulators/simulators

If we are running on RISC-V emulator/simulator with large number of
HARTs where each HART is a regular thread under UNIX host then it is
possible that some of the secondary HARTs don't get chance to run and
sbi_hart_wake_coldboot_harts() is called before secondary HARTs call
sbi_hart_wait_for_coldboot(). In this situation, some of the secondary
HARTs will never come-out of coldboot wait loop.

To tackle this, we introduce a global flag coldboot_done which will
be protected by coldboot lock and it will be set by primary HART from
sbi_hart_wake_coldboot_harts() before waking-up secondary HARTs. We
also re-arrange acquire/release of coldboot lock to reduce further
chances of race-condition.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Nylon Chen<nylon7@andestech.com>
5 years agoMakefile: Minor fix in OPENSBI_VERSION_GIT
Anup Patel [Thu, 26 Sep 2019 04:03:46 +0000 (09:33 +0530)]
Makefile: Minor fix in OPENSBI_VERSION_GIT

Currently, if someone has forked OpenSBI repo quite sometime back
and this fork is not having updated tags from upstream riscv/opensbi
repo then "git describe" command can fail. To tackle this, we redirect
error output of "git describe" to /dev/null.

Signed-off-by: Anup Patel <anup.pate@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agolib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR
Anup Patel [Sun, 18 Aug 2019 07:44:44 +0000 (13:14 +0530)]
lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR

For platforms not having TIME CSR, we trap-n-emulate TIME CSR
read/write in OpenSBI. Same rationale applies to HTIMEDELTA CSR
as well so we trap-n-emulate HTIMEDELTA CSR for platforms not
having TIME CSR.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agoinclude: Extend get_insn() to read instruction from VS/VU mode
Anup Patel [Sat, 17 Aug 2019 15:24:40 +0000 (20:54 +0530)]
include: Extend get_insn() to read instruction from VS/VU mode

Current implementation of get_insn() is not suitable for reading
instruction from VS/VU mode because we have to set SSTATUS_MXR bit
in VSSTATUS CSR for reading instruction from VS/VU mode.

This patch extends get_insn() to read instruction from VS/VU mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
5 years agolib: Redirect WFI trapped from VS/VU mode to HS-mode
Anup Patel [Fri, 5 Apr 2019 12:47:11 +0000 (18:17 +0530)]
lib: Redirect WFI trapped from VS/VU mode to HS-mode

The WFI will trap as illegal instruction trap when executed
in VS/VU mode so we just forward/redirect it to HS-mode so
that hypervisor can deal with it appropriately.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Extend sbi_trap_redirect() for hypervisor extension
Anup Patel [Mon, 15 Apr 2019 06:23:31 +0000 (11:53 +0530)]
lib: Extend sbi_trap_redirect() for hypervisor extension

When hypervisor extension is available, we can get traps from VS/VU
modes. We should be able to force redirect some of these traps to
HS-mode. In other words, we should be able forward traps from VS/VU
mode to HS-mode using sbi_trap_redirect() hence this patch.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
5 years agolib: Extend sbi_hart_switch_mode() to support hypervisor extension
Anup Patel [Fri, 5 Apr 2019 08:38:57 +0000 (14:08 +0530)]
lib: Extend sbi_hart_switch_mode() to support hypervisor extension

This patch extends sbi_hart_switch_mode() to support entering
VS/VU modes when hypervisor extension is available.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Delegate supervisor ecall to HS-mode when H extension available
Anup Patel [Fri, 5 Apr 2019 07:47:42 +0000 (13:17 +0530)]
lib: Delegate supervisor ecall to HS-mode when H extension available

When hypervisor extension is available, we only handle hypervisor
ecalls coming from HS-mode and we let hypervisor handle ecalls coming
from VS-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agoWrite MSIP by using memory-mapped control register
Zong Li [Fri, 27 Sep 2019 03:14:02 +0000 (20:14 -0700)]
Write MSIP by using memory-mapped control register

The machine-level MSIP bits are written by accesses to memory-mapped
control registers. Only use CSR instruction for SSIP and USIP.

There is no effect that using CSR instruction to write MSIP when testing
on unleashed board and QEMU.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Fix tlb flush range limit value
Atish Patra [Fri, 27 Sep 2019 01:34:17 +0000 (18:34 -0700)]
lib: Fix tlb flush range limit value

Use platform defined flush range limit value only if it is non-zero.
Otherwise, use the default value.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agokendryte/k210: remove unused file
Damien Le Moal [Thu, 26 Sep 2019 17:45:00 +0000 (02:45 +0900)]
kendryte/k210: remove unused file

Commit 9dfe72057957 ("kendryte/k210: remove sysctl code") missed
removing the file sysctl.c. Fix this here.

Fixes: 9dfe72057957 ("kendryte/k210: remove sysctl code")
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agodocs: platform: Update descriptions for qemu/sifive_u support
Bin Meng [Mon, 23 Sep 2019 12:49:15 +0000 (05:49 -0700)]
docs: platform: Update descriptions for qemu/sifive_u support

With QEMU v4.2 release that has improved the emulation fidelity
of 'sifive_u' machine, OpenSBI v0.4 / U-Boot v2019.10-rc1 / Linux
kernel v5.3-rc2 images built for the SiFive HiFive Unleashed board
can be used out of the box without any special hack.

Update our documents to mention 'qemu/sifive_u' platform should
only be used with QEMU v4.1 or before, and it will be dropped
sometime in the future release.

Going forward, 'sifive/fu540' platform can be used on both real
hardware and QEMU v4.2+ 'sifive_u' machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: provide a platform specific tlb range flush threshold
Atish Patra [Tue, 10 Sep 2019 10:40:38 +0000 (03:40 -0700)]
lib: provide a platform specific tlb range flush threshold

Currently, the tlb range flush threshold is fixed and set to 4k for
all platforms. However, it should be platform specific as it completely
depends upon how platform actually implements sfence instruction.

Define a platform feature that allows every individual platform to set
different values. If a platform doesn't define it, just use a page size as
the threshold.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Change tlb range flush threshold to 4k page instead of 1G
Atish Patra [Tue, 10 Sep 2019 10:40:37 +0000 (03:40 -0700)]
lib: Change tlb range flush threshold to 4k page instead of 1G

In RISC-V, tlb flush happens at a page granularity. That's why OpenSBI
also have a tlb range flush limit which decides the which tlb flush
requests should be upgraded to full flush to avoid long delays.
Currently, this is set to 1G which would result in a many sfence.vma
execution in a tight loop for a large range.

Change the threshold to 4k to speed things up.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agoREADME: Update license information
Damien Le Moal [Wed, 4 Sep 2019 04:27:29 +0000 (13:27 +0900)]
README: Update license information

With the Kendryte K210 platform code cleanup, none of the code copied
from Kendryte standalone SDK remains and this platform code is now
entirely licensed under OpenSBI BSD-2-clause license. Update the
README.md and ThirdPartyNotices.md files to reflect this.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agokendryte/k210: remove sysctl code
Damien Le Moal [Wed, 4 Sep 2019 04:27:28 +0000 (13:27 +0900)]
kendryte/k210: remove sysctl code

Directly implement frequency discovery, making the sysctl code
unnecessary. While at it, Move all macro definitions from platform.c
into platform.h and cleanup that file, removing the need for the
Apache 2.0 license and Canaan Inc copyright.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agokendryte/k210: Use sifive UART driver
Damien Le Moal [Wed, 4 Sep 2019 04:27:27 +0000 (13:27 +0900)]
kendryte/k210: Use sifive UART driver

The Kendryte K210 UARTHS is compatible with SiFive UART. So use the
sifive uart driver and remove the k210 uarths platform code.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agodocs: Update the fu540 platform guide as per U-Boot documents.
Atish Patra [Thu, 29 Aug 2019 22:19:14 +0000 (15:19 -0700)]
docs: Update the fu540 platform guide as per U-Boot documents.

U-Boot readme for fu540 platform suggest that fdt_addr_r should be used
as DT address after DT is copied via tftpboot.

Update the OpenSBI docs to reflect that. Remove other stale informations
as well.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Upgrade to full flush if size is at least threshold
Atish Patra [Thu, 29 Aug 2019 22:19:13 +0000 (15:19 -0700)]
lib: Upgrade to full flush if size is at least threshold

Currently, we upgrade to a full tlb flush only If a tlb flush request
size is greater than the threshold. This is done as sfence in RISC-V
can only flush 4KB at a time. Doing a large number of flushes page by
page impacts the performance. It is better to do a full tlbflush if the
request size is at least equal to the threshold size.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Support atomic swap instructions
Atish Patra [Thu, 29 Aug 2019 22:19:12 +0000 (15:19 -0700)]
lib: Support atomic swap instructions

If compiler supports riscv atomic instructions, we should
use them instead of legacy gcc built-in macros
__sync_lock_test_and_set in atomic exchange functions.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Fix timer for 32 bit
Atish Patra [Thu, 29 Aug 2019 22:19:11 +0000 (15:19 -0700)]
lib: Fix timer for 32 bit

To read 64bit time in 32 bit we have to read lower & upper half
separately and 'or' them together. However, upper half time may
have changed by the time we read lower half. Thus, the resultant
64 bit time may not be accurate.

Consider lower half time value only if upper half time value has
not changed.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agoscripts: Add AE350 to platform list in the binary archive script
Nylon Chen [Thu, 29 Aug 2019 03:03:56 +0000 (11:03 +0800)]
scripts: Add AE350 to platform list in the binary archive script

This patch adds Andes AE350 to RV64 platform list in the binary
archive script.

Signed-off-by: Nylon Chen <nylon7@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agoplatform: Add Andes AE350 initial support
Nylon Chen [Thu, 18 Jul 2019 07:52:25 +0000 (15:52 +0800)]
platform: Add Andes AE350 initial support

This commit provides basic support for the AE350 platform.

Signed-off-by: Zong Li <zongbox@gmail.com>
Signed-off-by: Nylon Chen <nylon7@andestech.com>
5 years agoInclude `git describe` in OpenSBI
Palmer Dabbelt [Sat, 17 Aug 2019 14:11:09 +0000 (19:41 +0530)]
Include `git describe` in OpenSBI

OpenSBI includes a version, but that is only updated when tagged.  For
users that are using the git releases we instead end up with an
ambiguous version number, which makes it hard to figure out what
everyone is using.  This patch checks for a git directory and prints out
the result of `git describe`, which is a mix of pretty and unambiguous.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoplatform: Remove the ipi_sync method from all platforms.
Atish Patra [Thu, 15 Aug 2019 01:02:15 +0000 (18:02 -0700)]
platform: Remove the ipi_sync method from all platforms.

OpenSBI manages outstanding TLB flush requests by queueing
them in a fifo synchronously. An ipi sync which uses an
atomic operation on MMIO address is no longer required.

Remove the ipi sync method from platform header and all usage.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Fix race conditions in tlb fifo access.
Atish Patra [Thu, 15 Aug 2019 01:02:14 +0000 (18:02 -0700)]
lib: Fix race conditions in tlb fifo access.

Linux kernel expects tlb flush SBI call to be completely synchronous i.e.
the SBI call should only return once corresponding *fence* instruction is
executed.

OpenSBI manages the outstanding TLB flush requests by keeping them in a
per hart based fifo. However, there are few corner cases that may lead to
race conditions while updating the fifo.

Currently, the caller hart waits for IPI acknowledgement via clint
address which is not a very good method as synchronization on MMIO may not
be supported in every platform. Moreover, the waiter doesn't have any way of
identifying if the IPI is received for specific tlb flush request or any
other IPI. This may lead to unpredictable behavior in supervisor/user space.

Fix this by waiting on individual fifo entries rather than MMIO address.
Currently, a relaxed loop is being used because wfi again involves MMIO write
which would be slower compared to relaxed loop. To avoid deadlock, fifo
is processed every time a hart loops for fifo enqueue or fifo sync to consume
the tlb flush requests sent by other harts.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Provide an atomic exchange function unsigned long
Atish Patra [Thu, 15 Aug 2019 01:02:13 +0000 (18:02 -0700)]
lib: Provide an atomic exchange function unsigned long

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Handle traps when doing unpriv load/store in get_insn()
Anup Patel [Mon, 12 Aug 2019 06:20:22 +0000 (11:50 +0530)]
lib: Handle traps when doing unpriv load/store in get_insn()

We can get a page/access trap when doing unpriv load/store in
get_insn() function because on a SMP system Linux swapper running
on HART A can unmap pages from page table used by HART B.

To tackle this we extend get_insn() implementation so that if
we get trap in get_insn() then we redirect it to S-mode as fetch
page/access fault.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agofirmware: do not use relocated _boot_status before it is valid
Lukas Auer [Mon, 12 Aug 2019 21:50:42 +0000 (23:50 +0200)]
firmware: do not use relocated _boot_status before it is valid

When OpenSBI is started from an address not equal to the link address,
it is first relocated to the link address. Hart 0 performs the
relocation and notifies the other harts of its completion with the
_boot_status variable. It uses the copy of the variable relative to the
link address. This copy contains valid data only after relocation has
finished. The waiting harts will therefore read invalid data until
relocation has finished. This can cause them to continue execution too
early.

Fix this by using the _boot_status variable relative to the load address
while OpenSBI has not finished relocation.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Correct null pointer check
Jacob Garber [Fri, 9 Aug 2019 23:14:00 +0000 (17:14 -0600)]
lib: Correct null pointer check

In order to prevent a possible null pointer dereference, return early if
either one of 'in' or 'data' is null.

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Prevent unintended sign extensions
Jacob Garber [Fri, 9 Aug 2019 23:13:59 +0000 (17:13 -0600)]
lib: Prevent unintended sign extensions

In the last argument to sbi_memset() we essentially have the following
multiplication:

    size_t = u16 * u16

Due to C's integer semantics, both u16's are implicitly converted to int
before the multiplication, which cannot hold all possible values of a
u16 * u16. If the multiplication overflows, the intermediate result will
be a negative number. On 64-bit platforms, this will be sign-extended to
a huge integer in the conversion to a u64 (aka size_t). Being the size
argument to sbi_memset(), this could potentially cause a large
out-of-bounds write. The solution is to manually cast one of the u16 to
a size_t, which will make it large enough to avoid the implicit
conversion and any overflow.

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Use correct type for return value
Jacob Garber [Fri, 9 Aug 2019 23:13:58 +0000 (17:13 -0600)]
lib: Use correct type for return value

The error check 'plic_off < 0' does nothing, since plic_off is stored as
a u32. Fix this by changing it to an int, which matches the return type of
fdt_node_offset_by_compatible().

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Use bitwise & instead of boolean &&
Jacob Garber [Fri, 9 Aug 2019 23:13:57 +0000 (17:13 -0600)]
lib: Use bitwise & instead of boolean &&

!(mipval && MIP_MSIP) simplifies to !mipval, which checks if the entire
variable is zero, not just a single bit. Fix this to use bitwise &
instead.

Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Use sbi_dprintf() for invalid CSRs
Anup Patel [Thu, 8 Aug 2019 06:48:22 +0000 (12:18 +0530)]
lib: Use sbi_dprintf() for invalid CSRs

We should sbi_dprintf() instead of sbi_printf() for invalid CSRs
because we are forwarding invalid CSR access back to S-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agolib: Introduce sbi_dprintf() API
Anup Patel [Thu, 8 Aug 2019 06:40:22 +0000 (12:10 +0530)]
lib: Introduce sbi_dprintf() API

This patch introduces new sbi_dprintf() API for runtime debug
prints. The sbi_dprintf() will print to console for a given
HART only when SBI_SCRATCH_DEBUG_PRINTS option in enabled in
sbi_scratch for this HART.

We can now add debug prints using sbi_dprintf() at important
places in OpenSBI sources. These debug prints will only show
up when previous booting stage or compile time parameter sets
the SBI_SCRATCH_DEBUG_PRINTS option in scratch space.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agofirmware: Use macro instead of magic number for boot status
Bin Meng [Thu, 8 Aug 2019 08:59:31 +0000 (01:59 -0700)]
firmware: Use macro instead of magic number for boot status

The boot status is currently hard-coded. Define some macros for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agoplatform: sifive: fu540: Expand FDT size before any patching
Bin Meng [Thu, 8 Aug 2019 07:20:23 +0000 (00:20 -0700)]
platform: sifive: fu540: Expand FDT size before any patching

We should expand the FDT size before any patching, otherwise it's
possible the "status" fix up might fail due to insufficient space.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
5 years agofirmware: Fix the loop condition of _wait_relocate_copy_done section
Nylon Chen [Fri, 2 Aug 2019 05:34:42 +0000 (13:34 +0800)]
firmware: Fix the loop condition of _wait_relocate_copy_done section

If core-0 have finished _fdt_reloc_done but any of other cores has not
yet left the loop in _wait_relocate_copy_done, they could never leave
the loop because _boot_status is not equal to 1.

5 years agolib: Allow compiling without FP support
Anup Patel [Thu, 25 Jul 2019 05:05:03 +0000 (05:05 +0000)]
lib: Allow compiling without FP support

Currently, we mandate 'F' and 'D' extension in riscv_fp.h so that
misaligned load/store emulation has access to FP registers.

The above is too restrictive and we should certainly allow compilation
for soft-FP toolchains and explicit PLATFORM_RISCV_ISA not having 'F'
and 'D' extensions.

This patch extends riscv_fp.h and misaligned load/store emulation to
allow compiling OpenSBI without FP support.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agotreewide: Use conventional names for 32-bit and 64-bit
Bin Meng [Wed, 24 Jul 2019 04:29:59 +0000 (21:29 -0700)]
treewide: Use conventional names for 32-bit and 64-bit

There are several places in the source tree that have:

  32bit, 32 bit, 64bit, 64 bit

Fix by using the conventional names with a hyphen.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoREADME: Document 32-bit / 64-bit images build
Bin Meng [Wed, 24 Jul 2019 04:29:58 +0000 (21:29 -0700)]
README: Document 32-bit / 64-bit images build

At present the exact details of building 32-bit or 64-bit OpenSBI
images are missing in the docs. This adds the missing part.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoutils: Use cpu_to_fdt32() when writing to fdt
Georg Kotheimer [Wed, 24 Jul 2019 09:38:14 +0000 (11:38 +0200)]
utils: Use cpu_to_fdt32() when writing to fdt

Although it does not make a functional difference, both cpu_to_fdt32()
and fdt32_to_cpu() pass on to CPU_TO_FDT32, we should use cpu_to_fdt32()
to be semantically correct.

Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoplatform: sifive/fu540: Move FDT further up
Anup Patel [Mon, 22 Jul 2019 05:16:28 +0000 (05:16 +0000)]
platform: sifive/fu540: Move FDT further up

This patch changes FW_xyz_FDT_ADDR to RAM_START+128MB (i.e. 0x88000000)
so that next stage bootloader (i.e. U-Boot) has enough space to unpack
bigger kernel images.

Reported-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
5 years agoplatform: sifive: fu540: Use standard value string for cpu node status
Bin Meng [Fri, 5 Jul 2019 02:30:50 +0000 (19:30 -0700)]
platform: sifive: fu540: Use standard value string for cpu node status

Per device tree spec, the standard value string for the "status"
property of a cpu node is either "okay" or "disabled". "masked"
was once used but it is unfortunately a spec violation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoinclude: Bump-up version to 0.4
Anup Patel [Tue, 2 Jul 2019 05:41:08 +0000 (11:11 +0530)]
include: Bump-up version to 0.4

This patch updates OpenSBI version to 0.4 as part of
release preparation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agoplatform: Remove the HiFive Unleashed expansion board DT.
Atish Patra [Tue, 2 Jul 2019 02:47:33 +0000 (19:47 -0700)]
platform: Remove the HiFive Unleashed expansion board DT.

The Linux kernel will maintain the device tree (DT) for HiFive Unleashed
from release v5.2-rc6. This DT is incompatible with previous DT
present for Microsemi expansion board in OpenSBI.

Since, OpenSBI will directly load the pre-built DTB from kernel now onwards,
no need to keep the out-of-date DT in openSBI. Remove this DT and
it's related documentation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agofirmware: For no relocation skip two stage wait for secondary HARTs
Anup Patel [Mon, 1 Jul 2019 03:24:13 +0000 (08:54 +0530)]
firmware: For no relocation skip two stage wait for secondary HARTs

When relocation is not required (i.e. _load_start == _link_start), we
can skip two stage wait for secondary HARTs. This means secondary HARTs
can skip the _wait_relocate_copy_done() loop and directly jump to the
_wait_for_boot_hart() loop when no relocation not required.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agoscripts: Add Ariane FPGA to platform list in binary archive script
Anup Patel [Sun, 30 Jun 2019 06:33:40 +0000 (12:03 +0530)]
scripts: Add Ariane FPGA to platform list in binary archive script

This patch adds Ariane FPGA to RV64 platform list in the binary
archive script.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agodocs: Update the fu540 platform guide for new DT.
Atish Patra [Sat, 29 Jun 2019 01:00:15 +0000 (18:00 -0700)]
docs: Update the fu540 platform guide for new DT.

With 5.2-rc6 release, Linux kernel hosts the DT for Unleashed board
which is incompatible with the default DT from FSBL.

Update the document to use the DT from kernel.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoinclude: Add firmware context to sbi_platform
Abner Chang [Sat, 29 Jun 2019 14:10:47 +0000 (19:40 +0530)]
include: Add firmware context to sbi_platform

Add firmware context field struct sbi_platform to carry firmware
specific information.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoinclude: Add version info to struct sbi_platform
Abner Chang [Sat, 29 Jun 2019 08:18:05 +0000 (16:18 +0800)]
include: Add version info to struct sbi_platform

Add version control of sbi_platform structure
- Add opensbi_version, this gives information of opensbi revision on
which the sbi_platform table was created.
- Add platform_version field in sbi_platform structure for platform
level version control.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoinclude: Move callbacks in sbi_platform to separate struct
Abner Chang [Sat, 29 Jun 2019 08:18:04 +0000 (16:18 +0800)]
include: Move callbacks in sbi_platform to separate struct

Move platform opensbi functions to sbi_platform_operations structure.
Both sbi_platform and sbi_platform_operations structures are maintained
by platform vendors.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoAdd documentation for Ariane FPGA platform
Panagiotis Peristerakis [Thu, 27 Jun 2019 15:28:50 +0000 (18:28 +0300)]
Add documentation for Ariane FPGA platform

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
5 years agoAdd support for Ariane FPGA SoC
Panagiotis Peristerakis [Fri, 28 Jun 2019 13:51:52 +0000 (16:51 +0300)]
Add support for Ariane FPGA SoC

This patch adds support for Ariane platform.
We needed to enable PLIC interrupts early(like on BBL) due to some issue of the design.
Otherwise, Linux would not get any external interrupts.

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
5 years agoChanged plic_set_thresh() and plic_set_ie() to public
Panagiotis Peristerakis [Fri, 21 Jun 2019 08:47:35 +0000 (11:47 +0300)]
Changed plic_set_thresh() and plic_set_ie() to public

Signed-off-by: Panagiotis Peristerakis <perister@ics.forth.gr>
5 years agofirmware: Handle overlapping load and link addresses in relocation
Xiang W [Thu, 20 Jun 2019 07:01:10 +0000 (15:01 +0800)]
firmware: Handle overlapping load and link addresses in relocation

The old code may corrupt the code of the waiting hart hence this patch
keeps waiting HART within relocation code range at time of relocation.

Signed-off-by: Xiang W <wxjstz@126.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agodocs: Update docs as per new static library.
Atish Patra [Tue, 18 Jun 2019 21:54:07 +0000 (14:54 -0700)]
docs: Update docs as per new static library.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoutils: Remove tinyfdt.c
Atish Patra [Tue, 18 Jun 2019 21:54:06 +0000 (14:54 -0700)]
utils: Remove tinyfdt.c

tinyfdt.c was originally added to provide a minimal implementation of
fdt parsing. However, we have already included libfdt in OpenSBI for
more complicated operations.

Remove tinfdt and replace its functiolity using libfdt.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoplatform: Enable all drivers by default.
Atish Patra [Tue, 18 Jun 2019 21:54:05 +0000 (14:54 -0700)]
platform: Enable all drivers by default.

The drivers and libfdt are built as libsbiutils.a
instead of libplatsbi.a.

libsbiutils.a are not built per platform specific. Thus,
enable all drivers by default.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Rename string.x to sbi_string.x
Atish Patra [Tue, 18 Jun 2019 21:54:04 +0000 (14:54 -0700)]
lib: Rename string.x to sbi_string.x

All string functions are part of libsbi. It makes more sense
to rename them to sbi_string.x as the libsbi can be linked
with external libraries that can have similar implementation.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agoplatform: Move platform common to lib/utils.
Atish Patra [Tue, 18 Jun 2019 21:54:03 +0000 (14:54 -0700)]
platform: Move platform common to lib/utils.

Currently, platform/common contains platform/non-platform specific
common minimal drivers and libraries. This is helpful is all platforms
are built within opensbi framework.

Move them to lib/utils so that any external platform code also can
reuse the minimalistic drivers or other common libraries.

This patch doesn't introduce any functional changes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Include helper libc functions directly in libsbi.
Atish Patra [Tue, 18 Jun 2019 21:54:02 +0000 (14:54 -0700)]
lib: Include helper libc functions directly in libsbi.

libsbi needs some of the custom libc functions. It should be directly
included in libsbi instead of platform specific libraries.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agolib: Move sbi core library to lib/sbi
Atish Patra [Tue, 18 Jun 2019 21:54:01 +0000 (14:54 -0700)]
lib: Move sbi core library to lib/sbi

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agofirmware: Handle overlapping load and link addresses in relocation
Xiang W [Thu, 13 Jun 2019 07:23:12 +0000 (12:53 +0530)]
firmware: Handle overlapping load and link addresses in relocation

This patch extends relocation to handle overlapping load and link
addresses.

The updated relocation will work fine in most cases except when the
relocate copy loop itself falls in overlapping load and link addresses.

Signed-off-by: Xiang W <wxjstz@126.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
5 years agofirmware: Relocate when load address is not equal to link address
Anup Patel [Fri, 7 Jun 2019 14:56:55 +0000 (20:26 +0530)]
firmware: Relocate when load address is not equal to link address

This patch extends fw_base to relocate to link address whenever
firmware load address is not equal to link address.

The relocation will not work when load start to load end overlap
link start to link end.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
5 years agofirmware: add missing linker sections to fw_base.ldS
Lukas Auer [Tue, 11 Jun 2019 11:11:48 +0000 (13:11 +0200)]
firmware: add missing linker sections to fw_base.ldS

The linker sections .sdata and .sbss are missing from the linker script
fw_base.ldS. Add them to the .data and .bss sections.

On current builds, most variables are in the .sbss section. They are not
correctly initialized to zero, because they are not within the
boundaries indicated by _bss_start and _bss_end. Currently, this does
not cause any issues, however with relocation support lock-ups may occur
due to incorrectly initialized lock variables.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Anup Patel <anup.patel@wdc.com>
5 years agodocs: update CONTRIBUTORS.md
Karsten Merker [Thu, 30 May 2019 18:31:59 +0000 (20:31 +0200)]
docs: update CONTRIBUTORS.md

Add Andreas Schwab to the contributors list.

Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Andreas Schwab <schwab@suse.de>
5 years agodocs: qemu/sifive_u: miscellaneous documentation fixes
Bin Meng [Fri, 17 May 2019 15:49:02 +0000 (08:49 -0700)]
docs: qemu/sifive_u: miscellaneous documentation fixes

- OpenSBI build target should be: qemu/sifive_u
- U-Boot config name should be: sifive_fu540_defconfig

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agoplatform: qemu/sifive_u: Update the hart count to 4
Bin Meng [Fri, 17 May 2019 15:49:01 +0000 (08:49 -0700)]
platform: qemu/sifive_u: Update the hart count to 4

Since QEMU commit 8b1d0714bfdd
"riscv: sifive_u: Allow up to 4 CPUs to be created",
the maximum number of hart for sifive_u is 4.

Change our hart count to match that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Handle page/access fault caused by unpriv load/store
Anup Patel [Thu, 23 May 2019 08:00:58 +0000 (13:30 +0530)]
lib: Handle page/access fault caused by unpriv load/store

The unpriv load/store instruction from M-mode can cause page/access
fault to M-mode if S-mode page table did not have mappings OR it did
not have PMP access permission.

To tackle this, we redirect trap back to S-mode if unpriv load/store
instruction traps in M-mode.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Add per-HART trap info pointer
Anup Patel [Tue, 21 May 2019 11:25:04 +0000 (16:55 +0530)]
lib: Add per-HART trap info pointer

This patch adds per-HART trap info pointer which can be used to
communicate trap information to sbi_trap_handler().

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agoinclude: Make unprivilege load/store functions as non-inline functions
Anup Patel [Tue, 21 May 2019 10:42:33 +0000 (16:12 +0530)]
include: Make unprivilege load/store functions as non-inline functions

Currently, the unprivilege load/store functions are inline functions.

We will be extending these functions to track whether a page/access
fault occurs when we execute unprivilege load/store instruction.

To make things simpler and debugable, we reduce number of places which
can potentially generate a page/access fault by making all unprivilege
load/store functions as regular (non-inline) functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Factor-out TLB management from IPI management
Anup Patel [Fri, 24 May 2019 02:28:05 +0000 (07:58 +0530)]
lib: Factor-out TLB management from IPI management

This patch factor-out TLB management from IPI management to separate
sources sbi_tlb.c and sbi_tlb.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Add a simple brain-dead allocator to manage extra scratch space
Anup Patel [Tue, 21 May 2019 06:21:01 +0000 (11:51 +0530)]
lib: Add a simple brain-dead allocator to manage extra scratch space

We have extra space above scratch space (sbi_scratch) which we are
currently using to manage per-HART IPI data and TLB request management.

In future, more parts of OpenSBI will use the extra scratch space so
it will become difficult to manage extra scratch space using just
defines and macros.

This patch adds a simple brain-dead allocator to manage extra scratch
space. This allocator never expects anything to be free-ed hence it
keeps incrementing to next allocation offset until it runs-out of space.

In future, we can have more sophisticated allocator which will allow
us to re-claim free-ed space and also allows us to track owner of
allocated space.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agolib: Flush everything when remote TLB flush range is too large
Anup Patel [Mon, 20 May 2019 05:50:53 +0000 (11:20 +0530)]
lib: Flush everything when remote TLB flush range is too large

On latest Linux kernel (i.e. 5.2-rc1), we get large TLB flush
request for user space addresses (typically, start=x and end=-1).
This is caused by Linux kernel commit a21344dfc6 ("riscv: fix
sbi_remote_sfence_vma{,_asid}").

It's not practical to execute large number of sfence instructions
for a large TLB flush range because it takes too much time and
eventually causes CPU stall in Linux kernel.

This patch addresses above issue by upgrading TLB flush range to
TLB flush all whenever TLB flush range is greater than 1GB.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agodocs: Add documentation about dynamic firmware
Anup Patel [Mon, 29 Apr 2019 07:20:33 +0000 (12:50 +0530)]
docs: Add documentation about dynamic firmware

This patch adds documenation about dynamic firmware.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
5 years agoplatform: Enable dynamic firmware for appropriate platforms
Anup Patel [Mon, 29 Apr 2019 06:41:06 +0000 (12:11 +0530)]
platform: Enable dynamic firmware for appropriate platforms

This patch enables FW_DYNAMIC option (i.e. dynamic firmware) for
all appropriate/applicable platforms.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>