Gwenole Beauchesne [Mon, 12 Mar 2012 14:30:13 +0000 (15:30 +0100)]
render: fix rendering of interlaced surfaces.
Handle bob-deinterlacing flags passed to vaPutSurface().
i.e. VA_TOP_FIELD|VA_BOTTOM_FIELD.
Avoid advanced deinterlacing kernels as they allocate extra temporary
surfaces, which are useless for such simple tasks. i.e. display either
field of an interlaced surface.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Wed, 14 Mar 2012 15:38:38 +0000 (16:38 +0100)]
h264: fix max header size calculation with EPB.
... aka fix wrong patch applied. For the records, considering header
size without EPB is N, then the max header size with EPB is N * 3/2.
However, it's not possible to reach this value since that would mean
that slice_header() only contained zeroes.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 2 Mar 2012 14:32:02 +0000 (15:32 +0100)]
h264: fix scan for bit offset to macroblock.
Handle two indices in parallel, one relative to the bitstream with
EPB, and the other without EPB.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 13 Mar 2012 15:56:53 +0000 (16:56 +0100)]
h264: fix weight denom for implicit weight tables (SNB).
If weighted_bipred_idc == 2, luma and chroma weight denom (in log2 base)
shall be set to the default value on Sandy Bridge. i.e. 5 as per defined
at 8-279 in AVC specs.
https://bugs.freedesktop.org/show_bug.cgi?id=40820
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 13 Mar 2012 15:46:37 +0000 (16:46 +0100)]
h264: fix weighted prediction indicator (SNB).
Implicit weight tables derivation (weighted_bipred_idc == 2) could
not be set. Only default weight tables were possible instead of
explicit weight tables provided by the codec layer.
https://bugs.freedesktop.org/show_bug.cgi?id=40820
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 1 Mar 2012 17:04:56 +0000 (18:04 +0100)]
h264: fix first macroblock bit offset calculation (ILK, SNB, IVB).
Fix and simplify the scan for emulation_prevention_bytes, thus avoiding
a read beyond the end of the slice data buffer. Besides, if slice_header()
bytes are needed, use dri_bo_get_subdata() instead.
HW specific changes:
- SNB: make the HW skip the emulation prevention bytes itself.
- IVB: fix MFD_AVC_BSD_OBJECT to report the actual slice data buffer size.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 2 Feb 2012 13:42:11 +0000 (14:42 +0100)]
vc1: fix bitplane buffer size (SNB, IVB).
This fixes buffer overflow in the newly allocated Gen buffer that holds
VC-1 bitplanes.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 14 Feb 2012 09:56:20 +0000 (10:56 +0100)]
h264: always submit MFX_QM_STATE for flat scaling lists (IVB).
If codec layer does not provide a VAIQMatrixBufferH264, this means
flat scaling lists shall be used. The MFX_QM_STATE command still has
to be submitted since IVB+ does not have a means to use HW generated
scaling lists.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 14 Feb 2012 13:18:41 +0000 (14:18 +0100)]
jpeg: fix memory leak of huffman tables.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 14 Feb 2012 13:16:31 +0000 (14:16 +0100)]
Fix build with older VA-API (libva).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Tue, 7 Feb 2012 01:27:05 +0000 (09:27 +0800)]
Fix compile error after cherry-pick
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 6 Feb 2012 06:39:08 +0000 (14:39 +0800)]
A workaround for JPEG decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 08:28:37 +0000 (16:28 +0800)]
Fix y offset for Cb/Cr
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:17:13 +0000 (09:17 +0800)]
JPEG component id macros are removed, so don't use them in driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:01:59 +0000 (09:01 +0800)]
Fix frame height/width for YUV400/YUV444/YUV422V_2Y JPEG image
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:00:48 +0000 (09:00 +0800)]
Map JPEG component id to Y, Cb, Cr
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 00:59:09 +0000 (08:59 +0800)]
Render YUV400 image on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 7 Feb 2012 01:19:03 +0000 (09:19 +0800)]
Fix graphics memory allocation for VA surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 12 Jan 2012 05:30:34 +0000 (13:30 +0800)]
use the revised JPEG decoding interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Hai Lan [Wed, 21 Dec 2011 22:03:44 +0000 (06:03 +0800)]
Fix the bug for IVB jpeg decoding
When call i965_BeginPicture for JPEG decoding, Assertion `0' failed.
Signed-off-by: Hai Lan <hai.lan@intel.com>
Xiang, Haihao [Mon, 24 Oct 2011 05:28:42 +0000 (13:28 +0800)]
use the new JPEG decoding interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 7 Sep 2011 08:18:19 +0000 (16:18 +0800)]
i965_drv_video: support JPEG decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 06:15:14 +0000 (14:15 +0800)]
i965_drv_video: Postpone releasing internal buffer.
Also fix memory leak in driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 02:09:15 +0000 (10:09 +0800)]
i965_drv_video: Simplify render buffer function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Tue, 29 Nov 2011 16:26:35 +0000 (17:26 +0100)]
vc1: fix motion vector mode (IVB).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Sun, 29 Jan 2012 18:07:37 +0000 (19:07 +0100)]
h264: fix and simplify REF_IDX_STATE (ILK, SNB, IVB).
Original code was parsing RefPicList0/1 over what is actually available
and filled in, i.e. wrt. num_ref_idx_l0/1_minus1 + 1. Besides, bit 5 of
Reference List Entry set to 1 means a frame, not a field.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 30 Jan 2012 10:05:17 +0000 (11:05 +0100)]
Factor out type definitions (GenFrameStore, GenBuffer).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Thu, 29 Dec 2011 08:27:24 +0000 (16:27 +0800)]
Avoid depending on va_backend.h for some files
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 Jan 2012 06:59:21 +0000 (14:59 +0800)]
Remove legacy DRI support
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 15 Jul 2011 08:33:41 +0000 (16:33 +0800)]
i965_drv_video: check the internal format of a surface before rendering
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 7 Dec 2011 00:43:29 +0000 (08:43 +0800)]
Add support for B43 chipset
B43 is another 4 series chipset like G41/G45
Signed-off-by: Alexander Inyukhin <shurick@sectorb.msk.ru>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Wed, 2 Nov 2011 14:32:32 +0000 (15:32 +0100)]
configure: bump version for development.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 14:32:40 +0000 (16:32 +0200)]
NEWS: add missing entry for auto-generated Debian packaging.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 14:20:23 +0000 (16:20 +0200)]
build: fix make dist when intel-gen4asm is not installed.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 13:43:39 +0000 (15:43 +0200)]
1.0.15.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 13:42:45 +0000 (15:42 +0200)]
debian: don't use simple-patchsys (upstream has no patches).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 13:13:39 +0000 (15:13 +0200)]
i965_drv_video: fix return values to vaRenderPicture().
Undefined status was returned from vaRenderPicture() with no VA buffer.
Likewise, any failure to process a VA buffer could still lead to success.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 12:58:05 +0000 (14:58 +0200)]
build: use AM_V_GEN to generate files quietly.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 12:44:21 +0000 (14:44 +0200)]
build: use GEN4ASM variable to hold path to intel-gen4asm program.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 12:43:39 +0000 (14:43 +0200)]
.gitignore: filter out generated Gen assembly files.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 11 Oct 2011 12:16:31 +0000 (14:16 +0200)]
Fix slice-param & slice-data buffer memory leaks.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 11 Oct 2011 11:12:35 +0000 (13:12 +0200)]
Add new .gitignore rules.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 10 Oct 2011 09:02:57 +0000 (11:02 +0200)]
NEWS: update.
Gwenole Beauchesne [Mon, 10 Oct 2011 09:02:43 +0000 (11:02 +0200)]
configure: bump version for development.
Gwenole Beauchesne [Thu, 6 Oct 2011 12:21:35 +0000 (14:21 +0200)]
vc1: fix TTFRM (picture-level transform type) packing.
Xiang, Haihao [Mon, 19 Sep 2011 07:04:37 +0000 (15:04 +0800)]
decode: fix for next slice when decoding MPEG2 on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Mon, 19 Sep 2011 07:13:25 +0000 (15:13 +0800)]
VAImage.data_size represents the allocated size, thus accounting for
any line size alignment
Gwenole Beauchesne [Tue, 13 Sep 2011 12:14:52 +0000 (20:14 +0800)]
Make MPEG-2 QM state live until the next change from application.
Hi,
This patch fixes MPEG-2 decoding when VAIQMatrixBufferMPEG2 is not submitted
for each frame. i.e. the quantization matrices shall be live until the next
change from the application.
Tested on CTG & SNB only with GStreamer.
I will push the patch to master if the IVB hunk is OK. It should since it's the
same as gen6 code. :)
Note: similar changes may be necessary for other codecs but I will submit them as
I test them on my system.
Regards,
Gwenole.
Gwenole Beauchesne [Thu, 25 Aug 2011 09:54:20 +0000 (11:54 +0200)]
Add correct version info for vaQueryVendorString().
Gwenole Beauchesne [Thu, 25 Aug 2011 09:42:27 +0000 (11:42 +0200)]
Add debian packaging.
Gwenole Beauchesne [Wed, 24 Aug 2011 14:59:38 +0000 (16:59 +0200)]
Fix H.264 MC kernel bootstrap for Ironlake.
Gwenole Beauchesne [Mon, 22 Aug 2011 15:27:28 +0000 (17:27 +0200)]
Fix make dist.
Gwenole Beauchesne [Mon, 22 Aug 2011 14:18:45 +0000 (16:18 +0200)]
New project build rules and files.
Gwenole Beauchesne [Mon, 22 Aug 2011 09:18:04 +0000 (11:18 +0200)]
Moved files around.
Gwenole Beauchesne [Tue, 26 Jul 2011 11:48:25 +0000 (19:48 +0800)]
i965_drv_video: don't export internal driver functions.
Make sure to use our internal functions. In particular, we override
some DRM functions and they have to be used. e.g. this fixes VA/GLX.
Gwenole Beauchesne [Wed, 20 Jul 2011 11:10:08 +0000 (13:10 +0200)]
i965_drv_video: cosmetics (cleanup Makefile).
Xiang, Haihao [Tue, 12 Jul 2011 07:28:29 +0000 (15:28 +0800)]
i965_drv_video: update post processing interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 8 Jul 2011 02:54:31 +0000 (10:54 +0800)]
i965_drv_video: fixes assertion failure
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 7 Jul 2011 07:55:58 +0000 (15:55 +0800)]
i965_drv_video: fix next slice vertical position for field picture
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=38628
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Tue, 28 Jun 2011 01:30:21 +0000 (18:30 -0700)]
i965_drv_video: add support for VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD.
Gwenole Beauchesne [Tue, 28 Jun 2011 04:19:51 +0000 (21:19 -0700)]
i965_drv_video: fix subpicture scale factor for Y axis.
Gwenole Beauchesne [Tue, 28 Jun 2011 00:02:58 +0000 (17:02 -0700)]
i965_drv_video: simplify put_surface() and put_subpicture() args.
Xiang, Haihao [Wed, 15 Jun 2011 01:11:26 +0000 (09:11 +0800)]
i965_drv_video: fix assertion failure
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 14 Jun 2011 01:49:44 +0000 (09:49 +0800)]
i965_drv_video: fix GPU hang issue when decoding field coded MPEG2 picture.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Edgar Hucek [Mon, 13 Jun 2011 05:43:37 +0000 (13:43 +0800)]
i965_drv_video: fix memory leaks in i965 driver
Signed-off-by: Edgar Hucek <gimli@dark-green.com>
Xiang, Haihao [Mon, 13 Jun 2011 04:46:16 +0000 (12:46 +0800)]
i965_drv_video: track the internal format of a surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 10 Jun 2011 02:48:16 +0000 (10:48 +0800)]
i965_drv_video: encode on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 9 Jun 2011 08:22:03 +0000 (16:22 +0800)]
i965_drv_video: fix VME shaders
1. The response length for inter type on Ivybridge is 6.
2. fix register region
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 9 Jun 2011 05:13:24 +0000 (13:13 +0800)]
i965_drv_video: new shaders for VME on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 9 Jun 2011 01:56:16 +0000 (09:56 +0800)]
i965_drv_video: set surface base address in VME
It is easy to fill the binding table without relocation and make sure
all offsets in binding table only uses bits[15:0]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 26 May 2011 02:33:47 +0000 (10:33 +0800)]
i965_drv_video: clean up
Don't emit PIPE_CONTROL directly, instead call intel_batchbuffer_emit_mi_flush.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Alexander Osin [Tue, 7 Jun 2011 18:35:33 +0000 (22:35 +0400)]
i965_drv_video: Added check of obj_surface->bo field inside i965_media_h264_surface_state()
Zhou Chang [Wed, 1 Jun 2011 08:01:14 +0000 (16:01 +0800)]
i965_drv_video: improved MV quality for VME
Xiang, Haihao [Wed, 25 May 2011 06:14:42 +0000 (14:14 +0800)]
i965_drv_video: clean up codes
Check and allocate surface BO in a same function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 04:55:46 +0000 (12:55 +0800)]
i965_drv_video: rendering for Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 01:32:50 +0000 (09:32 +0800)]
i965_drv_video: new shaders for rendering on Ivybridge
SEND on Ivybridge uses GRFs instead of MRFs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 01:27:07 +0000 (09:27 +0800)]
i965_drv_video: VC1 decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 01:24:08 +0000 (09:24 +0800)]
i965_drv_video: H.264 & MPEG2 decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 17 May 2011 09:00:22 +0000 (17:00 +0800)]
i965_drv_video: Ivybridge PCI IDs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 16 May 2011 01:49:01 +0000 (09:49 +0800)]
i965_drv_video: thread safety for object allocation
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 13 May 2011 07:45:22 +0000 (15:45 +0800)]
i965_drv_vidoe: thread safety for rendering
Xiang, Haihao [Fri, 13 May 2011 05:17:58 +0000 (13:17 +0800)]
i965_drv_video: move batchbuffer to context
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 12 May 2011 08:00:30 +0000 (16:00 +0800)]
i965_drv_video: clean up batchbuffer interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 May 2011 05:06:22 +0000 (13:06 +0800)]
i965_drv_video: store post process parameters in context
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 May 2011 04:52:05 +0000 (12:52 +0800)]
i965_drv_video: store kernel info in the corresponding context
Xiang, Haihao [Tue, 10 May 2011 04:45:56 +0000 (12:45 +0800)]
i965_drv_video: use the same structure for all kernels
Xiang, Haihao [Tue, 10 May 2011 04:49:54 +0000 (12:49 +0800)]
i965_drv_video: create media_state per context
Also clean up some codes
Alexander I Osin [Thu, 28 Apr 2011 15:52:55 +0000 (18:52 +0300)]
Implemented i965_LockSurface, i965_UnlockSurface, i965_BufferInfo
Alexander I Osin [Thu, 28 Apr 2011 15:53:55 +0000 (18:53 +0300)]
Added locked_image_id in struct object_surface
Xiang, Haihao [Tue, 26 Apr 2011 08:10:22 +0000 (16:10 +0800)]
Merge branch 'snb-encoder'
Xiang, Haihao [Tue, 26 Apr 2011 05:26:38 +0000 (13:26 +0800)]
i965_drv_video/encode: offset for coded buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 05:23:09 +0000 (13:23 +0800)]
i965_drv_video/encode: indentation fix
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 05:09:03 +0000 (13:09 +0800)]
i965_drv_video/encode: media read with sampler cache
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 04:15:15 +0000 (12:15 +0800)]
i965_drv_video/video: set base address for MV data
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 02:20:59 +0000 (10:20 +0800)]
i965_drv_video/encode: merge global symbols in intra/inter shader
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 02:01:02 +0000 (10:01 +0800)]
i965_drv_video/encode: remove all intra data in inter shader
Need to revert this commit if select inter-intra mixed mode for P/B frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:53:25 +0000 (09:53 +0800)]
i965_drv_video: clean up gen6_mfc_avc_pipeline_programing
don't need to map VME output for inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:43:11 +0000 (09:43 +0800)]
i965_drv_video/encode: merge the object command for intra/inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:37:20 +0000 (09:37 +0800)]
i965_drv_video/encode: also simplify the object command for inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:30:32 +0000 (09:30 +0800)]
i965_drv_video/encode: reduce inline data for inter shader
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>