freedreno/registers: Add regs for a690

New regs needed on kernel side.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>

freedreno/registers: Schema validation for gen_header.py

Lets catch issues at build time, and not relying on someone remembering
to run the unit tests.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>

freedreno: Nerf strict-aliasing warning for all of gcc

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>

radv: allow to cache optimized (LTO) pipelines with GPL

This should be working now, except PS epilogs that are still not
added to the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>

radv: keep track of the retained NIR shaders sha1 for LTO pipelines

Otherwise the per pipeline cache key doesn't consider shaders at all
when they are imported from libs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>

radv: determine if a graphics pipeline needs a noop FS earlier

Also introduce a helper.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>

radv: fix the error code when the driver fails to create a PS epilog

It would have been returned VK_SUCCESS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>

radv/rt: place any-hit scratch vars after intersection scratch vars

If both, any-hit and intersection shader, use scratch vars,
it could happen that they end up in the same location and
overwrite each other.
Found by inspection.

Fixes: c3d82a962217def9b9f7e1f4c5ce0a450b97e9c7 ('radv: Add pass to lower anyhit shader into an intersection shader.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21863>

intel/dev: Enable MTL PCI ids

Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18481>

radv: avoid a huge memset in radv_graphics_pipeline_compile()

this has a noticeable impact on pipeline creation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>

radv: zero-initialize radv_shader_info earlier for graphics pipeline

This should allow us to remove a big memset when compiling a
graphics pipeline. This is mostly for imported NIR stages which
don't go through radv_pipeline_stage_init().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>

radv: zero-initialize radv_shader_args right before declaring them

This should allow us to remove a big memset when compiling a
graphics pipeline. This is mostly for imported NIR stages which
don't go through radv_pipeline_stage_init().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>

radv: delete radv_graphics_pipeline_compile() asserts

validation should catch these by now

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>

pps: Fix build errors.

In file included from ../src/tool/pps/pps_device.cc:10:
../src/tool/pps/pps_device.h:23:11: error: ‘uint32_t’ does not name a type
   23 |    static uint32_t device_count();
      |           ^~~~~~~~

In file included from ../src/tool/pps/pps_counter.cc:10:
../src/tool/pps/pps_counter.h:22:4: error: ‘uint32_t’ does not name a type
   22 |    uint32_t id;
      |    ^~~~~~~~

Fixes: 1cc72b2aef8 ("pps: Gfx-pps v0.3.0")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8186
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21714>

glthread: qualify the *cmd unmarshal parameter with restrict

This seems like a logical thing to do. Clearly the memory can't be
accessed with any other pointer.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>

mesa: put dispatch table initialization into one place

We have 3 new/changed functions with this commit:
1. _mesa_alloc_dispatch_tables creates all dispatch tables that are not
   created on demand and sets them to nop. This operates on gl_dispatch,
   so it's reusable (e.g. glthread will want to use it)
2. _mesa_free_dispatch_tables frees everything
3. _mesa_initialize_dispatch_tables initializes gl_dispatch for GL
   (not glthread)

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>

mesa: rename CurrentClientDispatch to GLApi

I like this more. The name self-documents itself. It's always equal
to the dispatch set in glapi.

GLAPI is a definition, so can't use that.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>

mesa: move ctx->Table -> ctx->Dispatch.Table except Client & MarshalExec

There is a new struct gl_dispatch, which I'd like to reuse in glthread.
This allows building code around gl_dispatch that can be shared between
mesa and glthread. This is only refactoring.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>

glapi: inline the meson list files_mapi_util

so that people can easily tell where these files are used by searching
for the file names in the meson files.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>

glapi: move files specific to shared-glapi into the shared-glapi subdirectory

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>

ci/clover: disable the jobs

Prepare for Clover removal; don't waste resources on Clover anymore.

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21865>

aco/spill: allow for disconnected CFG

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>

aco/insert_exec_mask: allow for disconnected CFG

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>

aco/dead_code_analysis: don't add artificial uses to p_startpgm

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>

aco/value_numbering: clear hashmap between disconnected CFGs

There is no dominance-relationship between two disconnected CFGs,
thus no CSE is possible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>

aco/dominance: set immediate dominator for any BB without predecessors

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>

CI: Disable mingw job

mingw just hangs somewhere in Meson, with a totally unclear cause, when
trying to run winepath:

Program winepath found: YES (/usr/bin/winepath)
Running command: /usr/bin/winepath -w /builds/mesa/mesa/_build/src/util/process_test.exe
[... hangs forever ...]

root          27  0.0  0.0   4044  3232 ?        S    17:10   0:00 bash .gitlab-ci/meson/build.sh
root          35  0.0  0.0 2811920 55800 ?       Sl   17:10   0:00 Xvfb :0 -screen 0 1024x768x16
root          40  0.1  0.0  45484 40740 ?        S    17:10   0:00 /usr/bin/python3 /usr/local/bin/meson setup _build --native-file=native.file --wrap-mode=nofallback --force-fallback-for perfetto -D prefix=/builds/mesa/mesa/install -D libdir=lib -D buildtype=debug -D build-tests=true -D c_args=-Wno-error=format -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=sign-compare -Wno-error=narrowing -D cpp_args=-Wno-error=format -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=sign-compare -Wno-error=narrowing -D enable-glcpp-tests=false -D libunwind=disabled -D gallium-opencl=icd -D gallium-rusticl=false -D opencl-spirv=true -D microsoft-clc=enabled -D static-libclc=all -D llvm=enabled -D gallium-va=enabled -D video-codecs=h264dec,h264enc,h265dec,h265enc,vc1dec -D gallium-drivers=swrast,d3d12,zink -D vulkan-drivers=swrast,amd,microsoft-experimental -D video-codecs=h264dec,h264enc,h265dec,h265enc,vc1dec -D werror=true -D min-windows-version=7 -D spirv-to-dxil=true -D gles1=enabled -D gles2=enabled -D osmesa=true -D cpp_rtti=true -D shared-glapi=enabled -D zlib=enabled --cross-file=.gitlab-ci/x86_64-w64-mingw32
root        1366  0.0  0.0      0     0 ?        Z    17:10   0:00 [winepath.exe] <defunct>
root        1375  0.0  0.0   8544  7188 ?        Ss   17:10   0:00 /usr/lib/wine/wineserver64 -p0
root        1381  0.0  0.0 2018764 11080 ?       Ssl  17:10   0:00 C:\windows\system32\services.exe
root        1384  0.0  0.0 1821312 10044 ?       Sl   17:10   0:00 C:\windows\system32\plugplay.exe
root        1386  0.0  0.0 1856096 23016 ?       Sl   17:10   0:00 C:\windows\system32\explorer.exe /desktop
root        1393  0.0  0.0 1822712 11000 ?       Sl   17:10   0:00 C:\windows\system32\winedevice.exe
root        1402  0.0  0.0 1778832 21456 ?       S    17:10   0:00 winedbg --auto 26 80
root        1405  0.0  0.0 1891516 12192 ?       Sl   17:11   0:00 C:\windows\system32\winedevice.exe

Disable it until we can figure it out.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21864>

CI: Disable Windows runners

They are currently being rebuilt, with no firm ETA for their return.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21864>

Revert "ci: Disable Collabora LAVA farm"

This reverts commit c1aa876747a37d42b67ff1f53675890b05b40d1a.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21864>

fix: gallivm: fix LLVM #include of Host.h, moved to TargetParser

Upstream moved Host.h from Support to TargetParser in LLVM 17.

This shouldn't lead to a FTBFS, since there is a forwarding include left
behind. Sadly the added deprecation warning #pragma is invalid and thus
causes a build failure right away. But since we would have to follow the
move anyway in the future, just do it right away.

Reference: https://github.com/llvm/llvm-project/commit/d768bf994f508d7eaf9541a568be3d71096febf5
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: #8275
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21263>

radv/rt: Properly handle pNext of pipeline library stages

Fixes
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.non_graphics.shader_module_info_rt_lib.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21707>

vulkan: Add vk_shader_module_init

This will be used for allocating shader modules using ralloc by RADV.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21707>

radv/rt: Use vk_pipeline_hash_shader_stage for RT stages

Fixes
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.non_graphics.shader_module_info_rt.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21707>

ci/iris: update apl and glk expectations, after enabling Wayland support

After enabling the Wayland platform for x86_64,
multiple new tests were triggered, some of which timed out.

Also wayland-dEQP-EGL.functional.negative_api.create_pixmap_surface now pass.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21786>

ci: build Wayland support for the amd64

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21786>

agx: Lower discard late

Fixes regression with Dolphin's ubershaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21855>

zink: ignore renderdoc if ZINK_RENDERDOC isn't in use

this otherwise has some weird side effects

Fixes: 48a0478126f ("zink: add renderdoc handling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21816>

ail: Restructure generated tests

Currently, the generated tests consist of some boilerplate, generated
test cases, and at the very end the actual test. This is bad for readability,
because the actual code is all the way at the bottom. It's also bad for
clang-format linting: even though the test cases are /* clang-format off */,
they still take an exceptionally long time to parse when linting. I suspect this
is a clang-format bug, but it's easy enough to workaround.

To solve these issues, restructure so that the test cases are in separate files
(containing the actual data), but the manually written test functions are
consolidated into a new family of generated layout tests. This is probably
cleaner.

Parallel clang-format linting is now 10x faster on the M1, which means it's
now practical to lint in my "publish branch" hook.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21854>

anv: Integrate gem vm bind and unbind kmd backend functions

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>

anv: Add gem VM bind and unbind to backend

Not using it yet, that will be done in the next patch.
Xe only supports submission using VM.
For i915 the backend functions are just a noop.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>

anv: Implement gem close and mmap for Xe backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>

anv: Implement Xe functions to create and destroy VM

Also using the vm_id to create gem buffers.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>

anv: Implement gem_create for Xe backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>

nir/algebraic: remove duplicate bool conversion lowerings

While [1] added some boolean conversion lowering patterns, those were
already dealt with on [2].

[1] - b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
[2] - d7e0d47b ("nir/algebraic: nir: Add a bunch of b2[if] optimizations")

Fixes: b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>

nir/algebraic: make patterns for float conversion lowerings imprecise

As noted on [1], lowering patterns of the form
floatS -> floatB -> floatS ==> floatS
cannot require precision since this may cause flush denorming.

[1] 3f779013 ("nir: Add an algebraic optimization for float->double->float")

Fixes: b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>

nir/algebraic: extend lowering patterns for conversions on smaller bit sizes

Conversions on smaller bit sizes should also be collapsed when composed.

This also adds more patterns on the
intS -> intB -> floatB ==> intS -> floatB
lowering so as to deal with any int size C > B instead of a fixed intB.

Closes: #7776
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>

nir/algebraic: extend mediump patterns

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Italo Nicola <italonicola@collabora.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>

nir/algebraic: insert patterns inside optimizations list

Some patterns were outside the list of optimizations.

Fixes: b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>

nir/lower_point_size: Use shader_instructions_pass

Sleepy code deletion mood.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21750>

agx: Switch to scoped_barrier

Rather than ingesting separate control and memory barriers, ingest only the
combined and optimized scoped_barrier intrinsic. For barriers originating from
GLSL, this makes it easier to ensure correctness. For barriers originating from
SPIR-V, this is required for translation at all, as spirv_to_nir knows only
scoped barriers. So this gets us closer to Vulkan and OpenCL.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21752>

ci/lava: every LAVA job doesn't want to run gles2 deqp, drop it

Very annoying when adding new job and not getting failure due to missing
`DEQP_VER: `

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>

ci/panfrost: correct the job name, as it runs on gles2

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>

ci/amd: move skqp and va jobs on raven from XOrg to the XWayland

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>

ci: add and utilize dalboz devices

New 10 devices - asus-CM1400CXA-dalboz hosted on Collabora farm.

1x Move VA-API tests to the dalboz (more resources). One timeout dropped.
9x Run VKCTS on dalboz.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>

d3d12: Fix video decode for interlaced streams with reference only textures required

Fixes: d8206f628659d468c870430daa271d5bec6e860d ("d3d12: Add video decode implementation of pipe_video_codec")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21832>

agx: Use nir_lower_mem_access_bit_sizes

Lowers away 64-bit loads, which we'll create in the sysval lowering for
dynamically indexed UBOs/VBOs. The lowering generates pack_64_2x32 instructions,
so lower those too.

No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>

agx: Implement extract_[ui]16

Instead of lowering to bitwise ops. Yet another way of subdividing in NIR.
Probably insignificant but makes it easy to check that the pass ordering from the
previous pass is right. It does let us get much better codegen for
unpacksnorm2x16, whatever that's worth.

No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>

agx: Fix subdivision coalescing

As intended. We can't CSE with partial null destinations in the way, so we
shouldn't eliminate dead destinations until after CSE has run. But we should
still eliminate dead instructions to ensure CSE doesn't move things around
needlessly, hurting register pressure.

Noticed while debugging live range splitting.

No GLES3.0 shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>

agx: Make partial DCE optional

Our dead code elimination pass does two things:

1. delete instructions that are entirely unnecessary
2. delete unnecessary destinations of necessary instructions

To deal with pass ordering issues, we sometimes want to do #1 without #2.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>

agx: Don't set lower_pack_split

We should handle nir_op_unpack_32_2x16_split_* natively, since we can generate
better code with agx_subdivide (coalescing the ops away) than the bitshift
lowering.

That said, we do need some extra instructions for the floating point
conversions.

No shader-db changes (which makes sense because we're targetting the GLES3.0
shader-db, which doesn't have the packing GLSL functions).

The real motivation of this change isn't optimizing some GLSL pack functions,
though, it's avoiding a code regression from using NIR's memory bit size
lowering in a future MR. That lowering will turn things like "load i16vec4" into
"load i32vec2 + unpack_32_2x16", so we need to be able to coalesce that unpack.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>

ci: Disable Collabora LAVA farm

Looks like a power or network issue.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>

ci: take valve farm offline

It seems to be experiencing networking issues

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>

ci: Actually run Piglit on LAVA

At some point in a refactoring long ago, our 'Piglit' runs on arm64
started actually being dEQP-GLES2 runs. Oh dear.

Surprisingly, there are a number of expectation changes; added every
fail I saw from a long overnight stress test.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>

pan/mdg: Remove reference to removed macro

This will soon be more confusing than helpful.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Remove MALI_POSITIVE macro

Now unused.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Inline the last MALI_POSITIVE use

Big shrug on this one.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Remove FBD tag enum from XML

This was a hack to avoid modelling the full data structure.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Use framebuffer pointer XML

Rather than manipulating the raw pointers. This is cleaner.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Add XML for framebuffer pointers

We shouldn't have to open-code these. They are real data structures, model them
as such in the architecture XML files.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Handle fixed-point packing in GenXML

Minimum/maximum LOD and LOD bias are unsigned and signed fixed point formats
respectively. They are not unsigned integers. Introduce fixed-point types into
our GenXML and use them in the XML, rather than packing in sidebands. This makes
the XML more correct and fixes pretty-printing of texture and sampler
descriptors.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Don't use DECODE_FIXED16 for sample position

Strictly this is a signed fixed-point, anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

docs/panfrost: Move description of instancing

Connor Abbott wrote a nice explanation of how instance divisors work on Mali.
Let's add it to the driver docs instead of letting it languish in a forgotten
header file.

This is mostly pasted from the existing header in tree, with a few local changes
applied.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

panfrost: Remove some unused definitions

Nowadays, formats are defined with GenXML, not the old panfrost-job.h, so most
of the format #defines in panfrost-job.h are unused. That said, a few are still
in use as a backdoor for compressed format queries to avoid a GenXML dependency.
That's not great but cleaning that up isn't the subject of this MR.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>

intel/perf: Hide extended metrics by default

XE architecture enables many more metrics, perhaps too many for
the average user. Reduce reported metrics to smaller subset,
known as non-extended metrics, by default. Can re-enable extended
metrics with env var INTEL_EXTENDED_METRICS=1

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21841>

asahi,agx: Implement buffer textures with gnarly NIR

Implement buffer textures in full generality.  There are a few issues here:

* OpenGL requires buffer textures support a minimum size of 65536 elements,
  however 1D textures in AGX are (at most) 8192 elements.

* OpenGL 4.0 (and OpenGL ES) require buffer textures to support the "RGB32"
  texture formats. These are 3 packed channels of 32-bits each. In general,
  non-power-of-two texel sizes are problematic. AGX does not support any such
  formats and we rely on the GL frontend to lower to a padded format (RGBX) if
  necessary. Such a lowering cannot work for buffer textures, however, so we
  need to find a way to implement RGB32 buffer textures.

We solve these issues in the follow way:

* Use 2D texture descriptors for buffer textures, with a large fixed
  power-of-two size along one axis. Then large texel indices may be accessed at
  a small vec2 texel coordinate, and since the fixed dimension is a
  power-of-two, that vector may be recovered by simply shifting and masking.
  This effectively avoids size restriction. We do need to clamp texel indices to
  the buffer size to avoid faulting on OOB reads, since we may read past the end
  of the buffer (if the app binds a non-page-aligned offset into the buffer).

* Use a general purpose memory load for RGB32 buffer textures. Lower the texture
  load instruction to a memory load from the buffer and some address arithmetic.
  There's no format conversion needed for RGB32, other than maybe filling in a
  format-appropriate alpha, so this is straightforward. Again, we need to clamp
  the texel index for robustness with OOB reads.

Each of these solutions brings its own problem.

* Using 2D textures instead of 1D requires physically rounding up the buffer
  size when packing the descriptor, so we can no longer implement textureSize()
  by reading off the texture descriptor like normal.

* We don't know at compile-time whether a given texture load will read from an
  RGB32 buffer texture or not, so we need to emit code for both. In Vulkan, we
  can't key the shader to this property, either, since it's descriptor set state
  and not pipeline state.

And each of these problems in turn brings its own solution:

* The texture descriptor is linear, so the "compression buffer address" field is
  ignored by the hardware. We stash the real buffer size there so that
  textureSize becomes a load from the texture descriptor like usual, without
  requiring a sideband (which would complicate bindless textures).

* If we determine a texture descriptor contains RGB32 data, then it will never
  be interpreted by the hardware and hence does not need to be a valid texture
  descriptor. So, we extend the hardware's format enum to contain a
  software-defined RGB32 format enum. Then, when lowering texture buffer loads,
  we either read it as a typed RGB32 memory load or as a texture load depending
  on the value of the format field in the texture descriptor.

All of this is accomplished with a big NIR pass generating a pile of strange
looking code. But it should be good enough in practice for this silly feature.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21672>

asahi, agx: Implement dummy samplers

In NIR, texelFetch (txf) does not use a sampler, but in AGX, it does -- even
though the contents of the sampler are semantically irrelevant. Rather than
requiring the state tracker to bind a sampler anyway (indicated for texture
buffers with PIPE_CAP_TEXTURE_BUFFER_SAMPLER), just add a dummy sampler
ourselves if txf is used and there are otherwise no samplers. This is helpful
because PIPE_CAP_TEXTURE_BUFFER_SAMPLER isn't honoured by Rusticl or seemingly
mesa/st's PBO code, and after implementing this dummy sampler workaround in
Panfrost for Rusticl, I realized this CAP is silly and shouldn't exist in the
first place. (And I regret pushing for its reinclusion.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21672>

ci/baremetal: Wrap artifact download curl with xtrace

Setting `set -x`can be useful to known via trace which URL baremetal
used to download artifacts.
Today its only printed the command with the environment variables.

Also, this commit fixes multiple `section_end` for the related Gitlab
sections.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21804>

ci: Fix release build use for performance jobs

This commit ensures that we are using mesa release builds in performance
jobs.

To achieve that, some modifications were made on top of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492.

- Append the `BUILDTYPE` variable into the S3 artifact name
  (MINIO_ARTIFACT_NAME environment variable) to allow for better
  artifact management.

- The ./artifacts directory has been added to the list of artifact
  directories for build-common. This ensures that the debian-release and
  debian-arm64-release jobs are the only ones necessary for running
  performance jobs. These jobs only produce artifacts via
  prepare-artifacts.sh when we are under performance workflow.

- Make lava-submit.sh behave similar to baremetal jobs regarding
  MINIO_ARTIFACT_NAME variable. For example, users can now easily
  differentiate between mesa-arm64.tar.zstd and
  mesa-arm64-release.tar.zstd by looking inside the `Downloading
  artifacts from s3` Gitlab section.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21804>

iris: Move i915 submit_batch() to i915 backend

No changes in behavior intented here.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21700>

iris: Add batch_check_for_reset() to kmd backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21700>

iris: Add gem_mmap() to kmd backend

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21700>

build: Block build of HASVK, Crocus and i915 in non-x86 architectures

HASVK, Crocus and i915 drivers only supports integrated GPUs.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21773>

intel/perf: Disable it for Xe KMD

Xe still don't have support for performance metrics.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21773>

iris: Don't mark protected bo as reusable

The check in alloc_bo_from_cache() was skiping any try to get a bo
from cache but after use a protected bo was still being put in some
cache bucket and could be used for cases that don't require a
protected bo.

Using a protected bo in cases that don't require it can have
performance implications.

So here returning NULL when trying to get a cache bucket for a
protected bo, this will cause bo->real.reusable to be set to false
avoiding the bo to be reused.

Fixes: 9402ac8023a0 ("iris: handle protected BO creation")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21824>

asahi: Don't allow linear depth/stencil buffers

We don't have a way to tell the ZLS hardware to use linear buffers, so if a
buffer could be used for depth/stencil, we have to twiddle. This isn't a problem
in practice, since depth/stencil buffers can't be shared across processes or
mapped directly as linear.

Fixes faults in depthstencil-render-miplevels, which was picking linear for one
buffer because of a STAGING bind flag. But that won't work :-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21753>

ci/android: Use a more aggressive timeout for the job

This job sometimes - very, very, rarely - fails to start Cuttlefish,
the Android VM environment. Given that we don't have any structural
monitoring and restarting (unlike LAVA/BM/B2C) for this, just stick a
more aggressive timeout on the job, so it'll be retried if it fails to
start.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21837>

nir/lower_int64: Optionally lower ufind_msb using uadd_sat

v2: Fix inverted condition for applying the optimization. Noticed by
Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir/algebraic: Optimize some ifind_msb to ufind_msb

On Intel platforms, the uclz lowering if ufind_msb is either one
instruction better (Gfx7 and newer) or two instructions better (all
older platforms) than the ifind_msb implementations.

On platforms that use lower_find_msb_to_reverse, there should be no
difference.

All Haswell and newer Intel platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 19938662 -> 19938634 (<.01%)
instructions in affected programs: 850 -> 822 (-3.29%)
helped: 2 / HURT: 0

total cycles in shared programs: 858467067 -> 858465538 (<.01%)
cycles in affected programs: 10080 -> 8551 (-15.17%)
helped: 2 / HURT: 0

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir: Restrict ufind_msb and ufind_msb_rev to 32- or 64-bit sources

4d802df3aac353970aae93699223fb15b24f8408 loosened the type restrictions
on these opcodes to enable support for 64-bit ballot operations.  In
doing so, it enabled 8-bit and 16-bit sizes as well.

It's impossible to get these sizes through GLSL or SPIR-V.  None of the
lowering in nir_opt_algebraic can handle non-32-bit sizes.  Almost no
drivers can handle non-32-bit sizes.

It doesn't seem possible to enforce anything other than "one bit size"
or "all bit sizes" in nir_opcodes.py.  The only way it seems possible to
enforce this is in nir_validate.  This is not ideal, but it be what it
be.

v2: Remove restriction on find_lsb. It is acutally possible to get this
via GLSL by doing findLSB() on a lowp value. findMSB declares its
parameter as highp, so that path is still impossible.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir/algebraic: Do not generate 8- or 16-bit find_msb

The next commit will add validation to restrict this instruction (and
others) to only 32-bit or 64-bit sources.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir/builder: Do not generate 8- or 16-bit find_msb

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir: intel/compiler: Move ufind_msb lowering to NIR

Fossil-db results:

All Intel platforms had similar results. (Ice Lake shown)
Cycles in all programs: 9098346105 -> 9098333765 (-0.0%)
Cycles helped: 6

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir/algebraic: Only lower ufind_msb with 32-bit sources

The 31-ufind_msb_rev(x) lowering only produces the correct result for
32-bit sources. ufind_msb_rev can also have 64-bit sources, and most
platforms are expected to lower this to 32-bit instructions with extra
logic operations.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

intel/compiler: Tighter src and dest size bounds checking for some opcodes

Enforce the sizes listed in the Skylake PRM:

BFREV:
    source types: *D
    destination types: *D

CBIT:
    source types: UB, UW, UD
    destination types: UD

FBH:
    source types: D, UD
    destination types: UD

FBL:
    source types: UD
    destination types: UD

LZD:
    source types: D, UD
    destination types: UD

v2: Update BFREV commit message documentation. Suggested by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir: intel/compiler: Move ifind_msb lowering to NIR

Unlike ufind_msb, ifind_msb is only defined in NIR for 32-bit values, so
no @32 annotation is required.

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

intel/compiler: Lower find_lsb in NIR

No shader-db or fossil-db changes on any Intel platform.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

nir: ifind_msb_rev can only have int32 sources

Just like ifind_msb.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19042>

zink: fix stipple pattern in oblique lines

Stipple lines now appear correctly when they are oblique.

Previously the number of steps of the stipple counter between two vertices
was calculated as the euclidian distance between them in screen space, however
the length occupied by pixel along a line is only `1` for lines that are either
vertical or horizontal and will be anywhere between `1` and `sqrt(2)`
for other cases.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21290>

agx: Handle indirect texture/samplers

Get the texture/sampler index from the texture/sampler_offset source (which
is an offset from 0 thanks to the lower_index_to_offset lowering) and feed it in
as corresponding 16-bit texture instruction sources.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21704>

agx: Pack indirect texture/sampler handles

For indirect indexing into the binding table. Note this does not handle packing
the bindless forms, since that's a bit more involved.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21704>