Paul Walker [Thu, 17 Sep 2020 14:04:31 +0000 (15:04 +0100)]
[SVE] Use NEON for extract_vector_elt when the index is in range.
Patch also adds missing patterns for unpacked vector types and
extracts of element zero.
Differential Revision: https://reviews.llvm.org/D87842
Eduardo Caldas [Mon, 21 Sep 2020 08:39:02 +0000 (08:39 +0000)]
[SyntaxTree][NFC] follow naming convention + remove auto on empty vector declaration
Differential Revision: https://reviews.llvm.org/D88004
Christian Sigg [Wed, 19 Aug 2020 13:50:44 +0000 (15:50 +0200)]
[MLIR] Fix typo and expand gpu.host_register description.
See comments in https://reviews.llvm.org/D85631.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D86214
Haojian Wu [Mon, 21 Sep 2020 11:29:44 +0000 (13:29 +0200)]
Fix buildbot.
TemplateArgumentLocInfo cannot result in a constant expression anymore
after D87080.
Alexander Belyaev [Mon, 21 Sep 2020 11:18:39 +0000 (13:18 +0200)]
Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"
This reverts commit
0345d88de654259ae90494bf9b015416e2cccacb.
Google internal backend uses EntrySU, we are looking into removing
dependency on it.
Differential Revision: https://reviews.llvm.org/D88018
Haojian Wu [Mon, 21 Sep 2020 11:08:17 +0000 (13:08 +0200)]
[AST] Reduce the size of TemplateArgumentLocInfo.
allocate the underlying data of Template kind separately, this would reduce AST
memory usage
- TemplateArgumentLocInfo 24 => 8 bytes
- TemplateArgumentLoc 48 => 32 bytes
- DynTypeNode 56 => 40 bytes
ASTContext::.getASTAllocatedMemory changes:
SemaDecl.cpp 255.5 MB => 247.5MB
SemaExpr.cpp 293.5 MB => 283.5MB
Differential Revision: https://reviews.llvm.org/D87080
Florian Hahn [Mon, 21 Sep 2020 10:03:27 +0000 (11:03 +0100)]
Recommit "[SCEV] Look through single value PHIs."
This commit was originally because it was suspected to cause a crash,
but a reproducer did not surface.
A crash that was exposed by this change was fixed in
1d8f2e52925b.
This reverts the revert commit
0581c0b0eeba03da590d1176a4580cf9b9e8d1e3.
Benjamin Kramer [Mon, 21 Sep 2020 10:04:33 +0000 (12:04 +0200)]
[mlir][VectorOps] Loosen restrictions on vector.reduction types
LLVM can deal with any integer or float type, don't arbitrarily restrict
it to f32/f64/i32/i64.
Differential Revision: https://reviews.llvm.org/D88010
David Green [Mon, 21 Sep 2020 10:10:47 +0000 (11:10 +0100)]
[ARM] Select f32 constants with vmov.f16
This adds lowering for f32 values using the vmov.f16, which zeroes the
top bits whilst setting the lower bits to a pattern. This range of
values does not often come up, except where a f16 constant value has
been converted to a f32.
Differential Revision: https://reviews.llvm.org/D87790
serge-sans-paille [Fri, 18 Sep 2020 09:02:15 +0000 (11:02 +0200)]
Do not dereference an array out of bound just to take its address
This is UB by the standard, and caught by the libstdc++ asserts
Differential Revision: https://reviews.llvm.org/D87892
Georgii Rymar [Tue, 15 Sep 2020 13:17:08 +0000 (16:17 +0300)]
[llvm-readelf/obj] - Stop printing invalid names for unnamed section symbols.
We have an issue with `ELFDumper<ELFT>::getSymbolSectionName`:
1) It is used deeply for both LLVM/GNU styles and might return LLVM-style only
values to describe symbols: "Undefined", "Processor Specific", "Absolute", etc.
2) `getSymbolSectionName` is used by `getFullSymbolName` and these special values
might appear instead of symbol names in many places.
This occurs for unnamed section symbols currently.
This patch extracts the LLVM specific logic to `LLVMStyle<ELFT>::printSymbolSection`,
which seems to be the only place where we want to print the special values mentioned.
It also adds a meaningful new warning that is reported when we are unable to get
a section index for a section symbol.
Differential revision: https://reviews.llvm.org/D87764
Sam Parker [Mon, 21 Sep 2020 09:54:11 +0000 (10:54 +0100)]
[NFC][ARM] More tail predication tests.
Add mir tests for use/def of P0.
Sjoerd Meijer [Mon, 21 Sep 2020 09:39:28 +0000 (10:39 +0100)]
[AArch64] Cortex-A55 scheduler model
This is an initial commit adding the A55 model, but it isn't used/enabled yet.
We will follow up on this to improve the model, then flip the switch.
The optimisation guide describing Cortex-A55 micro-architecture in more detail
can be found here:
https://static.docs.arm.com/epm128372/20/arm_cortex_a55_software_optimization_guide_v2.pdf
Original patch by Javed Absar.
Differential Revision: https://reviews.llvm.org/D46884
Tres Popp [Fri, 18 Sep 2020 09:14:32 +0000 (11:14 +0200)]
[mlir] Shape.AssumingOp implements RegionBranchOpInterface.
This adds support for the interface and provides unambigious information
on the control flow as it is unconditional on any runtime values.
The code is tested through confirming that buffer-placement behaves as
expected.
Differential Revision: https://reviews.llvm.org/D87894
Eduardo Caldas [Wed, 16 Sep 2020 07:56:47 +0000 (07:56 +0000)]
[SyntaxTree][Synthesis] Implement `deepCopy`
Differential Revision: https://reviews.llvm.org/D87749
Alex Richardson [Mon, 21 Sep 2020 08:00:54 +0000 (09:00 +0100)]
[compiler-rt] Fix atomic support functions on 32-bit architectures
The code currently uses __c11_atomic_is_lock_free() to detect whether an
atomic operation is natively supported. However, this can result in a
runtime function call to determine whether the given operation is lock-free
and clang generating a call to e.g. __atomic_load_8 since the branch is
not a constant zero. Since we are implementing those runtime functions, we
must avoid those calls. This patch replaces __c11_atomic_is_lock_free()
with __atomic_always_lock_free() which always results in a compile-time
constant value. This problem was found while compiling atomic.c for MIPS32
since the -Watomic-alignment warning was being triggered and objdump showed
an undefined reference to _atomic_is_lock_free.
In addition to fixing 32-bit platforms this also enables the 16-byte case
that was disabled in r153779 (
185f2edd70a34d28b305df0cd8ce519ecbca2cfd).
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D86510
Alex Richardson [Mon, 21 Sep 2020 07:59:22 +0000 (08:59 +0100)]
[RISC-V] Implement RISCVInstrInfo::isCopyInstrImpl()
This does not result in changes for any of the current tests, but it might
improve debug information in some cases.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D86522
James Henderson [Thu, 17 Sep 2020 10:23:58 +0000 (11:23 +0100)]
[lld][ELF][test] Add additional LTO testing
The additional testing is testing we previously had in a downstream test
suite.
Reviewed by: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D87824
Max Kazantsev [Mon, 21 Sep 2020 09:05:29 +0000 (16:05 +0700)]
[Test] Test auto-update
Lucas Prates [Thu, 17 Sep 2020 17:07:35 +0000 (18:07 +0100)]
[CodeGen] Fixing inconsistent ABI mangling of vlaues in SelectionDAGBuilder
SelectionDAGBuilder was inconsistently mangling values based on ABI
Calling Conventions when getting them through copyFromRegs in
SelectionDAGBuilder, causing duplicate value type convertions for
function arguments. The checking for the mangling requirement was based
on the value's originating instruction and was performed outside of, and
inspite of, the regular Calling Convention Lowering.
The issue could be observed in a scenario such as:
```
%arg1 = load half, half* %const, align 2
%arg2 = call fastcc half @someFunc()
call fastcc void @otherFunc(half %arg1, half %arg2)
; Here, %arg2 was incorrectly mangled twice, as the CallConv data from
; the call to @someFunc() was taken into consideration for the check
; when getting the value for processing the call to @otherFunc(...),
; after the proper convertion had taken place when lowering the return
; value of the first call.
```
This patch fixes the issue by disregarding the Calling Convention
information for such copyFromRegs, making sure the ABI mangling is
properly contanined in the Calling Convention Lowering.
This fixes Bugzilla #47454.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D87844
Mehdi Amini [Mon, 21 Sep 2020 06:42:25 +0000 (06:42 +0000)]
Fix crash in the pass pipeline when local reproducer is enabled
This crash only happens when a function pass is followed by a module
pass. In this case the splitting of the pass pipeline didn't handle
properly the verifier passes and ended up with an odd number of pass in
the pipeline, breaking an assumption of the local crash reproducer
executor and hitting an assertion.
Differential Revision: https://reviews.llvm.org/D88000
Florian Hahn [Sun, 20 Sep 2020 11:40:35 +0000 (12:40 +0100)]
[LSR] Preserve MSSA when using SplitCriticalEdge.
LSR claims to MemorySSA, but we also have to make sure it is preserved
when splitting critical edges. This can be done by passing MSSAU to
SplitCriticalEdge.
Fixes PR47557.
Andrzej Warzynski [Wed, 16 Sep 2020 16:54:29 +0000 (17:54 +0100)]
[clang] Fix incorrect call to TextDiagnostic::printDiagnosticMessage
As per the documentation, the 2nd argument in printDiagnosticMessage
should be a bool that specifies whether the underlying message is a
continuation note diagnostic or not. More specifically, it should be:
```
Level == DiagnosticsEngine::Note
```
instead of:
```
Level
```
This change means that `no input file` in the following scenario will be
now correctly printed in bold:
```
$ bin/clang
clang: error: no input files
```
In terminals that don't support text formatting the behaviour doesn't
change.
Differential Revision: https://reviews.llvm.org/D87816
David Spickett [Mon, 14 Sep 2020 13:16:20 +0000 (14:16 +0100)]
[clang][AArch64] Correct return type of Neon vqmovun intrinsics
Neon intrinsics vqmovunh_s16, vqmovuns_s32, vqmovund_s64
should have unsigned return types.
See https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?search=vqmovun
Fixes https://bugs.llvm.org/show_bug.cgi?id=46840
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D85118
Eduardo Caldas [Fri, 18 Sep 2020 09:34:57 +0000 (09:34 +0000)]
[SyntaxTree] Test for '\' inside token.
Differential Revision: https://reviews.llvm.org/D87895
Haojian Wu [Mon, 21 Sep 2020 06:42:24 +0000 (08:42 +0200)]
[AST] Fix dependence-bits for CXXDefaultInitExpr.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D87382
Eduardo Caldas [Thu, 17 Sep 2020 15:39:18 +0000 (15:39 +0000)]
[SyntaxTree][Synthesis] Improve testing `createLeaf`
The new test shows that `createLeaf` depends on the C++ version.
Differential Revision: https://reviews.llvm.org/D87896
Richard Smith [Mon, 21 Sep 2020 06:08:33 +0000 (23:08 -0700)]
[c++20] Consistent with the intent to allow all plausible types in
non-type template parameters, permit vector types.
Mehdi Amini [Sun, 20 Sep 2020 22:08:00 +0000 (22:08 +0000)]
Add missing new line after debug logging in MLIRContext (NFC)
SuJunda [Mon, 21 Sep 2020 05:32:18 +0000 (11:02 +0530)]
[docs][flang] Fix typos
Reviewed By: SouraVX
Differential Revision: https://reviews.llvm.org/D87885
Fangrui Song [Mon, 21 Sep 2020 04:41:29 +0000 (21:41 -0700)]
[EHStreamer] Fix a "Continue to action" -fverbose-asm comment when multi-byte LEB128 encoding is needed
This only happens with more than 64 action records and it is difficult to construct a test.
Jez Ng [Wed, 16 Sep 2020 18:20:10 +0000 (11:20 -0700)]
[lld-macho] Export trie addresses should be relative to the image base
We didn't notice this earlier this we were only testing the export trie
encoded in a dylib, whose image base starts at zero. But a regular
executable contains `__PAGEZERO`, which means it has a non-zero image
base. This bug was discovered after attempting to run some programs that
performed `dlopen` on an executable.
Reviewed By: #lld-macho, smeenai
Differential Revision: https://reviews.llvm.org/D87780
Jez Ng [Tue, 1 Sep 2020 03:32:39 +0000 (20:32 -0700)]
[lld-macho] Mark weak symbols in symbol table
Reviewed By: #lld-macho, smeenai
Differential Revision: https://reviews.llvm.org/D86908
Richard Smith [Mon, 21 Sep 2020 03:10:02 +0000 (20:10 -0700)]
[c++20] For P1907R1: Add checking for structural types for non-type
template parameters.
No support for the new kinds of non-type template argument yet.
This is not entirely NFC for prior language modes: we have historically
incorrectly accepted rvalue references as the types of non-type template
parameters. Such invalid code is now rejected.
Qiu Chaofan [Mon, 21 Sep 2020 02:38:00 +0000 (10:38 +0800)]
[PowerPC] Pass nofpexcept flag to custom lowered constrained ops
This is a follow-up of D86605. For strict DAG FP node, if its FP
exception behavior metadata is ignore, it should have nofpexcept flag.
But during custom lowering, this flag isn't passed down.
This is also seen on X86 target.
Reviewed By: uweigand
Differential Revision: https://reviews.llvm.org/D87390
Pengxuan Zheng [Tue, 8 Sep 2020 21:09:03 +0000 (14:09 -0700)]
[Polly][NewPM] Port Simplify to the new pass manager
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D87328
Fangrui Song [Sat, 19 Sep 2020 22:44:39 +0000 (15:44 -0700)]
[XRay] Change mips to use version 2 sled (PC-relative address)
Follow-up to D78590. All targets use PC-relative addresses now.
Reviewed By: atanasyan, dberris
Differential Revision: https://reviews.llvm.org/D87977
wlei [Sun, 20 Sep 2020 23:50:08 +0000 (16:50 -0700)]
[llvm-profdata]Fix llvm-profdata crash on compact binary profile
llvm-profdata `show` and `overlap` will crash in `getFuncName` on compact binary profile. This change fixed this by switching to use `getName`.
`getFuncName` is misused in llvm-profdata. As showed below, `GUIDToFuncNameMap` is only supported in compilation mode, there is no initialization in llvm-profdata. Compact profile whose MD5 is true would try to query `GUIDToFuncNameMap` then caused the crash. So fix this by switching to `getName`
Reviewed By: MaskRay, wmi, wenlei, weihe, hoy
Differential Revision: https://reviews.llvm.org/D87740
Nathan Ridge [Sun, 20 Sep 2020 23:50:32 +0000 (19:50 -0400)]
[clangd] Fix typo in field name
Differential Revision: https://reviews.llvm.org/D87995
Craig Topper [Sun, 20 Sep 2020 20:53:26 +0000 (13:53 -0700)]
[X86] Make reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore work for avx512 after type legalization.
The scalar elements of the vXi1 build_vector will have been type legalized to i8 by padding with 0s. So we can't check for all ones. Instead we should just look at bit 0 of the constant.
Differential Revision: https://reviews.llvm.org/D87863
Craig Topper [Sun, 20 Sep 2020 20:52:04 +0000 (13:52 -0700)]
[X86] Pre-commit test cases for D87863. NFC
Craig Topper [Sun, 20 Sep 2020 20:13:42 +0000 (13:13 -0700)]
[X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating scalar i64 load/stores in 32-bit mode
If we emit a scalar i64 load/store it will get type legalized to two i32 load/stores.
Differential Revision: https://reviews.llvm.org/D87862
Craig Topper [Sun, 20 Sep 2020 20:11:47 +0000 (13:11 -0700)]
[X86] Add 32-bit command lines to masked_store.ll and masked_load.ll
David Green [Sun, 20 Sep 2020 20:32:51 +0000 (21:32 +0100)]
[ARM] Constant fold VMOVrh
This adds simple constant folding for VMOVrh, to constant fold fp16
constants to integer values. It can help especially with soft calling
conventions, but some of the results are not optimal as we end up
loading using a vldr. This will be improved in a follow up patch.
Differential Revision: https://reviews.llvm.org/D87789
Nikita Popov [Sun, 20 Sep 2020 19:50:21 +0000 (21:50 +0200)]
[CVP] Additional tests for comparison with offset (NFC)
Both icmps have an additional offset here. We would fold this if
the second one didn't.
Nikita Popov [Sun, 20 Sep 2020 19:07:52 +0000 (21:07 +0200)]
[LVI] Get value range from mask comparison
InstCombine likes to canonicalize comparisons of the form
X == C || X == C+1 into (X & -2) == C'. Make sure LVI can still
recover the value range from this. Can of course also be useful
for proper mask comparisons.
For the sake of clarity, the implementation goes through KnownBits
to compute the range.
Nikita Popov [Sun, 20 Sep 2020 19:11:10 +0000 (21:11 +0200)]
[CVP] Add tests for mask comparisons (NFC)
Nikita Popov [Sun, 20 Sep 2020 18:46:51 +0000 (20:46 +0200)]
[LVI] Refactor getValueFromICmpCondition (NFC)
Rewrite this in a way where the core logic is in a separate
function, that is invoked with swapped operands. This makes it
easier to add handling for additional icmp patterns.
Simon Pilgrim [Sun, 20 Sep 2020 17:38:54 +0000 (18:38 +0100)]
[X86][SSE] Fold EXTEND_VECTOR_INREG(EXTRACT_SUBVECTOR(EXTEND(X),0)) -> EXTEND_VECTOR_INREG(X)
Simon Pilgrim [Sun, 20 Sep 2020 16:11:01 +0000 (17:11 +0100)]
[X86][SSE] Fold SIGN_EXTEND(SIGN_EXTEND_VECTOR_INREG(X)) -> SIGN_EXTEND_VECTOR_INREG(X)
It should be possible to make this generic, but we're not great at checking legality of *_EXTEND_VECTOR_INREG ops so I'm conservatively putting this inside X86ISelLowering.cpp
Sanjay Patel [Sun, 20 Sep 2020 16:55:24 +0000 (12:55 -0400)]
[InstCombine] factorize left shifts of add/sub
We do similar factorization folds in SimplifyUsingDistributiveLaws,
but that drops no-wrap properties. Propagating those optimally may
help solve:
https://llvm.org/PR47430
The propagation is all-or-nothing for these patterns: when all
3 incoming ops have nsw or nuw, the 2 new ops should have the
same no-wrap property:
https://alive2.llvm.org/ce/z/Dv8wsU
This also solves:
https://llvm.org/PR47584
Sanjay Patel [Sun, 20 Sep 2020 16:21:01 +0000 (12:21 -0400)]
[InstCombine] replace zombie unreachable values with 'undef' before erasing
The test (currently crashing) is reduced from the example provided
in the post-commit discussion in D87149.
Differential Revision: https://reviews.llvm.org/D87965
Dávid Bolvanský [Sun, 20 Sep 2020 15:42:39 +0000 (17:42 +0200)]
[Diagnostics] Fixed -Wsizeof-array-div false positive when divisor is sizeof reference type (PR47495)
Simon Pilgrim [Sun, 20 Sep 2020 15:33:02 +0000 (16:33 +0100)]
[X86][SSE] Fold EXTEND_VECTOR_INREG(EXTEND_VECTOR_INREG(X)) -> EXTEND_VECTOR_INREG(X)
It should be possible to make this generic, but we're not great at checking legality of *_EXTEND_VECTOR_INREG ops so I'm conservatively putting this inside X86ISelLowering.cpp
Simon Pilgrim [Sun, 20 Sep 2020 15:05:10 +0000 (16:05 +0100)]
[X86][SSE] Enable ZERO_EXTEND_VECTOR_INREG shuffle combining on SSE41 targets.
Allows ZERO_EXTEND_VECTOR_INREG to be shuffle combined on all targets where it is legal.
Simon Pilgrim [Sun, 20 Sep 2020 14:19:39 +0000 (15:19 +0100)]
[X86] Rename getExtendInVec to getEXTEND_VECTOR_INREG. NFCI.
Make it easier to find the method by naming it after the ops it actually handles. We already do this for lowering/combining.
Simon Pilgrim [Sun, 20 Sep 2020 13:42:36 +0000 (14:42 +0100)]
DWARFYAML::emitDebugSections - fix use after std::move warnings. NFCI.
We were using Err after it had been moved into cantFail - avoid this by calling cantFail with Error::success() directly.
Simon Pilgrim [Sun, 20 Sep 2020 13:06:50 +0000 (14:06 +0100)]
[X86] combineX86ShufflesRecursively - fix use after move warning. NFCI.
After moving WidenedMask is in an undefined state, so reduce scope of the variable so its reinitialized every iteration - we should still retain any memory allocation savings.
Simon Pilgrim [Sun, 20 Sep 2020 12:55:04 +0000 (13:55 +0100)]
JSONCompilationDatabase.cpp - cleanup key parsing error checks. NFCI.
Merge the key + sequence/value checks with the key handling code.
Reduces the number of key string comparisons and avoids a number of clang static analyzer null dereference warnings.
Dávid Bolvanský [Sun, 20 Sep 2020 11:59:07 +0000 (13:59 +0200)]
[MemLoc] Support lllvm.memcpy.inline in MemoryLocation::getForArgument
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D87971
Simon Pilgrim [Sun, 20 Sep 2020 10:33:28 +0000 (11:33 +0100)]
[X86] Rename combineExtInVec to combineEXTEND_VECTOR_INREG. NFCI.
Make it easier to find the method by naming it after the ops it actually handles. We already do this for lowering.
Rainer Orth [Sun, 20 Sep 2020 10:40:21 +0000 (12:40 +0200)]
[tools][remarks-shlib] Don't build libRemarks.so without PIC
A build on `sparcv9-sun-solaris2.11` with `-DLLVM_ENABLE_PIC=Off` failed
linking `libRemarks.so`:
[27/2297] Linking CXX shared library lib/libRemarks.so.12git
FAILED: lib/libRemarks.so.12git
[...]
ld: fatal: relocation error: R_SPARC_H44: file lib/libLLVMRemarks.a(Remark.cpp.o): symbol _ZTVN4llvm18raw_string_ostreamE: invalid shared object relocation type: ABS44 code model unsupported
[...]
On Solaris/sparcv9 as on many other targets you cannot link non-PIC objects
into a shared object.
The following patch avoids this by not building the library with PIC. It
allowed the build to complete and `ninja check-all` showed no errors.
Differential Revision: https://reviews.llvm.org/D85626
Fangrui Song [Sun, 20 Sep 2020 05:24:51 +0000 (22:24 -0700)]
[FunctionAttrs] Inline setDoesNotRecurse() and delete it. NFC
It always returns true, which may lead to confusion. Inline it because it is
trivial and only called twice.
Fangrui Song [Sun, 20 Sep 2020 03:46:13 +0000 (20:46 -0700)]
[FunctionAttrs] Remove redundant check. NFC
Fangrui Song [Sun, 20 Sep 2020 03:41:25 +0000 (20:41 -0700)]
Fix some clang-tidy bugprone-argument-comment issues
Lang Hames [Sun, 20 Sep 2020 01:56:49 +0000 (18:56 -0700)]
[ORC][examples] Add an OrcV2 example for IR optimization via IRTransformLayer.
Shows how to write a custom IR transform to apply a legacy::PassManager
pipeline.
Fangrui Song [Sat, 19 Sep 2020 22:49:44 +0000 (15:49 -0700)]
[Driver] Add disabled-by-default -Wuse-ld-path for the deprecation warning for -fuse-ld=/abs/path
The warning is currently not under a -W option, so it cannot be suppressed.
This is annoying for the widespread build system Bazel when specifying the path to gold
https://github.com/bazelbuild/bazel/commit/
cdd0c3cdba270115940e8ca5ec8104cbcd694671
I have notified them about using --ld-path= forwards
https://github.com/bazelbuild/bazel/pull/8580#issuecomment-
694321543
but we have to give some transitional period.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D87837
Nikita Popov [Sat, 19 Sep 2020 20:26:53 +0000 (22:26 +0200)]
[Local] Clean up enforceKnownAlignment() (NFC)
I want to export this function, and the current API was a bit
weird: It took an additional Alignment argument that didn't really
have anything to do with what the function does. Drop it, and
perform a max at the callsite.
Also rename it to tryEnforceAlignment().
Greg McGary [Sat, 19 Sep 2020 19:28:33 +0000 (12:28 -0700)]
align __TEXT,__unwind_info to 8 byte boundary
Roland McGrath [Sat, 19 Sep 2020 18:44:39 +0000 (11:44 -0700)]
[scudo/standalone] Fix undefined behavior in checksum test
1U has type unsigned int, and << of 32 or more is undefined behavior.
Use the proper type in the lhs of the shift.
Reviewed By: cryptoad
Differential Revision: https://reviews.llvm.org/D87973
Nikita Popov [Sat, 19 Sep 2020 18:54:20 +0000 (20:54 +0200)]
[InstCombine] Regenerate test checks (NFC)
Roman Lebedev [Sat, 19 Sep 2020 18:13:35 +0000 (21:13 +0300)]
[NFC][PhaseOrdering] Add test showing SROA not being performed after loop unrolling
Dávid Bolvanský [Sat, 19 Sep 2020 17:35:55 +0000 (19:35 +0200)]
[BasicAA] Regenerate test checks
Florian Hahn [Sat, 19 Sep 2020 15:08:19 +0000 (16:08 +0100)]
[SCEVExpander] Support expanding nonintegral pointers with constant base.
Currently SCEVExpander creates inttoptr for non-integral pointers if the
base is a null constant for example. This results in invalid IR.
This patch changes InsertNoopCastOfTo to emit a GEP & bitcast to convert
to a non-integral pointer. First, a GEP of i8* null is generated and the
integral value is used as index. The GEP is then bitcasted to the target
type.
This was exposed by D71539.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D87827
Dávid Bolvanský [Sat, 19 Sep 2020 15:11:06 +0000 (17:11 +0200)]
[MemLoc] Support bcmp in MemoryLocation::getForArgument
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D87964
Sanjay Patel [Sat, 19 Sep 2020 15:06:47 +0000 (11:06 -0400)]
[InstCombine] auto-generate test checks; NFC
Sanjay Patel [Sat, 19 Sep 2020 14:43:18 +0000 (10:43 -0400)]
[InstCombine] regenerate test checks; NFC
Sanjay Patel [Fri, 18 Sep 2020 20:37:17 +0000 (16:37 -0400)]
[ConstantFolding] add undef handling for fmin/fmax intrinsics
The output here may not be optimal (yet), but it should be
consistent for commuted operands (it was not before) and
correct. We can do better by checking FMF and NaN if needed.
Code in InstSimplify generally assumes that we have already
folded code like this, so it was not handling 2 constant
inputs by commuting consistently.
Mark de Wever [Sat, 19 Sep 2020 13:39:09 +0000 (15:39 +0200)]
Fixes complexity of map insert_or_assign with a hint.
Mitsuru Kariya reported the map operations insert_or_assign with a hint
violates the complexity requirement. The function no longer uses a lower_bound,
which caused the wrong complexity.
Fixes PR38722: [C++17] std::map::insert_or_assign w/ hint violate complexity requirements
Differential Revision: https://reviews.llvm.org/D62779
Yaxun (Sam) Liu [Sat, 19 Sep 2020 14:15:27 +0000 (10:15 -0400)]
Revert "[HIP] Fix -gsplit-dwarf option"
This reverts commit
e50465ecefc964e5700df26fc7e02a673eed085a
due to regression in lldb tests.
Yaxun (Sam) Liu [Mon, 14 Sep 2020 18:21:30 +0000 (14:21 -0400)]
[HIP] Fix -gsplit-dwarf option
when -gsplit option is used with clang driver, clang driver will create
a filename with .dwo option based on the input file name and pass
it to clang -cc1. This file is used for storing the debug info. Since
HIP generate separate object files for different GPU arch's,
this file should be different for different GPU arch. This patch
adds _ and GPU arch to the stem of the dwo file.
Differential Revision: https://reviews.llvm.org/D87791
Paul C. Anagnostopoulos [Fri, 18 Sep 2020 17:54:38 +0000 (13:54 -0400)]
Change name of Record::TheInit to CorrespondingDefInit to make code clearer.
Differential Revision: https://reviews.llvm.org/D87919
Nico Weber [Sat, 19 Sep 2020 13:17:02 +0000 (09:17 -0400)]
lld/mach-o: Make tool scripts from
2124ca1d5cb py2.7-compatible
Nico Weber [Sat, 19 Sep 2020 12:34:58 +0000 (08:34 -0400)]
[gn build] Port
2124ca1d5cb
Nico Weber [Sat, 19 Sep 2020 12:29:55 +0000 (08:29 -0400)]
[gn build] (manually) merge
2124ca1d5
Nico Weber [Sat, 19 Sep 2020 12:28:38 +0000 (08:28 -0400)]
Revert "Revert "[gn build] (manually) port
9b6765e784b3" anf follow-ups"
This reverts commit
90fffdd0f705bfb480810cef087305567dc4f6cf.
The original change relanded.
Simon Pilgrim [Sat, 19 Sep 2020 11:52:09 +0000 (12:52 +0100)]
InstCombiner.h - remove unnecessary KnownBits forward declaration. NFCI.
We already include KnownBits.h
Utkarsh Saxena [Sat, 19 Sep 2020 08:07:34 +0000 (10:07 +0200)]
Revert "Temporarily Revert "[clangd] Add Random Forest runtime for code completion.""
We intend to replace heuristics based code completion ranking with a Decision Forest Model.
This patch introduces a format for representing the model and an inference runtime that is code-generated at build time.
- Forest.json contains all the trees as an array of trees.
- Features.json describes the features to be used.
- Codegen file takes the above two files and generates CompletionModel containing Feature struct and corresponding Evaluate function.
The Evaluate function maps a feature to a real number describing the relevance of this candidate.
- The codegen is part of build system and these files are generated at build time.
- Proposes a way to test the generated runtime using a test model.
- Replicates the model structure in unittests.
- unittest tests both the test model (for correct tree traversal) and the real model (for sanity).
This reverts commit
549e55b3d5634870aa9d42135f51ad46a6a0e347.
Joachim Meyer [Tue, 18 Aug 2020 12:33:34 +0000 (14:33 +0200)]
Add -Wno-error=unknown flag to clang-format.
Currently newer clang-format options cannot be included in .clang-format files, if not all users can be forced to use an updated version.
This patch tries to solve this by adding an option to clang-format, enabling to ignore unknown (newer) options.
Differential Revision: https://reviews.llvm.org/D86137
Joachim Meyer [Sat, 19 Sep 2020 08:12:41 +0000 (10:12 +0200)]
[NFC] Test commit
Craig Topper [Sat, 19 Sep 2020 06:37:50 +0000 (23:37 -0700)]
[X86] Return from SimplifyDemandedBitsForTargetNode after calculating known bits for VSHLI/VSRAI/VSRLI.
We were breaking out of the switch which falls into the default
implementation of SimplifyDemandedBitsForTargetNode which is a
wrapper around computeKnownBits. So we end up doing the recursion
and known bits calculation all over again. Instead we should return
with the known bits we calculated in the switch.
Amara Emerson [Sat, 19 Sep 2020 06:31:30 +0000 (23:31 -0700)]
[AArch64][GlobalISel] Add legalization and selection support for <4 x s16> G_SHL.
Xun Li [Sat, 19 Sep 2020 06:10:22 +0000 (23:10 -0700)]
[ASAN] Properly deal with musttail calls in ASAN
When address sanitizing a function, stack unpinsoning code is inserted before each ret instruction. However if the ret instruciton is preceded by a musttail call, such transformation broke the musttail call contract and generates invalid IR.
This patch fixes the issue by moving the insertion point prior to the musttail call if there is one.
Differential Revision: https://reviews.llvm.org/D87777
Andrew Litteken [Tue, 15 Sep 2020 21:16:48 +0000 (16:16 -0500)]
[IRSim] Adding ilist for IRInstructionData.
The IRInstructionData structs are a different representation of the
program. This list treats the program as if it was "flattened" and
the only parent is this list. This lets us easily create ranges of
instructions.
Differential Revision: https://reviews.llvm.org/D86969
Greg McGary [Thu, 20 Aug 2020 20:05:13 +0000 (13:05 -0700)]
[lld-macho] create __TEXT,__unwind_info from __LD,__compact_unwind
Digest the input `__LD,__compact_unwind` and produce the output `__TEXT,__unwind_info`. This is the initial commit with the major functionality.
Successor commits will add handling for ...
* `__TEXT,__eh_frame`
* personalities & LSDA
* `-r` pass-through
Differential Revision: https://reviews.llvm.org/D86805
Craig Topper [Sat, 19 Sep 2020 01:00:06 +0000 (18:00 -0700)]
[X86] Fix copy paste mistake in @ccnp flag.
We were treating @ccp and @ccnp the same.
Craig Topper [Sat, 19 Sep 2020 04:05:50 +0000 (21:05 -0700)]
[X86] Invert the compares in inline-asm-flag-output.ll so that the setcc instruction condition matches the test name. NFC
Also add nounwind to the tests to remove cfi directives.
David Blaikie [Sat, 19 Sep 2020 02:29:37 +0000 (19:29 -0700)]
DebugInfo: Cleanup RLE dumping, using a length-constrained DataExtractor rather than carrying the end offset separately
Nico Weber [Sat, 19 Sep 2020 01:27:42 +0000 (21:27 -0400)]
[gn build] (manually) port
5495b691646
Alexander Shaposhnikov [Sat, 19 Sep 2020 01:22:48 +0000 (18:22 -0700)]
[llvm-objcopy][MachO] Clean up the interface of Object
Remove the method addLoadCommand which was used only in a single place.
NFC.
Test plan: make check-all