Timur Kristóf [Thu, 5 May 2022 17:50:10 +0000 (19:50 +0200)]
radv: Minor formatting fix in radv_device.c file.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>
Iago Toral Quiroga [Tue, 10 May 2022 06:04:24 +0000 (08:04 +0200)]
v3dv: drop unsused struct
This is no longer needed since we ported to using the common sync
framework.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16417>
Marek Olšák [Thu, 5 May 2022 19:56:46 +0000 (15:56 -0400)]
ac/gpu_info: fix incorrect IP versions reported by the kernel
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Marek Olšák [Thu, 5 May 2022 19:14:55 +0000 (15:14 -0400)]
ac/gpu_info: print all IP versions reported by the kernel
It's incorrect for GFX. This is what I get on Radeon 6800:
IP GFX 10.0 queues:1
IP COMP 10.0 queues:4
IP SDMA 5.2 queues:2
IP VCN_DEC 3.0 queues:1
IP VCN_ENC 3.0 queues:1
IP VCN_JPG 3.0 queues:1
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Marek Olšák [Thu, 5 May 2022 18:41:06 +0000 (14:41 -0400)]
ac/gpu_info: remove dead GDS query code
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Marek Olšák [Thu, 5 May 2022 18:26:05 +0000 (14:26 -0400)]
ac/gpu_info: simplify HW IP querying
Use a loop, don't check the DRM versions, and handle failures as
unsupported.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Marek Olšák [Thu, 5 May 2022 17:57:49 +0000 (13:57 -0400)]
amd: replace num_rings[type] with ip[type].num_queues
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Marek Olšák [Thu, 5 May 2022 17:49:29 +0000 (13:49 -0400)]
amd: rename RING_* enums to AMD_IP_*
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Marek Olšák [Thu, 5 May 2022 17:41:37 +0000 (13:41 -0400)]
amd: rename ring_type --> amd_ip_type and match the kernel enum values
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
Mike Blumenkrantz [Tue, 26 Apr 2022 15:36:23 +0000 (11:36 -0400)]
zink: use descriptor surfaces for notemplates ref updating
basically the same codepath as samplerviews now, and fixes
some issues with invalid mem access
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16167>
Mike Blumenkrantz [Tue, 26 Apr 2022 15:09:06 +0000 (11:09 -0400)]
zink: add more image usage for null surfaces
without null descriptor features, these can be used for all sorts of things
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16167>
Mike Blumenkrantz [Tue, 26 Apr 2022 15:07:23 +0000 (11:07 -0400)]
zink: fix null buffer/surface formats
4-component formats are needed here in order to return the correct
alpha value in invalid load scenarios
cc: mesa-stable
fixes:
spec@arb_shader_image_load_store@invalid
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16167>
Mike Blumenkrantz [Wed, 4 May 2022 13:01:56 +0000 (09:01 -0400)]
lavapipe: enqueue pipeline destruction
this avoids races in llvmpipe related to modification of per-context shader
variant lists, which causes massive amounts of flakiness in ci
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16331>
Mike Blumenkrantz [Tue, 12 Apr 2022 21:42:15 +0000 (17:42 -0400)]
zink: delete nir_lower_dynamic_bo_access
no longer used
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>
Mike Blumenkrantz [Tue, 12 Apr 2022 21:26:53 +0000 (17:26 -0400)]
zink: implement indirect buffer indexing
this compacts all buffers in the shader into an array that can be
used in a single descriptor, thus handling the case of indirect indexing
while also turning constant indexing into indirect (with const offsets)
since there's no sane way to distinguish
a "proper" implementation of this would be to skip gl_nir_lower_buffers
and nir_lower_explicit_io altogether and retain the derefs, but that would
require a ton of legwork of other nir passes which only operate on the
explicit io intrinsics
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>
Mike Blumenkrantz [Wed, 13 Apr 2022 14:21:51 +0000 (10:21 -0400)]
zink: flatten push descriptor template into normal template array
this simplifies some code
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>
Mike Blumenkrantz [Wed, 13 Apr 2022 14:20:00 +0000 (10:20 -0400)]
zink: decouple descriptor templates from layouts
the same layout will in the future have multiple templates
depending on which resources are being updated
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>
Mike Blumenkrantz [Thu, 21 Apr 2022 16:24:01 +0000 (12:24 -0400)]
zink: semi-handle 1D sparse texture rewrites for drivers that don't support them
nvidia can't do this, but also nothing uses it, so I've gone ahead and
done the bare minimum here to make cts pass
I think the work to do the shader rewrites should be easy, but without a test
case, I see no point in spending the time for it
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>
Mike Blumenkrantz [Fri, 22 Apr 2022 01:34:20 +0000 (21:34 -0400)]
zink: bump number of image binds that can be batched to 50
this is big enough to batch all the cts binds into a single submit
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>
Mike Blumenkrantz [Thu, 21 Apr 2022 15:47:01 +0000 (11:47 -0400)]
zink: fix multisample conditional in sparse image query
you stare at the code for so long without truly seeing it
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>
Mike Blumenkrantz [Thu, 21 Apr 2022 15:45:46 +0000 (11:45 -0400)]
zink: set all usage flags when querying sparse features
they're allocated through TexStorage, so they can do everything
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>
Mike Blumenkrantz [Thu, 21 Apr 2022 15:45:15 +0000 (11:45 -0400)]
zink: pass sparse bind bo offset through for texture binds
should fix partial binding with textures
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>
Mike Blumenkrantz [Thu, 21 Apr 2022 14:36:56 +0000 (10:36 -0400)]
zink: pass sparse backing page offset to binding function
this is the offset of the memory block being bound
cc: mesa-stable
fixes:
KHR-GL46.sparse_buffer_tests.BufferStorageTest
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>
Mike Blumenkrantz [Wed, 27 Apr 2022 14:11:37 +0000 (10:11 -0400)]
zink: scale depth bias by factor of 2
this is enough to fix CTS
affects/fixes:
dEQP-GLES3.functional.polygon_offset.default_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed24_render_with_units
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16195>
Emma Anholt [Thu, 5 May 2022 23:28:34 +0000 (16:28 -0700)]
glsl: Make all drivers take the GLSLOptimizeConservatively path.
Now that all consumers of GLSL use NIR, make the remaining drivers take
the path that relies on NIR to really do optimization.
nouveau steam shader-db runtime -6.69631% +/- 1.29235% (n=12).
No change on shader-db there.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16364>
Marek Olšák [Fri, 6 May 2022 02:35:59 +0000 (22:35 -0400)]
radeonsi: remove tautologies when setting CU_EN
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Ruijing Dong [Wed, 16 Mar 2022 14:43:29 +0000 (10:43 -0400)]
radeonsi/vcn: update av1 decoding to support vcn4
Apply changes of vcn4 on av1 decoding.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Ruijing Dong [Thu, 10 Mar 2022 17:13:09 +0000 (12:13 -0500)]
radeonsi/vcn: Add support of array_mode for gfx11
Update array_mode for gfx11 in vcn decoder.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
James Zhu [Sun, 20 Feb 2022 17:07:30 +0000 (12:07 -0500)]
radeonsi/vcn: add jpeg decode support for gfx11
Add jpeg decode support for gfx11.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 4 May 2022 00:24:48 +0000 (20:24 -0400)]
amd: add chip identification for gfx1100-1103
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Boyuan Zhang [Sun, 27 Feb 2022 00:50:40 +0000 (19:50 -0500)]
radeonsi/vcn: enable vcn 4.0 encode for gfx11 asic
Enable VCN 4.0 encode for supported Asics.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Boyuan Zhang [Sun, 27 Feb 2022 00:49:08 +0000 (19:49 -0500)]
radeonsi/vcn: add session init ib for vcn 4.0
Implement session init ib based on new interface for VCN 4.0.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Boyuan Zhang [Sun, 27 Feb 2022 01:14:30 +0000 (20:14 -0500)]
radeonsi/vcn: add encode context ib for vcn 4.0
Implement encode context ib based on new reconstructed picture and
interface for VCN 4.0, and modify dpb setup accordingly.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Boyuan Zhang [Sun, 27 Feb 2022 00:32:53 +0000 (19:32 -0500)]
radeonsi/vcn: add vcn 4.0 encode fw interface version
Add major and minor encode FW interface version for VCN 4.0.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Boyuan Zhang [Sun, 27 Feb 2022 00:29:16 +0000 (19:29 -0500)]
radeonsi/vcn: add vcn 4.0 encode support
Add new file "radeon_vcn_enc_4_0.c" for VCN 4.0 encode.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
James Zhu [Sun, 20 Feb 2022 16:46:48 +0000 (11:46 -0500)]
radeonsi/vcn: add decode software ring support for gfx11
Add decode software ring support for gfx11.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
James Zhu [Sun, 20 Feb 2022 16:42:29 +0000 (11:42 -0500)]
radeonsi/gfx11: update codec support for gfx11
Update codec support for gfx11.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
James Zhu [Sun, 20 Feb 2022 16:39:45 +0000 (11:39 -0500)]
amd: update headers to support decode software ring
Update headers to support decode software ring.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 3 May 2022 23:36:47 +0000 (19:36 -0400)]
radeonsi/gfx11: add a workaround for CB perf counters
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 3 May 2022 19:16:22 +0000 (15:16 -0400)]
radeonsi: inline si_cp_dma_prefetch in si_draw_vbo for lower overhead
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 30 Mar 2022 05:57:38 +0000 (01:57 -0400)]
radeonsi/gfx11: limit CP DMA to max 32KB sizes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 3 May 2022 19:05:50 +0000 (15:05 -0400)]
radeonsi/gfx11: mark streamout as unimplemented for now
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 3 May 2022 19:04:44 +0000 (15:04 -0400)]
radeonsi/gfx11: resolve MSAA using u_blitter
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Thu, 28 Apr 2022 12:38:49 +0000 (08:38 -0400)]
radeonsi/gfx11: don't count the non-existent scratch_byte_offset SGPR
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 22 Apr 2022 16:12:42 +0000 (12:12 -0400)]
radeonsi/gfx11: change LDS allocation granularity for PS
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sat, 2 Apr 2022 05:51:44 +0000 (01:51 -0400)]
radeonsi/gfx11: update the initialization of SGPR0/1 registers for HS and GS
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sat, 2 Apr 2022 01:47:03 +0000 (21:47 -0400)]
radeonsi/gfx11: limit MSAA color buffers to the RGBA channel order
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Wed, 22 Dec 2021 20:33:48 +0000 (02:03 +0530)]
ac,radeonsi/gfx11: swizzle MRT0/1 for dual source blending
If dual source blending is enabled, use export targets 21 and 22.
Also we have to swap odd/even lanes between export target 21 and 22.
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh Mohan Marimuthu [Thu, 10 Feb 2022 19:54:56 +0000 (01:24 +0530)]
radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there
If both mrtz and alpha-to-coverage are enabled, the alpha channel must
be exported through mrtz.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Indrajit Kumar Das [Fri, 28 Jan 2022 05:55:01 +0000 (11:25 +0530)]
radeonsi/gfx11: VRS changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sat, 22 Jan 2022 17:42:51 +0000 (12:42 -0500)]
radeonsi/gfx11: TF_RING_SIZE changed to a per-SE size
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sat, 22 Jan 2022 14:57:20 +0000 (09:57 -0500)]
radeonsi/gfx11: don't use FLUSH_AND_INV_DB_META
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sat, 22 Jan 2022 14:56:39 +0000 (09:56 -0500)]
radeonsi/gfx11: emit SQ_NON_EVENT for tessellation at the end of IBs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 21 Jan 2022 09:05:25 +0000 (04:05 -0500)]
radeonsi/gfx11: don't set non-existent CP_COHER_START_DELAY
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Wed, 22 Dec 2021 14:43:25 +0000 (20:13 +0530)]
radeonsi/gfx11: program db render control register
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 21 Sep 2021 15:36:01 +0000 (11:36 -0400)]
radeonsi/gfx11: scattered register deltas
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 11 May 2021 04:50:43 +0000 (00:50 -0400)]
radeonsi/gfx11: implement attributes through memory
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 17 Dec 2021 17:30:58 +0000 (12:30 -0500)]
radeonsi/gfx11: don't set COMPR for exports, use 0x3 channel mask instead
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh Mohanmarimuthu [Tue, 5 Oct 2021 19:14:42 +0000 (00:44 +0530)]
radeonsi/gfx11: use PIXEL_PIPE_STATE_DUMP event instead of ZPASS_DONE
Use PIXEL_PIPE_STATE_CONTROL/DUMP event instead of ZPASS_DONE for gfx11.
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Thu, 23 Sep 2021 11:01:46 +0000 (07:01 -0400)]
radeonsi/gfx11: don't set non-existent SPI_SHADER_USER_DATA_VS_x
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 22 Sep 2021 09:07:26 +0000 (05:07 -0400)]
ac,radeonsi/gfx11: set SWIZZLE_ENABLE correctly
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 22 Sep 2021 08:37:34 +0000 (04:37 -0400)]
ac,radeonsi/gfx11: remove FMASK loads
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 01:03:54 +0000 (21:03 -0400)]
radeonsi/gfx11: add CB deltas
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sat, 18 Dec 2021 14:07:48 +0000 (09:07 -0500)]
radeonsi/gfx11: buffer descriptor changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Pierre-Eric Pelloux-Prayer [Tue, 27 Jul 2021 12:13:34 +0000 (14:13 +0200)]
radeonsi/gfx11: image descriptor changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Pierre-Eric Pelloux-Prayer [Tue, 27 Jul 2021 11:42:24 +0000 (13:42 +0200)]
radeonsi/gfx11: register changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Pierre-Eric Pelloux-Prayer [Tue, 27 Jul 2021 11:40:28 +0000 (13:40 +0200)]
radeonsi/gfx11: add assert in legacy vs path
Only ngg should be used.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Tue, 24 Aug 2021 07:23:06 +0000 (12:53 +0530)]
radeonsi/gfx11: program inst_pref_size for compute
For gfx11, program INST_PREF_SIZE value in SPI registers.
v2: move INST_PREF_SIZE reg programming (Marek Olšák)
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Thu, 16 Sep 2021 01:30:04 +0000 (21:30 -0400)]
radeonsi/gfx11: program inst_pref_size for graphics
For gfx11, program INST_PREF_SIZE value in SPI registers.
v4: fix mask value, code indendation (Marek Olšák)
v3: improve code for readability (Indrajit Das, Marek Olšák)
v2: ngg is always enabled in gfx11 (Marek Olšák)
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Sun, 22 Aug 2021 12:17:08 +0000 (17:47 +0530)]
radeonsi/gfx11: instruction cache line size is 128 bytes
In gfx11, instruction cache line size is 128 bytes. This patch makes
the neccessary code changes.
v2: instruction store line size is 64 bytes (Marek Olšák)
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Tue, 20 Jul 2021 19:12:59 +0000 (00:42 +0530)]
radeonsi/gfx11: interp changes for 16bit
make interp 16bit changes for gfx11
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Tue, 20 Jul 2021 18:46:57 +0000 (00:16 +0530)]
radeonsi/gfx11: interp changes for 32bit
make interp 32bit changes for gfx11
v2: fix coding indentation issue (Pierre-Eric)
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Tue, 15 Jun 2021 09:35:06 +0000 (15:05 +0530)]
radeonsi/gfx11: make flat_scratch changes for compute
make flat_scratch gen11 changes for compute
v5: optimize the code for size (Pierre-Eric)
v4: remove type cast from 64bit to 32bit (Marek Olšák)
use radeon_set_sh_reg_seq (Marek Olšák)
combine RSRC and scratch reg write packets (Marek Olšák)
v3: fix coding guidelines (Marek Olšák)
v2: do not skip si_resource_reference() call (Marek Olšák)
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Yogesh mohan marimuthu [Tue, 15 Jun 2021 09:22:51 +0000 (14:52 +0530)]
radeonsi/gfx11: make flat_scratch changes for graphics
gfx11 passes scratch base address using
SPI_GFX_SCRATCH_BASE_LO and _HI registers. Make the
code changes to support the same.
v5: remove type cast from 64bit to 32bit (Marek Olšák)
v4: combine scratch_memory and scratch_state atom (Marek Olšák)
v3: skip shader relocs for gfx11
v2: make atom for scratch_memory (Indrajit)
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 11 May 2021 04:44:00 +0000 (00:44 -0400)]
radeonsi/gfx11: use the new TCS WaveID SGPR to compute vs_rel_patch_id
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 01:04:19 +0000 (21:04 -0400)]
radeonsi/gfx11: enable arbitrary DCC format reinterpretation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 00:57:52 +0000 (20:57 -0400)]
radeonsi/gfx11: enable NGG-only draw paths
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Thu, 6 May 2021 21:40:25 +0000 (17:40 -0400)]
radeonsi/gfx11: expect packed threadID VGPRs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Thu, 6 May 2021 21:38:21 +0000 (17:38 -0400)]
radeonsi/gfx11: always allow DCC stores
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 11 Nov 2020 19:37:00 +0000 (14:37 -0500)]
radeonsi/gfx11: increase the hw screen offset alignment
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 00:41:47 +0000 (20:41 -0400)]
ac/surface: add gfx11 support to modifiers tests
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 09:54:26 +0000 (05:54 -0400)]
ac/surface: define gfx11 modifiers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 09:59:45 +0000 (05:59 -0400)]
ac/surface: gfx11 changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 8 Dec 2021 16:42:49 +0000 (11:42 -0500)]
ac/gpu_info: set cu_mask correctly for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 27 Apr 2022 03:23:33 +0000 (23:23 -0400)]
ac/llvm: don't set GLC for stores on gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Tue, 22 Mar 2022 14:19:41 +0000 (10:19 -0400)]
ac/llvm: update pknorm and waitcnt for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 11 Feb 2022 10:45:26 +0000 (05:45 -0500)]
ac/llvm: don't set DLC on gfx11 because it means something else there
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 17 Dec 2021 19:08:45 +0000 (14:08 -0500)]
ac/llvm: export mrt0 instead of null on gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sun, 27 Feb 2022 02:32:42 +0000 (21:32 -0500)]
ac: implement register shadowing for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Thu, 27 Jan 2022 04:36:30 +0000 (23:36 -0500)]
ac: scratch buffer register changes for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 17 Dec 2021 16:28:54 +0000 (11:28 -0500)]
ac: implement ac_get_tbuffer_format for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Pierre-Eric Pelloux-Prayer [Tue, 27 Jul 2021 12:36:30 +0000 (14:36 +0200)]
amd: update gfx10_format_table.py for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 4 May 2022 00:32:27 +0000 (20:32 -0400)]
ac: don't align VGPRs to 8 or 16 for gfx11
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 11:02:18 +0000 (07:02 -0400)]
amd: add Mesa-only addrlib changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Fri, 7 May 2021 10:12:19 +0000 (06:12 -0400)]
amd: import gfx11 addrlib
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Wed, 22 Sep 2021 08:58:53 +0000 (04:58 -0400)]
amd: add gfx11 to packet definitions
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sun, 28 Mar 2021 06:12:47 +0000 (02:12 -0400)]
amd: enable gfx11 in header generator, fix drivers with renamed gfx6-10 defs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sun, 28 Mar 2021 08:59:54 +0000 (04:59 -0400)]
amd/registers: add gfx11-rsrc.json
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sun, 28 Mar 2021 06:11:42 +0000 (02:11 -0400)]
amd/registers: add gfx11.json
Other files are also updated to due regeneration.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
Marek Olšák [Sun, 28 Mar 2021 05:57:44 +0000 (01:57 -0400)]
amd/registers: add gfx11 to the json generator
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
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