Michael Liao [Mon, 30 Aug 2021 05:42:18 +0000 (01:42 -0400)]
[amdgpu] Enable selection of `s_cselect_b64`.
Differential Revision: https://reviews.llvm.org/D109159
Mirko Brkusanin [Tue, 7 Sep 2021 14:25:04 +0000 (16:25 +0200)]
[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types
Legalizing G_MUL for non-standard types (like i33) generated an error. Putting
minScalar and maxScalar instead of clampScalar. Also using new rule, instead
of widening to the next power of 2, widen to the next multiple of the passed
argument (32 in this case), so instead of widening i65 to i128, we widen it to
i96.
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D109228
Mirko Brkusanin [Tue, 7 Sep 2021 14:18:19 +0000 (16:18 +0200)]
[AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR
Add implementation for the legalization of G_ROTL and G_ROTR machine
instructions. They are very similar to funnel shift instructions, the only
difference is funnel shifts have 3 operands, whereas rotate instructions have
two operands, the first being the register that is being rotated and the second
being the number of shifts. The legalization of G_ROTL/G_ROTR is just lowering
them into funnel shift instructions if they are legal.
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D105347
Simon Pilgrim [Tue, 7 Sep 2021 14:13:05 +0000 (15:13 +0100)]
[X86] X86InstrSSE.td - remove unused template parameters. NFC.
Identified in D109359
Simon Pilgrim [Tue, 7 Sep 2021 13:45:55 +0000 (14:45 +0100)]
[X86] X86InstrVecCompiler.td - remove unused template parameters. NFC.
Identified in D109359
Simon Pilgrim [Tue, 7 Sep 2021 13:45:25 +0000 (14:45 +0100)]
[X86] X86InstrFMA.td - remove unused template parameters. NFC.
Identified in D109359
Anton Afanasyev [Sun, 5 Sep 2021 11:00:04 +0000 (14:00 +0300)]
[AggressiveInstCombine] Add `AssumptionCache` to aggressive instcombine
Add support for @llvm.assume() to TruncInstCombine allowing
optimizations based on these intrinsics while computing known bits.
Anton Afanasyev [Wed, 1 Sep 2021 22:00:37 +0000 (01:00 +0300)]
[AggressiveInstCombine][Test] Add test for assumptions
Anton Afanasyev [Sun, 5 Sep 2021 07:19:43 +0000 (10:19 +0300)]
[AggresiveInstCombine] Add wrapper calls for `KnownBits` computing
Precommit before `AssumptionCache` adding: reviews.llvm.org/D109141
Differential Revision: https://reviews.llvm.org/D109288
Simon Pilgrim [Tue, 7 Sep 2021 13:33:03 +0000 (14:33 +0100)]
[llvm-exegesis][x86] Limit llvm-exegesis analysis tests to x86_64 triple hosts
Attempting to fix an issue with test failures on arm m1 apple macintoshes reported on D109353
Kadir Cetinkaya [Tue, 7 Sep 2021 13:15:21 +0000 (15:15 +0200)]
[clang][Driver] Pick the last --driver-mode in case of multiple ones
This was an accidental behaviour change in D106789 and this patch
restores it back to original state.
Differential Revision: https://reviews.llvm.org/D109361
Sander de Smalen [Tue, 7 Sep 2021 12:11:42 +0000 (13:11 +0100)]
[AArch64][SVE] Implement all-inactive predicate with PFALSE.
Instead of using a WHILE XZR, XZR instruction, just emit a PFALSE.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D109311
Nawrin Sultana [Tue, 31 Aug 2021 21:35:16 +0000 (16:35 -0500)]
[OpenMP] Change monotonicity of dynamic schedule
This patch changes the default monotonicity of dynamic schedule from
monotonic to non-monotonic when no modifier is specified.
Differential Revision: https://reviews.llvm.org/D109026
David Sherwood [Wed, 1 Sep 2021 12:09:49 +0000 (13:09 +0100)]
[SVE][NFC] Add SVE cost model tests for gathers/scatters
We previously didn't have any tests to defend the cost model
for gathers and scatters using SVE without a vscale_range
attribute. I've added tests to existing files:
Analysis/CostModel/AArch64/sve-gather.ll
Analysis/CostModel/AArch64/sve-scatter.ll
Differential Revision: https://reviews.llvm.org/D109055
Simon Pilgrim [Tue, 7 Sep 2021 12:57:49 +0000 (13:57 +0100)]
[llvm-exegesis] Analysis tests should run even without libpfm (PR51687)
Move inverse_throughput, latency and uops to sub-directories (like we already do for lbr), which require libpfm, so we can relax the lit limits for analysis tests in the x86 root directory.
Differential Revision: https://reviews.llvm.org/D109353
Dávid Bolvanský [Tue, 7 Sep 2021 12:29:59 +0000 (14:29 +0200)]
[NFC] Added test for stpcpy -> strcpy transformation with AS != 0
Brad Smith [Tue, 7 Sep 2021 11:54:23 +0000 (07:54 -0400)]
Mention OpenBSD in the documentation
Simon Pilgrim [Tue, 7 Sep 2021 10:43:26 +0000 (11:43 +0100)]
[KnownBits] Add support for X*X self-multiplication
Add KnownBits handling and unit tests for X*X self-multiplication cases which guarantee that bit1 of their results will be zero - see PR48683.
https://alive2.llvm.org/ce/z/NN_eaR
The next step will be to add suitable test coverage so this can be enabled in ValueTracking/DAG/GlobalISel - currently only a single Analysis/ScalarEvolution test is affected.
Differential Revision: https://reviews.llvm.org/D108992
Mirko Brkusanin [Tue, 7 Sep 2021 09:30:11 +0000 (11:30 +0200)]
[AMDGPU][GlobalISel] Legalize memcpy family of intrinsics
Legalize G_MEMCPY, G_MEMMOVE, G_MEMSET and G_MEMCPY_INLINE.
Corresponding intrinsics are replaced by a loop that uses loads/stores in
AMDGPULowerIntrinsics pass unless their length is a constant lower then
MemIntrinsicExpandSizeThresholdOpt (default 1024). Any G_MEM* instruction that
reaches legalizer should have a const length argument and should be expanded
into appropriate number of loads + stores.
Differential Revision: https://reviews.llvm.org/D108357
Fraser Cormack [Tue, 31 Aug 2021 14:29:47 +0000 (15:29 +0100)]
[RISCV][VP] Custom lower VP_STORE and VP_LOAD
This patch adds support for the vector-predicated `VP_STORE` and
`VP_LOAD` nodes. We do this in the same way we lower `MSTORE` and
`MLOAD`: to regular load/store instructions via intrinsics.
One necessary change was made to `SelectionDAGLegalize` so that
`VP_STORE` nodes' operation actions are taken from the stored "value"
operands, in the same vein as `STORE` or `MSTORE`.
Reviewed By: craig.topper, rogfer01
Differential Revision: https://reviews.llvm.org/D108999
Fraser Cormack [Tue, 31 Aug 2021 11:43:12 +0000 (12:43 +0100)]
[RISCV][VP] Custom lower VP_SCATTER and VP_GATHER
This patch adds support for the `VP_SCATTER` and `VP_GATHER` nodes by
lowering them to RVV's `vsox`/`vlux` instructions, respectively. This
process is almost identical to the existing `MSCATTER`/`MGATHER` support.
One extra change was made to `SelectionDAGLegalize` so that
`VP_SCATTER`'s operation action is derived from its stored "value"
operand rather than its return type (which is always the chain).
Reviewed By: craig.topper, rogfer01
Differential Revision: https://reviews.llvm.org/D108987
Roman Lebedev [Tue, 7 Sep 2021 08:47:20 +0000 (11:47 +0300)]
[exegesis][X86] ParallelSnippetGenerator: don't accidentally create serialized instructions
In the case of no tied variables, we pick random defs, and then random uses that don't alias with defs we just picked.
Sounds good, except that an X86 instruction may have implicit reg uses,
e.g. for `MULX` it's `EDX`/`RDX`: `Intel SDM, 4-162 Vol. 2B MULX — Unsigned Multiply Without Affecting Flags`
> Performs an unsigned multiplication of the implicit source operand (EDX/RDX) and the specified source operand
> (the third operand) and stores the low half of the result in the second destination (second operand), the high half
> of the result in the first destination operand (first operand), without reading or writing the arithmetic flags.
And indeed, every once in a while `llvm-exegesis` happened to pick EDX as a def while measuring throughput,
and producing garbage output:
```
$ ./bin/llvm-exegesis -num-repetitions=1000000 -mode=inverse_throughput -repetition-mode=min --loop-body-size=4096 -dump-object-to-disk=false -opcode-name=MULX32rr --max-configs-per-opcode=65536
---
mode: inverse_throughput
key:
instructions:
- 'MULX32rr EDX R11D R12D'
config: ''
register_initial_values:
- 'R12D=0x0'
- 'EDX=0x0'
cpu_name: znver3
llvm_triple: x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
- { key: inverse_throughput, value: 4.00014, per_snippet_value: 4.00014 }
error: ''
info: instruction has no tied variables picking Uses different from defs
assembled_snippet: 415441BC00000000BA00000000C4C223F6D4C4C223F6D4C4C223F6D4C4C223F6D4415CC3415441BC00000000BA0000000049B80200000000000000C4C223F6D4C4C223F6D44983C0FF75F0415CC3
...
```
```
$ ./bin/llvm-exegesis -num-repetitions=1000000 -mode=inverse_throughput -repetition-mode=min --loop-body-size=4096 -dump-object-to-disk=false -opcode-name=MULX32rr --max-configs-per-opcode=65536
---
mode: inverse_throughput
key:
instructions:
- 'MULX32rr R13D EDX ECX'
config: ''
register_initial_values:
- 'ECX=0x0'
- 'EDX=0x0'
cpu_name: znver3
llvm_triple: x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
- { key: inverse_throughput, value: 3.00013, per_snippet_value: 3.00013 }
error: ''
info: instruction has no tied variables picking Uses different from defs
assembled_snippet: 4155B900000000BA00000000C4626BF6E9C4626BF6E9C4626BF6E9C4626BF6E9415DC34155B900000000BA0000000049B80200000000000000C4626BF6E9C4626BF6E94983C0FF75F0415DC3
...
```
Oops! Not only does that not look fun, i did hit that pitfail during AMD Zen 3 enablement.
While i have since then addressed this in rGd4d459e7475b4bb0d15280f12ed669342fa5edcd,
i suspect there may be other buggy results lying around, so we should at least stop producing them.
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D109275
Justas Janickas [Thu, 2 Sep 2021 10:51:39 +0000 (11:51 +0100)]
[OpenCL] Disallows static kernel functions in C++ for OpenCL
It is disallowed in OpenCL C to declare static kernel functions and
C++ for OpenCL is expected to inherit such behaviour. Error is now
correctly reported in C++ for OpenCL when declaring a static kernel
function.
Differential Revision: https://reviews.llvm.org/D109150
Andrew Wei [Tue, 7 Sep 2021 09:05:39 +0000 (17:05 +0800)]
[AArch64] Avoid adding duplicate implicit operands when expanding pseudo insts.
When expanding pseudo insts, in order to create a new machine instr, we use BuildMI,
which will add implicit operands by default. And transferImpOps will also copy implicit
operands from old ones. Finally, duplicate implicit operands are added to the same inst.
Sometimes this can cause correctness issues. Like below inst,
renamable $w18 = nsw SUBSWrr renamable $w30, renamable $w14, implicit-def dead $nzcv
After expanding, it will become
$w18 = SUBSWrs renamable $w13, renamable $w14, 0, implicit-def $nzcv, implicit-def dead $nzcv
A redundant implicit-def $nzcv is added, but the dead flag is missing.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D109069
Fraser Cormack [Mon, 6 Sep 2021 09:23:56 +0000 (10:23 +0100)]
[SelectionDAG][VP] Fix MemSDNode::getBasePtr
Found while working on D108987. When interpreting VP nodes as
`MemSDNode` nodes, this function would return the incorrect indices.
This was due to `VP_GATHER` and having no "passthru", and both
`VP_GATHER` and `VP_SCATTER` having their mask operands *after* the base
pointer, unlike `MGATHER` and `MSCATTER`.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D109308
luxufan [Mon, 6 Sep 2021 02:48:56 +0000 (10:48 +0800)]
[RuntimeDyld] Don't use bitwise operation on SymbolRef::Type
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D109292
Brad Smith [Tue, 7 Sep 2021 08:38:52 +0000 (04:38 -0400)]
Mention OpenBSD in the documentation
Frederic Cambus [Tue, 7 Sep 2021 08:25:12 +0000 (04:25 -0400)]
[compiler-rt] Document that builtins is known to work on OpenBSD.
Differential Revision: https://reviews.llvm.org/D109346
Ben Shi [Tue, 7 Sep 2021 02:21:38 +0000 (10:21 +0800)]
[ARM] Implement target hook function to decide folding (mul (add x, c1), c2)
Prevent the folding in DAGCombine if it leads to worse code.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D109124
Ben Shi [Wed, 1 Sep 2021 13:19:22 +0000 (21:19 +0800)]
[ARM][test] Add new tests for (mul (add r, c0), c1)
Reviewed By: RKSimon, dmgreen
Differential Revision: https://reviews.llvm.org/D109123
Clement Courbet [Tue, 7 Sep 2021 07:06:18 +0000 (09:06 +0200)]
[llvm-exegesis] Add unit test in preparation for
DD109275
Nathan Ridge [Tue, 31 Aug 2021 08:34:09 +0000 (04:34 -0400)]
[clangd] Omit default template arguments from type hints
Differential Revision: https://reviews.llvm.org/D108975
Nathan Ridge [Tue, 31 Aug 2021 07:42:16 +0000 (03:42 -0400)]
[clangd] Omit type hints that are too long
Differential Revision: https://reviews.llvm.org/D108972
Ye Luo [Sat, 4 Sep 2021 19:07:41 +0000 (14:07 -0500)]
[OpenMP][libomptarget] Change device vector elements to unique_ptr type
Using std::vector<DeviceTy> requires implementing copy constructor and copied assign operator for DeviceTy.
Indeed DeviceTy should never be copied. After changing to std::vector<std::unique_ptr<DeviceTy>>,
All the unsafe copy constructor and copy assign operator implementations can be removed.
Compilers mark them deleted due to mutex or underlying objects and this is the desired behavior.
Differential Revision: https://reviews.llvm.org/D109276
oToToT [Tue, 7 Sep 2021 02:39:01 +0000 (10:39 +0800)]
[clang] Add '-ast-dump-filter=' support
Before this patch, we only support syntax like
`clang -cc1 -ast-dump -ast-dump-filter main a.c`
or
`clang -Xclang -ast-dump -Xclang -ast-dump-filter -Xclang main a.c`
when using ast-dump-filter.
It is helpful to also support `-ast-dump-filter=` syntax, so we can do
something like
`clang -cc1 -ast-dump -ast-dump-filter=main a.c`
or
`clang -Xclang -ast-dump -Xclang -ast-dump-filter=main a.c`
It is more cleaner when passing arguments through `-Xclang` in this case.
Also, **clang-check** do support this syntax, and I think people might
be confiused when they found they can't use `ast-dump-filter` with
clang.
Ye Luo [Tue, 7 Sep 2021 02:27:12 +0000 (21:27 -0500)]
[OpenMP][libomptarget] Change synchronize_ty return type to int32_t
Plugins always return int32_t. Stay consistent with other functions which return error status.
Differential Revision: https://reviews.llvm.org/D109341
Jinsong Ji [Tue, 7 Sep 2021 01:20:35 +0000 (01:20 +0000)]
[RuntimeDyld] Guard UsedTLSStorage to x86 ELF only
UsedTLSStorage is only used in allocateTLSSection,
guarded in x87 ELF only.
So clang will emit error with -Werror on.
.../llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp:288:12:
error: private field 'UsedTLSStorage' is not used
[-Werror,-Wunused-private-field]
unsigned UsedTLSStorage = 0;
^
Matthias Springer [Tue, 7 Sep 2021 00:40:04 +0000 (09:40 +0900)]
[mlir][linalg] linalg.tiled_loop peeling
Differential Revision: https://reviews.llvm.org/D108270
Craig Topper [Tue, 7 Sep 2021 00:44:51 +0000 (17:44 -0700)]
[X86] Handle inverted inputs when matching VPTERNLOG from 2 binary ops.
This is a more general version of D109273. Though it doesn't
peek through bitcasts or rearange broadcasts.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D109295
Fangrui Song [Mon, 6 Sep 2021 22:54:02 +0000 (15:54 -0700)]
[X86] Simplify condition guarding emitCalleeSavedFrameMoves. NFC
Fangrui Song [Mon, 6 Sep 2021 22:47:40 +0000 (15:47 -0700)]
[X86] Simplify two hasFP(F). NFC
David Green [Mon, 6 Sep 2021 21:03:32 +0000 (22:03 +0100)]
[ARM] Add tests for MVE narrowing intrinsic demand bits.
Nikita Popov [Mon, 6 Sep 2021 20:18:11 +0000 (22:18 +0200)]
[SCEV] Fix applyLoopGuards() with range check idiom (PR51760)
Due to a typo, this replaced %x with umax(C1, umin(C2, %x + C3))
rather than umax(C1, umin(C2, %x)). This didn't make a difference
for the existing tests, because the result is only used for range
calculation, and %x will usually have an unknown starting range,
and the additional offset keeps it unknown. However, if %x already
has a known range, we may compute a result range that is too
small.
Sanjay Patel [Mon, 6 Sep 2021 18:47:02 +0000 (14:47 -0400)]
[DAGCombine] Prevent the transform of combine for multi-use operand
The test is based on a miscompile example in:
https://llvm.org/PR51321
Differential Revision: https://reviews.llvm.org/D107692
Benjamin Kramer [Mon, 6 Sep 2021 19:17:29 +0000 (21:17 +0200)]
[lldb] Fix pessimizing move warning
lldb/source/Core/PluginManager.cpp:695:21: warning: moving a temporary object prevents copy elision [-Wpessimizing-move]
return Status(std::move(ret.takeError()));
^
lldb/source/Core/PluginManager.cpp:695:21: note: remove std::move call here
return Status(std::move(ret.takeError()));
^~~~~~~~~~ ~
Andrew Litteken [Wed, 28 Jul 2021 14:02:00 +0000 (07:02 -0700)]
[IRSim] Adding support for recognizing branch similarity
The current IRSimilarityIdentifier does not try to find similarity across blocks, this patch provides a mechanism to compare two branches against one another, to find similarity across basic blocks, rather than just within them.
This adds a step in the similarity identification process that labels all of the basic blocks so that we can identify the relative branching locations. Within an IRSimilarityCandidate we use these relative locations to determine whether if the branching to other relative locations in the same region is the same between branches. If they are, we consider them similar.
We do not consider the relative location of the branch if the target branch is outside of the region. In this case, both branches must exit to a location outside the region, but the exact relative location does not matter.
Reviewers: paquette, yroux
Differential Revision: https://reviews.llvm.org/D106989
Dávid Bolvanský [Mon, 6 Sep 2021 17:40:52 +0000 (19:40 +0200)]
[NFC] Added tests for D109283
Craig Topper [Mon, 6 Sep 2021 17:22:39 +0000 (10:22 -0700)]
[X86] Pre-commit test cases for D109295. NFC
David Blaikie [Mon, 6 Sep 2021 17:20:39 +0000 (10:20 -0700)]
DebugInfo: Add a FIXME/suggestion about using sibling/parent index to DWARFDebugInfoEntry
As a reminder if someone comes looking to improve iteration or parent
navigation performance of DWARFDebugInfoEntry.
Michał Górny [Mon, 26 Apr 2021 20:47:05 +0000 (22:47 +0200)]
[lldb] Support SaveCore() from gdb-remote client
Extend PluginManager::SaveCore() to support saving core dumps
via Process plugins. Implement the client-side part of qSaveCore
request in the gdb-remote plugin, that creates the core dump
on the remote host and then uses vFile packets to transfer it.
Differential Revision: https://reviews.llvm.org/D101329
Kazu Hirata [Mon, 6 Sep 2021 16:10:07 +0000 (09:10 -0700)]
[Support] Qualify auto (NFC)
Identified with readability-qualified-auto.
Andrzej Warzynski [Sun, 22 Aug 2021 16:32:44 +0000 (16:32 +0000)]
[flang][plugins] Make `PluginParseTreeAction` an abstract class
There's no point in providing a default implementation for
`PluginParseTreeAction`. This patch makes it abstract forcing users to
specialise it in order to use it.
Differential Revision: https://reviews.llvm.org/D108518
Jonas Paulsson [Sun, 5 Sep 2021 15:27:22 +0000 (17:27 +0200)]
[SelectionDAGBuilder] Bugfix in visitInlineAsm()
In case of a virtual register tied to a phys-def, the register class needs to
be computed. Make sure that this works generally also with fast regalloc by
using TLI.getRegClassFor() whenever possible, and make only the case of
'Untyped' use getMinimalPhysRegClass().
Fixes https://bugs.llvm.org/show_bug.cgi?id=51699.
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D109291
Sanjay Patel [Mon, 6 Sep 2021 15:08:17 +0000 (11:08 -0400)]
[InstCombine] fix infinite loop from shift transform
I'm not sure if there is a better way or another bug
still here, but this is enough to avoid the loop from:
https://llvm.org/PR51657
The test requires multiple blocks and datalayout to
trigger the problem path.
Sanjay Patel [Mon, 6 Sep 2021 14:40:52 +0000 (10:40 -0400)]
[InstCombine] refactor to reduce indent; NFC
This transform should be updated to use better
variable names and code comments. It could
also create the shift-of-shift directly instead
of relying on another combine for that.
Sanjay Patel [Mon, 6 Sep 2021 14:22:24 +0000 (10:22 -0400)]
[InstCombine] fix one-use condition for shift transform
This transform is written in a confusing style,
and I suspect it is at fault for a more serious
bug noted in PR51567.
But it's been around forever, so I'm making the
minimal change to fix another bug - it could
increase instructions because it was not checking
uses.
Sanjay Patel [Mon, 6 Sep 2021 14:14:50 +0000 (10:14 -0400)]
[InstCombine] early exit to reduce indentation; NFC
Sanjay Patel [Mon, 6 Sep 2021 13:30:44 +0000 (09:30 -0400)]
[InstCombine] add test for shift-trunc-shift with extra uses; NFC
The transform doesn't check for extra uses, so we
have more instructions than we started with.
Ivan Zhechev [Mon, 6 Sep 2021 13:57:14 +0000 (13:57 +0000)]
[Flang] Port test_modfile.sh to Python
To enable Flang testing on Windows, shell scripts have
to be ported to Python. The following changes have been made:
"test_modfile.sh" has been ported to Python, and
the relevant tests relying on it.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D107956
Victor Campos [Fri, 6 Aug 2021 15:13:43 +0000 (16:13 +0100)]
[AArch64][MC] Merge FeaturePMU into FeaturePerfMon
FeaturePMU was created in AArch64 to accommodate one missing system
register, PMMIR_EL1, in commit
ffcd7698aea7bcbb2b4edffc484793e1ff47b85d.
However, the Performance Monitors extension already had a target
feature, which is called FeaturePerfMon. Therefore, FeaturePMU is
redundant.
This patch removes FeaturePMU and merges its contents into
FeaturePerfMon.
Reviewed By: dnsampaio
Differential Revision: https://reviews.llvm.org/D109246
Ivan Zhechev [Mon, 6 Sep 2021 13:54:33 +0000 (13:54 +0000)]
[Flang] Port test_folding.sh to Python
To enable Flang testing on Windows,
shells scripts have to be ported to Python.
The following changes have been made:
Ported `test_folding.sh` to Python;
Additional changes to the tests themselves
to use the new script.
LIBPGMATH support for testing
not available at this point.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D108217
David Truby [Thu, 2 Sep 2021 15:59:14 +0000 (16:59 +0100)]
[AArch64][sve] Prevent incorrect function call on fixed width vector
The isEssentiallyExtractHighSubvector function currently calls
getVectorNumElements on a type that in specific cases might be scalable.
Since this function only has correct behaviour at the moment on scalable
types anyway, the function can just return false when given a fixed type.
Differential Revision: https://reviews.llvm.org/D109163
Wang, Pengfei [Mon, 6 Sep 2021 11:43:00 +0000 (19:43 +0800)]
[X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw
This is a follow up patch after D78564 and D108887.
Martin helped to confirm the alignment in GCC mingw is the same as the
size of vector. https://reviews.llvm.org/D108887#inline-1040893
Reviewed By: mstorsjo
Differential Revision: https://reviews.llvm.org/D109265
Justas Janickas [Wed, 1 Sep 2021 14:22:30 +0000 (15:22 +0100)]
[OpenCL] Fix condition macro name in test
Benjamin Kramer [Mon, 6 Sep 2021 11:04:21 +0000 (13:04 +0200)]
[lldb] Silence compiler warnings from
37cbd817d3e2b8c673862e2eb262cad6dd3dd244
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3638:30: error: moving a temporary object prevents copy elision [-Werror,-Wpessimizing-move]
return SendErrorResponse(std::move(ret.takeError()));
^
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3638:30: note: remove std::move call here
return SendErrorResponse(std::move(ret.takeError()));
^~~~~~~~~~ ~
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3622:8: error: unused variable 'cf' [-Werror,-Wunused-variable]
bool cf = packet_str.consume_front("qSaveCore");
Sander de Smalen [Fri, 3 Sep 2021 16:29:52 +0000 (17:29 +0100)]
[AArch64] NFC: Regenerate CHECK lines for sve-masked-gather/scatter-legalize.ll
sve-masked-gather-legalize.ll said the check lines were generated by
the update_llc_test_checks script, but that was not the case.
This patch ensures both tests are generated with the script.
Change-Id: If6f0331ef01ace84017497a484161d1724ac0744
Benjamin Kramer [Mon, 6 Sep 2021 10:30:47 +0000 (12:30 +0200)]
[lldb] Silence compiler warning after
fae0dfa6421ea6c02f86ba7292fa782e1e2b69d1
lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp:4765:13: warning: enumeration value 'Ibm128' not handled in switch [-Wswitch]
switch (llvm::cast<clang::BuiltinType>(qual_type)->getKind()) {
^
Michał Górny [Mon, 26 Apr 2021 11:47:02 +0000 (13:47 +0200)]
[lldb] [llgs server] Support creating core dumps on NetBSD
Add a new SaveCore() process method that can be used to request a core
dump. This is currently implemented on NetBSD via the PT_DUMPCORE
ptrace(2) request, and enabled via 'savecore' extension.
Protocol-wise, a new qSaveCore packet is introduced. It accepts zero
or more semicolon-separated key:value options, invokes the core dump
and returns a key:value response. Currently the only option supported
is "path-hint", and the return value contains the "path" actually used.
The support for the feature is exposed via qSaveCore qSupported feature.
Differential Revision: https://reviews.llvm.org/D101285
Qiu Chaofan [Mon, 6 Sep 2021 09:49:23 +0000 (17:49 +0800)]
[Clang] Add __ibm128 type to represent ppc_fp128
Currently, we have no front-end type for ppc_fp128 type in IR. PowerPC
target generates ppc_fp128 type from long double now, but there's option
(-mabi=(ieee|ibm)longdouble) to control it and we're going to do
transition from IBM extended double-double ppc_fp128 to IEEE fp128 in
the future.
This patch adds type __ibm128 which always represents ppc_fp128 in IR,
as what GCC did for that type. Without this type in Clang, compilation
will fail if compiling against future version of libstdcxx (which uses
__ibm128 in headers).
Although all operations in backend for __ibm128 is done by software,
only PowerPC enables support for it.
There's something not implemented in this commit, which can be done in
future ones:
- Literal suffix for __ibm128 type. w/W is suitable as GCC documented.
- __attribute__((mode(IF))) should be for __ibm128.
- Complex __ibm128 type.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D93377
Sander de Smalen [Tue, 31 Aug 2021 12:48:52 +0000 (13:48 +0100)]
[VectorUtils] Teach findScalarElement to return splat value.
If the vector is a splat of some scalar value, findScalarElement()
can simply return the scalar value if it knows the requested lane
is in the vector.
This is only needed for scalable vectors, because the InsertElement/ShuffleVector
case is already handled explicitly for the fixed-width case.
This helps to recognize an InstCombine fold like:
extractelt(bitcast(splat(%v))) -> bitcast(%v)
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D107254
David Carlier [Mon, 6 Sep 2021 09:51:51 +0000 (10:51 +0100)]
[Sanitizer] Intercept clock_getcpuid/pthread_getcpuid on netbsd.
Reviewed By: mgorny
Differential Revision: https://reviews.llvm.org/D109278
LLVM GN Syncbot [Mon, 6 Sep 2021 09:25:28 +0000 (09:25 +0000)]
[gn build] Port
12fa608af44a
Tianqing Wang [Mon, 6 Sep 2021 05:55:17 +0000 (13:55 +0800)]
[X86] Add CRC32 feature.
d8faf03807ac implemented general-regs-only for X86 by disabling all features
with vector instructions. But the CRC32 instruction in SSE4.2 ISA, which uses
only GPRs, also becomes unavailable. This patch adds a CRC32 feature for this
instruction and allows it to be used with general-regs-only.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D105462
Justas Janickas [Wed, 1 Sep 2021 08:14:07 +0000 (09:14 +0100)]
[OpenCL] Supports optional generic address space semantics in C++ for OpenCL 2021
Adds support for a feature macro `__opencl_c_generic_adress_space`
in C++ for OpenCL 2021 enabling a respective optional core feature
from OpenCL 3.0. Testing is only performed in SemaOpenCL because
generic address space functionality is yet to be implemented in
C++ for OpenCL 2021.
This change aims to achieve compatibility between C++ for OpenCL
2021 and OpenCL 3.0.
Differential Revision: https://reviews.llvm.org/D108461
Florian Mayer [Fri, 3 Sep 2021 11:04:13 +0000 (12:04 +0100)]
[hwasan] Test use-after-scope with -fno-exceptions.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D109224
Alexander Belyaev [Fri, 3 Sep 2021 17:06:15 +0000 (19:06 +0200)]
[mlir][linalg] Fix `FoldInitTensorWithDimOp` if dim(init_tensor) is static.
It looks like it was a typo. Instead of `*maybeConstantIndex`,
`initTensorOp.getStaticSize(*maybeConstantIndex)` should be used to access the
dim size of the tensor. There is a test for that in `canonicalize.mlir`, but it
was working correctly because `ReplaceStaticShapeDims` was canonicalizing DimOp
before `FoldInitTensorWithDimOp`. So, to make the patterns more "orthogonal",
this case is disabled.
Differential Revision: https://reviews.llvm.org/D109247
David Spickett [Mon, 6 Sep 2021 08:45:06 +0000 (08:45 +0000)]
Revert "[compiler-rt][Profile] Disable test on Arm/AArch64 Linux"
This reverts commit
8b86f8a3256a59cbaa12858cb0842025d48f549f.
The inconsistent behaviour has been fixed with
5e50d3073a5ead122a731580ded3f1cb3c21ee54.
Moritz Sichert [Fri, 27 Aug 2021 13:51:58 +0000 (15:51 +0200)]
[RuntimeDyld] Implemented relocation of TLS symbols in ELF
Differential Revision: https://reviews.llvm.org/D105466
Moritz Sichert [Fri, 30 Oct 2020 10:36:53 +0000 (11:36 +0100)]
[RuntimeDyld] Implemented relocation for ELF::R_X86_64_GOTPC32
Differential Revision: https://reviews.llvm.org/D95512
Ivan Zhechev [Mon, 6 Sep 2021 08:19:20 +0000 (08:19 +0000)]
[Flang] Ported test_errors.sh to Python
To enable Flang testing on Windows, shell scripts have to be ported to Python. In this patch the "test_errors.sh" script is ported to python ("test_errors.py"). The RUN line of existing tests was changed to make use of the python script.
Used python regex in place of awk/sed.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D107575
Saiyedul Islam [Fri, 3 Sep 2021 11:14:22 +0000 (16:44 +0530)]
[clang-nvlink-wrapper] Add documentation in clang docs
Add documentation of clang-nvlink-wrapper tool in clang.
Add it to the release notes of clang. Fix a small MSVC
warning.
Differential Revision: https://reviews.llvm.org/D109225
Marius Brehler [Mon, 6 Sep 2021 05:51:36 +0000 (05:51 +0000)]
[mlir][docs] Complement list of supported scf ops
Fangrui Song [Mon, 6 Sep 2021 04:02:56 +0000 (21:02 -0700)]
[AArch64] Remove an uneeded !NeedsWinCFI check. NFC
guopeilin [Mon, 6 Sep 2021 03:11:23 +0000 (11:11 +0800)]
[AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)z
Currently, we use SExtValue to decide whether to invert tbz or tbnz.
However, for the case zext (xor x, c), we should use ZExt rather
than SExt otherwise we will generate totally opposite branches.
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D108755
LLVM GN Syncbot [Sun, 5 Sep 2021 19:38:22 +0000 (19:38 +0000)]
[gn build] Port
8ce2675b1363
Ruslan Arutyunyan [Sun, 5 Sep 2021 03:16:18 +0000 (20:16 -0700)]
[libc++][compare] Implement three_way_comparable[_with] concepts
Implementation of `three_way_comparable` and `three_way_comparable_with` concepts from <compare> header.
Please note that I have temporarily removed `<compare>` header from `<utility>` due to cyclic dependency that prevents using `<concepts>` header in `<compare>` one.
I tried to quickly resolve those issues including applying suggestions from @cjdb and dive deeper by myself but the problem seems more complicated that we thought initially.
I am in progress to prepare the patch with resolving this cyclic dependency between headers but for now I decided to put all that I have to the review to unblock people that depend on that functionality. At first glance the patch with resolving cyclic dependency is not so small (unless I find the way to make it smaller and cleaner) so I don't want to mix everything to one review.
Reviewed By: ldionne, cjdb, #libc, Quuxplusone
Differential Revision: https://reviews.llvm.org/D103478
Benjamin Kramer [Sun, 5 Sep 2021 19:13:03 +0000 (21:13 +0200)]
Arthur Eubanks [Sun, 5 Sep 2021 19:02:31 +0000 (12:02 -0700)]
[test] Remove some legacy PM tests in llvm/test/Instrumentation/AddressSanitizer
Arthur Eubanks [Sun, 5 Sep 2021 18:51:19 +0000 (11:51 -0700)]
[test] Remove some legacy PM tests in llvm/test/Instrumentation
Arthur Eubanks [Sun, 5 Sep 2021 18:36:21 +0000 (11:36 -0700)]
[test] Remove -loop-guard-widening legacy PM tests
Kazu Hirata [Sun, 5 Sep 2021 15:37:27 +0000 (08:37 -0700)]
[clang-tidy] Drop unnecessary const from return types (NFC)
Identified with readability-const-return-type.
David Green [Sun, 5 Sep 2021 15:18:31 +0000 (16:18 +0100)]
[DAG] Remove oneuse check in select_cc setgt X, -1, C, ~C fold
This appears to produce better code, even if the condition may need to
be replicated.
Simon Pilgrim [Sun, 5 Sep 2021 15:08:03 +0000 (16:08 +0100)]
[CostModel][X86] Add generic costs for vXi32 MUL -> v2Xi16 PMADDDW folds
Based off the improved fold in D108522
This should eventually allow us to replace the SLM only cost patterns with generic versions.
Simon Pilgrim [Sat, 4 Sep 2021 14:44:41 +0000 (15:44 +0100)]
[CostModel][X86] Add vXi32 multiply pattern tests
Add tests for vXi32 multiplies where the operands have been extended from vXi8/vXi16
David Green [Sun, 5 Sep 2021 15:04:01 +0000 (16:04 +0100)]
[DAG] Fold select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C
Given a select_cc producing a constant and a invertion of the constant
for a comparison more than zero, we can produce an xor with ashr
instead, which produces smaller code. The ashr either sets all bits or
clear all bits depending on if the value is negative. This is then xor'd
with the constant to optionally negate the value.
https://alive2.llvm.org/ce/z/DTFaBZ
This includes a OneUseCheck on the Cmp, which seems to make thinks a
little worse and will be removed in a followup.
Differential Revision: https://reviews.llvm.org/D109149
David Green [Sun, 5 Sep 2021 13:06:47 +0000 (14:06 +0100)]
[DAG] Fold setcc eq with ashr to compare to zero.
Pulled out of D109149, this folds set_cc seteq (ashr X, BW-1), -1 ->
set_cc setlt X, 0 to prevent some regressions later on when folding
select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C
Differential Revision: https://reviews.llvm.org/D109214
Dávid Bolvanský [Sun, 5 Sep 2021 10:12:07 +0000 (12:12 +0200)]
[InstCombine] stpcpy(d,s) -> strcpy(d,s) if the result is not used
David Green [Sun, 5 Sep 2021 09:17:21 +0000 (10:17 +0100)]
[DAG] Add tests for select_cc and setcc with constant patterns.
Cheng Wang [Sun, 5 Sep 2021 02:38:31 +0000 (10:38 +0800)]
[libc][Obvious] Reorder CMakelists alphabetically.
Cheng Wang [Sat, 4 Sep 2021 12:14:54 +0000 (20:14 +0800)]
[libc][Obvious] Fix typos