test cases for global constant arrays

version 4

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Support global constant arrays

Version 3.
Support global constant arrays defined outside any kernel.

Example:

constant int h[] = {71,72,73,74,75,76,77};
kernel void k(global int *dst) {
  int i = get_global_id(0);
  dst[i] = h[i % 7];
}

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

ir::unit can return its constantSet

Version 3.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add special register constoffst expressing curbe offset

Version 3.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

disable buggy old code doing global constant

Version 3.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add helper functions in gbe::Program

Version 3.
for get global constant related information

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add helper functions in ir::Constant and ir::ConstantSet

Version 3.
Deleted empty destructor of ConstantSet.
Updated ConstantSet::getConstant()

And I am afraid I cannot delete the empty constructor of ConstantSet.
That will break the constructor of ir::Unit. See unit.cpp, line 30.

add ir::Constant.reg field
add helper functions in ir::ConstantSet to get specified ir::Constant
and binary packed constant array

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

New test case of ceil()

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Make ceil() work

Delete an extra comma in ocl_stdlib.h, then ceil() works. Fun

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add the INCLUDE_DIRECTORIES directive to all the FindXXX modules.

If the header files are not at the standard location, we will FAIL
to compile because FIND_PATH directive will not add the Include Dir
to CXX flags. Add the INCLUDE_DIRECTORIES to handle this if we find
the headers we neeeds.

Signed-off-by: Junyan He <junyan.he@linux.intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Implement clGetDeviceInfo(..., CL_DRIVER_VERSION, ...)

This returns the library major/minor version. As it does not follow the
usual naming scheme, the output code is duplicated.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Handle size queries in clGetDeviceInfo better

This allows size queries on all fields.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add missing fmin() and fmax() overloads

These functions must also exist for vector types.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>

Add missing select() overloads

Both signed and unsigned types are allowed as the condition type,
regardless of the true/false branch types.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>

Fix typo

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>

Fix crash when output IR

When output IR, program crashes because two register names are missing.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

Add typedefs for extension functions

This allows application programs to cast the pointer returned from
clGetExtensionFunctionAddress to the appropriate function pointer type.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add cl*Intel to extension function lookup

This allows applications to look up the extension functions when going
through the ICD loader.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Rename Intel specific extension functions for ICD

The ICD extension specification requires that extension function names end
in the vendor name to allow clGetExtensionFunctionAddress to switch between
implementations.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add clIntelMapBufferGTT, clIntelUnmapBufferGTT, cl_mem_map_gtt and cl_mem_unmap_gtt

cl_mem_map_gtt calls cl_buffer_map_gtt.
cl_mem_unmap_gtt calls cl_buffer_unmap_gtt.
clIntelMapBufferGTT is a one to one mapping of drm_intel_gem_bo_map_gtt.
clIntelUnmapBufferGTT is a one to one mapping of drm_intel_gem_bo_unmap_gtt.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add constant ptr argument test case.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add constant pointer as argument support in runtime.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add constant pointer as argument support in kernel.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add register allocate from tail support for constant buffer.

By default curbe alloc from head, grf alloc from tail.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

utests: should set pitch to zero if host_ptr is NULL.

Per OCL spec, we should set pitch to zero if the host_ptr is
NULL.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Simon Richter <Simon.Richter@hogyros.de>

Implement clGetMemObjectInfo

Currently, only the properties

 - CL_MEM_TYPE
 - CL_MEM_FLAGS
 - CL_MEM_SIZE

are implemented.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Fix pitch parameter in clCreateImage2D

If the host_ptr is NULL, the pitch parameter must be 0.

The pitch parameter gives the number of bytes per scanline. Specifying 0
selects the minimum possible.

Signed-off-by: Simon Richter <Simon.Richter@hogyros.de>
Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Use "clang" command from PATH

This assumes that LLVM is installed in the system path, but avoids
compiling the path of binaries into the library.

Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Make EGL optional

This fixes builds if EGL is unavailable. The OpenGL sharing extension will
be disabled then.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Prefer versioned llvm-config

If multiple versions are installed, prefer version 3.2 before falling back
to the default version.

Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Accept glibc's implementation of memalign()

If the platform is not Linux, but glibc based, we assume that the
memalign() function is working satisfactorily.

Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Implement KHR ICD extension

This adds a pointer to the dispatch table at the beginning of every object
of type

 - cl_command_queue
 - cl_context
 - cl_device_id
 - cl_event
 - cl_kernel
 - cl_mem
 - cl_platform_id
 - cl_program
 - cl_sampler

as required by the ICD specification. The layout of the dispatch table
comes from the OpenCL ICD loader by Brice Videau <brice.videau@imag.fr> and
Vincent Danjean <Vincent.Danjean@ens-lyon.org>.

To avoid dispatch table entries being overwritten with the ICD loader's
implementations of the CL functions (as would be the proper behaviour for
the ELF loader), the -Bsymbolic option is given to the linker.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

"Implement" clGetExtensionFunctionAddress()

This function should not fail if a function entry point cannot be found --
instead we return NULL.

Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Avoid extension names as preprocessor tokens

The Khronos Group headers define constants with the names of extensions if
the header defines the extension API. When the preprocessor sees one of
these names, it performs macro substitution, leading to compilation errors.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Fix typo in cl_get_platform_info function name

Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

write_image: Fixed a bug when use scalar data as color source.

If the color source is scalar data type for example from the
kernel input parameters, then we should use QnPhysical to get
the source, rather than hard coded the subnr to zero.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Meng Lv <meng.lv@intel.com>

GenRegister src[] is not allowed in clang, change this style.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

GenRegInterval should be a struct instead of a class

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

fix error in clang: variable array length is not support for non-POD element

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

--no-rtti should be changed to -fno-rtti in clang++

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

remove dollar sign in identifier

Therefore it removes compiler warnings.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

remove -ffast-math comiler flag

FC16 has the bug https://bugzilla.redhat.com/show_bug.cgi?id=795995
which prevents us from using our library on FC16.

Even though it's not our compiler's bug, we don't need fast-math flag here as
our compiler is not a computation oriented program, so we can remove this flag
safely.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

make raw_fd_ostream not close stdout

stdout was closed by llvm::raw_fd_ostream.
Now let llvm::raw_fd_ostream not close stdout.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@gmail.com>

utests: refine the helper macros.

The previous implementation has many duplicate code, and the FN
is used incorrectly. Now fix it and the code looks a little bit
clean and when it fails the reported function name should be
correct now.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

utests: add a simple test case for cl_khr_gl_sharing.

This test case creates a OCL image from a OGL texture.
Then use a OCL kernel to fill the image. Then it back
to OGL to read the pixels back and verify the color.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Lu, Guanqun <guanqun.lu@intel.com>

utests: added cl_khr_gl_sharing related helper functions.

This is the preparation to add clgl interoperate test cases.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Lu, Guanqun <guanqun.lu@intel.com>

Fixed the extension string for both platform and device.

I forgot to calculate the extensions string size. Now fix it.
And also forgot to handle the device's extension case, now add
it and duplicate the extensions from the platform directly.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Lu, Guanqun <guanqun.lu@intel.com>

Enable the clFlush.

We don't need to do anything now, as current it alwasy flushs
all the commands each time. We may need to revisit here after we
optmize the clEnqueueNDRangeKernel's behaviour and don't flush
pipeline every time.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Lu, Guanqun <guanqun.lu@intel.com>

Fix brw instruction field "flag"

bits2.da1.flag_subreg_nr is missing in brw_instruction.
The location of bits2.da1.flag_reg_nr is wrong. See IVB spec.

This patch fixes bugs above, also
make disassembler output correct flag_subreg_nr for conditional modifier
and prediction.

Before we change it:
(+f0.1) cmp.l(8)      null g12<8,8,1>D g2.2<0,1,0>D {align1 WE_normal 1Q};

After we change it:
(+f1.1) cmp.l.f1.1(8) null g12<8,8,1>D g2.2<0,1,0>D {align1 WE_normal 1Q};

Although flag_reg_nr has moved position, other code is still right,
because if we use f0.1 before, now we use f1.0

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Lu, Guanqun <guanqun.lu@intel.com>

throw exception instead of just assert

So that we know the reason of why we're failing.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

release the contraint of volatile pointer

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add disassembler support for message gateway

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

backend: Use alignof keyword when supported

the keyword alignof of C++11 is supported after gcc 4.8, other than use
old template way to calculate the align of a class, the keyword is used.

Signed-off-by: Feng, Boqun <boqun.feng@intel.com>
Reviewed-by: Zhigang, Gong <zhigang.gong@linux.intel.com>

Update documents.

Update documents according to our latest progress, which is for
releasing version 0.1. Also add those html files back.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

enable CL_DEVICE_IMAGE_SUPPORT check

Signed-off-by: lv meng <meng.lv@intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>
Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

change the way clGetDeviceInfo() is called in cl_ocl_init()

This works as a test case for the newly implemented clGetDeviceInfo()
behaviour: pass NULL to param_value and it should return the string size.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

enhance clGetDeviceInfo() API to return the length of string fields

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

change the way clGetPlatformInfo() is called in cl_ocl_init()

This works as a test case for the newly implemented clGetPlatformInfo()
behaviour: pass NULL to param_value and it should return the string size.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

enhance clGetPlatformInfo() API to return the string length

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add test case for clCreateContextFromType()

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

implement clCreateContextFromType()

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

fix one typo for clCreateContextFromType()

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

fix typo in FindLLVM.cmake

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Fixed a potential null pointer reference bug.

When we failed to create a dri2 connection, we jump to the error out
path, and the driver_name may be null pointer, before set it to null,
we need to check it first.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

Set the initial library versions to 0.1.

We have two libraries here, one is the gen backend and the other
is libcl runtime library. We set both initial versions to 0.1.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

Change the cl version to 1.0.

The first stage goal is to deliver a OCL 1.0 implementation,
so let's change the version here.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

Add the interface of cl_buffer_map_gtt

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

fix unused-result warning

fix unused-result warning, because we didn't use the return value of fread

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Output the map from IR reg to ASM reg

It is hard to guess the meaning of
  "mul(8) g10<1>d g0.6<0,1,0>d g3.2<0,1,0>d"
if you don't know the IR reg num of "g10" etc.

Now we can output the map from IR reg to ASM reg, such as
  "%0 g10.0D"
  "%1 g0.6D"
  "%2 g3.2D"
So you know the meaning is
  "mul %0 %1 %2"

By default, not output those message.
You can turn on by BVAR "OCL_OUTPUT_REG_ALLOC".

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Use new OCL1.2 API rather than those deprecated API.

Use clCreateImage to replace the old API clCreateImage2D.
It will silent the compiler warnings.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Homer Hsing <homer.xing@intel.com>

do not use the advanced C++ feature

so that it can work on gcc 4.6 happily, otherwise, I have the following issues:

    backend/src/./ir/instruction.hpp:112:7: error: type ‘gbe::ir::Instruction’ is not a direct base of ‘gbe::ir::Instruction’

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add a case for MEM_INVALID to fix a warning

    warning: enumeration value ‘MEM_INVALID’ not handled in switch [-Wswitch]

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add linking library for gcc compiler.

Otherwise, there are lots of linking errors such as:

    undefined reference to `llvm::ConstantDataSequential::getElementType() const'

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Fixed a bug when expire registers.

The previous implementation forgot to change the head when
the to expired register is at the left side of the current
head. Thus the algorithm will be broken, as the algorithm need
the head has the smallest offset.

Without this patch, the register expireing doesn't work. Thus
any kernel function need more than 44 DWORD registers or 11
DWORD vec4 will fail to get registers.

The calculation is:

(Register file size / (type size * simdwidth) - special registers)
(4K / (4 * 16)) - 20 = 44

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Homer Hsing <homer.xing@intel.com>

Add utest case for movforphi's undef case.

This case will trigger MovForPhi to handle a undef vector
element.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Homer Hsing <homer.xing@intel.com>

Delete temp files if compiled successfully

If IR was compiled successfully, delete temp files.
My '/tmp' was full of '*.cl', '*.ll' files.
Now the temp files are gone, world is clean :)

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

Output meaning of special registers in dumped IR

Help debug IR. Before we change this, we feel hard to know
what "%3, %4" stuff mean in IR. Now we output their meaning.

Before we change this, dumped IR is:
    .decl.dword %0
    .decl.dword %1
    .decl.dword %2

After we change this, dumped IR is:
    .decl.dword %0 local_id_0
    .decl.dword %1 local_id_1
    .decl.dword %2 local_id_2

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Display function argument name in IR

Help debug IR. If we see "LT.int32 %31 %30 %20" and we know
"%20" is a input argument with detailed name, we can debug
IR better.

Before we change it, dumped IR is:
   decl_input.value %20

After we change it, dumped IR is:
   decl_input.value %20 argument_name

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

fix the possible overflow in slm_sz

slm_sz in this structure has 16 bits, but we might specify 64KB which has 17
bits, it would thus cause overflow and undesired truncation.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Fix uninitialize value warning

Give a inital value to shut up compiler
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Also make "arithmetic shift right" work

Only add a line of code ...
Looks like Mr. Ben has forgotten that line ...
Also add a test case.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Make "logical shift right" work

Before we fix the bug, the "logical shift right" is wrong:
  (0xFF000000U >> 24) == 0xFFFFFFFF

After we fix the bug, it is right.
  (0xFF000000U >> 24) == 0xFF

Also add a test case, test by 128 random input.

This patch fixes "component_transfer_linear" filter.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add convert_uchar_sat and test case

'convert_uchar_sat' converts float to uchar saturately.
'convert_uchar_sat' simply calls add_sat.
by 'convert_uchar_sat' function we don't need to clamp(value, 0, 255).
we also add a test case.

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

Fixed a bug on 64bit system.

Previous implementation only considers the 32bit system.
This commit fix it. And use bsf rather than bsr, then we
don't really need to fixup the slot number according to
the bit width. And remove the non-intel platform code.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Feng, Boqun <boqun.feng@intel.com>

fix disassembler: horizontal stride of dest operand

If horizontal stride of a dest operand is four,
before we fix it, the disassembler outputs
(+f0) mov(8) g20<3>UB g18<8,8,1>F { align1 WE_normal 1Q };

after we fix it,
(+f0) mov(8) g20<4>UB g18<8,8,1>F { align1 WE_normal 1Q };

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Test case for fabs

Test 128 times fabs(). Input data is random

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>

fix the wrong zero extend instruction handling

This helps to fix the problem facing Xing Homer. When we encounter 'zext'
instruction, we should take the soruce type as an unsigned type, otherwise
we're just sign extend the number, which is not what we want.

For the implementation, I'm reusing getUnsignedType() and this expects an
integer to be accepted, and this conforms to the spec of LLVM.

This patch doesn't trigger regression. I'll provide the corresponding test case
later.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Test case for integer division arithmetic ~

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Add a test case for integer remainder arithmetic

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Make integer remainder & division arithmetic work ~ ~

Intel Gen7 GPU cannot do integer remainder (or division) if exec_width is 16.
But we are generating such kind of cmds, so the GPU hangs.
We need to split such command ~ ~

before:
(+f0) math intmod(16) g18<1>D g12<8,8,1>D g2.1<0,1,0>D {align1 WE_normal 1Q};

after:
(+f0) math intmod(8) g18<1>D g12<8,8,1>D g2.1<0,1,0>D {align1 WE_normal 1Q};
(+f0) math intmod(8) g19<1>D g13<8,8,1>D g2.1<0,1,0>D {align1 WE_normal 1Q};

Signed-off-by: Homer Hsing <homer.xing@intel.com>
Reviewed-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Split the multiple test cases to individual cases.

As the original test framework will do some resource releasing
job at the end of each test runing. If we call multiple tests
in one instance, then we will miss the chance to call those releasing
functions thus may cause some leaking.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Reviewed-by: Homer Hsing <homer.xing@intel.com>

add sub_sat test case

Our hardware can't handle the following case properly:

  add.sat g3 g1 -g2

when g1 and g2 are INT_MIN. So let's disable the INT's test case right now.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add anonymous namespace to avoid name collision with the next patch

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add sub_sat operation

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

fix two unused variables

I don't find these two warnings until now, and here's the simple fix.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add add_sat test case

Due to our limiation of not supporting 64 bit yet, I'll just omit the long case
in this patch, when 64 bit is ready, we can re-enable this.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

add add_sat operation

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

keep track of saturate flag in GenInstructionState

As a side effect, the constraint about GenInstructionState is removed, because
this structure is merely used for book keeping and it doesn't directly maps
onto hardware, it doesn't need to be strictly uint32_t.

Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>

Fixed a bug in write_imagef.

In write_imagef, the color is a float vector, and the TypedWrite send
message need to use float too. Previous implementation convert the
float to a UD register which is a bug.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Homer Hsing <homer.xing@intel.com>

Implement cl_khr_gl_sharing by using upstream technology.

The previous implementation use a modified mesa library
and can't work with upstream mesa.

Now I managed to use existing egl extension and gbm to
import a gl texture to a cl image. Actually, the gbm
can't fully support our purpose, as it can't lookup
image for egl x11 platform. We have to touch gbm's
internal data structure to manually initialize its image
extension.

Furthermore, gbm only provide the API to get the image's
handle, and doesn't provide the one to get image's name.
As we are using different fd from the existing GL loader.
The handle is useless for us. I use the DRI2 image extension
function directly to get the name rather than the handle.
And it works well.

Now, after this patch applied. The cl_khr_gl_sharing could
work with upstream mesa. I recommend you use the latest git
master version.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Tested-by: Homer Hsing <homer.xing@intel.com>