Blue Swirl [Sat, 9 Mar 2013 11:02:07 +0000 (11:02 +0000)]
Merge branch 'ppc-for-upstream' of git://github.com/agraf/qemu
* 'ppc-for-upstream' of git://github.com/agraf/qemu: (66 commits)
pseries: Add compatible property to root of device tree
target-ppc: Move CPU aliases out of translate_init.c
target-ppc: Report CPU aliases for QMP
target-ppc: List alias names alongside CPU models
target-ppc: Make host CPU a subclass of the host's CPU model
PPC: xnu kernel expects FLUSH to be cleared on STOP
PPC: Fix dma interrupt
target-ppc: Fix PPC_DUMP_SPR_ACCESS build
target-ppc: Synchronize FPU state with KVM
target-ppc: Add mechanism for synchronizing SPRs with KVM
Save memory allocation in the elf loader
pseries: Implement h_read hcall
target-ppc: Change "POWER7" CPU alias
target-ppc: Fix remaining microcontroller typos among models
target-ppc: Split model definitions out of translate_init.c
target-ppc: Update Coding Style for CPU models
target-ppc: Turn descriptive CPU model comments into device descriptions
target-ppc: Turn descriptive CPU family comments into device descriptions
target-ppc: Set remaining fields on CPU family classes
target-ppc: Register all types for TARGET_PPCEMB
...
David Gibson [Mon, 25 Feb 2013 19:27:12 +0000 (19:27 +0000)]
pseries: Add compatible property to root of device tree
Currently, for the pseries machine the device tree supplied by qemu to SLOF
and from there to the guest does not include a 'compatible property' at the
root level. Usually that works fine, since in this case the compatible
property doesn't really give any information not already found in the
'device_type' or 'model' properties.
However, the lack of 'compatible' confuses the bootloader install in the
SLES11 SP2 and SLES11 SP3 installers. This patch therefore adds a token
'compatible' property to work around that.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-stable@nongnu.org
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Mon, 25 Feb 2013 03:43:17 +0000 (03:43 +0000)]
target-ppc: Move CPU aliases out of translate_init.c
Move array of CPU aliases to cpu-models.c, alongside model definitions.
This requires to zero-terminate the aliases array since ARRAY_SIZE() can
no longer be used in translate_init.c then.
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sat, 23 Feb 2013 07:52:24 +0000 (07:52 +0000)]
target-ppc: Report CPU aliases for QMP
The QMP query-cpu-definitions implementation iterated over CPU classes
only, which were getting less and less as aliases were extracted.
Keep them in QMP as valid -cpu arguments even if not guaranteed stable.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sat, 23 Feb 2013 07:34:28 +0000 (07:34 +0000)]
target-ppc: List alias names alongside CPU models
Revert adding a separate -cpu ? output section for aliases and list them
per CPU subclass.
Requested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sat, 23 Feb 2013 11:22:12 +0000 (11:22 +0000)]
target-ppc: Make host CPU a subclass of the host's CPU model
This avoids assigning individual class fields and contributors
forgetting to add field assignments in KVM-only code.
ppc_cpu_class_find_by_pvr() requires the CPU model classes to be
registered, so defer host CPU type registration to kvm_arch_init().
Only register the host CPU type if there is a class with matching PVR.
This lets us drop error handling from instance_init.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Amadeusz Sławiński [Thu, 21 Feb 2013 07:34:11 +0000 (07:34 +0000)]
PPC: xnu kernel expects FLUSH to be cleared on STOP
otherwise it gets stuck in a loop
so clear it when unsetting run when flush is set
void
IODBDMAStop( volatile IODBDMAChannelRegisters *registers)
{
IOSetDBDMAChannelControl( registers,
IOClearDBDMAChannelControlBits( kdbdmaRun )
| IOSetDBDMAChannelControlBits( kdbdmaFlush ));
DBDMA: writel 0x0000000000000b00 <= 0xa0002000
DBDMA: channel 0x16 reg 0x0
DBDMA: status 0x00002000
while( IOGetDBDMAChannelStatus( registers) & (
kdbdmaActive | kdbdmaFlush))
eieio();
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
DBDMA: readl 0x0000000000000b04 => 0x00002000
DBDMA: channel 0x16 reg 0x1
it continues to get printed
}
Signed-off-by: Amadeusz Sławiński <amade@asmblr.net>
[agraf: replace tabs with spaces]
Signed-off-by: Alexander Graf <agraf@suse.de>
Amadeusz Sławiński [Thu, 21 Feb 2013 07:34:10 +0000 (07:34 +0000)]
PPC: Fix dma interrupt
In openbios (drivers/ide.c) they are set to
0000000d 00000000 00000002 00000000
0000000e 00000000 00000003 00000000
0000000f 00000000 00000004 00000000
(The last one seems to be not implemented in qemu)
It follows convention of how they are set on real machines,
both ide and dma ones are increased
Real machine one:
http://web.archive.org/web/
20090107151044/http://penguinppc.org/historical/dev-trees-html/g4_agp_500_2.html
00000013 00000001 0000000b 00000000
00000014 00000001 0000000c 00000000
00000015 00000001 0000000d 00000000
Signed-off-by: Amadeusz Sławiński <amade@asmblr.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Wed, 20 Feb 2013 18:24:57 +0000 (18:24 +0000)]
target-ppc: Fix PPC_DUMP_SPR_ACCESS build
A victim of the
d523dd00a7d73b28f2e99acf45a4b3f92e56e40a AREG0
conversion, insert the missing cpu_env arguments.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Wed, 20 Feb 2013 16:41:51 +0000 (16:41 +0000)]
target-ppc: Synchronize FPU state with KVM
Currently qemu does not get and put the state of the floating point and
vector registers to KVM. This is obviously a problem for savevm, as well
as possibly being problematic for debugging of FP-using guests.
This patch fixes this by using new extensions to the ONE_REG interface to
synchronize the qemu floating point state with KVM.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Wed, 20 Feb 2013 16:41:50 +0000 (16:41 +0000)]
target-ppc: Add mechanism for synchronizing SPRs with KVM
Currently when runing under KVM on ppc, we synchronize a certain number of
vital SPRs to KVM through the SET_SREGS call. This leaves out quite a lot
of important SPRs which are maintained in KVM. It would be helpful to
have their contents in qemu for debugging purposes, and when we implement
migration it will be vital, since they include important guest state that
will need to be restored on the target.
This patch sets up for synchronization of any registers supported by the
KVM ONE_REG calls. A new variant on spr_register() allows a ONE_REG id to
be stored with the SPR information. When we set/get information to KVM
we also synchronize any SPRs so registered.
For now we set this mechanism up to synchronize a handful of important
registers that already have ONE_REG IDs, notably the DAR and DSISR.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Fabien Chouteau [Tue, 19 Feb 2013 04:41:11 +0000 (04:41 +0000)]
Save memory allocation in the elf loader
The current elf loader uses too much memory. For example, I have a
executable with a bss section of 400 MB and I set the ram size to 512
MB. Qemu uses about 780MB of RAM (which is fine), but there's a peak at
1.6 GB during initialization (this is not fine).
This patch fixes two things:
1) do not allocate each elf program twice.
2) do not allocate memory for areas that are only zeros.
For this we need a new field in Rom: "datasize" which is the size of the
allocated data. If datasize is less than romsize, it means that the area
from datasize to romsize is filled with zeros.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Erlon Cruz [Mon, 18 Feb 2013 05:00:32 +0000 (05:00 +0000)]
pseries: Implement h_read hcall
This h_call is useful for DLPAR in future amongst other things. Given an index
it fetches the corresponding PTE stored in the htab.
Signed-off-by: Erlon Cruz <erlon.cruz@br.flextronics.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:51 +0000 (23:16 +0000)]
target-ppc: Change "POWER7" CPU alias
Let it resolve to v2.3 rather than v2.0.
Suggested-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:50 +0000 (23:16 +0000)]
target-ppc: Fix remaining microcontroller typos among models
controler -> controller
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:49 +0000 (23:16 +0000)]
target-ppc: Split model definitions out of translate_init.c
Now that model definitions only reference their parent type, model
definitions are independent of the family definitions and can be
compiled independently of TCG translation.
Keep all #if defined(TODO) code local to cpu-models.c.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:48 +0000 (23:16 +0000)]
target-ppc: Update Coding Style for CPU models
Drop the space in #if defined (TODO).
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:47 +0000 (23:16 +0000)]
target-ppc: Turn descriptive CPU model comments into device descriptions
Fix microcontroller typo while at it.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:46 +0000 (23:16 +0000)]
target-ppc: Turn descriptive CPU family comments into device descriptions
This gets rid of some more overly long comments that have lost most of
their purpose now that in most cases there's only two functions left per
CPU family.
The class field is inherited by the actual CPU models, so override it.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:45 +0000 (23:16 +0000)]
target-ppc: Set remaining fields on CPU family classes
Now POWERPC_DEF_SVR() no longer sets family-specific fields itself.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:44 +0000 (23:16 +0000)]
target-ppc: Register all types for TARGET_PPCEMB
Don't attempt to suppress registration of CPU types, since the criteria
is actually a property of the class and should thus become a field.
Since we can't check a field set in a class_init function before
registering the type that leads to execution of that function, guard the
-cpu class lookup instead and suppress exposing these classes in -cpu ?
and in QMP.
In case someone tries to hot-add an incompatible CPU via device_add,
error out in realize.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:43 +0000 (23:16 +0000)]
target-ppc: Set instruction flags on CPU family classes
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:42 +0000 (23:16 +0000)]
target-ppc: Introduce abstract CPU family types
Instead of assigning *_<family> constants, set .parent to a family type.
Introduce a POWERPC_FAMILY() macro to keep type registration close to
its implementation. This macro will need tweaking later.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:41 +0000 (23:16 +0000)]
target-ppc: Convert CPU definitions
Turn the array of model definitions into a set of self-registering QOM
types with their own class_init. Unique identifiers are obtained from
the combination of PVR, SVR and family identifiers; this requires all
alias #defines to be removed from the list. Possibly there are some more
left after this commit that are not currently being compiled.
Prepares for introducing abstract intermediate CPU types for families.
Keep the right-aligned macro line breaks within 78 chars to aid
three-way merges.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:40 +0000 (23:16 +0000)]
target-ppc: Get model name from type name
We are about to drop the redundant name field along with ppc_def_t.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:39 +0000 (23:16 +0000)]
target-ppc: Extract POWER7 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:38 +0000 (23:16 +0000)]
target-ppc: Extract 970 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:37 +0000 (23:16 +0000)]
target-ppc: Extract 405GPe alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:36 +0000 (23:16 +0000)]
target-ppc: Extract MPC8240 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:35 +0000 (23:16 +0000)]
target-ppc: Extract MPC5200/MPC5200B aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:34 +0000 (23:16 +0000)]
target-ppc: Extract MPC52xx alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:33 +0000 (23:16 +0000)]
target-ppc: Extract MPC82xx_HiP{3, 4} aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:32 +0000 (23:16 +0000)]
target-ppc: Extract MPC82xx aliases to *_HiP4
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:31 +0000 (23:16 +0000)]
target-ppc: Extract MPC8247/MPC8248/MPC8270-80 aliases
This depends on the fix for "G2leGP3" PVR.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:30 +0000 (23:16 +0000)]
target-ppc: Extract MPC82xx alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:29 +0000 (23:16 +0000)]
target-ppc: Extract e200 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:28 +0000 (23:16 +0000)]
target-ppc: Extract e300 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:27 +0000 (23:16 +0000)]
target-ppc: Extract MPC83xx aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:26 +0000 (23:16 +0000)]
target-ppc: Extract e500v1/e500v2 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:25 +0000 (23:16 +0000)]
target-ppc: Extract MPC85xx aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:21 +0000 (23:16 +0000)]
target-ppc: Extract 604e alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:24 +0000 (23:16 +0000)]
target-ppc: Extract 601/601v aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:23 +0000 (23:16 +0000)]
target-ppc: Extract 603r alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:22 +0000 (23:16 +0000)]
target-ppc: Extract 603e alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:20 +0000 (23:16 +0000)]
target-ppc: Extract 740/750 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:19 +0000 (23:16 +0000)]
target-ppc: Extract 750 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:18 +0000 (23:16 +0000)]
target-ppc: Extract 7x5 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:17 +0000 (23:16 +0000)]
target-ppc: Extract 7400 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:16 +0000 (23:16 +0000)]
target-ppc: Extract 7410 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:15 +0000 (23:16 +0000)]
target-ppc: Extract 7448 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:14 +0000 (23:16 +0000)]
target-ppc: Extract 7450 alias
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:13 +0000 (23:16 +0000)]
target-ppc: Extract 74x1 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:12 +0000 (23:16 +0000)]
target-ppc: Extract 74x5 as aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:11 +0000 (23:16 +0000)]
target-ppc: Extract 74x7[A] aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:10 +0000 (23:16 +0000)]
target-ppc: Turn "ppc32" and "ppc64" CPUs into aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:09 +0000 (23:16 +0000)]
target-ppc: Extract 440 aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:08 +0000 (23:16 +0000)]
target-ppc: Extract 40x aliases
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:07 +0000 (23:16 +0000)]
target-ppc: Extract MGT823/MPC8xx as aliases
They used different PVRs but were defined to MPC8xx.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:06 +0000 (23:16 +0000)]
target-ppc: Extract MPC5xx aliases
Their PVR differed but was defined to MPC5xx.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:05 +0000 (23:16 +0000)]
target-ppc: Make -cpu "ppc" an alias to "ppc32"
Drop the #if 0'ed alternative to make it "ppc64" for TARGET_PPC64.
If we ever want to change it, we can more easily do so now.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:04 +0000 (23:16 +0000)]
target-ppc: Extract aliases from definitions list
Move definitions that were 100% identical except for the name into a
list of aliases so that we don't register duplicate CPU types.
Drop the accompanying comments since they don't really add value.
We need to support recursive lookup due to code names referencing a
generic name referencing a specific model revision.
List aliases separately for -cpu ?.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:03 +0000 (23:16 +0000)]
target-ppc: Inline comma into POWERPC_DEF_SVR() macro
To repurpose the POWERPC_DEF_SVR() macro outside of an array,
move the comma into the macro. No functional change.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:02 +0000 (23:16 +0000)]
target-ppc: Drop nested TARGET_PPC64 guard for POWER7
It is within a large TARGET_PPC64 section from 970 to 620,
so an #endif /* TARGET_PPC64 */ is confusing. Clean this up.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:01 +0000 (23:16 +0000)]
target-ppc: Update error handling in ppc_cpu_realize()
Commit
fe828a4d4b7a5617cda7b24e95e327bfb71d790e added a new fatal error
message while QOM realize'ification was in flight.
Convert it to return an Error instead of exit()ing.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Sun, 17 Feb 2013 23:16:00 +0000 (23:16 +0000)]
target-ppc: Fix "G2leGP3" PVR
Unlike derived PVR constants mapped to CPU_POWERPC_G2LEgp3, the
"G2leGP3" model definition itself used the CPU_POWERPC_G2LEgp1 PVR.
Fixing this will allow to alias CPU_POWERPC_G2LEgp3-using types to
"G2leGP3".
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Andreas Färber [Mon, 11 Feb 2013 10:53:11 +0000 (10:53 +0000)]
target-ppc: Fix CPU_POWERPC_MPC8547E
It was defined to ..._MPC8545E_v21 rather than ..._MPC8547E_v21.
Due to both resolving to CPU_POWERPC_e500v2_v21 this did not show.
Fixing this nontheless helps with QOM'ifying CPU aliases.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Sun, 10 Feb 2013 18:59:02 +0000 (18:59 +0000)]
pseries: Add cleanup hook for PAPR virtual LAN device
Currently the spapr-vlan device does not supply a cleanup call for its
NetClientInfo structure. With current qemu versions, that leads to a SEGV
on exit, when net_cleanup() attempts to call the cleanup handlers on all
net clients.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Amit Shah [Tue, 5 Mar 2013 17:51:35 +0000 (23:21 +0530)]
virtio-serial: make flow control explicit in virtio-console
virtio-console.c used to return a value less than the number of bytes
asked to be written out to a chardev backend in case the backend is not
writable. virtio-serial-bus.c then implicitly enabled flow control for
that port.
Make this explicit instead.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
f5ec50b068c25422256e499cf4adc06d353bf394.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Amit Shah [Tue, 5 Mar 2013 17:51:34 +0000 (23:21 +0530)]
virtio: console: add flow control
The virtio-serial-bus already has the logic to make flow control work
properly. Hook into the char layer's new ability to signal a backend is
writable again.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
abffa02235d55ca6e2489068c58971c8897e976c.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:33 +0000 (23:21 +0530)]
serial: add flow control to transmit
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
2976f10d4e66ed4a34011f6f0d6937026d22be5f.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:32 +0000 (23:21 +0530)]
qemu-char: move text console init to console.c
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
17cefde0a8d7807294bab95e93c3328a20d3f2ed.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:31 +0000 (23:21 +0530)]
qemu-char: move msmouse registeration to msmouse.c
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
b47d1153b0d7669743c9a6bb98ce30f4cf7f876b.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:30 +0000 (23:21 +0530)]
qemu-char: move baum registration to baum.c
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
1b24baa1ec3a174d5cad31e079d829904b53077b.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:29 +0000 (23:21 +0530)]
qemu-char: move spice registration to spice-qemu-char.c
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
49a8d12eeb117e5530b2fab02af7681b54f9245c.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:28 +0000 (23:21 +0530)]
qemu-char: make char drivers dynamically registerable
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
0ff4f5f2b8b7afdb85a0c241403ad73f472f0b81.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:27 +0000 (23:21 +0530)]
qemu-char: remove use of QEMUTimer in favor of glib idle function
qemu-char is now independent of the QEMU main loop.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
3cda0bbcfb94912df8a767983a52bb71a4a3231d.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:26 +0000 (23:21 +0530)]
qemu-char: use a glib timeout instead of qemu-timer
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
05a883ce5a98275b976bf0124610599859c2b7da.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Amit Shah [Tue, 5 Mar 2013 17:51:25 +0000 (23:21 +0530)]
char: add gio watch fn for tcp backends
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
b50e668c4f4146a654c5d4412440eb9e589f2c02.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:24 +0000 (23:21 +0530)]
qemu-char: add pty watch
This lets ptys support adding front end watchs.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
23380f37b22d407ba0b9e080f6ea0d66b279f2d2.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:23 +0000 (23:21 +0530)]
qemu-char: add watch support
This allows a front-end to request for a callback when the backend
is writable again.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
96f93c0f741064604bbb6389ce962191120af8b7.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:22 +0000 (23:21 +0530)]
qemu-char: tcp: make use GIOChannel
I didn't bother switching to g_io_channel_read/write because we need to use
sendmsg on Unix. No problem though since we're using an unbuffered channel.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
002f726576dfb51bca4854aa257b74d77c1cd4e8.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:21 +0000 (23:21 +0530)]
qemu-char: convert UDP to GIOChannel
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
775a2bd666a3d1fa008656bf97191b7573c6ffb5.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:20 +0000 (23:21 +0530)]
qemu-char: convert pty to GIOChannel
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
339eebf3c59a450b0354056e9ac4b41f67230831.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:19 +0000 (23:21 +0530)]
qemu-char: convert fd_chr to use a GIOChannel
This uses the newly introduced IOWatchPoll source.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
0cb5d14510ee835a0ebc23676d10a2cce9280da5.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:18 +0000 (23:21 +0530)]
char: add IOWatchPoll support
This is a special GSource that supports CharDriverState style
poll callbacks.
For reviewability and bisectability, this code is #if 0'd out in this
patch to avoid unused warnings since all of the functions are static.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
9b59ac17b9d0bb3972a73fed04d415f07b391936.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:17 +0000 (23:21 +0530)]
qemu-char: remove dead/confusing logic with nb_stdio_clients
This code is very old dating back to 2007. What is puzzling is that
STDIO_MAX_CLIENTS was always #define to 1 meaning that all of the code to deal
with more than one client was unreachable.
Just remove the whole mess of it.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
d276bccdbf4e7463020c5f539f61ae3bfbc88d1d.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Tue, 5 Mar 2013 17:51:16 +0000 (23:21 +0530)]
char-socket: fix error reporting
Right now the inet connect code tries all available addresses but until one
doesn't fail. It passes local_err each time without clearing it from the
previous failure. This can trigger an assert since the inet connect code
tries to set an error on an object != NULL.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Message-id:
16c806d60aa5e9660ed7751bb4e37dcd278f97f0.
1362505276.git.amit.shah@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Kuo-Jung Su [Tue, 5 Mar 2013 21:27:24 +0000 (21:27 +0000)]
hw/nand.c: correct the sense of the BUSY/READY status bit
The BIT6 of Status Register(SR):
SR[6] behaves the same as R/B# pin
SR[6] = 0 indicates the device is busy;
SR[6] = 1 means the device is ready
Some NAND flash controller (i.e. ftnandc021) relies on the SR[6]
to determine if the NAND flash erase/program is success or error timeout.
P.S:
The exmaple NAND flash datasheet could be found at following link:
http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/
8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf
Signed-off-by: Kuo-Jung Su <dantesu@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Aurelien Jarno [Tue, 5 Mar 2013 14:11:30 +0000 (15:11 +0100)]
Merge branch 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm:
MAINTAINERS: add entry for ARM KVM guest cores
configure: Enable KVM on ARM
hw/kvm/arm_gic: Implement support for KVM in-kernel ARM GIC
target-arm: Use MemoryListener to identify GIC base address for KVM
hw/arm_gic: Convert ARM GIC classes to use init/realize
hw/arm_gic: Add presave/postload hooks
ARM KVM: save and load VFP registers from kernel
ARM: KVM: Add support for KVM on ARM architecture
target-arm: Drop CPUARMState* argument from bank_number()
linux-headers: resync from mainline to add ARM KVM headers
oslib-posix: Align to permit transparent hugepages on ARM Linux
target-arm: Don't decode RFE or SRS on M profile cores
target-arm: Factor out handling of SRS instruction
Richard Henderson [Sun, 10 Feb 2013 18:30:50 +0000 (10:30 -0800)]
mipsn32-linux-user: Configure the architecture properly
N32 is a 64-bit cpu with a 32-bit address space. We have
existing cpp defines for this situation, but weren't using them.
This does mean that the linux-user/mipsn32 directory must be
merged with the linux-user/mips64 directory, and differences
must be resolved via ifdefs.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Richard Henderson [Sun, 10 Feb 2013 18:30:46 +0000 (10:30 -0800)]
mips64-linux-user: Enable 64-bit address mode and fpu
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Richard Henderson [Sun, 10 Feb 2013 18:30:45 +0000 (10:30 -0800)]
mips-linux-user: Fix n32 and n64 syscalls
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Richard Henderson [Sun, 10 Feb 2013 18:30:44 +0000 (10:30 -0800)]
mips-linux-user: Save and restore fpu and dsp from sigcontext
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Richard Henderson [Sun, 10 Feb 2013 18:30:43 +0000 (10:30 -0800)]
mips-linux-user: Enable mips64 and mipsn32 linux-user targets
At this point we can enable compilation, though things
still don't work.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Richard Henderson [Sun, 10 Feb 2013 18:30:42 +0000 (10:30 -0800)]
mips-linux-user: Share o32 code for n32 and n64 signals
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Richard Henderson [Sun, 10 Feb 2013 18:30:41 +0000 (10:30 -0800)]
mips-linux-user: Delete n32 and n64 signal stubs
Deleting these first makes the next patch much easier to read.
This doesn't cause any sort of compilation failure because we
have not yet enabled n32/n64 compilation. This is dead code.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Peter Maydell [Tue, 5 Mar 2013 00:34:43 +0000 (00:34 +0000)]
MAINTAINERS: add entry for ARM KVM guest cores
Add an entry indicating maintainer status for the ARM KVM code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 5 Mar 2013 00:34:43 +0000 (00:34 +0000)]
configure: Enable KVM on ARM
Enable KVM on ARM hosts, now that all the necessary components
for it exist.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Tue, 5 Mar 2013 00:34:43 +0000 (00:34 +0000)]
hw/kvm/arm_gic: Implement support for KVM in-kernel ARM GIC
Implement support for using the KVM in-kernel GIC for ARM.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Peter Maydell [Tue, 5 Mar 2013 00:34:42 +0000 (00:34 +0000)]
target-arm: Use MemoryListener to identify GIC base address for KVM
When using an in-kernel GIC with KVM, we need to tell the kernel where
the GIC's memory mapped registers live. Do this by registering a
MemoryListener which tracks where the board model maps the A15's
private peripherals, so we can finish the GIC initialisation
when the GIC is actually mapped.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
projects / sdk / emulator / qemu.git / log