Vadim Girlin [Mon, 14 Oct 2013 13:19:12 +0000 (17:19 +0400)]
r600g/sb: fix issue with DCE between GVN and GCM (v2)
We can't perform DCE using the liveness pass between GVN and GCM
because it relies on the correct schedule, but GVN doesn't care about
preserving correctness - it's rescheduled later by GCM.
This patch makes dce_cleanup pass perform simple DCE
between GVN and GCM instead of relying on liveness pass.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70088
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Matt Turner [Wed, 16 Oct 2013 19:01:04 +0000 (12:01 -0700)]
glapi: Add missing XML files to Makefile dependencies.
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Matt Turner [Wed, 16 Oct 2013 06:42:19 +0000 (23:42 -0700)]
glsl: Optimize mul(a, -1) into neg(a).
Two extra instructions in some heroesofnewerth shaders, but a win for
everything else.
total instructions in shared programs: 1531352 -> 1530815 (-0.04%)
instructions in affected programs: 121898 -> 121361 (-0.44%)
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 9 Oct 2013 06:30:08 +0000 (23:30 -0700)]
i965/fs: Handle printing HW_REGS in dump_instruction().
Scheduling debugging now prints:
Instructions before scheduling (reg_alloc 1)
0: linterp vgrf20, hw_reg2, hw_reg3, hw_reg4,
1: linterp vgrf21, hw_reg2, hw_reg3, hw_reg4+16,
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Wed, 9 Oct 2013 06:03:41 +0000 (23:03 -0700)]
i965: Print instructions' children during scheduling debugging.
Useful for tracking down problems in dependency calculations.
Scheduling debugging now prints:
clock 2, scheduled: linterp vgrf5, hw_reg2, hw_reg3, hw_reg0,
child 0, 53 parents: fb_write (null), (null), (null), (null),
child 1, 2 parents: tex vgrf4, vgrf5, (null), (null),
child 2, 52 parents: placeholder_halt (null), (null), (null), (null),
clock 4, scheduled: linterp vgrf5+1, hw_reg2, hw_reg3, hw_reg0+16,
child 0, 52 parents: fb_write (null), (null), (null), (null),
child 1, 1 parents: tex vgrf4, vgrf5, (null), (null),
now available
child 2, 51 parents: placeholder_halt (null), (null), (null), (null),
Reviewed-by: Eric Anholt <eric@anholt.net>
José Fonseca [Wed, 16 Oct 2013 22:05:51 +0000 (15:05 -0700)]
Revert "scons: Fix build when rtti is disabled"
This reverts commit
94d05bf87a21bd364e84f699a0064e5fba58a6f9 as it has a
few problems:
- it breaks windows builds becuase env[LLVM_CXXFLAGS] is never set there
- it is merging not only rtti, but the whole cxxflags (defines etc)
which has proven to be a source of troubles (breaks debugging etc.)
Tom Stellard [Thu, 3 Oct 2013 14:56:35 +0000 (07:56 -0700)]
radeonsi: Use 'SI' as the LLVM processor for CIK on LLVM <= 3.3
LLVM 3.3 does not know about CIK processors, and the codes paths for SI
and CIK are the same.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Tom Stellard [Tue, 17 Sep 2013 22:47:34 +0000 (15:47 -0700)]
r600g/compute Improve debugging output
Tom Stellard [Mon, 16 Sep 2013 17:32:59 +0000 (10:32 -0700)]
clover: Link libclc before running any optimizations
This is required in order for clang to correctly handle the OpenCL C
barrier() builtin which has the following restrictions acording to
the OpenCL 1.1 Specification:
If barrier is inside a conditional statement, then all work-items must
enter the conditional if any work-item enters the conditional statement
and executes the barrier.
If barrier is inside a loop, all work-items must execute the barrier for
each iteration of the loop before any are allowed to continue execution
beyond the barrier.
By linking before otimizations, we can replace calls to barrier() with
calls to a target specific intrinsic which has the noduplicate attribute
This attribute prevents clang from performing optimizations which could
violate the above rules.
This attribute must be applied to the call instruction that invokes
the function, so it is not enough to add this attribute the barrier()
declaration.
As a bonus this will probably speed up compile times since we will no
longer need to run link-time optimizations.
Brian Paul [Wed, 16 Oct 2013 14:43:21 +0000 (08:43 -0600)]
mesa: change glTexImage[23]DMultisample() internalformat to GLenum
To match glext.h and the GL_ARB_texture_multisample extension.
However, the GL 4.0 spec and man page say it's GLint.
An OpenGL spec bug will be filed.
Brian Paul [Wed, 16 Oct 2013 14:26:42 +0000 (08:26 -0600)]
svga: minor fix-ups in svga_get_shader_param()
Fix debug error message. Add switch case for PIPE_SHADER_COMPUTE.
Trivial.
Brian Paul [Tue, 15 Oct 2013 23:09:22 +0000 (17:09 -0600)]
cso: fix incorrect sampler view count in cso_restore_sampler_views()
During the recent bind_sampler_states() interface change in gallium
we changed the CSO single_sampler_done() function so that if we were
decreasing the number of sampler states bound in the driver, we'd
null-out the "extra/old" sampler states to unbind them. See commit
1e2fbf265.
However, we didn't make the corresponding fix for sampler views.
This caused an assertion to fail in the svga driver which checked
that the number of sampler views matched the number of sampler states.
This patch fixes cso_restore_sampler_views() so that it nulls-out
the extra/old sampler views if the number of new views is less than
the number of current/old views.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 15 Oct 2013 15:11:30 +0000 (09:11 -0600)]
mesa: update glxext.h to version
20131008
The diff is huge but the actual changes are few:
* Whitespace changes
* Items are reordered
* extern qualifiers dropped
Brian Paul [Tue, 15 Oct 2013 15:05:17 +0000 (09:05 -0600)]
mesa: update glext.h to version
20131008
Only two notable changes in this revision:
* GLvoid has been replaced by void.
* Added the GL_NV_blend_equation_advanced extension.
Brian Paul [Mon, 14 Oct 2013 23:36:06 +0000 (17:36 -0600)]
vbo: access VBO memory more efficiently when building display lists
Use GL_MAP_INVALIDATE_RANGE, UNSYNCHRONIZED and FLUSH_EXPLICIT flags
when mapping VBOs during display list compilation. This mirrors what
we do for immediate-mode VBO building in vbo_exec_vtx_map().
This improves performance for applications which interleave display
list compilation with execution. For example:
glNewList(A);
glBegin/End prims;
glEndList();
glCallList(A);
glNewList(B);
glBegin/End prims;
glEndList();
glCallList(B);
Mesa's vbo module tries to combine the vertex data from lists A and B
into the same VBO when there's room. Before, when we mapped the VBO for
building list B, we did so with GL_MAP_WRITE_BIT only. Even though we
were writing to an unused part of the buffer, the map would stall until
the preceeding drawing call finished.
Use the extra map flags and FlushMappedBufferRange() to avoid the stall.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Mon, 14 Oct 2013 16:26:41 +0000 (10:26 -0600)]
mesa: consolidate cube width=height error checking
Instead of checking width==height in four places, just do it in
_mesa_legal_texture_dimensions() where we do the other width, height,
depth checks. Similarly, move the check that cube map array depth is
a multiple of 6.
This change also fixes some missing cube dimension checks for the
glTexStorage[23]D() functions.
Remove width==height assertion in _mesa_get_tex_max_num_levels() since
that's called before the other size checks for glTexStorage.
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Kristian Høgsberg [Sun, 15 Sep 2013 06:32:44 +0000 (23:32 -0700)]
gbm: Add support for gbm bos and surfaces using GBM_FORMAT_ARGB2101010
We can now add GBM support for the 10 bit/channel formats which lets us
create a gbm surface that we can use with KMS for display hardware that
support the format.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Kristian Høgsberg [Sun, 15 Sep 2013 06:31:08 +0000 (23:31 -0700)]
dri: Add __DRIimage support for the ARGB2101010 format
We add support for the ARGB2101010 color format to the DRI image extension,
which allows DRI loaders to create a __DRIimage with this color format.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Kristian Høgsberg [Sun, 15 Sep 2013 06:28:55 +0000 (23:28 -0700)]
i965: Create ARGB2101010 DRI configs
This commit enables ARGB2101010 system framebuffers (that is, DRI drawables)
for the i965 drivers. This is done by generating DRI configs that advertise
this color format as well as teaching intelCreateBuffer to pick the right
color format when it sees such a DRI config.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Kristian Høgsberg [Sun, 15 Sep 2013 06:25:54 +0000 (23:25 -0700)]
dri/common: Add support for creating ARGB2101010 configs
This extends the common dri driver infrastructure with the ability to create
__DRIconfigs for 10 bits/channel + 2 bit alphs formats. This still has
to be supported and requested by a driver, so this doesn't enable anthing yet.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Kristian Høgsberg [Wed, 25 Sep 2013 21:57:22 +0000 (14:57 -0700)]
egl_dri2: Set NativeVisualID to the matching GBM config for the gbm platform
The EGLConfig doesn't have the rgba masks, only the rgba sizes. To
make sure a config is usable with a given GBM/KMS format, we need a way
to make sure the formats really match.
Kristian Høgsberg [Sun, 15 Sep 2013 06:13:22 +0000 (23:13 -0700)]
egl_dri2: Remove depth argument from dri2_add_config()
All callers now use the more correct rgba mask mechanism for filtering
out mathcing DRI configs. Even if depth and buffer size match, the
color component layout can be different, or in case or ARGB8888 and
ARGB2101010 the color components can even be different sizes.
Since anything that the depth check would reject is also rejected by
the rgba mask comparison, the depth parameter is redundant and not
specific enough. We should probably have removed it when the rgba
masks argument was introduced, but better late than never.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Kristian Høgsberg [Sun, 15 Sep 2013 06:06:36 +0000 (23:06 -0700)]
egl_dri2: Match X11 visuals using rgba masks instead of depth
Matching on visual depth to buffer size makes 8 bpc RGBA look similar to
10 bit RGB with 2 bit alphs - both have buffer size 32. Instead, build
the rgba masks from the visual data and use that for finding matching
DRI configs.
We need to keep the special case that allows us to match 24 bit visuals
to DRI configs with buffer size 32. We do that by creating an alpha
mask of "all the non-rgb bits" for 24 bit visuals and matching a second
time with that.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Singh, Satyeshwar [Wed, 16 Oct 2013 01:11:02 +0000 (01:11 +0000)]
i965: Add support for RGB565 __DRIimage
Add information for RGB565 to the table of image formats so that we can
create a __DRIimage for that format. This in turn enables RGB565
wayland clients.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Singh, Satyeshwar [Wed, 16 Oct 2013 01:10:12 +0000 (01:10 +0000)]
egl-wayland: Add support for RGB565 pixel format for Wayland clients
With this patch Wayland clients can now ask EGL for RGB 565 format buffers
and attach them to a Wayland compositor.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Alexander von Gluck IV [Tue, 15 Oct 2013 17:08:59 +0000 (12:08 -0500)]
scons: Fix build when rtti is disabled
* The rtti fix actually dug up a bug in the scons build scripts.
* Autotools took the LLVM cpp and cxx flags, while scons only took
the cpp flags.
* This grabs the cxx flags and applies them where needed. We may
want to make the same change for the llvm cpp flags in scons.
* The only linux platform I can find with LLVM no-rtti is Ubuntu.
* Fixes bug #70471
Tested-by: Vinson Lee <vlee@freedesktop.org>
José Fonseca [Wed, 16 Oct 2013 01:08:26 +0000 (18:08 -0700)]
llvmpipe: Advertise PIPE_CAP_DEPTH_CLIP_DISABLE.
Actually implemented by draw module.
Tested piglit ARB_depth_clamp tests, which pass 100%.
Trivial.
José Fonseca [Thu, 12 Sep 2013 14:15:24 +0000 (15:15 +0100)]
draw: make vs_slot signed.
Otherwise (vs_slot < 0) will never be true.
Trivial.
Emil Velikov [Fri, 11 Oct 2013 23:19:55 +0000 (00:19 +0100)]
configure.ac: drop obsolete variable HAVE_COMMON_DRI
The original intent of the variable was to prevent adding
libdrm dependency for non drm drivers (swrast). This is
already handled with __NOT_HAVE_DRM_H, and with the recent
merge of the dri_util and drisw_util code this variable has
started causing build issues.
Eg. the following will fail
$ ./autogen.sh --with-dri-drivers=swrast --with-gallium-drivers=
$ make
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Emil Velikov [Mon, 14 Oct 2013 16:14:41 +0000 (17:14 +0100)]
swrast: add correct include for out-of-tree builds
The xmlpool/options.h file was not accessible when building
out-of-tree leading to failure.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70378
Reported-by: Fabio Pedretti <fabio.ped@libero.it>
Tested-by: Fabio Pedretti <fabio.ped@libero.it>
Tested-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Bryan Cain [Tue, 16 Apr 2013 20:56:28 +0000 (15:56 -0500)]
mesa: fix transform feedback when a geometry shader is active.
When a geometry shader is active, the transform feedback primitive
type ("mode") needs to be validated against the geometry shader output
primitive type, not the primitive type passed to the glDraw*()
function.
Fixes the following piglit tests:
- glsl-1.50-geometry-primitive-types GL_LINES
- glsl-1.50-geometry-primitive-types GL_LINES_ADJACENCY
- glsl-1.50-geometry-primitive-types GL_LINE_STRIP
- glsl-1.50-geometry-primitive-types GL_LINE_STRIP_ADJACENCY
- glsl-1.50-geometry-primitive-types GL_TRIANGLES
- glsl-1.50-geometry-primitive-types GL_TRIANGLES_ADJACENCY
- glsl-1.50-geometry-primitive-types GL_TRIANGLE_FAN
Exposes previously hidden failures in the following piglit tests:
- glsl-1.50-geometry-primitive-id-restart GL_LINES other
- glsl-1.50-geometry-primitive-id-restart GL_LINES_ADJACENCY other
- glsl-1.50-geometry-primitive-id-restart GL_LINE_LOOP ffs
- glsl-1.50-geometry-primitive-id-restart GL_LINE_LOOP other
- glsl-1.50-geometry-primitive-id-restart GL_LINE_STRIP other
- glsl-1.50-geometry-primitive-id-restart GL_LINE_STRIP_ADJACENCY other
- glsl-1.50-geometry-primitive-id-restart GL_TRIANGLES other
- glsl-1.50-geometry-primitive-id-restart GL_TRIANGLES_ADJACENCY other
- glsl-1.50-geometry-primitive-id-restart GL_TRIANGLE_FAN ffs
- glsl-1.50-geometry-primitive-id-restart GL_TRIANGLE_FAN other
- glsl-1.50-geometry-primitive-id-restart GL_TRIANGLE_STRIP other
- glsl-1.50-geometry-primitive-id-restart GL_TRIANGLE_STRIP_ADJACENCY other
(These failures were previously hidden due to a flaw in the test: it
doesn't check for GL errors. I'll fix the test shortly).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Wed, 28 Aug 2013 21:25:31 +0000 (14:25 -0700)]
i965/gs: Set the REORDER bit in 3DSTATE_GS.
Ivy Bridge's "reorder enable" bit gives us a binary choice for the
order in which vertices from triangle strips are delivered to the
geometry shader. Neither choice follows the OpenGL spec, but setting
the bit is better, because it gets triangle orientation correct.
Haswell replaces the "reorder enable" bit with a new "reorder mode"
bit (which occupies the same location in the command packet). This
bit gives us a different binary choice, which affects both triangle
strips and triangle strips with adjacency. Setting the bit ("reorder
trailing") gives the proper order according to the OpenGL spec.
So in either case we want to set the bit.
On Ivy Bridge, fixes piglit test "triangle-strip-orientation".
On Haswell, fixes piglit tests "glsl-1.50-geometry-primitive-types
{GL_TRIANGLE_STRIP,GL_TRIANGLE_STRIP_ADJACENCY}" and
"glsl-1.50-geometry-tri-strip-ordering-with-prim-restart *".
v2: Rename the bit to "REORDER_TRAILING" for consistency with Haswell
docs.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sun, 1 Sep 2013 12:49:17 +0000 (05:49 -0700)]
i965/fs: Remove bogus field prog_data->dispatch_width.
Despite the name, this field wasn't being set to the dispatch width at
all; it was always 8. The only place it was used was that the
constant buffer read length was aligned to it, and as far as I can
tell from the docs, there is no need to align this value to the
dispatch width; aligning it to a multiple of 8 is sufficient. So I've
just replaced it with a hardcoded 8.
v2: In gen6_wm_state, use brw->wm.base.push_const_size for consistency
with VS and GS state upload.
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Fri, 26 Jul 2013 18:55:52 +0000 (11:55 -0700)]
glsl: Add new GLSL 1.50 constants.
This patch populates the following built-in GLSL 1.50 variables based
on constants stored in ctx->Const:
- gl_MaxVertexOutputComponents
- gl_MaxGeometryInputComponents
- gl_MaxGeometryOutputComponents
- gl_MaxFragmentInputComponents
- gl_MaxGeometryTextureImageUnits
- gl_MaxGeometryOutputVertices
- gl_MaxGeometryTotalOutputComponents
- gl_MaxGeometryUniformComponents
- gl_MaxGeometryVaryingComponents
On i965/gen7, fixes all Piglit tests in "spec/glsl-1.50/built-in
constants/*" except for gl_MaxCombinedTextureImageUnits and
gl_MaxGeometryUniformComponents.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Thu, 3 Oct 2013 16:58:43 +0000 (09:58 -0700)]
i965: Move the common binding table offset code to brw_shader.cpp.
Now that both vec4 and fs are dynamically assigning offsets, a lot of the
code is the same.
v2: Avoid passing around the next offset through the class. (Review by
Paul)
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Thu, 3 Oct 2013 16:55:06 +0000 (09:55 -0700)]
i965/vec4: Dynamically assign the VS/GS binding table offsets.
Note that the dropped comment in brw_context.h is mostly (better written)
in brw_binding_table.c as well.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Thu, 3 Oct 2013 01:53:04 +0000 (18:53 -0700)]
i965/fs: Dynamically set up the WM binding table offsets.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Wed, 2 Oct 2013 21:07:40 +0000 (14:07 -0700)]
i965: Make a brw_stage_prog_data for storing the SURF_INDEX information.
It would be nice to be able to pack our binding table so that programs
that use 1 render target don't upload an extra BRW_MAX_DRAW_BUFFERS - 1
binding table entries. To do that, we need the compiled program to have
information on where its surfaces go.
v2: Rename size to size_bytes to be more explicit.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Thu, 3 Oct 2013 17:30:07 +0000 (10:30 -0700)]
i965: Always have the struct gl_program * in the backend visitor.
vec4 already had it, so put it in the FS, too.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Thu, 3 Oct 2013 16:56:45 +0000 (09:56 -0700)]
i965: Drop a couple of unused defines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Wed, 2 Oct 2013 21:37:26 +0000 (14:37 -0700)]
i965: Remove dead arguments from prog_data_compare.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Alexander von Gluck IV [Sat, 12 Oct 2013 17:12:31 +0000 (17:12 +0000)]
build: remove forced -fno-rtti
* As discussed on the mailing list,
forced no-rtti breaks C++ public
API's such as the Haiku C++ libGL.so
* -fno-rtti *can* be still set however
instead of blindly forcing -fno-rtti,
we can rely on the llvm-config
--cppflags output.
If the system llvm is built without
rtti (default), the no-rtti flag will be
present in llvm-config --cppflags
(which we pick up on)
If llvm is built with rtti
(REQUIRES_RTTI=1), then -fno-rtti is
removed from llvm-config --cppflags.
* We could selectively add / remove rtti
from various components, however mixing
rtti and non-rtti code is tricky and
could introduce missing symbols.
* This needs impact tested.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Matt Turner [Fri, 11 Oct 2013 04:00:08 +0000 (21:00 -0700)]
configure.ac: Don't check for awk, grep, nm.
Not used since
d53901c6.
Matt Turner [Fri, 11 Oct 2013 21:39:54 +0000 (14:39 -0700)]
configure.ac: Don't check for cross compiling.
Dead since
c845140a.
Matt Turner [Fri, 20 Sep 2013 02:48:22 +0000 (19:48 -0700)]
i965: Don't copy prop source mods into instructions that can't take them.
Constantin Baranov [Sat, 12 Oct 2013 22:17:15 +0000 (01:17 +0300)]
mesa: Add missing switch break in invalidate_framebuffer_storage()
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70411
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Grigori Goronzy [Sun, 13 Oct 2013 16:08:45 +0000 (18:08 +0200)]
st/vdpau: add format conversions for GetBitsYCbCr
Add simple plain C routines for NV12<->YV12 and YUYV<->UYVY
conversions. The NV12->YV12 conversion is commonly used, for instance
by VLC.
Reviewed-by: Christian König <christian.koenig@amd.com>
Grigori Goronzy [Sun, 13 Oct 2013 16:08:44 +0000 (18:08 +0200)]
radeon: use staging for mapping linear textures
Textures that likely reside in VRAM, are mapped for reading and
don't require direct mapping should be staged into GTT, to avoid bad
performance. This fixes readback performance of VDPAU surfaces.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Grigori Goronzy [Sun, 13 Oct 2013 16:08:43 +0000 (18:08 +0200)]
radeon/uvd: use PIPE_BIND_LINEAR for video surfaces
This new bind flag forces linear storage, but does not have other
side effects like R600_RESOURCE_FLAG_TRANSFER.
Reviewed-by: Christian König <christian.koenig@amd.com>
Vincent Lejeune [Sat, 5 Oct 2013 14:04:48 +0000 (16:04 +0200)]
radeonsi: Allow Sinking pass to move preloaded const/res/sampl
This fixes a crash in Unigine Heaven 3.0, and probably in some
others apps.
Vadim Girlin [Sun, 13 Oct 2013 15:53:54 +0000 (19:53 +0400)]
radeonsi: pass alpha_ref value to PS in the user sgpr
Currently it's hardcoded in the shader, so every change requires
compilation of the shader variant, killing the performance
in Serious Sam 3 and probably other apps.
This patch passes alpha_ref in the user sgpr and removes it from
the shader key.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Vadim Girlin [Thu, 10 Oct 2013 04:09:37 +0000 (08:09 +0400)]
r600g: fix tgsi_op2_s with trans-only instructions
This fixes the issue when dst and src is the same reg and operation on one
channel overwrites the source for other channels, e.g.:
UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx
In this example the result of the operation on channel x is written in
TEMP[2].x and then used as a second source operand for channels y and z
instead of original value in TEMP[2].x.
This patch stores the results in temp reg and moves them to
dst after performing operation on all channels.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Kenneth Graunke [Fri, 27 Sep 2013 23:11:36 +0000 (16:11 -0700)]
i965: Merge intel_context.h into brw_context.h.
v2: Keep the random 32-bit only version of memcpy, since Ian says I
can't delete it without data proving it isn't useful.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 22:32:20 +0000 (15:32 -0700)]
i965: Delete our copy of likely/unlikely macros.
brw_context.h includes imports.h which includes compiler.h which already
defines these.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Mon, 8 Jul 2013 01:44:12 +0000 (18:44 -0700)]
mesa: Move U_FIXED/S_FIXED macros from i965 to macros.h.
These make it easy to convert a floating point value to a fixed point
numbers. The second parameter is the number of bits used for the
fractional part of the number.
It looks like core Mesa has similar functions already, but none that
allows an arbitrary number of fractional bits. The more generic version
is probably useful to everyone.
r600g apparently has an identical copy of the S_FIXED macro, but doesn't
include this file. I'm not sure what to do about that, so I'm just
going to leave it for now.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Mon, 8 Jul 2013 01:38:38 +0000 (18:38 -0700)]
mesa: Move ROUND_DOWN_TO() macro from i915/i965 to macros.h.
This seems generally useful, so it may as well live in core Mesa.
In fact, the comment for ALIGN() in macros.h actually says to "see also"
ROUND_DOWN_TO, which...was in a driver somewhere.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 22:29:00 +0000 (15:29 -0700)]
i965: Move need_workaround_flush = true to intel_batchbuffer_init.
intel_batchbuffer_init() sets up initial batchbuffer state; it seems
like a reasonable place to initialize this flag.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 22:00:22 +0000 (15:00 -0700)]
i965: Move DriverFlag initialization to brw_init_state().
Configuring which dirty flags we want sounds like a job for
brw_init_state().
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 21:57:47 +0000 (14:57 -0700)]
i965: Merge intelInitContext into brwCreateContext.
The split here was completely arbitrary.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 21:52:06 +0000 (14:52 -0700)]
i965: Move viewport driver hook setup to brw_init_driver_functions.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 21:46:26 +0000 (14:46 -0700)]
i965: Make brwInitFunctions take brw_context rather than intel_screen.
It actually just wants generation checking, and brw->gen is the usual
way of doing that. In the future, we'll also want to check brw->hw_ctx,
which isn't available from the screen.
While we're changing the function signature, convert from camel case to
our usual naming conventions.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 21:42:43 +0000 (14:42 -0700)]
i965: Merge intelInitFunctions() and brwInitFunctions().
They do exactly the same thing.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 21:36:49 +0000 (14:36 -0700)]
i965: Merge intel_context.c into brw_context.c.
There's no point in having two files for context functions. This patch
moves the code from intel_context.c into brw_context.c unmodified
(other than whitespace fixes).
Right now, this looks silly; future patches will merge functions and
tidy things up.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 27 Sep 2013 18:34:09 +0000 (11:34 -0700)]
i965: Move memset of TextureFormatSupported to brw_init_surface_formats.
brw_init_surface_formats already sets entries in TextureFormatsSupported
to true; it may as well take care of initializing it to false too.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 26 Sep 2013 19:10:48 +0000 (12:10 -0700)]
i965: Remove has_aa_line_parameters.
This flag is only used in one place, and is only set on one platform.
Just check for original Gen4 in the relevant function.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 26 Sep 2013 19:06:32 +0000 (12:06 -0700)]
i965: Move state setup from brwCreateContext to brw_init_state().
This seems like a better place for it, and helps clean up
brwCreateContext (which is full of a lot of random stuff).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 26 Sep 2013 19:03:41 +0000 (12:03 -0700)]
i965: Remove the brw_context::emit_state_always flag.
This was always set to false, and is only used for debugging.
To enable it, simply change the if (0) block and recompile.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 26 Sep 2013 18:55:36 +0000 (11:55 -0700)]
i965: Move hardware feature flags to brw_device_info.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 26 Sep 2013 18:36:42 +0000 (11:36 -0700)]
i965: Move device quirks to brw_device_info.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 26 Sep 2013 00:01:55 +0000 (17:01 -0700)]
i965: Move hardware limits to brw_device_info.
Since each kind of device has its own brw_device_info structure, we can
simply store the URB and thread limits there. This eliminates all the
large if-ladders, and simplifies the context initialization code quite a
bit.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 4 Jul 2013 19:35:22 +0000 (12:35 -0700)]
i965: Replace some intel_screen fields with brw_device_info references.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 4 Jul 2013 19:28:59 +0000 (12:28 -0700)]
i965: Delete the INTEL_SEPARATE_STENCIL override.
This option was useful during initial development, but it's been ages
since I've heard of anyone using it. Plus, Gen7+ mandates separate
stencil, so it was really only useful on Sandybridge anyway.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 4 Jul 2013 19:11:36 +0000 (12:11 -0700)]
i965: Add a new brw_device_info structure.
The idea is that struct brw_device_info should store statically-known
information about hardware features. Using the new family name in the
PCI ID table, we can easily grab the right structure.
This is basically the equivalent of intel_device_info in the kernel.
This patch also makes the new structure available from intel_screen, but
nothing uses it. Right now, it looks very redundant with existing
fields, but that will change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 4 Jul 2013 19:02:41 +0000 (12:02 -0700)]
i965: Add the family name to the PCI ID table.
I removed this a while ago, since we never used it, but I'm finally
resurrecting the idea in the next commits.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 4 Jul 2013 18:55:36 +0000 (11:55 -0700)]
i965: Remove #define name from PCI ID table.
Nothing uses the #define name, and it's not terribly useful - the
numerical ID serves the same purpose. The only thing we could really do
with it is generate slightly prettier preprocessed code. But who looks
at that?
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 17:40:57 +0000 (10:40 -0700)]
i965: Pull most driconf option handling into a centralized function.
Using a helper function clarifies the context initialization code.
I would've liked to completely centralize it, but moving the optionCache
code from intelInitExtensions into here would've required setting flags
in the context, which seems like a waste.
v2: Rebase for the introduction of disable_derivative_optimization.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Wed, 25 Sep 2013 22:57:08 +0000 (15:57 -0700)]
i965: Move a bunch of code from intelInitContext to brwCreateContext.
Now that intelInitContext isn't shared between i915 and i965, the split
is fairly arbitrary. This patch moves a bunch of the basic context
creation and generation checking code up to the top-level function
(and slightly earlier).
More will follow.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 27 Sep 2013 17:13:55 +0000 (10:13 -0700)]
i965: Update the comment about viewport hacks.
It wasn't clear that this was necessary for EGL, or why.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Mon, 8 Jul 2013 02:02:56 +0000 (19:02 -0700)]
i965: Pull out INTEL_DEBUG handling into new intel_debug.[ch] files.
Now that there isn't an intel_context structure, the split between
brw_context.[ch] and intel_context.[ch] is rather awkward and arbitrary.
Removing intel_context.[ch] seems desirable, but not everything really
belongs in brw_context.[ch], either.
Moving INTEL_DEBUG handling into separate intel_debug.[ch] files should
make them relatively easy to find.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Wed, 25 Sep 2013 22:48:41 +0000 (15:48 -0700)]
i965: Rename brwCreateContext's error parameter to dri_ctx_error.
"error" is a very generic name. dri_ctx_error is the name used in
intelInitContext(), which is more specific.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Fri, 27 Sep 2013 00:17:06 +0000 (17:17 -0700)]
dri: Move i965-specific context flag logic to dri common.
Nobody else yet can do a forward context anyway, but others should be able
to do debug contexts, and those would have just had no effect currently.
Stephane Marchesin [Sat, 12 Oct 2013 18:38:14 +0000 (11:38 -0700)]
i915g: Fix assert
Now that we support start, assert on start + num < max samplers
Reported by xexaxo
Paul Berry [Fri, 11 Oct 2013 03:16:56 +0000 (20:16 -0700)]
mesa: Bump version to 10.0.0.
Mesa now supports OpenGL 3.2 and GLSL 1.50, so bump the Mesa major
version from 9 to 10 to reflect this.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Paul Berry [Tue, 8 Oct 2013 22:02:10 +0000 (15:02 -0700)]
mesa: Remove warning that geometry shader support is experimental.
Geometry shader support is now working well, and adequately piglit
tested. There are just a few piglit failures left to fix. So there's
no need for an "experimental" warning anymore.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Paul Berry [Fri, 22 Mar 2013 21:41:17 +0000 (14:41 -0700)]
i965: Turn on GLSL 1.50 and GL 3.2 support for i965 gen7.
Geometry shaders were the last thing we needed to finish before
turning on GLSL 1.50 and GL 3.2 support. They are now working well,
with just a few piglit failures left to fix.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jay Cornwall [Fri, 11 Oct 2013 01:06:48 +0000 (20:06 -0500)]
radeon/llvm: show LLVM disassembly when available
With code dump enabled LLVM may generate disassembly during compilation.
Show this disassembly when available and prefer it to SI bytecode dump.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jay Cornwall <jay@jcornwall.me>
Roland Scheidegger [Sat, 12 Oct 2013 01:09:27 +0000 (03:09 +0200)]
softpipe: fix seamless cube filtering
Fix coord wrapping (and face selection too) in case of edges.
Unfortunately, the coord wrapping is way more complicated than what
the code did, as it depends on the face and the direction where the
texel falls off the face (the logic needed to get this right in fact
seems utterly ridiculous).
Also fix a bug in (y direction under/overflow) face selection.
And get rid of complicated cube corner handling. Just like edge case,
the coord wrapping was wrong and it seems very difficult to fix.
I'm near certain it can't always work anyway (though ordinary seamless
filtering on edge has actually a similar problem but not as severe)
because we don't have per-pixel face, hence could have multiple corner
texels which would make it very difficult to average the remaining texels
correctly. Hence simply pick a texel which would only have fallen off one
edge but not both instead, which is not quite accurate but actually I think
should be enough to meet OpenGL (but not d3d10) requirements.
v2: small fixes suggested by Brian, add some comments.
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Sat, 12 Oct 2013 01:09:19 +0000 (03:09 +0200)]
llvmpipe: increase fs shader variant instruction cache limit by factor 4
The previous limit of of 128*1024 was reported to cause frequent recompiles
in some apps due to shader variant thrashing on IRC in some apps leading
to noticeable lags.
Note that the LP_MAX_SHADER_VARIANTS limit (1024) was more or less impossible
to reach, since even simple fragment shaders without texturing (glxgears) used
more than twice than 128 instructions, hence the instruction limit would have
always been reached first (excluding things like trivial shaders not writing
color). Even with the new limit it is VERY likely the instruction limit is hit
first.
Should help with such lags due to recompiles (though other shader types have
their own limits, LP_MAX_SETUP_VARIANTS and DRAW_MAX_SHADER_VARIANTS, in
particular the latter seems a bit small (128)).
Reviewed-by: Brian Paul <brianp@vmware.com>
Vinson Lee [Fri, 11 Oct 2013 23:57:02 +0000 (16:57 -0700)]
mesa: Do not use newlocale on NetBSD.
Fixes this build error.
CC imports.lo
../../src/mesa/main/imports.c: In function '_mesa_strtof':
../../src/mesa/main/imports.c:570:20: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'loc'
../../src/mesa/main/imports.c:570:20: error: 'loc' undeclared (first use in this function)
../../src/mesa/main/imports.c:570:20: note: each undeclared identifier is reported only once for each function it appears in
../../src/mesa/main/imports.c:572:7: error: implicit declaration of function 'newlocale'
../../src/mesa/main/imports.c:572:23: error: 'LC_CTYPE_MASK' undeclared (first use in this function)
../../src/mesa/main/imports.c:574:4: error: implicit declaration of function 'strtof_l'
../../src/mesa/main/imports.c:580:1: warning: control reaches end of non-void function
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Brian Paul [Fri, 11 Oct 2013 15:20:56 +0000 (09:20 -0600)]
svga: s/0/FALSE/
Brian Paul [Fri, 11 Oct 2013 15:20:56 +0000 (09:20 -0600)]
mesa: add comment to clarify ctx->Driver.MapBufferRange() return value
Brian Paul [Fri, 11 Oct 2013 15:20:56 +0000 (09:20 -0600)]
st/mesa: whitespace fixes in st_cb_bufferobjects.c
Brian Paul [Fri, 11 Oct 2013 15:20:56 +0000 (09:20 -0600)]
vbo: assorted minor clean-ups
Use GL_TRUE/FALSE instead of 1/0. Remove extraneous parentheses.
Remove trailing whitespace.
Brian Paul [Fri, 11 Oct 2013 15:20:56 +0000 (09:20 -0600)]
glsl: fix signed/unsigned comparison warning
Kristian Høgsberg [Fri, 11 Oct 2013 22:30:09 +0000 (15:30 -0700)]
wayland: Only pass wl_drm instance to gbm when using gbm platform
Kristian Høgsberg [Thu, 26 Sep 2013 19:25:11 +0000 (12:25 -0700)]
wayland: Don't rely on static variable for identifying wl_drm buffers
Now that libEGL has been fixed to not leak all kinds of symbols, gbm
links to its own copy of the libwayland-drm.a helper library. That means
we can't rely on comparing the addresses of a static vtable symbol in that
library to determine if a wl_buffer is a wl_drm_buffer. Instead, we
move the vtable into the wl_drm struct and use that for comparing.
https://bugs.freedesktop.org/show_bug.cgi?id=69437
Cc: 9.2 <mesa-stable@lists.freedesktop.org>
Vinson Lee [Fri, 11 Oct 2013 21:16:35 +0000 (14:16 -0700)]
glapi: Do not use backtrace on NetBSD.
execinfo.h is not available on NetBSD.
Fixes this bulid error.
CC glapi_gentable.lo
glapi_gentable.c:44:22: fatal error: execinfo.h: No such file or directory
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Ian Romanick [Mon, 7 Oct 2013 18:21:24 +0000 (11:21 -0700)]
glsl: Remove extraneous .dir-locals.el
This was overriding the top-level .dir-locals.el causing some settings
(like forcing spaces instead of tabs!) to be lost.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Grigori Goronzy [Thu, 10 Oct 2013 23:23:20 +0000 (01:23 +0200)]
r600g: fix crash in set_framebuffer_state
We should be able to safely set the framebuffer state without a
fragment shader bound. bind_ps_state will take care of updating the
necessary state bits later.
v2: check in update_db_shader_control
Topi Pohjolainen [Mon, 7 Oct 2013 12:42:42 +0000 (15:42 +0300)]
mesa: Allow external textures to use fallback (0, 0, 0, 1)
Fixes GL2ExtensionTests/egl_image_external/TestSimpleUnassociated.test
which is part of gles2/3 conformance suite. Here image external
textures are switched to be treated the same as 2D textures. These
can be associated with the fallback texture providing fixed sample
values of (0, 0, 0, 1).
The OES_EGL_image_external spec says:
"Sampling an external texture which is not associated with any EGLImage
sibling will return a sample value of (0,0,0,1)."
"External textures cannot be used with TexImage2D, TexSubImage2D,
CompressedTexImage2D, CompressedTexSubImage2D, CopyTexImage2D, or
CopyTexSubImage2D, and an INVALID_ENUM error will be generated if
this is attempted."
And quoting Chad:
"That's enforced in _mesa_TexImage*() by calling
legal_teximage_target(), and enforced in _mesa_TexSubImage*() by
calling legal_texsubmimage_target(). Each of the
legal_tex*image_target() functions reject external textures.
Therefore, allowing GL_TEXTURE_EXTERNAL_OES in store_texsubimage()
won't violate the above spec quote.
I think it's safe to allow GL_TEXTURE_EXTERNAL_OES in
store_texsubimage(), as long as the texture has only a single
plane. Luckily, that's the only type of external textures that
Mesa currently supports."
CC: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>