Kenneth Graunke [Tue, 19 Apr 2011 22:38:10 +0000 (15:38 -0700)]
i965: Set Address Modify Enable in VERTEX_BUFFER on Ivybridge.
Otherwise, Ivybridge seems to ignore the newly supplied data, giving us
rubbish for vertices.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 27 Apr 2011 00:24:38 +0000 (17:24 -0700)]
i965: Enable channel masks in Ivybridge's URB_WRITE_HWORD header.
This shouldn't be done using MRFs, but until I have a proper solution
for dealing with MRFs, this allows my hack to keep working.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 19 Apr 2011 06:59:30 +0000 (23:59 -0700)]
i965: Fix the URB write message descriptor on Ivybridge.
The message header is still incorrect, but this is a start.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 19 Apr 2011 06:38:21 +0000 (23:38 -0700)]
i965: Fix render target writes on Ivybridge.
Ivybridge shifts the data port messages by one bit.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 9 Apr 2011 07:32:46 +0000 (00:32 -0700)]
i965: Mad hacks to avoid using MRFs on Ivybridge.
Ivybridge's SEND instruction uses GRFs instead of MRFs. Unfortunately,
a lot of our code explicitly uses MRFs, and rewriting it would take a
fair bit of effort. In the meantime, use a hack:
- Change brw_set_dest, brw_set_src0, and brw_set_src1 to implicitly
convert any MRFs into the top 16 GRFs.
- Enable gen6_resolve_implied_move on Ivybridge: Moving g0 to m0
actually moves it to g111 thanks to the previous hack.
It remains to officially reserve these registers so the allocator
doesn't try to reuse them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 12 Apr 2011 18:51:36 +0000 (11:51 -0700)]
i965: Emit 3DPRIMITIVE Ivybridge-style.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 14 Apr 2011 21:56:19 +0000 (14:56 -0700)]
i965: Don't use the GS for breaking down quads on Ivybridge.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 9 Apr 2011 07:53:46 +0000 (00:53 -0700)]
i965: Emit extra 0's in 3DSTATE_MULTISAMPLE on Ivybridge.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 9 Apr 2011 06:51:21 +0000 (23:51 -0700)]
i965: Add depth buffer support on Ivybridge.
This also disables the HiZ and separate stencil buffers. We still need
to implement stencil.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 9 Feb 2011 01:27:37 +0000 (17:27 -0800)]
i965: Upload sampler state pointers on Ivybridge.
Since we currently only support sampling in the fragment shader, we only
bother to emit the PS variant. In the future we'll need to emit others.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 21 Apr 2011 01:23:38 +0000 (18:23 -0700)]
i965: Disable binding table pointers for unused pipeline stages.
This may not be necessary, but it seems like a good idea.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 22 Feb 2011 21:30:34 +0000 (13:30 -0800)]
i965: Upload binding table pointers on Ivybridge.
Ivybridge uses per-stage commands to update binding table pointers.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 22 Feb 2011 21:30:02 +0000 (13:30 -0800)]
i965: Split BRW_NEW_BINDING_TABLE dirty bit into one per stage.
Ivybridge can update each stage's binding table pointer independently,
so we want separate dirty bits. Previous generations can simply
subscribe to all three dirty bits and emit as usual.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 9 Apr 2011 09:30:34 +0000 (02:30 -0700)]
i965: Explicitly disable unused pipeline stages on Ivybridge.
This may not be strictly necessary, but seems wise.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 9 Apr 2011 08:16:06 +0000 (01:16 -0700)]
i965: Initial Ivybridge VS state.
Copied from gen6_vs_state.c; reuses create_vs_constant_bo from there.
The 3DSTATE_VS command is identical but 3DSTATE_CONSTANT_VS is not.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 9 Feb 2011 08:49:59 +0000 (00:49 -0800)]
i965: Initial Ivybridge Viewport state setup.
SF and CLIP viewport state has been combined into SF_CLIP_VIEWPORT;
SF_CLIP and CC state pointers can now be uploaded independently.
Some portions of the hardware documentation refer to separate upload
commands for SF and CLIP; these are outdated and incorrect.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Mon, 28 Mar 2011 20:12:21 +0000 (13:12 -0700)]
i965: Initial Ivybridge Clip state setup.
Copied from gen6_clip_state.c.
This enables early culling and sets the necessary fields. Otherwise, it
is entirely the same, so I doubt this patch is strictly necessary for a
functional driver.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 9 Feb 2011 09:05:40 +0000 (01:05 -0800)]
i965: Initial Ivybridge CC state setup.
The state itself still seems to be the same; the only change is that
each part (CC, BLEND, DEPTH_STENCIL) can now be uploaded independently.
Thus, we still rely on the code in gen6_cc.c to set up the state.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 3 Feb 2011 00:00:08 +0000 (16:00 -0800)]
i965: Initial Ivybridge WM/PS state setup.
Copied from gen6_wm_state.c.
The main change from Sandybridge seems to be that 3DSTATE_WM was split
into two separate state packet commands: 3DSTATE_WM and 3DSTATE_PS.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 5 Jan 2011 09:21:06 +0000 (01:21 -0800)]
i965: Initial Ivybridge SF/SBE state setup.
Copied from gen6_sf_state.c.
The main change from Sandybridge seems to be that 3DSTATE_SF was split
into two separate state packet commands: 3DSTATE_SF and 3DSTATE_SBE
("setup backend"). The bit-offsets are even the same - only the DWords
numbers have shuffled around a bit.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Fri, 29 Apr 2011 07:29:02 +0000 (00:29 -0700)]
i965: Make gen6_sf_state.c's get_attr_override non-static.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sun, 27 Mar 2011 08:18:41 +0000 (01:18 -0700)]
i965: Initial Ivybridge URB space partitioning, including push constants.
Currently this always reserves 16kB for push constants, regardless of
how much space is needed, and partitions it evenly betwen the VS and FS.
This is probably not ideal, but is straightforward.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sat, 9 Apr 2011 08:57:31 +0000 (01:57 -0700)]
i965: Set maximum number of threads for Ivybridge.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 3 Feb 2011 19:10:23 +0000 (11:10 -0800)]
i965: Split out tracked state atoms for Ivybridge.
Currently, gen7_atoms is a verbatim copy of gen6_atoms; future commits
will update it to contain gen7-specific state.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Mon, 16 May 2011 22:19:22 +0000 (15:19 -0700)]
intel: Initial IS_GEN7 plumbing.
Currently, IS_GEN7, IS_IVYBRIDGE, IS_IVB_GT1, and IS_IVB_GT2 all return
false. This allows me to write the code for them before actually adding
the PCI IDs and thus enabling the hardware.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sun, 15 May 2011 06:42:46 +0000 (23:42 -0700)]
i965: Rename max_vs_handles to max_vs_entries for consistency.
The documentation uses the term "vertex URB entries", the code talks
about "entry size", and so on. Also, handles are just "pointers" to
entries (actually small integers).
Also rename max_gs_handles to max_gs_entries.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Mon, 16 May 2011 21:17:15 +0000 (14:17 -0700)]
i965: Convert BRW_NEW_* dirty bits to use an enum.
This will make it much easier to add new dirty bits.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Kenneth Graunke [Mon, 16 May 2011 20:40:00 +0000 (13:40 -0700)]
i965: Rework IF/ELSE jump target back-patching.
The primary motivation for this is to better support Ivybridge control
flow. Ivybridge IF instructions need to point to the first instruction
of the ELSE block -and- the ENDIF instruction; the existing code only
supported back-patching one instruction ago.
A second goal is to simplify and centralize the back-patching, hopefully
clarifying the code somewhat.
Previously, brw_ELSE back-patched the IF instruction, and brw_ENDIF
back-patched the previous instruction (IF or ELSE). With this patch,
brw_ENDIF is responsible for patching both the IF and (optional) ELSE.
To support this, the control flow stack (if_stack) maintains pointers to
both the IF and ELSE instructions. Unfortunately, in single program
flow (SPF) mode, both were emitted as ADD instructions, and thus
indistinguishable.
To remedy this, this patch simply emits IF and ELSE, rather than ADDs;
brw_ENDIF will convert them to ADDs (the SPF version of back-patching).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Mon, 16 May 2011 19:25:18 +0000 (12:25 -0700)]
i965: Move IF stack handling into the EU abstraction layer/brw_compile.
This hides the IF stack and back-patching of IF/ELSE instructions from
each of the code generators, greatly simplifying the interface.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Mon, 16 May 2011 18:49:57 +0000 (11:49 -0700)]
i965: Get a ralloc context into brw_compile.
This would be so much easier if we were using C++; we could simply use
constructors and destructors. Instead, we have to update all the
callers.
While we're at it, ralloc various brw_wm_compile fields rather than
explicitly calloc/free'ing them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Mon, 16 May 2011 18:41:32 +0000 (11:41 -0700)]
i965/gs: Move generation check for bailing earlier.
On Sandybridge, we don't need to break down primitives. There's no need
to bother setting up brw_compile and such if it's not going to be used;
bail as early as possible.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 17 May 2011 05:00:17 +0000 (22:00 -0700)]
i965: Add _NEW_LIGHT to Gen6 clip state dirty bits.
ctx->Light.ProvokingVertex depends on _NEW_LIGHT.
Found by inspection.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Brian Paul [Wed, 18 May 2011 03:24:05 +0000 (21:24 -0600)]
mesa: add some missing GLAPIENTRY keywords
NOTE: this is a candidate for the 7.10 branch.
Tom Stellard [Wed, 18 May 2011 01:51:20 +0000 (18:51 -0700)]
r300/compiler: Fix bug in rc_get_variables()
Variables that write to the same source select need to pe paired
together otherwise the register allocator might fail.
https://bugs.freedesktop.org/show_bug.cgi?id=36753
Marek Olšák [Mon, 16 May 2011 23:16:27 +0000 (01:16 +0200)]
u_vbuf_mgr: fix max_index computation when src_offset is abused as buffer_offset
Marek Olšák [Sat, 14 May 2011 02:42:29 +0000 (04:42 +0200)]
mesa: make RGB9_E5 non-renderable on swrast again
_BaseFormat for RGB9_E5 is GL_RGBA due to the previous revert.
Marek Olšák [Sat, 14 May 2011 02:38:36 +0000 (04:38 +0200)]
Revert "mesa: set reasonable defaults in update_wrapper"
This reverts commit
1d5f16ff8fae936f2e920800b169cf7736a8052a.
It breaks fbo-readpixels on swrast.
For some reason, swrast likes GL_RGBA and CHAN_TYPE.
Kenneth Graunke [Tue, 10 May 2011 23:51:12 +0000 (16:51 -0700)]
i965: Pass brw_compile pointer to brw_set_src[01].
This makes it symmetric with brw_set_dest, which is convenient, and will
also allow for assertions to be made based off of intel->gen.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Sun, 15 May 2011 07:21:45 +0000 (00:21 -0700)]
i965: Fix "Paramater" typo in gen6_wm_state.c.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Benjamin Franzke [Mon, 16 May 2011 08:36:36 +0000 (10:36 +0200)]
egl: Compile wayland-drm.a into libEGL independent of egl_dri2
Fixes egl_gallium when egl_dri2 is not enabled.
Dave Airlie [Sat, 14 May 2011 08:04:08 +0000 (18:04 +1000)]
st/mesa: overhaul vertex/fragment sampler and sampler views.
This fixes piglits fragment-and-vertex-texturing test on llvmpipe for me.
I've no idea if someone had another plan for this that is smarter than what
I've done here, but what I've basically done is
split fragment and vertex sampler and sampler_view setup function, factor
out the common chunks of both.
side-cleanups:
drop st->state.sampler_list - unused
don't update border color if we have no border color.
should fix https://bugs.freedesktop.org/show_bug.cgi?id=35849
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Sun, 15 May 2011 06:41:54 +0000 (16:41 +1000)]
gallium: block signals for new thread when spawning threads
I'm hard pressed to think of any reason a gallium thread would want to
receive a signal, especially considering its probably loaded as a library
and you don't want the threads interfering with the main threads signal
handling.
This solves a problem loading llvmpipe into the X server for AIGLX,
where the X server relies on the SIGIO signal going to the main thread,
but once llvmpipe loads the SIGIO can end up in any of its threads.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 13 May 2011 00:41:16 +0000 (10:41 +1000)]
r600g: reduce flushes so only when texture and CB overlap.
We only need to do this when the texture and CB are using the
same memory area.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tom Stellard [Sun, 15 May 2011 04:47:26 +0000 (21:47 -0700)]
r300/compiler: Use ALU Result for IF conditionals
This saves one instruction per IF.
Marek Olšák [Sat, 14 May 2011 05:47:37 +0000 (07:47 +0200)]
r300g: HiZ fixes
Nothing special, just changing conditions for when HiZ can be enabled and
when HiZ memory becomes invalid.
I was thinking about it again and realized it had not been quite right.
Marek Olšák [Sat, 14 May 2011 03:58:35 +0000 (05:58 +0200)]
r300g: don't set other HyperZ states if depth and stencil tests are disabled
Such as HiZ.
Marek Olšák [Sat, 7 May 2011 17:55:45 +0000 (19:55 +0200)]
r300g: dynamically ask for and release Hyper-Z access
We ask for Hyper-Z access when clearing a zbuffer.
We release it if no zbuffer clear has been done for 2 seconds.
Marek Olšák [Sun, 15 May 2011 00:10:44 +0000 (02:10 +0200)]
r300g: fix conversion from int to boolean
Marek Olšák [Sat, 14 May 2011 17:25:55 +0000 (19:25 +0200)]
u_vbuf_mgr: fix max_index computation once again
See how I compute and use the 'unused' variable in the code.
It's crucial for getting max_index right.
Fixed with the help of apitrace.
(bisecting the problematic draw call manually was not fun though)
This should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=36268
https://bugs.freedesktop.org/show_bug.cgi?id=36609
Marek Olšák [Fri, 13 May 2011 22:54:44 +0000 (00:54 +0200)]
st/mesa: set correct baseInternalFormat for _mesa_texstore in DrawPixels
GL_RGBA was always used for baseInternalFormat regardless of the chosen
texture internal format.
https://bugs.freedesktop.org/show_bug.cgi?id=37154
Reviewed-by: Brian Paul <brianp@vmware.com>
Kenneth Graunke [Fri, 13 May 2011 16:04:09 +0000 (09:04 -0700)]
i965: Use BRW_DATAPORT_READ_TARGET_DATA_CACHE instead of 0.
Using the #define'd constant is better than 0 with a comment.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Kenneth Graunke [Fri, 13 May 2011 15:33:15 +0000 (08:33 -0700)]
i965: Rename dp_render_target struct to gen6_dp.
This is actually just the message descriptor for Gen6+ dataport access;
it has nothing to do with the render cache. Access to the sampler cache
and constant cache also would use this struct; rename for clarity.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Fri, 13 May 2011 14:49:27 +0000 (07:49 -0700)]
i965: Attempt to un-muddle Gen6 data port message target defines.
These are documented on page 245 of IHD_OS_Vol4_Part2.pdf (the public
Sandybridge documentation/SEND instruction description).
Somebody had the bright idea to reuse gen4/5 defines labelled READ/WRITE
which just happened to be the same values as Render Cache/Sampler Cache.
It turns out that this field has nothing to do with READ/WRITE on
Sandybridge, but rather represents which data port to direct it to.
This was especially confusing in brw_set_dp_read_message, which
used "BRW_MESSAGE_TARGET_DATAPORT_WRITE." In a read function.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Christoph Bumiller [Fri, 13 May 2011 16:43:06 +0000 (18:43 +0200)]
nvc0: prevent overlap between load address and destination regs
For example, an indirect load like "ld b128 $r0q c0[$r0]" seems to
overwrite the address register before finishing the load, but only
if there are a lot of threads running.
Visible as displaced geoemtry in Unigine Heaven.
Marek Olšák [Fri, 13 May 2011 16:09:41 +0000 (18:09 +0200)]
docs: update relnotes-7.11
Marek Olšák [Fri, 6 May 2011 19:59:23 +0000 (21:59 +0200)]
st/mesa: expose ARB_shader_texture_lod if SM3 is supported
Reviewed-by: Brian Paul <brianp@vmware.com>
Matt Turner [Mon, 9 May 2011 04:17:02 +0000 (00:17 -0400)]
util_logbase2 takes and returns unsigned, not int
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
Matt Turner [Mon, 9 May 2011 04:17:01 +0000 (00:17 -0400)]
Remove redundant util_unsigned_logbase2
util_logbase2 is exactly the same function.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
Matt Turner [Mon, 9 May 2011 04:17:00 +0000 (00:17 -0400)]
u_math.h: Remove redundant mingw32 ffs definition
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
Benjamin Franzke [Sat, 30 Apr 2011 09:18:23 +0000 (11:18 +0200)]
st/egl: Implement EGL_WL_bind_wayland_display for x11,drm,wayland
Benjamin Franzke [Thu, 12 May 2011 17:30:05 +0000 (19:30 +0200)]
egl_dri2: Discard similar configs
Kristian Høgsberg [Wed, 11 May 2011 17:58:37 +0000 (13:58 -0400)]
egl_dri2: Make it possible to not compile in the X11 platform
Francesco Marella [Thu, 12 May 2011 11:27:09 +0000 (13:27 +0200)]
nvfx: fill some PIPE_CAPs
Signed-off-by: Francesco Marella <francesco.marella@gmail.com>
Kenneth Graunke [Fri, 13 May 2011 15:24:58 +0000 (08:24 -0700)]
i965: Fix incorrectly named data port define.
According to my documentation this is actually "Media Block Write" on
Gen4-5; there has never been a "DWord Block Write."
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 13 May 2011 15:20:01 +0000 (08:20 -0700)]
i965: Fix typo in Gen6 "DWord Scattered Write" message define.
It's DWORD, not DWORLD.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Vinson Lee [Fri, 13 May 2011 06:21:36 +0000 (23:21 -0700)]
i915g: Fix typos in print messages.
Dave Airlie [Fri, 13 May 2011 04:03:47 +0000 (14:03 +1000)]
r600g: don't unmap if we haven't mapped
should fix https://bugs.freedesktop.org/show_bug.cgi?id=37157
Signed-off-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Thu, 12 May 2011 23:15:53 +0000 (01:15 +0200)]
mesa: EXT_texture_sRGB_decode little fixup
It doesn't fix bug 37150 though.
Dave Airlie [Thu, 12 May 2011 05:24:35 +0000 (15:24 +1000)]
r600g: use a local var to store pointer to which register we are working on
this just makes the code a little bit cleaner.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 12 May 2011 05:01:33 +0000 (15:01 +1000)]
r600g: make range/block act more like a page table
only allocate the blocks ptr in the range if we ever have one,
otherwise don't bother wasting the memory.
valgrind glxinfo
before:
==967== in use at exit: 419,754 bytes in 706 blocks
==967== total heap usage: 3,552 allocs, 2,846 frees, 3,550,131 bytes allocated
after:
==5227== in use at exit: 419,754 bytes in 706 blocks
==5227== total heap usage: 3,452 allocs, 2,746 frees, 3,140,531 bytes allocate
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 12 May 2011 04:07:53 +0000 (14:07 +1000)]
r600g: reduce r600_reg footprint
This drops 6k of the text segment, a minor drop in the ocean, however
it also makes the code a lot cleaner and removes a lot of duplicated
information, hopefully making it more maintainable.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 12 May 2011 03:20:02 +0000 (13:20 +1000)]
r600g: reduce memory usage from range/block hash table.
This table covered a large range unnecessarily, reduce the address
range covered, use the fact that the bottom two bits aren't significant,
and remove unused fields from the range struct. It also drops the hash_size/shift in context in favour of a define, which should make doing the math
a bit less CPU intensive.
valgrind glxinfo
Before:
==320== in use at exit: 419,754 bytes in 706 blocks
==320== total heap usage: 3,691 allocs, 2,985 frees, 7,272,467 bytes allocated
After:
==967== in use at exit: 419,754 bytes in 706 blocks
==967== total heap usage: 3,552 allocs, 2,846 frees, 3,550,131 bytes allocated
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 11 May 2011 03:14:16 +0000 (13:14 +1000)]
r600g: delay mapping until first map request. (v2)
Currently r600g always maps every bo, this is quite pointless as it wastes
VM and on 32-bit with wine running VM space is quite useful.
So with this patch we don't create the mappings until first use, without
tiling enabled this probably won't make a major difference on its own,
but with tiled staged uploads it should avoid keeping maps for most of the
textures unnecessarily.
v2: add bo data ptr check
Signed-off-by: Dave Airlie <airlied@redhat.com>
José Fonseca [Thu, 12 May 2011 14:24:26 +0000 (15:24 +0100)]
egl/dri2: Avoid unused static functions.
José Fonseca [Thu, 12 May 2011 14:23:48 +0000 (15:23 +0100)]
egl/dri2: Prevent uninitialized variable dereference.
José Fonseca [Thu, 12 May 2011 14:23:02 +0000 (15:23 +0100)]
egl/dri2: Fix const pointer duplication, prevent unitialized variable dereference.
Based on zhigang gong <zhigang.gong@gmail.com>'s patch.
José Fonseca [Thu, 12 May 2011 14:12:16 +0000 (15:12 +0100)]
egl: Fix int <-> ptr casts.
Based on zhigang gong <zhigang.gong@gmail.com>'s patch.
zhigang gong [Thu, 12 May 2011 10:36:59 +0000 (11:36 +0100)]
glu: Fix _GLUfuncptr typedef.
typedef void (GLAPIENTRYP _GLUfuncptr)(); causes the following warning:
function declaration isn't a prototype.
Signed-off-by: José Fonseca <jfonseca@vmware.com>
José Fonseca [Thu, 12 May 2011 00:08:56 +0000 (01:08 +0100)]
mesa: Fix GetVertexAttrib* inside display lists.
GetVertexAttrib*{,ARB} is no longer aliased to the NV calls.
This fixes tracing yofrankie with apitrace, given it requires accurate
results from GetVertexAttribiv*.
NOTE: This is a candidate for the stable branches.
Tom Stellard [Wed, 11 May 2011 23:12:52 +0000 (16:12 -0700)]
r300/compiler: Fix bug in rc_get_variables()
Variables that share readers were not always being linked together.
https://bugs.freedesktop.org/show_bug.cgi?id=36939
Tom Stellard [Sun, 24 Apr 2011 04:27:34 +0000 (21:27 -0700)]
r300/compiler: Limit instructions to 3 source selects
Some presubtract conversions were generating more than 3 source
selects.
https://bugs.freedesktop.org/show_bug.cgi?id=36527
Note: This is a candidate for the 7.10 branch.
Tom Stellard [Sun, 8 May 2011 22:50:45 +0000 (15:50 -0700)]
r300/compiler: Add simple unit test framework
Plus three tests for rc_inst_can_use_presub()
Alex Deucher [Wed, 11 May 2011 12:09:35 +0000 (08:09 -0400)]
r600g: fix flushes on rs780/rs880
They need the same hack as rv670.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=35312
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
José Fonseca [Wed, 11 May 2011 13:01:17 +0000 (14:01 +0100)]
mesa: Don't append fog code for programs that don't output color.
Fixes fdo 36919.
NOTE: This is a candidate for the stable branches.
It should be cherry-picked to the sames branches that
3aa21f93dc1329c6f956277f2746c2a0bdae5446 was.
José Fonseca [Tue, 10 May 2011 15:36:35 +0000 (16:36 +0100)]
svga/drm: Implement svga_winsys_screen::get_hw_version.
José Fonseca [Mon, 9 May 2011 12:58:42 +0000 (13:58 +0100)]
st/wgl: Remove buggy assertion.
The assertion is wrong, now that state tracker can cope with a window with
zero width or height.
Maxim Levitsky [Tue, 10 May 2011 08:16:54 +0000 (10:16 +0200)]
nv50: fix mistake in pipe caps for pre-NVA0 cards
Introduced by
531b12af35a832bcd8928a4919d76f8e9405cde0.
Kenneth Graunke [Tue, 1 Feb 2011 00:15:33 +0000 (16:15 -0800)]
ir_to_mesa: Emit TXD instruction.
Mesa already supports this because of NV_fragment_program.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marek Olšák <maraeo@gmail.com>
Kenneth Graunke [Mon, 18 Oct 2010 22:35:10 +0000 (15:35 -0700)]
glsl: Add compiler support for ARB_shader_texture_lod.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marek Olšák <maraeo@gmail.com>
Kenneth Graunke [Tue, 19 Oct 2010 18:23:32 +0000 (11:23 -0700)]
mesa: Add ARB_shader_texture_lod to the extension list; off by default.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Marcin Slusarz [Mon, 9 May 2011 18:12:38 +0000 (20:12 +0200)]
nv50/nvc0: make transfers aware of PIPE_TRANSFER_MAP_DIRECTLY
If state tracker asked us to map resource directly and we can't
do it (because of tiling), return NULL instead of doing full transfer
- state tracker should handle it and fallback to some other method
or repeat transfer without PIPE_TRANSFER_MAP_DIRECTLY.
It greatly improves performance of xorg state tracker on nv50+,
because its fallback (DFS/UTS) is much faster than full transfer.
Matt Turner [Mon, 9 May 2011 04:17:05 +0000 (00:17 -0400)]
r300/compiler: align memory allocations to 8-bytes
Eliminates unaligned accesses on strict architectures. Spotted by Jay
Estabrook.
Signed-off-by: Matt Turner <mattst88@gmail.com>
NOTE: This is a candidate for the 7.10 branch.
Marek Olšák [Sat, 7 May 2011 21:31:37 +0000 (23:31 +0200)]
r300g: unreference a zbuffer surface after decompression
Marek Olšák [Sat, 7 May 2011 21:29:23 +0000 (23:29 +0200)]
r300g: remove redundant state variable hyperz_locked
Marek Olšák [Mon, 9 May 2011 16:18:56 +0000 (18:18 +0200)]
mesa: document instructions ir_to_mesa emits
GLSL stopped using:
BRA, EXP, LOG, LRP, NRM3, NRM4, XPD.
GLSL started using:
KIL, SCS, SSG, SWZ.
(omg why SWZ? isn't proc_src_register flexible enough?)
GLSL doesn't use these opcodes some Radeons do support:
ARR, DP2A, DST, LRP, XPD.
These opcodes are now unused:
AND, NOT, NRM3, NRM4, OR, XOR.
(plus maybe the NV extensions which are unused by Gallium)
In addition to that, we don't use two-dimensional indirect addressing,
which the Mesa IR can do.
Michel Dänzer [Mon, 9 May 2011 16:26:50 +0000 (18:26 +0200)]
r300c: Fix up for register allocator rewrite.
Was broken by commit
fe622bac0c1b5b9f2a9fcf9f35b51232a06bea42 ('r300/compiler:
Rewrite register allocator').
Jerome Glisse [Mon, 9 May 2011 16:09:51 +0000 (12:09 -0400)]
r600g: anisotropic filtering support for evergreen hw
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Carl-Philip Haensch [Fri, 6 May 2011 20:48:08 +0000 (22:48 +0200)]
r600g: add support for anisotropic filtering
Michel Dänzer [Mon, 9 May 2011 10:29:47 +0000 (12:29 +0200)]
gallium: Factor out unknown endianness detection.
Matt Turner [Mon, 9 May 2011 04:17:04 +0000 (00:17 -0400)]
Don't allow compilation if endianness isn't known
PIPE_ARCH_UNKNOWN_ENDIAN is used no where else. All #else branches of
ifdef PIPE_ARCH_LITTLE assume big-endian. Not #error'ing out here
only serves to allow bad things to happen.
Signed-off-by: Matt Turner <mattst88@gmail.com>