Vinson Lee [Fri, 12 Feb 2021 04:07:00 +0000 (20:07 -0800)]
r600/sfn: Initialize FragmentShaderFromNir member m_pos_input.
Fix defect reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member m_pos_input is not
initialized in this constructor nor in any functions that it
calls.
Fixes:
374bc76706e ("r600/sfn: Add the position input as varying")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9004>
Marek Olšák [Tue, 20 Oct 2020 00:21:58 +0000 (20:21 -0400)]
radeonsi: add debug options nodisplaytiling and nodisplaydcc
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Tue, 26 Jan 2021 22:43:32 +0000 (17:43 -0500)]
radeonsi: skip s_sendmsg(gs_alloc_req) for NGG passthrough on new chips
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Tue, 26 Jan 2021 22:34:37 +0000 (17:34 -0500)]
amd: sort chip enums based on hw revision
A future commit will depend on this.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Thu, 4 Feb 2021 06:55:34 +0000 (01:55 -0500)]
ac/gpu_info: conceal L2 cache sizes
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Thu, 4 Feb 2021 06:18:12 +0000 (01:18 -0500)]
ac/gpu_info: inline get_l2_cache_size and set cache sizes farther down
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Thu, 4 Feb 2021 06:17:19 +0000 (01:17 -0500)]
ac/gpu_info: remove redundant radeon_info::num_sdp_interfaces
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Thu, 4 Feb 2021 06:11:38 +0000 (01:11 -0500)]
ac/gpu_info: add radeon_info::num_tcc_blocks
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Thu, 4 Feb 2021 05:50:32 +0000 (00:50 -0500)]
ac/gpu_info: rename num_tcc_blocks -> max_tcc_blocks
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Sat, 6 Feb 2021 00:20:44 +0000 (19:20 -0500)]
ac/gpu_info: print use_late_alloc
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8892>
Marek Olšák [Sat, 6 Feb 2021 05:32:31 +0000 (00:32 -0500)]
winsys/amdgpu: disallow pb_cache for backing buffers of sparse buffers
because amdgpu_bo_wait doesn't wait for active CS jobs using the buffers.
This fixes incorrect buffer reuse of busy buffers.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8895>
Caio Marcelo de Oliveira Filho [Thu, 11 Feb 2021 20:35:44 +0000 (12:35 -0800)]
compiler: Drop now unused gl_varying_slot_name()
There's reuse of values depending on the stage, so a function that
just takes the value might produce invalid results. All the codebase
was already changed to use the gl_varying_slot_name_for_stage()
instead.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998>
Caio Marcelo de Oliveira Filho [Thu, 11 Feb 2021 20:31:41 +0000 (12:31 -0800)]
st/atifs: Use gl_varying_slot_name_for_stage()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998>
Caio Marcelo de Oliveira Filho [Thu, 11 Feb 2021 20:30:49 +0000 (12:30 -0800)]
etnaviv: Use gl_varying_slot_name_for_stage()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998>
Caio Marcelo de Oliveira Filho [Thu, 11 Feb 2021 20:30:19 +0000 (12:30 -0800)]
freedreno/ir3: Use gl_varying_slot_name_for_stage()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998>
Caio Marcelo de Oliveira Filho [Thu, 11 Feb 2021 20:19:13 +0000 (12:19 -0800)]
intel/compiler: Use gl_varying_slot_name_for_stage()
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8998>
Mike Blumenkrantz [Wed, 29 Jul 2020 14:22:55 +0000 (10:22 -0400)]
zink: flag exact alu op results in ntv with NoContraction
this propagates the exact flag and ensures precision isn't lost during
optimizations
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8660>
Daniel Schürmann [Thu, 4 Feb 2021 15:01:44 +0000 (16:01 +0100)]
aco: remove dead code for the handling of exec temporaries
Totals from 26026 (18.67% of 139391) affected shaders (Navi10):
PreSGPRs: 370993 -> 326177 (-12.08%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
Daniel Schürmann [Wed, 3 Feb 2021 14:44:49 +0000 (15:44 +0100)]
aco: make all exec accesses non-temporaries
So that they are not counted into the register demand.
Totals from 107336 (77.00% of 139391) affected shaders (Navi10):
VGPRs: 4023452 -> 4023248 (-0.01%); split: -0.01%, +0.01%
SpillSGPRs: 14088 -> 12571 (-10.77%); split: -11.03%, +0.26%
CodeSize:
266816164 ->
266765528 (-0.02%); split: -0.04%, +0.02%
MaxWaves: 1553339 -> 1553374 (+0.00%); split: +0.00%, -0.00%
Instrs:
50977701 ->
50973093 (-0.01%); split: -0.02%, +0.01%
Cycles:
1733911128 ->
1733605320 (-0.02%); split: -0.05%, +0.03%
VMEM:
40867650 ->
40900204 (+0.08%); split: +0.13%, -0.05%
SMEM: 6835980 -> 6829073 (-0.10%); split: +0.10%, -0.20%
VClause: 1032783 -> 1032788 (+0.00%); split: -0.01%, +0.01%
SClause: 2103705 -> 2104115 (+0.02%); split: -0.09%, +0.11%
Copies: 3195658 -> 3193656 (-0.06%); split: -0.30%, +0.24%
Branches: 1140213 -> 1140120 (-0.01%); split: -0.05%, +0.04%
PreSGPRs: 3603785 -> 3437064 (-4.63%); split: -5.13%, +0.50%
PreVGPRs: 3321996 -> 3321850 (-0.00%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
Daniel Schürmann [Thu, 4 Feb 2021 14:55:23 +0000 (15:55 +0100)]
aco: handle non-temp phi definitions and operands
This will be necessary as we make exec non-temp.
No fossil-db changes.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
Daniel Schürmann [Wed, 3 Feb 2021 14:32:32 +0000 (15:32 +0100)]
aco: don't create unnecessary exec phi on merge blocks
No fossil-db changes.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
Alejandro Piñeiro [Thu, 11 Feb 2021 23:18:02 +0000 (00:18 +0100)]
v3dv/meta_copy: get tlb compatible BC compressed formats for copies
So we can use the tlb path for several operations (copy image, clear,
copy buffer to image, etc).
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8929>
Alejandro Piñeiro [Wed, 10 Feb 2021 20:56:13 +0000 (21:56 +0100)]
v3dv/formats: expose support for BC1-3 compressed formats
Even though we can't expose textureCompressedBC as the hw doesn't
support all the formats, we can expose as supported individual
formats.
This gets several ~850 CTS tests going from skip to pass, with
patterns like:
* dEQP-VK.texture.compressed.bc*
* dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.color.2d*bc*
* dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.color.3d*bc*
* dEQP-VK.api.info.image_format_properties*bc*
* etc
v2: BC1-3 formats are texture filterable (Iago)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8929>
Alejandro Piñeiro [Wed, 10 Feb 2021 11:38:35 +0000 (12:38 +0100)]
v3dv/device: clarify that we can't expose textureCompressionBC
From spec:
"textureCompressionBC specifies whether all of the BC compressed
texture formats are supported. If this feature is enabled"
Note the *all*. v3d hw supports BC1, BC2, and BC3, but not BC4 through
BC7.
Let's clarify that we can't expose textureCompressionBC even if we
support some of them.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8929>
Alyssa Rosenzweig [Fri, 29 Jan 2021 17:33:26 +0000 (12:33 -0500)]
docs/features: gl_HelperInvocation on Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 17:33:15 +0000 (12:33 -0500)]
docs/features: Mark sample shading done on Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 13:21:03 +0000 (08:21 -0500)]
docs/features: Mark some ES3.1 done on Panfrost
These should be working on both Midgard and Bifrost now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 13:18:23 +0000 (08:18 -0500)]
docs/features: Mark more TBO exts done on panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 12 Feb 2021 01:41:54 +0000 (20:41 -0500)]
panfrost: Advertise OES_standard_derivatives
Has been implemented for ages since it's part of ES3, but we missed the
CAP needed for the ES2 extension.
Closes: #4203
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 16:24:43 +0000 (11:24 -0500)]
panfrost: Bump advertised ESSL feature level
Needed to run more dEQP tests.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 18:00:38 +0000 (13:00 -0500)]
panfrost: Bump max SSBO count
There's no actual architectural limit, this is totally arbitrary, but
fixes some NotSupported errors in dEQP-GLES31.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Thu, 11 Feb 2021 01:57:40 +0000 (20:57 -0500)]
panfrost: Advertise SAMPLE_SHADING
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 12 Feb 2021 01:37:05 +0000 (20:37 -0500)]
panfrost: Assert on indirect compute shaders
This case was overlooked. Much simpler than indirect graphics calls, can
come as a follow on to the other indirect work.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Thu, 11 Feb 2021 01:50:02 +0000 (20:50 -0500)]
panfrost: Remove stale TODOs
The answer is no, we do not. Putting them in the primary batch allows
proper intermixing with graphics work. There's no harm for pure compute
loads, either.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Thu, 11 Feb 2021 01:49:15 +0000 (20:49 -0500)]
panfrost: Simplify bind_compute_state
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 21:19:04 +0000 (16:19 -0500)]
pan/{mdg, bi}: Lower load_sample_pos
Conceptually same lowering as the DDK, although we're missing a number
of relevant compiler optimizations so the generated code is awful.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 18:32:56 +0000 (13:32 -0500)]
pan/{mdg, bi}: Lower load_helper_invocation
Passes dEQP-GLES31.functional.shaders.helper_invocation.* on both
architectures
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 21:59:12 +0000 (16:59 -0500)]
pan/bi: Implement coverage mask updates
Impressive how simple this looks after dozens of patches of
sysval-related prepwork :)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 23:16:58 +0000 (18:16 -0500)]
pan/bi: Decouple sysval loading from NIR
Useful for builder-based sysvals.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 21:18:38 +0000 (16:18 -0500)]
pan/bi: Implement nir_intrinsic_load_sample_positions_pan
Just copy the FAU result.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 20:44:00 +0000 (15:44 -0500)]
pan/bi: Implement load_sample_mask_in
Preloaded.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 19:01:23 +0000 (14:01 -0500)]
pan/bi: Fix gl_SampleID read
Fixes dEQP-GLES31.functional.shaders.sample_variables.sample_id.default_framebuffer
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 17:41:57 +0000 (12:41 -0500)]
pan/bi: Lower ifind_msb
We have ufind_msb efficient, implement in terms of that.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 17:31:45 +0000 (12:31 -0500)]
pan/bi: Implement ufind_msb
Lowered to #(sz - 1) - clz(x), taking advantage of the machine's
8-bit and 16-bit variants of clz and the widening on the second argument
of ISUB to implement neatly in two instructions.
Note that in NIR, ufind_msb can take any integer type but always output
i32.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 17:17:26 +0000 (12:17 -0500)]
pan/bi: Implement bitfield_reverse
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Boris Brezillon [Mon, 25 Jan 2021 12:22:05 +0000 (13:22 +0100)]
pan/bi: Support bit_count()
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Boris Brezillon [Mon, 25 Jan 2021 12:21:28 +0000 (13:21 +0100)]
pan/bi: Add uclz() support
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 16:51:38 +0000 (11:51 -0500)]
pan/bi: Lower bitfield inserts/extracts
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 16:22:10 +0000 (11:22 -0500)]
pan/bi: Implement texture gathers
Passes all of dEQP-GLES31.functional.texture.gather.*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 16:21:48 +0000 (11:21 -0500)]
pan/bi: Remove redundant TEXC opcode check
Already checked in emit_tex
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 18:20:32 +0000 (13:20 -0500)]
pan/mdg: Lower stores from helpers
Required for correct behaviour of SSBOs in fragment shaders on Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 01:03:38 +0000 (20:03 -0500)]
pan/mdg: Stub load_barycentric_sample
Now parity with Bifrost for not failing over these intrinsics.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 18:02:01 +0000 (13:02 -0500)]
pan/mdg: Lower ufind_msb, poorly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 17:57:06 +0000 (12:57 -0500)]
pan/mdg: Implement uclz
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 17:17:59 +0000 (12:17 -0500)]
pan/mdg: Rename bitcount8 to popcnt, fixing the unit
Still doesn't seem to work correctly for negative values.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 16:51:30 +0000 (11:51 -0500)]
pan/mdg: Lower bitfield instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 15:27:10 +0000 (10:27 -0500)]
pan/mdg: Remove unused pack_unorm_4x8 lowering
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 13:49:09 +0000 (08:49 -0500)]
pan/mdg: Assert on bad 64-bit swizzle in disassembly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 23:10:02 +0000 (18:10 -0500)]
panfrost: Add MULTISAMPLED sysval
To be used with Bifrost coverage mask updates.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 22:16:07 +0000 (17:16 -0500)]
panfrost: Overhaul sysval handling
Don't preassign.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 21:40:51 +0000 (16:40 -0500)]
panfrost: Implement get_sample_position
Easy now that we have the table.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 21:27:09 +0000 (16:27 -0500)]
panfrost: Advertise MSAA 8x and 16x
On Bifrost. Could support Mali T760+ with additional debug.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 21:26:57 +0000 (16:26 -0500)]
panfrost: Ensure open_device has pandecode initialized
Requires reordering some calls.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 20:35:39 +0000 (15:35 -0500)]
panfrost: Use sample location LUT
Fixes multisampling issues on Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 20:56:05 +0000 (15:56 -0500)]
panfrost: Upload sample positions on device init
Needed to correctly implement multisampling on Bifrost, and used in
gl_SamplePosition implementation on Midgard. These are architecturally
invariant, so it's fine to hard code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 12 Feb 2021 21:40:07 +0000 (16:40 -0500)]
panfrost: Set sample count/pattern for tiler FBD
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:43:42 +0000 (14:43 -0500)]
panfrost: Remove batch_is_scanout
Unused since last commit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:43:15 +0000 (14:43 -0500)]
panfrost: Remove PAN_REQ_DEPTH_WRITE
No consumers, garbage collect the whole thing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:41:55 +0000 (14:41 -0500)]
panfrost: Remove PAN_REQ_MSAA
Neglible win for draw time overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:40:56 +0000 (14:40 -0500)]
panfrost: Don't use PAN_REQ_MSAA in SFBD
We can also generalize a bit to eliminate the state dependence.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:39:04 +0000 (14:39 -0500)]
panfrost: Don't set REQ_MSAA in pan_mfbd
No remaining consumer.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:37:51 +0000 (14:37 -0500)]
panfrost: Generalize MSAA handling
This uses the framebuffer MSAA state directly and will generalize to
MSAA 8x/16x when somebody gets around to it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:33:08 +0000 (14:33 -0500)]
panfrost: Set tiler descriptor sampler pattern
Bifrost requires this to match the framebuffer descriptor's sample
pattern, but we were leaving the default (single-sampled)
unconditionally, leading to undefined behaviour.
It is unknown if this fixes any user-visible bugs, but without the
commit the descriptor is likely out-of-spec.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: 21.0 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 19:31:18 +0000 (14:31 -0500)]
panfrost: Add panfrost_sample_pattern helper
We always use rotated grids to preserve current behaviour.
Cc stable as it is required for the next commit. If deemed too invasive,
a simpler fix could be backported.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: 21.0 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 17:13:47 +0000 (12:13 -0500)]
panfrost: Respect info.fs.uses_sample_shading
Now that this is a link-time property.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 17:12:16 +0000 (12:12 -0500)]
panfrost: Refactor sample shading state
Moves the decision to evaluate per-sample to link time instead of
draw-time, with an explicit property. No functional change.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 01:43:53 +0000 (20:43 -0500)]
panfrost: Push sample positions sysval for Midgard
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 01:25:55 +0000 (20:25 -0500)]
panfrost: Add sample positions sysval
For Midgard. On Bifrost, the hardware pushes this directly to FAU.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 17:43:08 +0000 (12:43 -0500)]
panfrost: Preload sample mask if needed
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 12 Feb 2021 21:28:52 +0000 (16:28 -0500)]
pan/decode: Only print local storage for vertex jobs
It's convenient to group this with the framebuffer, but the other fields
are unused by the hardware for vertex jobs. They _are_ used for tiler
jobs.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Fri, 29 Jan 2021 21:52:45 +0000 (16:52 -0500)]
pan/decode: Cleanup sample locations decode
We know what this is now. I opted to leave it in ~fixed-point format to
avoid bikeshedding over precision.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Alyssa Rosenzweig [Wed, 27 Jan 2021 21:18:01 +0000 (16:18 -0500)]
nir: Add sample_positions_pan intrinsic
Facilites the gl_SamplePosition lowering on Bifrost, where the sample
positions are accessed directly in a packed in-memory format.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
Kenneth Graunke [Fri, 12 Feb 2021 19:39:45 +0000 (11:39 -0800)]
iris: Make a pin_scratch_space() helper
We need to (re-)pin the scratch buffer in four different places, and
it's going to get slightly more complicated on future platforms. So,
make a helper function, allowing us to add the complexity in one spot.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9023>
Hoe Hao Cheng [Fri, 12 Feb 2021 20:56:23 +0000 (04:56 +0800)]
zink: enable KHR_shader_draw_parameters on Vulkan <1.2
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Fri, 12 Feb 2021 19:14:26 +0000 (03:14 +0800)]
zink/codegen: do not enable extensions that are now core
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Fri, 12 Feb 2021 13:50:55 +0000 (21:50 +0800)]
zink/codegen: fix type annotations
mypy complains about this
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Thu, 11 Feb 2021 19:35:32 +0000 (03:35 +0800)]
zink/codegen: validate has_properties and has_features
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Thu, 11 Feb 2021 18:41:18 +0000 (02:41 +0800)]
zink/codegen: perform basic validation in zink_device_info
Check for existence of extension and its type
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Thu, 11 Feb 2021 18:10:40 +0000 (02:10 +0800)]
zink/codegen: make zink_device_info accept vk.xml
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Thu, 11 Feb 2021 18:16:06 +0000 (02:16 +0800)]
zink/codegen: introduce notion of non-standard extensions
this is for the MoltenVK extensions, especially "VK_MVK_moltenvk", which
right now is reserved in the registry. Making it non-standard skips all
the validations.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Thu, 11 Feb 2021 18:14:14 +0000 (02:14 +0800)]
zink/codegen: more validation in zink_instance
the MVK check is a workaround, since VK_MVK_moltenvk is not an official
VK extension per se - the next patch will introduce nonstandardness to
Extension.
Two new validations are added by this patch:
1. extension type (non-instance extensions are rejected)
2. existence of specified instance functions
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Hoe Hao Cheng [Thu, 11 Feb 2021 16:17:04 +0000 (00:17 +0800)]
zink/codegen: introduce ExtensionRegistry
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9021>
Samuel Pitoiset [Fri, 12 Feb 2021 09:08:14 +0000 (10:08 +0100)]
radv/winsys: set use_global_list inside the critical section
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9006>
Samuel Pitoiset [Fri, 12 Feb 2021 09:06:48 +0000 (10:06 +0100)]
radv: only make the WSI images resident if the global BO list is used
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4270
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4286
Fixes:
96b03aaa175 ("radv: use the global BO list from the winsys")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9006>
Daniel Schürmann [Tue, 2 Feb 2021 16:46:35 +0000 (17:46 +0100)]
aco: use VCC as regular SGPR pair on GFX10
There is no need to reserve it for special purposes, only.
Totals from 139391 (100.00% of 139391) affected shaders (Navi10):
VGPRs: 4738296 -> 4738156 (-0.00%); split: -0.01%, +0.00%
SpillSGPRs: 16188 -> 14968 (-7.54%); split: -7.60%, +0.06%
CodeSize:
294204472 ->
294118048 (-0.03%); split: -0.04%, +0.01%
MaxWaves: 2119584 -> 2119619 (+0.00%); split: +0.00%, -0.00%
Instrs:
56075079 ->
56056235 (-0.03%); split: -0.05%, +0.01%
Cycles:
1757781564 ->
1755354032 (-0.14%); split: -0.16%, +0.02%
VMEM:
52995887 ->
52996319 (+0.00%); split: +0.07%, -0.07%
SMEM: 9005338 -> 9004858 (-0.01%); split: +0.16%, -0.17%
VClause: 1178436 -> 1178331 (-0.01%); split: -0.02%, +0.01%
SClause: 2403649 -> 2404542 (+0.04%); split: -0.14%, +0.18%
Copies: 3447073 -> 3432417 (-0.43%); split: -0.66%, +0.23%
Branches: 1166542 -> 1166422 (-0.01%); split: -0.11%, +0.10%
PreSGPRs: 4229322 -> 4235538 (+0.15%)
PreVGPRs: 3817111 -> 3817040 (-0.00%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
Daniel Schürmann [Mon, 8 Feb 2021 16:30:26 +0000 (17:30 +0100)]
aco: don't abort() if disassembly fails
We used that to catch assembly errors in the past,
but now, there are too many hardware features we
use in ACO that are not supported by the LLVM disassembler,
that it is not really suited anymore as a debugging tool.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
Daniel Schürmann [Sat, 6 Feb 2021 17:40:21 +0000 (18:40 +0100)]
aco: check get_reg_specified() on register hints
This ensures that max_used_sgpr is adjusted accordingly.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
Daniel Schürmann [Mon, 8 Feb 2021 13:38:43 +0000 (14:38 +0100)]
aco: also consider VCC in get_reg_specified()
This allows split_vector and others to keep their VCC position.
Totals from 4573 (3.28% of 139391) affected shaders (Navi10):
CodeSize:
54292268 ->
54289324 (-0.01%); split: -0.03%, +0.03%
Instrs:
10327645 ->
10326941 (-0.01%); split: -0.04%, +0.04%
Cycles:
744410748 ->
744034732 (-0.05%); split: -0.07%, +0.02%
VMEM: 749093 -> 749092 (-0.00%); split: +0.00%, -0.00%
SMEM: 269306 -> 269322 (+0.01%)
SClause: 358746 -> 358744 (-0.00%)
Copies: 826051 -> 823910 (-0.26%); split: -0.55%, +0.29%
Branches: 355074 -> 356493 (+0.40%); split: -0.01%, +0.41%
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
Daniel Schürmann [Fri, 5 Feb 2021 13:38:08 +0000 (14:38 +0100)]
aco: don't decrease the vgpr_limit when encountering bpermute
Instead we recalculate vgpr_limit on demand, depending on
the number of needed shared VGPRs.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
Daniel Schürmann [Fri, 5 Feb 2021 13:36:39 +0000 (14:36 +0100)]
aco: refactor GPR limit calculation
This patch delays the calculation of GPR limits in order to
precisely incorporate extra registers (VCC etc.) and shared VGPRs.
Additionally, the allocation granularity is used to set the config.
This has some effect on the reported SGPR stats.
Totals (Navi10):
SGPRs: 6971787 ->
17753642 (+154.65%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
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