Stefan Agner [Fri, 22 Jun 2018 16:06:18 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add support for specific ECC strength
Add support for specified ECC strength/size using device tree
properties nand-ecc-strength/nand-ecc-step-size.
This aligns behavior with the mainline driver, such that:
- If fsl,use-minimal-ecc is requested it will use data from
data sheet/ONFI. If this is not available the driver will fail.
- If nand-ecc-strength/nand-ecc-step-size are specified those
value will be used.
- By default maximum possible ECC strength is used
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 16:06:17 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add device tree support
Support driver data from device tree. Also support fsl,use-minimal-ecc
similar to Linux' GPMI NAND driver.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 16:06:16 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: move structs into header file
Move structs into header file so we can use a separate compile
unit for device tree support.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 16:06:15 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add use_minimum_ecc to struct
Add use_minimum_ecc as struct mxs_nand_info field in preparation
for device tree support.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 16:06:14 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: separate board/controller init
In preparation for device tree support separate board init
from controller init similar to other raw NAND drivers.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 16:06:13 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: use more precise function name
This function initializes DMA descriptors so mxs_nand_init_dma is
more precise. It also frees up the rather generic name mxs_nand_init.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 16:06:12 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: move register structs to driver data
Move GPMI and BCH register structs to the driver struct mxs_nand_info
in prepartion for device tree support.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 15:19:51 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: add minimal ECC support
Add support for minimum ECC strength supported by the NAND chip.
This aligns with the behavior when using the fsl,use-minimum-ecc
device tree property in Linux.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 15:19:50 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: report correct ECC parameters
Report correct ECC parameters back to the stack. Do not report
bytes as we have it not immeaditly available and the Linux version
also does not report it. It seems to have no aversive effect.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 15:19:49 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: use structure for BCH geometry
Calculate BCH geometry at start and store the information in
a structure. This avoids recalculation on every page access
and allows to calculate ECC relevant information in one place.
This patch does not change ECC layout or driver behavior in
any way.
The patch aligns the driver somewhat with the Linux GPMI NAND
driver which drives the same IP.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 15:19:48 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: allow to enable BBT support
Add config option which allows to enable on flash bad block table
support. This has the same effect as when using the device tree
property "nand-on-flash-bbt" in Linux.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 15:19:47 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: use self init
Instead of completing initialization via scan_bbt callback use
NAND self init to initialize the GPMI (MXS) NAND controller.
Suggested-by: Scott Wood <oss@buserror.net>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Fri, 22 Jun 2018 15:19:46 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: introduce SPL specific init
In preparation to convert the driver to use NAND self init
provide a new minimal init for SPL builds. As a side effect
this also reduces size of SPL by about 4KiB.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Jon Nettleton [Thu, 7 Jun 2018 13:17:37 +0000 (16:17 +0300)]
mx6cuboxi: fix 4GB ddr memory detection
The soms with 4GB ddr have a rowaddr of 16 not 15, this allows
the detection mechanism to properly identify them as 4GB.
However these soms can be populated with whatever amount of
memory the customer requests therefor we need a ram stride test.
We can not use the get_ram_size() function because not all 4GB's
of DDR is addressable on a 32-bit architecture. Therefore instead
we use a memory stride of 128MB's and look for the address that
the memory wraps. This function is used for all som types to
catch most memory configurations.
This is a revised version of Rabeeh Khoury's original code.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Jon Nettleton [Thu, 7 Jun 2018 13:17:36 +0000 (16:17 +0300)]
mx6cuboxi: consolidate board detection and add som revision checking
In order to properly detect the board the checks need to be done
in a specific order. Move these tests back into a single enum
function that will always return the proper the board it is checking.
This also adds the best test we have for detecting the rev 1.5 som,
and it simplifies the device-tree filename building.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Hannes Schmelzer [Thu, 7 Jun 2018 10:10:09 +0000 (12:10 +0200)]
drivers/gpio/mxc: fix MXC GPIO name in KConfig
The naming with "UART" is obviously wrong, we fix this here.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Jagan Teki [Sat, 2 Jun 2018 11:55:27 +0000 (17:25 +0530)]
board: engicam: spl: match icore-mipi fit-config
Match imx6q-icore-mipi and imx6dl-icore-mipi dtb in
board_fit_config_name_match.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Lukasz Majewski [Sun, 20 May 2018 06:33:19 +0000 (08:33 +0200)]
config: Update defconfig for imx53 K+P boards
This commit updates the defconfig for the HSC and DDC
boards.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Sun, 20 May 2018 06:33:18 +0000 (08:33 +0200)]
board: Remove not needed function for the K+P's imx53 board
The get_board_rev() is not needed anymore as a generic function
for the imx53 SoC has been used instead.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Sun, 20 May 2018 06:33:17 +0000 (08:33 +0200)]
board: Silent out the console on the K+P's imx53 boards
Disable console output by default on imx53 based boards from
K+P.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Sun, 20 May 2018 06:33:16 +0000 (08:33 +0200)]
board: Add support for KEY1 status detection on K+P's HSC|DDC boards
This code provides information if the K+P's imx53 boards had KEY1
pressed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Sun, 20 May 2018 06:33:15 +0000 (08:33 +0200)]
board: Adjust K+P script to run misc (per board) adjustments
This change gives the opportunity to adjust Linux command line for the
imx53 device with some legacy data.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Sun, 20 May 2018 06:33:14 +0000 (08:33 +0200)]
board: imx53: Always disable display before starting kernel
This patch prevents from the situation where we may end up with garbage
displayed on the LCD panel.
Such situation occurs when one performs "reboot -f" in Linux and then
stop in U-boot (or observe the garbage on the screen during boot up).
To prevent from such situation - the PWM pin is configured as GPIO and set
to LOW.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Fabio Estevam [Mon, 11 Jun 2018 18:08:06 +0000 (15:08 -0300)]
pico-imx7d: Adjust the dtb name
Since kernel commit
41bbeadceb03 ("ARM: dts: imx7d-pico-pi: Separate
into cpu and baseboard dts") the dtb name has changed.
Fix it accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Fabio Estevam [Mon, 11 Jun 2018 18:08:05 +0000 (15:08 -0300)]
spl: Add default values for ARCH_MX7
ARCH_MX6 has default values for SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
and SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR.
Do the same for ARCH_MX7 so that users may have a consistent
experience through the i.MX families.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Otavio Salvador [Mon, 11 Jun 2018 18:08:04 +0000 (15:08 -0300)]
wandboard: Remove hardcoded baudrate from "console" variable
We should use the baudrate variable available inside U-Boot
environment to allow it to be changed dynamically.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Mans Rullgard [Fri, 27 Apr 2018 09:45:15 +0000 (10:45 +0100)]
ARM: mxs: let boards override entire dram parameter table
If many values differ from the defaults, overriding the full table
is simpler and more space efficient than tweaking it through
mxs_adjust_memory_params().
Signed-off-by: Mans Rullgard <mans@mansr.com>
Ye Li [Mon, 14 May 2018 12:44:29 +0000 (09:44 -0300)]
imx: Enable ACTLR.SMP bit for all i.MX cortex-a7 platforms
According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit
is set to 1 before the caches and MMU are enabled, or any cache and TLB
maintenance operations are performed".
ROM sets this bit in normal boot flow, but when in serial download mode,
it is not set.
Here we add it in u-boot as a common flow for all i.MX cortex-a7 platforms,
including mx7d, mx6ul/ull and mx7ulp.
Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: adapted to U-Boot mainline codebase and make checkpatch happy]
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Lukasz Majewski [Fri, 11 May 2018 14:51:19 +0000 (16:51 +0200)]
display5: Add missing environment.h include to avoid warning
Without this change the following warning shows up when building:
board/liebherr/display5/display5.c:270:3:
warning: implicit declaration of function ‘eth_env_set_enetaddr’ [-Wimplicit-function-declaration]
This commit fixes this issue.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:18 +0000 (16:51 +0200)]
display5: config: Add GPT verification and restoration code on SWUpdate entry
If GPT gets broken, then after N boot attempts we will run the SWUpdate
restoration image.
On its enter we will check GPT and restore it if needed.
To test it:
display5 > mmc write 0x12000000 4 8
It will overwrite the primary GPT table.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:17 +0000 (16:51 +0200)]
display5: display5_defconfig: Enable support for gpt command (CMD_GPT) in production u-boot
After this change one can run 'gpt' command on production u-boot.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:16 +0000 (16:51 +0200)]
display5: config: Reduce rootfs2 (BACKUP) size from 1528M to 512M
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:15 +0000 (16:51 +0200)]
display5: config: Add cma=256M to command line arguments
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:14 +0000 (16:51 +0200)]
display5: net: Add function to read ethaddr from iMX6 fuses
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:13 +0000 (16:51 +0200)]
display5: ddr: Enable support for DDR3 auto calibration
This code performs DDR3 memory calibration for display5 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:12 +0000 (16:51 +0200)]
display5: config: Update swupdate initramfs file name (now supporting ext4)
After moving to swupdate 2017.07, the default fs for swupdate rootfs
is ext4, not ext3.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:11 +0000 (16:51 +0200)]
display5: config: factory: Update BACKUP rootfs in factory mode
After splitting rootfs images to BACKUP and ACTIVE, the "factory"
u-boot also needs to update the former.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:10 +0000 (16:51 +0200)]
display5: config: Provide 'tftp_mmc_rootfs_bkp' command to write BACKUP rootfs
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:09 +0000 (16:51 +0200)]
display5: wdt: Enable WDT support (both SPL and u-boot)
Test case:
The fitImage gets corrupted:
truncate -c -s 3M fitImage
run tftp_mmc_fitImg
setenv boot_os y
reset
[board shall hang in SPL with
"Trying to boot from MMC1" information]
Then after X seconds WDT is causing board to reset. After N boot attempts
we enter recovery mode.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:08 +0000 (16:51 +0200)]
display5: Support for the emergency PAD pressing
To enter the special mode, one needs to short cut two pads with e.g. screw
driver.
After power up the SPL will execute u-boot in which proper actions will be
taken.
It is worth noting that we do not alter envs (even the BOOT_FROM variable)
and unconditionally go to recovery.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:07 +0000 (16:51 +0200)]
display5: config: factory: Extend mtdparts to support LEG factory partition
This special partition has been added solely for production purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:06 +0000 (16:51 +0200)]
display5: config: Update SPI-NOR partition for larger swupdate-initramfs
The SPI-NOR partition information has been updated to store
swupdate-kernel-FIT just after envs as well as two times larger
swupdate-initramfs image.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:05 +0000 (16:51 +0200)]
display5: config: Remove support for Linux initramfs recovery image boot
This is a prerequisite patch to combine SWUpdate and Linux recovery
initramfs images.
It removes the support for it.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:04 +0000 (16:51 +0200)]
display5: config: Reset the board when bootm fails
Since display5 is now supporting boot counting, we can just reset the
board when bootm fails (i.e. it doesn't boot the fitImage kernel for
any reason).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:03 +0000 (16:51 +0200)]
display5: spl: Check return code of the env_* functions
Force booting through u-boot proper when environment error encountered
(as a result of either broken SPI-NOR or erased envs).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:02 +0000 (16:51 +0200)]
display5: config: Provide command to flash the whole SPI-NOR memory
It may be necessary to update the content of the whole SPI-NOR memory at
once with using a single command (tftp_sf_img).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:01 +0000 (16:51 +0200)]
display5: config: Add "factory" (1MiB) SPI-NOR partition in u-boot
To test if this partition is present - one needs to write:
display5 > sf probe; mtdparts
display5 > sf erase factory +0x100000
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:51:00 +0000 (16:51 +0200)]
display5: config: factory: Setup IP config data according to LEG production setup
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lukasz Majewski [Fri, 11 May 2018 14:50:59 +0000 (16:50 +0200)]
display5: factory: Add support for BOOT_FROM = FACTORY switch
When BOOT_FROM = FACTORY, then the LEG's factory setup is performed.
This code relies on boot_nfs u-boot command, so it shall be adjusted
appropriately (e.g. provide proper fitImage file).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tom Rini [Sat, 16 Jun 2018 04:07:37 +0000 (00:07 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 15 Jun 2018 13:38:16 +0000 (09:38 -0400)]
Merge tag 'arc-updates-for-2018.07-rc2' of git://git.denx.de/u-boot-arc
Here we just add a tool for HSDK flashable images preparation
together with extensive documentation for HSDK board.
This will help real-life users to update U-Boot on the board.
Tom Rini [Fri, 15 Jun 2018 13:38:06 +0000 (09:38 -0400)]
Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.07-rc2
Zynq:
- Fix missing watchdog header
- DT fixes
ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code
timer
- Add timer_get_boot_us
mmc:
- Fix MMC HS200 tuning command
serial:
- Fix scrabled chars with OF_LIVE
Alexey Brodkin [Thu, 14 Jun 2018 21:38:53 +0000 (00:38 +0300)]
ARC: HSDK: Add readme
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 4 Jun 2018 11:52:32 +0000 (14:52 +0300)]
ARC: HSDK: Add tool and make target to generate bsp
HSDK board has preloader that reads SPI flash pages and searches
for a special image header to fetch and load binary.
Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.
Also add script to default environment to apply updates.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Michal Simek [Thu, 14 Jun 2018 09:19:57 +0000 (11:19 +0200)]
serial: zynq: Make zynq_serial_setbrg static
This function is used only inside this driver that's why should be
static.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 14 Jun 2018 08:41:35 +0000 (10:41 +0200)]
serial: zynq: Initialize uart only before relocation
This issue was found when OF_LIVE was enabled that there are scrambled
chars on the console like this:
Chip ID: zu3eg
Watchdog: Started��j� sdhci@
ff160000: 0, sdhci@
ff170000: 1
In: serial@
ff010000
I found a solution for this problem exactly the same as I found later in
serial_msm fixed by:
"serial: serial_msm: initialize uart only before relocation"
(sha1:
7e5ad796bcd65772a87da236ae21cd536ae3a4d2)
What it is happening is that output TX fifo still contains chars to be
sent and _uart_zynq_serial_init() resets TX fifo even in the middle of
transfer.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 14 Jun 2018 07:43:34 +0000 (09:43 +0200)]
serial: zynq: Write chars till output fifo is full
Change logic and put char to fifo till there is a space in output fifo.
Origin logic was that output fifo needs to be empty. It means only one
char was in output queue.
Also remove unused ZYNQ_UART_SR_TXEMPTY macro.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 14 Jun 2018 09:13:41 +0000 (11:13 +0200)]
serial: zynq: Use BIT macros instead of shifts and full hex numbers
Coding style is checking to use BIT macros instead of shifts.
The patch is also fixing the rest of macros which should be BITs instead
of hex numbers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 13 Jun 2018 11:22:08 +0000 (13:22 +0200)]
gpio: zynq_gpio: bank description should use unsigned type
Use u32 instead of int for max_bank, bank_min and bank_max. These values
can't be negative that's why no reason to use signed type.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jun 2018 08:38:33 +0000 (10:38 +0200)]
arm64: zynqmp: Check return value in zynqmp_mmio_rawwrite()
There should be return value check from zynqmp_mmio_read() in
zynqmp_mmio_rawwrite() to make sure that errors are propagated properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jun 2018 07:42:41 +0000 (09:42 +0200)]
arm64: zynqmp: Check return value from calloc
calloc() can fail and return NULL. The patch is checking return value
and return in case of error.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jun 2018 07:12:29 +0000 (09:12 +0200)]
mmc: zynq: Fix tuning_loop_counter type in arasan_sdhci_execute_tuning()
Code around tuning_loop_counter variable expects to go below zero.
That's why this variable can't use unsigned type.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 13 Jun 2018 07:05:51 +0000 (09:05 +0200)]
gpio: zynq: Do not check unsigned type that is >= 0
There is no reason to check that unsigned type that is >= 0.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Wed, 13 Jun 2018 06:13:01 +0000 (11:43 +0530)]
mmc: sdhci: Fix MMC HS200 tuning command failures
This patch fixes the mmc tuning command failures
when tuning pattern data needs to read back for
comparision against the expected bit pattern.
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Luca Ceresoli [Mon, 4 Jun 2018 10:21:01 +0000 (12:21 +0200)]
arm64: zynqmp: accept an absolute path for PMUFW_INIT_FILE
The value of PMUFW_INIT_FILE is prefixed with "$(srctree)/", thus
forcing it to be a relative path inside the U-Boot source tree. Since
the PMUFW is a binary file generated outside of U-Boot, the PMUFW
binary must be copied inside the U-Boot source tree before the
build.
This generates a few problems:
* if the source tree is shared among different out-of-tree builds,
they will pollute (and potentially corrupt) each other
* the source tree cannot be read-only
* any buildsystem must add a command to copy the PMUFW binary
* putting an externally-generated binary in the source tree is ugly
as hell
Avoid these problems by accepting an absolute path for
PMUFW_INIT_FILE. This would be as simple as removing the "$(srctree)/"
prefix, but in order to keep backward compatibility we rather use the
shell and readlink to get the absolute path even when starting from a
relative path.
Since 'readlink -f' produces an empty string if the file does not
exist, we also add a check to ensure the file configured in
PMUFW_INIT_FILE exists. Otherwise the build would exit successfully,
but produce a boot.bin without PMUFW as if PMUFW_INIT_FILE were empty.
Tested in the 12 possible combinations of:
- PMUFW_INIT_FILE empty, relative, absolute, non-existing
- building in-tree, in subdir, in other directory
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 4 Jun 2018 06:27:50 +0000 (08:27 +0200)]
arm64: zynqmp: Enable SPD ddr support for zcu102 targets
zcu102 contains DIMM with SPD on it at 0x51 address.
For example:
i2c dev 13
i2c sdram 51
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 18 Apr 2018 12:03:56 +0000 (14:03 +0200)]
timer: cadence: Implement timer_get_boot_us
This function is required for adding bootstage support.
Also enable it directly for ZynqMP R5 configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 8 Jun 2018 07:36:12 +0000 (09:36 +0200)]
arm: zynq: Drop #address-cells and #size-cells from gpio-keys
dtc is showing some warnings and this change was also done in
the Linux kernel as "Input: gpio-keys - clean up device tree binding
example"
with this fragment in commit message
"Drop #address-cells and #size-cells, which are not required by the
gpio-keys binding documentation, as button sub-nodes are not devices."
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 5 Jun 2018 09:48:32 +0000 (15:18 +0530)]
arm64: zynqmp: Split emmc configuration into emmc0 and emmc1
This patch splits the current mini emmc configuration into emmc0
and emmc1 configurations because emmc is probed at boot time and on
systems which have only one interface mini configuration is failing on
unused interface. This patch also adds required clock node in dts and
enables CONFIG_MMC_SDHCI_ZYNQ through defconfig.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 8 Jun 2018 11:45:14 +0000 (13:45 +0200)]
arm: zynq: Add missing watchdog header
Add missing header detected by sparse.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Thu, 14 Jun 2018 17:28:03 +0000 (13:28 -0400)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-06-14
A few minor fixes for the release:
- Compile fixes
- HI20 relocations for RISC-V
- Fix bootefi without load path
- Fix Runtime Services with certain compilers
Tom Rini [Thu, 14 Jun 2018 11:20:41 +0000 (07:20 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Vasily Khoruzhick [Thu, 14 Jun 2018 06:19:34 +0000 (23:19 -0700)]
usb: sunxi: access ahb_reset0_cfg in CCM using its offset
struct sunxi_ccm_reg doesn't have ahb_reset0_cfg on sun4i and sun5i,
thus compilation fails with:
drivers/usb/host/ohci-sunxi.c:96:26: error: 'struct sunxi_ccm_reg' has
no member named 'ahb_reset0_cfg'
Access this reg using its offset to fix this issue.
Fixes commit
1ed9c1118 ("usb: sunxi: ehci: get rid of ifdefs")
and commit
56830cee3 ("usb: sunxi: ohci: get rid of ifdefs")
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Alexander Graf [Tue, 12 Jun 2018 08:21:16 +0000 (10:21 +0200)]
efi_loader: Allocate memory handle for mem dp
When we boot using memdp (bootefi on an address without previous
load that populates the device path) then the memory device path
we pass in is not backed by any handle.
That can result in weird effects. For example grub gets very grumpy
about this inside the efi_net module and just loops endlessly.
So let's expose a simple handle that the memory device path is backed
on. That way any code that looks for the device the dp is on, finds
one.
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 2 Jun 2018 17:00:41 +0000 (19:00 +0200)]
efi_loader: avoid make race condition
When U-Boot is built with 'make -j' there is not guarantee that targets in
directory arch/ are built before targets in directory lib/. The current
build instruction for EFI binaries in lib/ rely on dependencies in arch/.
If $(EFI_CRT0) or $(EFI_RELOC) is not yet built before trying to build
%.efi an error
*** No rule to make target '%.efi'
occurs.
With the patch separate copies of $(EFI_CRT0) and $(EFI_RELOC) named
efi_crt0.o and efi_reloc.o are built in lib/efi_loader and
lib/efi_selftest.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 9 Jun 2018 15:50:18 +0000 (17:50 +0200)]
efi_loader: avoid initializer element is not constant
When building with -pedantic the current definition of EFI_GUID() causes
an error 'initializer element is not constant'.
Currently EFI_GUID() is used both as an anonymous constant and as an
intializer. A conversion to efi_guid_t is not allowable when using
EFI_GUID() as an initializer. But it is needed when using it as an
anonymous constant.
We should not use EFI_GUID() for anything but an initializer. So let's
introduce a variable where needed and remove the conversion.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Simon Glass [Tue, 12 Jun 2018 05:26:40 +0000 (23:26 -0600)]
efi: Add a comment about duplicated ELF constants
These constants are defined in arch-specific code but redefined here. Add
a TODO to clean this up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sun, 10 Jun 2018 19:51:02 +0000 (21:51 +0200)]
efi_loader: Convert runtime reset from switch to if statements
We currently handle the UEFI runtime reset / power off case handling via
a switch statement. Compilers (gcc in my case) may opt to handle these via
jump tables which they may conveniently put into .rodata which is not part
of the runtime section, so it will be unreachable when executed.
Fix this by just converting the switch statement into an if/else statement.
It produces smaller code that is faster and also correct because we no
longer refer .rodata from efi runtime code.
Reported-by: Andreas Färber <aferber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Tue, 5 Jun 2018 17:20:32 +0000 (19:20 +0200)]
riscv: Add support for HI20 PE relocations
The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
target we always know that our relocation target is 4k aligned, so we
don't need to worry about the LOW12 part.
This patch adds support for the respective relocations. With this and a
few grub patches I have cooking in parallel I'm able to run grub on RISC-V.
Signed-off-by: Alexander Graf <agraf@suse.de>
Michal Simek [Wed, 13 Jun 2018 13:20:35 +0000 (15:20 +0200)]
net: gem: Check return value from memalign/malloc
Functions can return NULL in case of error that's why checking return
value is needed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Wed, 13 Jun 2018 08:33:49 +0000 (10:33 +0200)]
net: zynq_gem: Initialize phyreg variable
In case of phyread()/phy_setup_op() timeout code is working with
uninitialized phyreg variable. Initialize this variable to make sure
that code it not working with random value.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Wed, 13 Jun 2018 08:00:30 +0000 (10:00 +0200)]
net: zynq_gem: Fix return type for phy...()
wait_for_bit_le32 returns negative value on failure. Fix phy...() to
handle these failures properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Sat, 9 Jun 2018 08:46:16 +0000 (20:46 +1200)]
net: mvgbe: extract common code for SMI wait
Combine repeated code from smi_reg_read/smi_reg_write into a common
function smi_wait_ready.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Quentin Schulz [Mon, 4 Jun 2018 10:17:33 +0000 (12:17 +0200)]
net: designware: set the PS bit when resetting DMA bus in MII configuration
On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block,
the DMA reset never succeeds when a MII PHY is used (no problem with a
GMII PHY). The designware_eth_init() function sets the
DMAMAC_SRST bit in the DMA_BUS_MODE register, and then
polls until this bit clears. When a MII PHY is used, with the current
driver, this bit never clears and the driver therefore doesn't work.
The reason is that the PS bit of the GMAC_CONTROL register should be
correctly configured for the DMA reset to work. When the PS bit is 0,
it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells
the MAC we have a MII PHY.
Doing a DMA reset clears all registers, so the PS bit is cleared as
well. This makes the DMA reset work fine with a GMII PHY. However,
with MII PHY, the PS bit should be set.
We have identified this issue thanks to two SPEAr600 platform:
- One equipped with a GMII PHY, with which the existing driver was
working fine.
- One equipped with a MII PHY, where the current driver fails because
the DMA reset times out.
Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Sun, 3 Jun 2018 04:21:26 +0000 (16:21 +1200)]
net: phy: mv88e61xx: Force CPU port link up
When connecting to from a CPU direct to a 88e6097 typically RGMII is
used. In order for traffic to actually pass we need to force the link up
so the CPU MAC on the other end will see the link.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jon Nettleton [Wed, 30 May 2018 05:52:29 +0000 (08:52 +0300)]
mvebu: neta: align DMA buffers
This makes sure the DMA buffers are properly aligned for the
hardware.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Kunihiko Hayashi [Thu, 24 May 2018 10:24:37 +0000 (19:24 +0900)]
net: add Socionext AVE ethernet driver support
Add driver for Socionext AVE ethernet controller that includes MAC and
MDIO bus supporting RGMII/RMII modes.
The driver behaves the ethernet driver model (DM_ETH) with devicetree.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Kunihiko Hayashi [Fri, 18 May 2018 02:12:04 +0000 (11:12 +0900)]
net: include/phy.h: add new mode for internal phy
Add the new mode to indicate a built-in PHY.
This will be used by UniPhier AVE ethernet driver.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Radu Bulie [Mon, 21 May 2018 15:02:09 +0000 (10:02 -0500)]
drivers/net/vsc9953: Initialize action RAM in VCAP complex
VCAP tables must be initialized even if no advanced classification
is used. If no initialization is performed, then ECC error will
be observed by the user when the first packet enters the l2switch.
The error is marked in MPIC_EISR0 -bit 29 which means - Internal RAM
multi-bit ECC error.
This patch fixes the aforementioned ECC error by performing the
initialization of VCAP tables.
Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Vasily Khoruzhick [Mon, 14 May 2018 15:34:36 +0000 (08:34 -0700)]
net: nfs: don't fail when nfs_read_reply returns -NFS_RPC_DROP
That can happen if duplicate UDP packet arrived, and that's not uncommon.
Anyway, we ignore packets with rpc_id lower than last we sent for other
requests, so it makes sense to do that for read request as well.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Sat, 12 May 2018 07:30:02 +0000 (07:30 +0000)]
net: cpsw: ti: Reap completed packets before stopping interface
If you send a final packet just before stopping the interface (e.g. a final
ACK as part of the UDP fastboot protocol), then that packet isn't reliably
delivered onto the wire.
Reap packets prior to stopping the interface to ensure any which are
in-flight make it out. Also remove buffer and len from the call to
cpdma_process() as we weren't using them on their return.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Leonid Iziumtsev [Tue, 8 May 2018 13:55:50 +0000 (15:55 +0200)]
net: Protect net_state from reentrant net_loop()
Global variable "net_state" is used in net_loop() state-machine.
But it happens that some times the net_loop() can be called
multiple times in the same call stack. For example when the
netconsole is enabled and we print the message while some other
net protocol is in action. Netconsole will overwrite the "net_state"
and that will break the logic for earlier started protocol.
To protect the state save and restore "net_state" variable each
time when we enter and exit net_loop().
Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Vicentiu Galanopulo [Wed, 2 May 2018 11:23:38 +0000 (06:23 -0500)]
net/phy/cortina: Add support for CS4223 PHY
Add support for Cortina CS4223 10G PHY
- As per the CS4223 specs, an EEPROM module is
connected to the PHY. At startup the PHY reads
the firmware line and tries to load the firmware
into the internal memory.
- This driver reads the EEPROM status
and checks if firmware has been loaded
Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Tue, 1 May 2018 21:33:55 +0000 (16:33 -0500)]
net: sunxi: Correct MAC address register order
Put the enetaddr data in the same order as it was before the change in
commit
ace1520cb5fc ("net: sunxi-emac: Write HW address via function")
Reported-by: Udo Maslo <u.maslo@web.de>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Mon, 30 Apr 2018 17:45:22 +0000 (12:45 -0500)]
net: Express LINK_LOCAL dependency on LIB_RAND
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Fri, 27 Apr 2018 12:52:57 +0000 (14:52 +0200)]
tsec: Fix reading phy registers from DT
Bus translations should be applied when reading the address of the sgmii
phy registers from the DT. Use ofnode_get_addr_index instead of the
plain ofnode_read_u32_default to fix this.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Fri, 27 Apr 2018 12:52:56 +0000 (14:52 +0200)]
net: Initialize as many ethernet devices as possible
On devices that have their first network interface provided by a FPGA,
the initialization of further interfaces will fail if the FPGA is not
yet programmed. This leads to problems during factory setup when the
data is supposed to be loaded over secondary netowork interfaces.
To avoid this, use the uclass_{first,next}_device_check functions to
initialize as many ethernet devices as possible.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Wed, 28 Mar 2018 12:38:49 +0000 (14:38 +0200)]
net: Always align tx packets
Make sure that TX packets are always cache-aligned.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Wed, 13 Jun 2018 15:43:59 +0000 (11:43 -0400)]
Merge git://git.denx.de/u-boot-x86
Adam Ford [Fri, 8 Jun 2018 14:26:30 +0000 (09:26 -0500)]
ARM: DTS: resync a3517.dtsi with Linux 4.17
Linux 4.17 was just released with some minor changes to the
am3517.dtsi. This patch re-syncs the file.
Signed-off-by: Adam Ford <aford173@gmail.com>