Jonathan Wakely [Fri, 29 Jul 2016 10:42:17 +0000 (11:42 +0100)]
New libstdc++ symbol version for new basic_string symbols
* acinclude.m4 (libtool_VERSION): Bump to 6:23:0.
* config/abi/pre/gnu.ver: Add 3.4.23 version for new basic_string
symbols.
* configure: Regenerate.
* testsuite/util/testsuite_abi.cc: Add new symbol version.
From-SVN: r238853
Jonathan Wakely [Fri, 29 Jul 2016 10:42:06 +0000 (11:42 +0100)]
Update libstdc++ baseline symbols for x86 and ppc
* config/abi/post/i386-linux-gnu/baseline_symbols.txt: Update.
* config/abi/post/i486-linux-gnu/baseline_symbols.txt: Likewise.
* config/abi/post/powerpc-linux-gnu/baseline_symbols.txt: Likewise.
* config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt:
Likewise.
* config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: Likewise.
* config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Likewise.
* config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: Likewise.
From-SVN: r238852
Georg-Johann Lay [Fri, 29 Jul 2016 09:26:52 +0000 (09:26 +0000)]
avr.md (addqi3): Revert glitch in insn attribute introduced in r238381.
* config/avr/avr.md (addqi3) [cc]: Revert glitch in insn attribute
introduced in r238381.
From-SVN: r238851
Georg-Johann Lay [Fri, 29 Jul 2016 09:14:02 +0000 (09:14 +0000)]
lib1funcs.S (__muldi3): No need to clear zero_reg as previous call to __umulhisi3 already cleared it.
* config/avr/lib1funcs.S (__muldi3) [have MUL]: No need to clear
zero_reg as previous call to __umulhisi3 already cleared it.
From-SVN: r238850
Dominik Vogt [Fri, 29 Jul 2016 08:04:01 +0000 (08:04 +0000)]
gfortran: Fix allocation of diagnostig string (was too small).
The attached patch fixes an out of bound write to memory allocated
with alloca() on the stack. This rarely ever happened because on
one hand -fbounds-check needs to be enabled, and on the other hand
alloca() used to allocate a few bytes extra most of the time so
most of the time the excess write did no harm.
gcc/fortran/ChangeLog:
* trans-array.c (gfc_conv_array_ref): Fix allocation of diagnostic
message (was too small).
From-SVN: r238849
Kugan Vivekanandarajah [Fri, 29 Jul 2016 00:35:23 +0000 (00:35 +0000)]
re PR rtl-optimization/68217 (Wrong constant folding)
gcc/ChangeLog:
2016-07-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/68217
* tree-vrp.c (extract_range_from_binary_expr_1): In case of signed
& sign-bit-CST, generate [-INF, 0] instead of [-INF, INF].
gcc/testsuite/ChangeLog:
2016-07-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/68217
* gcc.dg/pr68217.c: New test.
From-SVN: r238846
GCC Administrator [Fri, 29 Jul 2016 00:16:17 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r238845
Steven G. Kargl [Thu, 28 Jul 2016 23:12:23 +0000 (23:12 +0000)]
re PR fortran/71067 (ICE on data initialization with insufficient value)
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71067
* decl.c (match_data_constant): On error, set 'result' to NULL.
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71067
* gfortran.dg/pr71067_1.f90: New test.
* gfortran.dg/pr71067_2.f90: Ditto.
From-SVN: r238842
Joseph Myers [Thu, 28 Jul 2016 21:15:06 +0000 (22:15 +0100)]
* sv.po: Update.
From-SVN: r238839
Michael Meissner [Thu, 28 Jul 2016 21:02:06 +0000 (21:02 +0000)]
rs6000-protos.h (rs6000_split_vec_extract_var): New declaration.
[gcc]
2016-07-28 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_split_vec_extract_var):
New declaration.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Add support for vec_extract of vector double or vector long having
a variable element number on 64-bit ISA 2.07 systems or newer.
* config/rs6000/rs6000.c (rs6000_expand_vector_extract):
Likewise.
(rs6000_split_vec_extract_var): New function to split a
vec_extract built-in function with variable element number.
(rtx_is_swappable_p): Variable vec_extracts and shifts are not
swappable.
* config/rs6000/vsx.md (UNSPEC_VSX_VSLO): New unspec.
(UNSPEC_VSX_EXTRACT): Likewise.
(vsx_extract_<mode>, VSX_D iterator): Fix constraints to allow
direct move instructions to be generated on 64-bit ISA 2.07
systems and newer, and to take advantage of the ISA 3.0 MFVSRLD
instruction.
(vsx_vslo_<mode>): New insn to do VSLO on V2DFmode and V2DImode
arguments for vec_extract variable element.
(vsx_extract_<mode>_var, VSX_D iterator): New insn to support
vec_extract with variable element on V2DFmode and V2DImode
vectors.
* config/rs6000/rs6000.h (TARGET_VEXTRACTUB): Remove
-mupper-regs-df requirement, since it isn't needed.
(TARGET_DIRECT_MOVE_64BIT): New macro to say whether we can
do direct moves on 64-bit systems, which allows optimization of
vec_extract on 64-bit ISA 2.07 systems and newer.
[gcc/testsuite]
2016-07-28 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-extract-1.c: New test.
From-SVN: r238838
Jonathan Wakely [Thu, 28 Jul 2016 21:00:45 +0000 (22:00 +0100)]
Fix DR 438 container tests to pass in C++98 mode
* testsuite/23_containers/deque/requirements/dr438/assign_neg.cc:
Adjust dg-prune-output pattern for error in C++98 mode.
* testsuite/23_containers/deque/requirements/dr438/
constructor_1_neg.cc: Likewise.
* testsuite/23_containers/deque/requirements/dr438/
constructor_2_neg.cc: Likewise.
* testsuite/23_containers/deque/requirements/dr438/insert_neg.cc:
Likewise.
* testsuite/23_containers/list/requirements/dr438/assign_neg.cc:
Likewise.
* testsuite/23_containers/list/requirements/dr438/
constructor_1_neg.cc: Likewise.
* testsuite/23_containers/list/requirements/dr438/insert_neg.cc:
Likewise.
* testsuite/23_containers/vector/requirements/dr438/assign_neg.cc:
Likewise.
* testsuite/23_containers/vector/requirements/dr438/
constructor_1_neg.cc: Likewise.
* testsuite/23_containers/vector/requirements/dr438/
constructor_2_neg.cc: Likewise.
* testsuite/23_containers/vector/requirements/dr438/insert_neg.cc:
Likewise.
From-SVN: r238837
Jonathan Wakely [Thu, 28 Jul 2016 21:00:39 +0000 (22:00 +0100)]
Fix std::vector test to pass in C++98 mode
* testsuite/23_containers/vector/check_construct_destroy.cc: Account
for different construct/destroy counts in C++98 mode.
From-SVN: r238836
Jonathan Wakely [Thu, 28 Jul 2016 21:00:34 +0000 (22:00 +0100)]
Use dg-additional-options in libstdc++ tests
* testsuite/17_intro/headers/c++2011/stdc++.cc: Change target-specific
dg-options to dg-additional-options so that default options are used.
* testsuite/17_intro/headers/c++2011/stdc++_multiple_inclusion.cc:
Likewise.
* testsuite/17_intro/headers/c++2014/stdc++.cc: Likewise.
* testsuite/17_intro/headers/c++2014/stdc++_multiple_inclusion.cc:
Likewise.
* testsuite/29_atomics/atomic_flag/test_and_set/explicit-hle.cc:
Use dg-additional-options instead of repeating the common options.
From-SVN: r238835
Jonathan Wakely [Thu, 28 Jul 2016 21:00:19 +0000 (22:00 +0100)]
Fix invalid dg-do directives in libstdc++ tests
* testsuite/22_locale/conversions/string/1.cc: Remove unintended
dg-do compile directive.
* testsuite/26_numerics/headers/cmath/fabs_inline.cc: Fix syntax of
dg-do directive.
* testsuite/26_numerics/valarray/const_bracket.cc: Likewise.
From-SVN: r238834
Steven G. Kargl [Thu, 28 Jul 2016 19:04:12 +0000 (19:04 +0000)]
re PR fortran/71799 (ICE in DO loop code emission (gfc_resolve_iterator))
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71799
* resolve.c(gfc_resolve_iterator): Failure of type conversion need
not ICE.
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71799
* gfortran.dg/pr71799.f90: New test.
From-SVN: r238830
Paolo Carlini [Thu, 28 Jul 2016 18:43:29 +0000 (18:43 +0000)]
re PR c++/71665 (ICE on invalid C++ code with non-integral constant enumerator value: in cxx_eval_constant_expression, at cp/constexpr.c:3918)
/cp
2016-07-28 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71665
* decl.c (build_enumerator): Check the type of the enumerator before
calling cxx_constant_value.
/testsuite
2016-07-28 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71665
* g++.dg/cpp0x/pr71665-1.C: New.
* g++.dg/cpp0x/pr71665-2.C: Likewise.
* g++.dg/cpp0x/enum29.C: Adjust dg-error string.
* g++.dg/ext/label10.C: Likewise.
* g++.dg/parse/constant5.C: Likewise.
From-SVN: r238828
Steven G. Kargl [Thu, 28 Jul 2016 17:48:54 +0000 (17:48 +0000)]
re PR fortran/71859 (ICE on same variable/subroutine name (verify_gimple failed))
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71859
* check.c(numeric_check): Prevent ICE. Issue error for invalid
subroutine as an actual argument when numeric argument is expected.
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71859
* gfortran.dg/pr71859.f90: New test.
* gfortran.dg/intrinsic_numeric_arg.f: Update error message.
* gfortran.dg/coarray_collectives_1.f90: Ditto.
From-SVN: r238825
Marek Polacek [Thu, 28 Jul 2016 15:46:07 +0000 (15:46 +0000)]
re PR c/7652 (-Wswitch-break : Warn if a switch case falls through)
PR c/7652
* jcf-dump.c (print_constant): Add break.
From-SVN: r238824
Ville Voutilainen [Thu, 28 Jul 2016 15:15:26 +0000 (18:15 +0300)]
Implement std::string_view and P0254r2,
Integrating std::string_view and std::string.
* include/Makefile.am: Add string_view and string_view.tcc
to the exported headers.
* include/Makefile.in: Likewise.
* include/bits/basic_string.h: Include <string_view> in C++17 mode.
(__sv_type): New.
(basic_string(__sv_type, const _Alloc&)): Likewise.
(operator=(__sv_type)): Likewise.
(operator __sv_type()): Likewise.
(operator+=(__sv_type)): Likewise.
(append(__sv_type __sv)): Likewise.
(append(__sv_type, size_type, size_type)): Likewise.
(assign(__sv_type)): Likewise.
(assign(__sv_type, size_type, size_type)): Likewise.
(insert(size_type, __sv_type)): Likewise.
(insert(size_type, __sv_type, size_type, size_type)): Likewise.
(replace(size_type, size_type, __sv_type)): Likewise.
(replace(size_type, size_type, __sv_type, size_type, size_type)):
Likewise.
(replace(const_iterator, const_iterator, __sv_type)): Likewise.
(find(__sv_type, size_type)): Likewise.
(rfind(__sv_type, size_type)): Likewise.
(find_first_of(__sv_type, size_type)): Likewise.
(find_last_of(__sv_type, size_type)): Likewise.
(find_first_not_of(__sv_type, size_type)): Likewise.
(find_last_not_of(__sv_type, size_type)): Likewise.
(compare(__sv_type)): Likewise.
(compare(size_type, size_type, __sv_type)): Likewise.
(compare(size_type, size_type, __sv_type, size_type, size_type)):
Likewise.
* include/bits/string_view.tcc: New.
* include/std/string_view: Likewise.
* testsuite/21_strings/basic_string/cons/char/7.cc: Likewise.
* testsuite/21_strings/basic_string/cons/wchar_t/7.cc: Likewise.
* testsuite/21_strings/basic_string/modifiers/append/char/4.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/append/wchar_t/4.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/assign/char/4.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/assign/wchar_t/4.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/insert/char/3.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/insert/wchar_t/3.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/replace/char/7.cc:
Likewise.
* testsuite/21_strings/basic_string/modifiers/replace/wchar_t/7.cc:
Likewise.
* testsuite/21_strings/basic_string/operations/compare/char/2.cc:
Likewise.
* testsuite/21_strings/basic_string/operations/compare/wchar_t/2.cc:
Likewise.
* testsuite/21_strings/basic_string/operations/find/char/5.cc:
Likewise.
* testsuite/21_strings/basic_string/operations/find/wchar_t/5.cc:
Likewise.
* testsuite/21_strings/basic_string/operators/char/5.cc: Likewise.
* testsuite/21_strings/basic_string/operators/wchar_t/5.cc: Likewise.
* testsuite/21_strings/basic_string_view/capacity/1.cc: Likewise.
* testsuite/21_strings/basic_string_view/cons/char/1.cc: Likewise.
* testsuite/21_strings/basic_string_view/cons/char/2.cc: Likewise.
* testsuite/21_strings/basic_string_view/cons/char/3.cc: Likewise.
* testsuite/21_strings/basic_string_view/cons/wchar_t/1.cc: Likewise.
* testsuite/21_strings/basic_string_view/cons/wchar_t/2.cc: Likewise.
* testsuite/21_strings/basic_string_view/cons/wchar_t/3.cc: Likewise.
* testsuite/21_strings/basic_string_view/element_access/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/char/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/char/empty.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/char/front_back.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/wchar_t/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/wchar_t/empty.cc:
Likewise.
* testsuite/21_strings/basic_string_view/element_access/wchar_t/front_back.cc:
Likewise.
* testsuite/21_strings/basic_string_view/include.cc: Likewise.
* testsuite/21_strings/basic_string_view/inserters/char/1.cc: Likewise.
* testsuite/21_strings/basic_string_view/inserters/char/2.cc: Likewise.
* testsuite/21_strings/basic_string_view/inserters/char/3.cc: Likewise.
* testsuite/21_strings/basic_string_view/inserters/pod/10081-out.cc:
Likewise.
* testsuite/21_strings/basic_string_view/inserters/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/inserters/wchar_t/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/inserters/wchar_t/3.cc:
Likewise.
* testsuite/21_strings/basic_string_view/modifiers/remove_prefix/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/modifiers/remove_prefix/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/modifiers/remove_suffix/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/modifiers/remove_suffix/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/compare/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/compare/char/13650.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/compare/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/compare/wchar_t/13650.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/copy/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/copy/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/data/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/data/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/char/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/char/3.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/char/4.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/wchar_t/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/wchar_t/3.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/find/wchar_t/4.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/rfind/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/rfind/char/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/rfind/char/3.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/rfind/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/rfind/wchar_t/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/rfind/wchar_t/3.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/string_conversion/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/substr/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operations/substr/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/operators/char/2.cc: Likewise.
* testsuite/21_strings/basic_string_view/operators/wchar_t/2.cc:
Likewise.
* testsuite/21_strings/basic_string_view/range_access/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/range_access/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/requirements/explicit_instantiation/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/requirements/explicit_instantiation/char/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/requirements/explicit_instantiation/char16_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/requirements/explicit_instantiation/char32_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/requirements/explicit_instantiation/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string_view/requirements/typedefs.cc:
Likewise.
* testsuite/21_strings/basic_string_view/typedefs.cc: Likewise.
* testsuite/21_strings/basic_string_view/types/1.cc: Likewise.
From-SVN: r238823
Paul Thomas [Thu, 28 Jul 2016 14:47:02 +0000 (14:47 +0000)]
[multiple changes]
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71883
* frontend-passes.c (gfc_run_passes): Bail out if there are any
errors.
* error.c (gfc_internal_error): If there are any errors in the
buffer, exit with EXIT_FAILURE.
2016-07-28 Paul Thomas <pault@gcc.gnu.org>
PR fortran/71883
* gfortran.dg/pr71883.f90 : New test.
From-SVN: r238822
Wilco Dijkstra [Thu, 28 Jul 2016 14:34:41 +0000 (14:34 +0000)]
On AArch64 the UXTB and UXTH instructions are aliases of UBFM,
which does a shift as part of its operation. An AND immediate is a
simpler operation, and might be faster on some implementations, so
it is better to emit this this instead of UBFM.
Benchmarking showed no difference on implementations where UBFM has
the same performance as AND, and minor speedups across several
benchmarks on an implementation where UBFM is slower than AND.
Bootstrapped and tested on aarch64-none-elf.
gcc/
* config/aarch64/aarch64.md
(zero_extend<SHORT:mode><GPI:mode>2_aarch64): Change output
statement and type.
(<optab>qihi2_aarch64): Likewise, and split into two.
(extendqihi2_aarch64): New.
(zero_extendqihi2_aarch64): New.
* config/aarch64/iterators.md (ldrxt): Remove.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Change cost of
uxtb/uxth.
From-SVN: r238821
Kristina Martsenko [Thu, 28 Jul 2016 14:29:28 +0000 (14:29 +0000)]
This patchset improves zero extend costs and code generation.
When zero extending a 32-bit register, we emit a "mov", but currently
report the cost of the "mov" incorrectly.
In terms of speed, we currently say the cost is that of an extend
operation. But the cost of a "mov" is the cost of 1 instruction, so fix
that.
In terms of size, we currently say that the "mov" takes 0 instructions.
Fix it by changing it to 1.
Bootstrapped and tested on aarch64-none-elf.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Fix cost of zero extend.
From-SVN: r238820
Wilco Dijkstra [Thu, 28 Jul 2016 14:21:57 +0000 (14:21 +0000)]
This patch improves the readability of the prolog and epilog code by moving some code into separate functions.
This patch improves the readability of the prolog and epilog code by moving
some code into separate functions. There is no difference in generated code.
gcc/
* config/aarch64/aarch64.c (aarch64_pushwb_pair_reg): Rename.
(aarch64_push_reg): New function to push 1 or 2 registers.
(aarch64_pop_reg): New function to pop 1 or 2 registers.
(aarch64_expand_prologue): Use aarch64_push_regs.
(aarch64_expand_epilogue): Use aarch64_pop_regs.
From-SVN: r238818
Yuri Rumyantsev [Thu, 28 Jul 2016 14:19:18 +0000 (14:19 +0000)]
re PR middle-end/71734 (FAIL: libgomp.fortran/simd4.f90 -O3 -g execution test)
gcc/
2016-07-28 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71734
* tree-ssa-loop-im.c (ref_indep_loop_p_1): Pass value of safelen
attribute instead of REF_LOOP and use it.
(ref_indep_loop_p_2): Use SAFELEN argument instead of REF_LOOP and
set it for Loops having non-zero safelen attribute.
(ref_indep_loop_p): Pass zero as initial value for safelen.
gcc/testsuite/
2016-07-28 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71734
* g++.dg/vect/pr70729-nest.cc: New test.
From-SVN: r238817
Ilya Enkovich [Thu, 28 Jul 2016 12:58:37 +0000 (12:58 +0000)]
re PR middle-end/72657 ([CHKP] internal compiler error: in ix86_expand_builtin)
gcc/
PR middle-end/72657
PR target/72683
* tree-chkp.c (chkp_retbnd_call_by_val): Check for instrumentation
call using chkp_gimple_call_builtin_p.
(chkp_copy_bounds_for_assign): Likewise.
From-SVN: r238816
Renlin Li [Thu, 28 Jul 2016 11:21:53 +0000 (11:21 +0000)]
[PATCH] Revert Revert r238497 because of PR 71961.
This patch reverts the change for PR 71902 since it causes 178.gagel
miscompile in spec2000 as reported in PR 71961 which was observed in
x86_64, aarch64, powerpc64.
gcc/fortran/ChangeLog:
2016-07-28 Renlin Li <renlin.li@arm.com>
Revert
2016-07-19 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71902
* dependency.c (gfc_check_dependency): Use dep_ref. Handle case
if identical is true and two array element references differ.
(gfc_dep_resovler): Move most of the code to dep_ref.
(dep_ref): New function.
* frontend-passes.c (realloc_string_callback): Name temporary
variable "realloc_string".
gcc/testsuite/ChangeLog:
2016-07-28 Renlin Li <renlin.li@arm.com>
Revert
2016-07-19 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71902
* gfortran.dg/dependency_47.f90: New test.
From-SVN: r238815
Trevor Saunders [Thu, 28 Jul 2016 11:01:49 +0000 (11:01 +0000)]
merge adjust_cost and adjust_cost_2 target hooks
gcc/ChangeLog:
2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/alpha/alpha.c (alpha_adjust_cost): Adjust.
* config/arm/arm-protos.h (struct tune_params): Likewise.
* config/arm/arm.c (xscale_sched_adjust_cost): Likewise.
(cortex_a9_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(arm_adjust_cost): Likewise.
* config/bfin/bfin.c (bfin_adjust_cost): Likewise.
* config/c6x/c6x.c (c6x_adjust_cost): Likewise.
* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise.
* config/i386/i386.c (ix86_adjust_cost): Likewise.
* config/ia64/ia64.c: Likewise.
* config/m68k/m68k.c: Likewise.
* config/mep/mep.c (mep_adjust_cost): Likewise.
* config/microblaze/microblaze.c (microblaze_adjust_cost):
* Likewise.
* config/mips/mips.c (mips_adjust_cost): Likewise.
* config/mn10300/mn10300.c (mn10300_adjust_sched_cost):
* Likewise.
* config/pa/pa.c (pa_adjust_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_adjust_cost): Likewise.
(rs6000_debug_adjust_cost): Likewise.
* config/sh/sh.c (sh_adjust_cost): Likewise.
* config/sparc/sparc.c (supersparc_adjust_cost): Likewise.
(hypersparc_adjust_cost): Likewise.
(sparc_adjust_cost): Likewise.
* config/spu/spu.c (spu_sched_adjust_cost): Likewise.
* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Likewise.
* config/tilepro/tilepro.c (tilepro_sched_adjust_cost):
* Likewise.
* config/visium/visium.c (visium_adjust_cost): Likewise.
* doc/tm.texi: Regenerate.
* haifa-sched.c (dep_cost_1): Adjust.
* target.def: Merge adjust_cost and adjust_cost_2.
From-SVN: r238814
Trevor Saunders [Thu, 28 Jul 2016 11:01:39 +0000 (11:01 +0000)]
haifa-sched.c: make twins a auto_vec<rtx_insn *>
gcc/ChangeLog:
2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* haifa-sched.c (add_to_speculative_block): Make twins a vector.
From-SVN: r238813
Trevor Saunders [Thu, 28 Jul 2016 11:01:34 +0000 (11:01 +0000)]
make pattern_regs a vec
gcc/ChangeLog:
2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* store-motion.c (struct st_expr): Make pattern_regs a vector.
(extract_mentioned_regs): Append to a vector instead of
returning a rtx_expr_list.
(st_expr_entry): Adjust.
(free_st_expr_entry): Likewise.
(store_ops_ok): Likewise.
(store_killed_in_insn): Likewise.
(find_moveable_store): Likewise.
From-SVN: r238812
Martin Liska [Thu, 28 Jul 2016 08:45:29 +0000 (10:45 +0200)]
Introduce no_profile_instrument_function attribute
PR gcov-profile/68025
* tree-profile.c (tree_profiling): Respect
no_profile_instrument_function attribute.
* doc/extend.texi: Document no_profile_instrument_function
attribute.
PR gcov-profile/68025
* c-common.c (handle_no_profile_instrument_function_attribute):
PR gcov-profile/68025
* gcc.dg/no_profile_instrument_function-attr-1.c: New test.
From-SVN: r238811
Martin Liska [Thu, 28 Jul 2016 08:31:54 +0000 (08:31 +0000)]
Add missing file.
From-SVN: r238810
Martin Liska [Thu, 28 Jul 2016 08:31:36 +0000 (10:31 +0200)]
Add mark_spam.py script
* mark_spam.py: New file.
From-SVN: r238809
Martin Liska [Thu, 28 Jul 2016 08:26:51 +0000 (10:26 +0200)]
Do not allow make_compound_operation for vector mode
* g++.dg/vect/pr70944.cc: New test.
PR rtl-optimization/70944
* combine.c (make_compound_operation):
Do not allow make_compound_operation for vector mode
From-SVN: r238808
GCC Administrator [Thu, 28 Jul 2016 00:16:16 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r238806
Kugan Vivekanandarajah [Wed, 27 Jul 2016 23:02:44 +0000 (23:02 +0000)]
re PR tree-optimization/71994 (ICE: verify_gimple failed)
gcc/testsuite/ChangeLog:
2016-07-28 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/71994
* gcc.dg/torture/pr71994.c: New test.
From-SVN: r238803
Kugan Vivekanandarajah [Wed, 27 Jul 2016 22:45:46 +0000 (22:45 +0000)]
re PR tree-optimization/71994 (ICE: verify_gimple failed)
gcc/testsuite/ChangeLog:
2016-07-28 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/71994
* gcc.dg/torture/pr71994.c: New test.
gcc/ChangeLog:
2016-07-28 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/71994
* tree-ssa-reassoc.c (maybe_optimize_range_tests): Check tcc_comparison
before calling get_ops.
From-SVN: r238802
Bernd Edlinger [Wed, 27 Jul 2016 20:35:35 +0000 (20:35 +0000)]
defaults.h (LOG2_BITS_PER_UNIT): Move from here...
2016-07-27 Bernd Edlinger <bernd.edlinger@hotmail.de>
* defaults.h (LOG2_BITS_PER_UNIT): Move from here...
* tree.h (LOG2_BITS_PER_UNIT): ...to here.
(BITS_PER_UNIT_LOG): Remove.
(int_bit_position): Use LOG2_BITS_PER_UNIT instead of BITS_PER_UNIT_LOG.
* expr.c (expand_assignment): Likewise.
* stor-layout.c (initialize_sizetypes): Likewise.
c-family:
2016-07-27 Bernd Edlinger <bernd.edlinger@hotmail.de>
* c-common.c (check_user_alignment): Use LOG2_BITS_PER_UNIT instead of
BITS_PER_UNIT_LOG.
From-SVN: r238800
Michael Meissner [Wed, 27 Jul 2016 20:31:57 +0000 (20:31 +0000)]
vector.md (vec_extract<mode>): Change the calling signature of rs6000_expand_vector_extract so that the...
2016-07-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vector.md (vec_extract<mode>): Change the calling
signature of rs6000_expand_vector_extract so that the element
number is a RTX instead of a constant integer.
* config/rs6000/rs6000-protos.h (rs6000_expand_vector_extract):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Likewise.
(altivec_expand_vec_ext_builtin): Likewise.
* config/rs6000/altivec.md (reduc_plus_scal_<mode>): Likewise.
* config/rs6000/vsx.md (vsx_extract_<mode>): Fix spelling of the
MFVSRLD instruction.
From-SVN: r238799
Jonathan Wakely [Wed, 27 Jul 2016 17:32:45 +0000 (18:32 +0100)]
* testsuite/20_util/forward/1_neg.cc: Move dg-error to right line.
From-SVN: r238793
David Malcolm [Wed, 27 Jul 2016 17:21:20 +0000 (17:21 +0000)]
Move make_location from tree.h/c to input.h/c
For some reason I added make_location and some related functions to
tree.h/c, rather than to input.h/c. Move them there, so we can use them
without requiring tree, and add some selftest coverage.
gcc/ChangeLog:
* input.c (get_pure_location): Move here from tree.c.
(make_location): Likewise. Add header comment.
(selftest::test_accessing_ordinary_linemaps): Verify
pure_location_p, make_location, get_location_from_adhoc_loc and
get_range_from_loc.
* input.h (get_pure_location): Move declaration here from tree.h.
(get_finish): Likewise for inline function.
(make_location): Likewise for declaration.
* tree.c (get_pure_location): Move to input.c.
(make_location): Likewise.
* tree.h (get_pure_location): Move declaration to tree.h.
(get_finish): Likewise for inline function.
(make_location): Likewise for declaration.
libcpp/ChangeLog:
* include/line-map.h (source_location): Fix line numbers in
comment.
From-SVN: r238792
Segher Boessenkool [Wed, 27 Jul 2016 16:16:12 +0000 (18:16 +0200)]
Add missing PR marker to Changelog for 71216 fix
From-SVN: r238790
Prathamesh Kulkarni [Wed, 27 Jul 2016 15:09:10 +0000 (15:09 +0000)]
re PR middle-end/71078 (x/abs(x) -> sign(1.0,x))
2016-07-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR middle-end/71078
* match.pd (x / abs(x) -> copysign(1.0, x)): New pattern.
testsuite/
* gcc.dg/tree-ssa/pr71078-1.c: New test-case.
* gcc.dg/tree-ssa/pr71078-2.c: Likewise.
* gcc.dg/tree-ssa/pr71078-3.c: Likewise.
From-SVN: r238787
David Malcolm [Wed, 27 Jul 2016 14:49:06 +0000 (14:49 +0000)]
Use static_assert for STATIC_ASSERT for C++11 onwards
C++11 has a
static_assert (COND, MESSAGE)
which gives more readable error messages for STATIC_ASSERT than our
current implementation.
This patch makes us use it if __cplusplus >= 201103L
There's also a provisional static_assert (COND) in C++1z, but presumably
we should wait until that one is fully standardized before using it.
gcc/ChangeLog:
* system.h (STATIC_ASSERT): Use static_assert if building
with C++11 onwards.
From-SVN: r238786
Jason Merrill [Wed, 27 Jul 2016 14:31:30 +0000 (10:31 -0400)]
PR c++/71747 - ICE with self-referential partial spec
* pt.c (get_partial_spec_bindings): Replace tparms and spec_args
parameters with spec_tmpl. Call push_tinst_level.
(most_specialized_partial_spec): Adjust.
(more_specialized_partial_spec): Adjust.
From-SVN: r238785
Richard Biener [Wed, 27 Jul 2016 11:11:22 +0000 (11:11 +0000)]
costmodel-pr68961.c: Remove.
2016-07-27 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/costmodel/x86_64/costmodel-pr68961.c: Remove.
From-SVN: r238784
Richard Biener [Wed, 27 Jul 2016 11:10:25 +0000 (11:10 +0000)]
re PR tree-optimization/72517 (436.cactusADM: More than 40% regression in O3 and Ofast on AMD bdver4 m/c.)
2016-07-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/72517
* tree-vect-data-refs.c (vect_analyze_data_ref_dependences):
Revert change to not compute read-read dependences.
From-SVN: r238783
Richard Biener [Wed, 27 Jul 2016 10:33:02 +0000 (10:33 +0000)]
predict.c (set_even_probabilities): Make nedges unsigned.
2016-07-27 Richard Biener <rguenther@suse.de>
* predict.c (set_even_probabilities): Make nedges unsigned.
From-SVN: r238782
Martin Liska [Wed, 27 Jul 2016 08:46:12 +0000 (10:46 +0200)]
predict.c: merge multi-edges
* gcc.dg/predict-13.c: New test.
* gcc.dg/predict-14.c: New test.
* predict.c (set_even_probabilities): Handle unlikely edges.
(combine_predictions_for_bb): Likewise.
From-SVN: r238781
Senthil Kumar Selvaraj [Wed, 27 Jul 2016 05:22:08 +0000 (05:22 +0000)]
Use __{U,}INTPTR_TYPE__ to avoid including stdint.h
gcc/testsuite/
* gcc.dg/torture/pr69352.c: Use __INTPTR_TYPE__ instead of
including stdint.h.
* gcc.dg/torture/pr71866.c: Use __UINTPTR_TYPE__ isntead of
including stdint.h.
From-SVN: r238780
Michael Meissner [Wed, 27 Jul 2016 04:45:59 +0000 (04:45 +0000)]
re PR target/71869 (__builtin_isgreater raises an invalid exception on PPC64 using __float128 inputs.)
[gcc]
2016-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71869
* config/rs6000/rs6000.c (rs6000_generate_compare): Rework
__float128 support when we don't have hardware support, so that
the IEEE built-in functions like isgreater, first call __unordkf3
to make sure neither operand is a NaN, and if both operands are
ordered, do the normal comparison.
[gcc/testsuite]
2016-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71869
* gcc.target/powerpc/float128-cmp.c: New test to make sure that
IEEE built-in functions handle quiet and signalling NaNs
correctly.
From-SVN: r238779
GCC Administrator [Wed, 27 Jul 2016 00:16:13 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r238778
Steven G. Kargl [Tue, 26 Jul 2016 22:42:49 +0000 (22:42 +0000)]
re PR fortran/71862 (ICE in gfc_add_component_ref, at fortran/class.c:241)
2016-07-22 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71862
* class.c: Remove assert. Iterate over component only if non-null.
2016-07-22 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71862
* gfortran.dg/pr71862.f90: New test.
From-SVN: r238774
Martin Sebor [Tue, 26 Jul 2016 20:48:20 +0000 (20:48 +0000)]
pr71675.c: Replace the unsupported c11 target selector with dg-options.
gcc/testsuite/ChangeLog:
* gcc.dg/atomic/pr71675.c: Replace the unsupported c11 target
selector with dg-options.
From-SVN: r238766
Nathan Sidwell [Tue, 26 Jul 2016 17:07:26 +0000 (17:07 +0000)]
Missed changelog entries for commit 238252. Sorry,
2016-07-12 Nathan Sidwell <nathan@acm.org>
* config/arm/arm.c (arm_option_override): Set MASK_SINGLE_PIC_BASE
when -mno-pic-data-is-text-relative is in effect, by default.
* doc/invoke.texi (mpic-data-is-text-relative): Document new
behavior and clarify.
2016-07-12 Nathan Sidwell <nathan@acm.org>
* gcc.target/arm/data-rel-1.c: New.
* gcc.target/arm/data-rel-2.c: New.
* gcc.target/arm/data-rel-3.c: New.
From-SVN: r238763
Patrick Palka [Tue, 26 Jul 2016 15:21:29 +0000 (15:21 +0000)]
Minor changes in tree-vrp.c
gcc/ChangeLog:
* tree-vrp.c (dump_asserts_for): Print loc->expr instead of
name.
(extract_code_and_val_from_cond_with_ops): Verify that name is
either cond_op0 or cond_op1.
From-SVN: r238762
Patrick Palka [Tue, 26 Jul 2016 15:19:58 +0000 (15:19 +0000)]
Teach VRP to register assertions along default switch labels (PR18046)
gcc/ChangeLog:
PR tree-optimization/18046
* genmodes.c (emit_mode_size_inline): Emit an assert that
verifies that mode is a valid array index.
(emit_mode_nuinits_inline): Likewise.
(emit_mode_inner_inline): Likewise.
(emit_mode_unit_size_inline): Likewise.
(emit_mode_unit_precision_inline): Likewise.
* tree-vrp.c: Include params.h.
(find_switch_asserts): Register edge assertions for the default
label which correspond to the anti-ranges of each case label.
* params.def (PARAM_MAX_VRP_SWITCH_ASSERTIONS): New.
* doc/invoke.texi: Document it.
gcc/testsuite/ChangeLog:
PR tree-optimization/18046
* gcc.dg/tree-ssa/ssa-dom-thread-6.c: Bump FSM count to 5.
* gcc.dg/tree-ssa/vrp103.c: New test.
* gcc.dg/tree-ssa/vrp104.c: New test.
From-SVN: r238761
William Schmidt [Tue, 26 Jul 2016 14:25:20 +0000 (14:25 +0000)]
Move ChangeLog entry to the right place
From-SVN: r238760
Bill Schmidt [Tue, 26 Jul 2016 14:24:16 +0000 (14:24 +0000)]
pr63354.c: Require lp64 since -mprofile-kernel is not legal with -m32.
2016-07-26 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/pr63354.c: Require lp64 since
-mprofile-kernel is not legal with -m32.
From-SVN: r238759
Bill Schmidt [Tue, 26 Jul 2016 14:13:52 +0000 (14:13 +0000)]
gimple-ssa-strength-reduction.c (slsr_process_phi): Remove dead and unnecessary call to gimple_bb.
2016-07-26 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gimple-ssa-strength-reduction.c (slsr_process_phi): Remove dead
and unnecessary call to gimple_bb.
From-SVN: r238758
Richard Biener [Tue, 26 Jul 2016 14:11:21 +0000 (14:11 +0000)]
re PR rtl-optimization/71984 (wrong code with -O -mavx512cd)
2016-07-26 Richard Biener <rguenther@suse.de>
PR rtl-optimization/71984
* simplify-rtx.c (simplify_subreg): Use GET_MODE_SIZE and prepare
for VOIDmode.
* gcc.dg/torture/pr71984.c: New testcase.
From-SVN: r238757
Richard Biener [Tue, 26 Jul 2016 14:07:05 +0000 (14:07 +0000)]
re PR tree-optimization/72517 (436.cactusADM: More than 40% regression in O3 and Ofast on AMD bdver4 m/c.)
2016-07-26 Richard Biener <rguenther@suse.de>
PR middle-end/72517
* expmed.c (extract_bit_field_1): Constrain the vector mode
with element size matching the extraction mode size when
choosing a better vector mode to do the extraction from.
From-SVN: r238756
Robert Suchanek [Tue, 26 Jul 2016 13:20:03 +0000 (13:20 +0000)]
Add support to run auto-vectorization tests for multiple effective targets.
gcc/testsuite/
* g++.dg/vect/vect.exp: Add and set new global EFFECTIVE_TARGETS. Call
g++-dg-runtest via et-dg-runtest.
* gcc.dg/graphite/graphite.exp: Likewise, but for dg-runtest.
* gcc.dg/vect/vect.exp: Likewise.
* gfortran.dg/graphite/graphite.exp: Likewise, but for
gfortran-dg-runtest.
* gfortran.dg/vect/vect.exp: Likewise.
* lib/target-supports.exp (check_mpaired_single_hw_available): New.
(check_mips_loongson_hw_available): Likewise.
(check_effective_target_mpaired_single_runtime): Likewise.
(check_effective_target_mips_loongson_runtime): Likewise.
(add_options_for_mpaired_single): Likewise.
(check_effective_target_vect_int): Add global et_index.
Check and save the supported feature for a target selected by
the et_index target. Break long lines where appropriate. Call
et-is-effective-target for MIPS with an argument instead of
check_effective_target_* where appropriate.
(check_effective_target_vect_intfloat_cvt): Likewise.
(check_effective_target_vect_uintfloat_cvt): Likewise.
(check_effective_target_vect_floatint_cvt): Likewise.
(check_effective_target_vect_floatuint_cvt): Likewise.
(check_effective_target_vect_simd_clones): Likewise.
(check_effective_target_vect_shift): ewise.
(check_effective_target_whole_vector_shift): Likewise.
(check_effective_target_vect_bswap): Likewise.
(check_effective_target_vect_shift_char): Likewise.
(check_effective_target_vect_long): Likewise.
(check_effective_target_vect_float): Likewise.
(check_effective_target_vect_double): Likewise.
(check_effective_target_vect_long_long): Likewise.
(check_effective_target_vect_no_int_max): Likewise.
(check_effective_target_vect_no_int_add): Likewise.
(check_effective_target_vect_no_bitwise): Likewise.
(check_effective_target_vect_widen_shift): Likewise.
(check_effective_target_vect_no_align): Likewise.
(check_effective_target_vect_hw_misalign): Likewise.
(check_effective_target_vect_element_align): Likewise.
(check_effective_target_vect_condition): Likewise.
(check_effective_target_vect_cond_mixed): Likewise.
(check_effective_target_vect_char_mult): Likewise.
(check_effective_target_vect_short_mult): Likewise.
(check_effective_target_vect_int_mult): Likewise.
(check_effective_target_vect_extract_even_odd): Likewise.
(check_effective_target_vect_interleave): Likewise.
(check_effective_target_vect_stridedN): Likewise.
(check_effective_target_vect_multiple_sizes): Likewise.
(check_effective_target_vect64): Likewise.
(check_effective_target_vect_call_copysignf): Likewise.
(check_effective_target_vect_call_sqrtf): Likewise.
(check_effective_target_vect_call_btrunc): Likewise.
(check_effective_target_vect_call_btruncf): Likewise.
(check_effective_target_vect_call_ceil): Likewise.
(check_effective_target_vect_call_ceilf): Likewise.
(check_effective_target_vect_call_floor): Likewise.
(check_effective_target_vect_call_floorf): Likewise.
(check_effective_target_vect_call_lceil): Likewise.
(check_effective_target_vect_call_lfloor): Likewise.
(check_effective_target_vect_call_nearbyint): Likewise.
(check_effective_target_vect_call_nearbyintf): Likewise.
(check_effective_target_vect_call_round): Likewise.
(check_effective_target_vect_call_roundf): Likewise.
(check_effective_target_vect_perm): Likewise, but also append *_saved
to the existing global name to properly cache the result.
(check_effective_target_vect_perm_byte): Likewise.
(check_effective_target_vect_perm_short): Likewise.
(check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise.
(check_effective_target_vect_widen_sum_hi_to_si): Likewise.
(check_effective_target_vect_widen_sum_qi_to_hi): Likewise.
(check_effective_target_vect_widen_sum_qi_to_si): Likewise.
(check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise.
(check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
(check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise.
(check_effective_target_vect_widen_mult_si_to_di_pattern): Likewise.
(check_effective_target_vect_sdot_qi): Likewise.
(check_effective_target_vect_udot_qi): Likewise.
(check_effective_target_vect_sdot_hi): Likewise.
(check_effective_target_vect_udot_hi): Likewise.
(check_effective_target_vect_usad_char): Likewise.
(check_effective_target_vect_pack_trunc): Likewise.
(check_effective_target_vect_unpack): Likewise.
(check_effective_target_vect_aligned_arrays): Likewise.
(check_effective_target_vect_natural_alignment): Likewise.
(check_effective_target_vector_alignment_reachable): Likewise.
(check_effective_target_vector_alignment_reachable_for_64bit): Likewise.
(is-effective-target): Initialize et_index if undefined.
(et-dg-runtest): New.
(et-is-effective-target): Likewise.
(check_vect_support_and_set_flags): Add supported MIPS targets to
EFFECTIVE_TARGETS list. Return the number of supported targets.
From-SVN: r238755
Richard Biener [Tue, 26 Jul 2016 13:10:33 +0000 (13:10 +0000)]
re PR middle-end/70920 (if ((intptr_t)ptr == 0) doesn't get simplified to if (ptr == 0))
2016-07-26 Richard Biener <rguenther@suse.de>
Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR middle-end/70920
* match.pd ((intptr)x eq/ne CST to x eq/ne (typeof x) CST): New
pattern.
testsuite/
* gcc.dg/pr70920-1.c: New test-case.
* gcc.dg/pr70902-2.c: Likewise.
* gcc.dg/pr70920-3.c: Likewise.
* gcc.dg/pr70920-4.c: Likewise
* gcc.dg/tree-ssa/ssa-dom-branch-1.c: Change scan-tree-dump-times to
2 instead of 3.
Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
From-SVN: r238754
Richard Biener [Tue, 26 Jul 2016 12:30:18 +0000 (12:30 +0000)]
update_version_svn: Ignore the GCC 4.9 branch.
2016-07-26 Richard Biener <rguenther@suse.de>
* update_version_svn: Ignore the GCC 4.9 branch.
From-SVN: r238753
Richard Biener [Tue, 26 Jul 2016 12:27:16 +0000 (12:27 +0000)]
crontab: Remove entry for the GCC 4.9 branch.
2016-07-26 Richard Biener <rguenther@suse.de>
* crontab: Remove entry for the GCC 4.9 branch.
From-SVN: r238752
Trevor Saunders [Tue, 26 Jul 2016 10:44:31 +0000 (10:44 +0000)]
add [cd]tors to scc_info
gcc/ChangeLog:
2016-07-26 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* tree-ssa-structalias.c (struct scc_info): Change types of
members to auto_sbitmap and auto_vec.
(scc_info::scc_info): New constructor.
(scc_info::~scc_info): New destructor.
(init_scc_info): Remove.
(free_scc_info): Remove.
(find_indirect_cycles): Adjust.
(perform_var_substitution): Likewise.
(free_var_substitution_info): Likewise.
From-SVN: r238751
Trevor Saunders [Tue, 26 Jul 2016 10:44:25 +0000 (10:44 +0000)]
add a constructor to elim_graph
gcc/ChangeLog:
2016-07-26 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* tree-outof-ssa.c (struct elim_graph): Change type of members
to auto_vec and auto_sbitmap.
(elim_graph::elim_graph): New constructor.
(delete_elim_graph): Remove.
(expand_phi_nodes): Adjust.
From-SVN: r238750
Trevor Saunders [Tue, 26 Jul 2016 10:44:15 +0000 (10:44 +0000)]
remove elim_graph typedef
gcc/ChangeLog:
2016-07-26 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* tree-outof-ssa.c (struct elim_graph): Remove typedef.
(new_elim_graph): Adjust.
(clear_elim_graph): Likewise.
(delete_elim_graph): Likewise.
(elim_graph_size): Likewise.
(elim_graph_add_node): Likewise.
(elim_graph_add_edge): Likewise.
(elim_graph_remove_succ_edge): Likewise.
(eliminate_name): Likewise.
(eliminate_build): Likewise.
(elim_forward): Likewise.
(elim_unvisited_predecessor): Likewise.
(elim_backward): Likewise.
(elim_create): Likewise.
(eliminate_phi): Likewise.
(expand_phi_nodes): Likewise.
From-SVN: r238749
Trevor Saunders [Tue, 26 Jul 2016 10:44:08 +0000 (10:44 +0000)]
use auto_sbitmap in various places
gcc/ChangeLog:
2016-07-26 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* bt-load.c (compute_out): Use auto_sbitmap class.
(link_btr_uses): Likewise.
* cfganal.c (mark_dfs_back_edges): Likewise.
(post_order_compute): Likewise.
(inverted_post_order_compute): Likewise.
(pre_and_rev_post_order_compute_fn): Likewise.
(single_pred_before_succ_order): Likewise.
* cfgexpand.c (pass_expand::execute): Likewise.
* cfgloop.c (verify_loop_structure): Likewise.
* cfgloopmanip.c (fix_bb_placements): Likewise.
(remove_path): Likewise.
(update_dominators_in_loop): Likewise.
* cfgrtl.c (break_superblocks): Likewise.
* ddg.c (check_sccs): Likewise.
(create_ddg_all_sccs): Likewise.
* df-core.c (df_worklist_dataflow): Likewise.
* dse.c (dse_step3): Likewise.
* except.c (eh_region_outermost): Likewise.
* function.c (thread_prologue_and_epilogue_insns): Likewise.
* gcse.c (prune_expressions): Likewise.
(prune_insertions_deletions): Likewise.
* gimple-ssa-backprop.c (backprop::~backprop): Likewise.
* graph.c (draw_cfg_nodes_no_loops): Likewise.
* ira-lives.c (remove_some_program_points_and_update_live_ranges): Likewise.
* lcm.c (compute_earliest): Likewise.
(compute_farthest): Likewise.
* loop-unroll.c (unroll_loop_constant_iterations): Likewise.
(unroll_loop_runtime_iterations): Likewise.
(unroll_loop_stupid): Likewise.
* lower-subreg.c (decompose_multiword_subregs): Likewise.
* lra-lives.c: Likewise.
* lra.c (lra): Likewise.
* modulo-sched.c (schedule_reg_moves): Likewise.
(optimize_sc): Likewise.
(get_sched_window): Likewise.
(sms_schedule_by_order): Likewise.
(check_nodes_order): Likewise.
(order_nodes_of_sccs): Likewise.
(order_nodes_in_scc): Likewise.
* recog.c (split_all_insns): Likewise.
* regcprop.c (pass_cprop_hardreg::execute): Likewise.
* reload1.c (reload): Likewise.
* sched-rgn.c (haifa_find_rgns): Likewise.
(split_edges): Likewise.
(compute_trg_info): Likewise.
* sel-sched.c (init_seqno): Likewise.
* store-motion.c (remove_reachable_equiv_notes): Likewise.
* tree-into-ssa.c (update_ssa): Likewise.
* tree-ssa-live.c (live_worklist): Likewise.
* tree-ssa-loop-im.c (fill_always_executed_in): Likewise.
* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely):
* Likewise.
(try_peel_loop): Likewise.
* tree-ssa-loop-manip.c (tree_transform_and_unroll_loop):
* Likewise.
* tree-ssa-pre.c (compute_antic): Likewise.
* tree-ssa-reassoc.c (undistribute_ops_list): Likewise.
* tree-stdarg.c (reachable_at_most_once): Likewise.
* tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
* var-tracking.c (vt_find_locations): Likewise.
From-SVN: r238748
Trevor Saunders [Tue, 26 Jul 2016 10:43:58 +0000 (10:43 +0000)]
add auto_sbitmap class
gcc/ChangeLog:
2016-07-26 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* sbitmap.h (auto_sbitmap): New class.
From-SVN: r238747
Alan Modra [Tue, 26 Jul 2016 10:27:34 +0000 (19:57 +0930)]
[RS6000] push_secondary_reload ICE
PR target/72103
* config/rs6000/rs6000.c (rs6000_secondary_reload): Initialize
sri->t_icode.
From-SVN: r238744
Ian Lance Taylor [Tue, 26 Jul 2016 01:53:27 +0000 (01:53 +0000)]
libgo: bump library version number for 1.7
Reviewed-on: https://go-review.googlesource.com/25211
From-SVN: r238743
Ian Lance Taylor [Tue, 26 Jul 2016 01:38:33 +0000 (01:38 +0000)]
os/user: fix Solaris declaration.
Patch from Rainer Orth.
Reviewed-on: https://go-review.googlesource.com/25210
From-SVN: r238742
GCC Administrator [Tue, 26 Jul 2016 00:16:20 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r238741
Jason Merrill [Mon, 25 Jul 2016 21:25:04 +0000 (17:25 -0400)]
PR c++/65970 - revert loop location change
* cp-gimplify.c (genericize_cp_loop): Revert location change.
From-SVN: r238737
Jason Merrill [Mon, 25 Jul 2016 19:16:16 +0000 (15:16 -0400)]
PR c++/71837 - pack expansion in init-capture
* lambda.c (add_capture): Leave a pack expansion in a TREE_LIST.
(build_lambda_object): Call build_x_compound_expr_from_list.
* pt.c (tsubst) [DECLTYPE_TYPE]: Likewise.
From-SVN: r238733
David Malcolm [Mon, 25 Jul 2016 19:15:22 +0000 (19:15 +0000)]
Fix selftest::temp_source_file ctor
gcc/ChangeLog:
* input.c (selftest::temp_source_file::temp_source_file): Fix
missing "%s" in fprintf.
From-SVN: r238732
Jason Merrill [Mon, 25 Jul 2016 19:10:41 +0000 (15:10 -0400)]
PR c++/71833 - member template with two parameter packs
PR c++/54440
* pt.c (coerce_template_parameter_pack): Fix logic for
pack index.
From-SVN: r238731
Jason Merrill [Mon, 25 Jul 2016 18:32:13 +0000 (14:32 -0400)]
PR c++/65970 - constexpr infinite loop
gcc/c-family/
* c.opt (fconstexpr-loop-limit): New.
gcc/cp/
* constexpr.c (cxx_eval_loop_expr): Count iterations.
* cp-gimplify.c (genericize_cp_loop): Use start_locus even for
infinite loops.
From-SVN: r238730
Jason Merrill [Mon, 25 Jul 2016 18:32:06 +0000 (14:32 -0400)]
PR c++/71972 - constexpr array self-modification
* constexpr.c (cxx_eval_array_reference): Handle looking for the
value of an element we're currently modifying.
From-SVN: r238729
Jason Merrill [Mon, 25 Jul 2016 18:32:00 +0000 (14:32 -0400)]
* g++.dg/init/elide5.C: Don't use unsigned long for size_t.
From-SVN: r238728
John David Anglin [Mon, 25 Jul 2016 17:32:44 +0000 (17:32 +0000)]
re PR middle-end/71732 (FAIL: gcc.dg/torture/pr71532.c at -O2 and above)
PR middle-end/71732
* cselib.c (cselib_process_insn): Invalidate argument slots for
const/pure calls.
From-SVN: r238727
Alexander Monakov [Mon, 25 Jul 2016 16:16:27 +0000 (19:16 +0300)]
testsuite: add two missing label_values annotations
2016-07-25 Alexander Monakov <amonakov@ispras.ru>
* gcc.c-torture/execute/pr71494.c: Require label_values.
* gcc.dg/pr16973.c: Ditto.
From-SVN: r238726
Jiong Wang [Mon, 25 Jul 2016 16:15:34 +0000 (16:15 +0000)]
[AArch64][10/10] ARMv8.2-A FP16 lane scalar intrinsics
gcc/
* config/aarch64/arm_neon.h (vfmah_lane_f16, vfmah_laneq_f16,
vfmsh_lane_f16, vfmsh_laneq_f16, vmulh_lane_f16, vmulh_laneq_f16,
vmulxh_lane_f16, vmulxh_laneq_f16): New.
From-SVN: r238725
Jiong Wang [Mon, 25 Jul 2016 16:13:22 +0000 (16:13 +0000)]
[AArch64][9/10] ARMv8.2-A FP16 three operands scalar intrinsics
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (fma, fnma): Support HF.
* config/aarch64/arm_fp16.h (vfmah_f16, vfmsh_f16): New.
From-SVN: r238724
Jiong Wang [Mon, 25 Jul 2016 16:10:52 +0000 (16:10 +0000)]
[AArch64][8/10] ARMv8.2-A FP16 two operands scalar intrinsics
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (<FCVT_F2FIXED:fcvt_fixed_insn>hf<mode>3):
New.
(<FCVT_FIXED2F:fcvt_fixed_insn><mode>hf3): Likewise.
(add<mode>3): Likewise.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
(<fmaxmin><mode>3): Extend to HF.
* config/aarch64/aarch64-simd.md (aarch64_rsqrts<mode>): Likewise.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_HSDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_HSDI:mode>3): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_fac<optab><mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn>hfhi3): New.
(<FCVT_FIXED2F:fcvt_fixed_insn>hihf3): Likewise.
* config/aarch64/iterators.md (VHSDF_SDF): Delete.
(VSDQ_HSDI): Support HI.
(fcvt_target, FCVT_TARGET): Likewise.
* config/aarch64/arm_fp16.h (vaddh_f16, vsubh_f16, vabdh_f16,
vcageh_f16, vcagth_f16, vcaleh_f16, vcalth_f16, vceqh_f16, vcgeh_f16,
vcgth_f16, vcleh_f16, vclth_f16, vcvth_n_f16_s16, vcvth_n_f16_s32,
vcvth_n_f16_s64, vcvth_n_f16_u16, vcvth_n_f16_u32, vcvth_n_f16_u64,
vcvth_n_s16_f16, vcvth_n_s32_f16, vcvth_n_s64_f16, vcvth_n_u16_f16,
vcvth_n_u32_f16, vcvth_n_u64_f16, vdivh_f16, vmaxh_f16, vmaxnmh_f16,
vminh_f16, vminnmh_f16, vmulh_f16, vmulxh_f16, vrecpsh_f16,
vrsqrtsh_f16): New.
From-SVN: r238723
Jiong Wang [Mon, 25 Jul 2016 16:00:28 +0000 (16:00 +0000)]
[AArch64][7/10] ARMv8.2-A FP16 one operand scalar intrinsics
gcc/
* config.gcc (aarch64*-*-*): Install arm_fp16.h.
* config/aarch64/aarch64-builtins.c (hi_UP): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_frsqrte<mode>): Extend to HF
mode.
(aarch64_frecp<FRECP:frecp_suffix><mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.md (<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Likewise.
(fix_trunc<GPF:mode><GPI:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(abs<mode>2): Likewise.
(<optab><mode>hf2): New pattern for HF mode.
(<optab>hihf2): Likewise.
* config/aarch64/arm_neon.h: Include arm_fp16.h.
* config/aarch64/iterators.md (GPF_F16, GPI_F16, VHSDF_HSDF): New.
(w1, w2, v, s, q, Vmtype, V_cmp_result, fcvt_iesize, FCVT_IESIZE):
Support HF mode.
* config/aarch64/arm_fp16.h: New file.
(vabsh_f16, vceqzh_f16, vcgezh_f16, vcgtzh_f16, vclezh_f16, vcltzh_f16,
vcvth_f16_s16, vcvth_f16_s32, vcvth_f16_s64, vcvth_f16_u16,
vcvth_f16_u32, vcvth_f16_u64, vcvth_s16_f16, vcvth_s32_f16,
vcvth_s64_f16, vcvth_u16_f16, vcvth_u32_f16, vcvth_u64_f16,
vcvtah_s16_f16, vcvtah_s32_f16, vcvtah_s64_f16, vcvtah_u16_f16,
vcvtah_u32_f16, vcvtah_u64_f16, vcvtmh_s16_f16, vcvtmh_s32_f16,
vcvtmh_s64_f16, vcvtmh_u16_f16, vcvtmh_u32_f16, vcvtmh_u64_f16,
vcvtnh_s16_f16, vcvtnh_s32_f16, vcvtnh_s64_f16, vcvtnh_u16_f16,
vcvtnh_u32_f16, vcvtnh_u64_f16, vcvtph_s16_f16, vcvtph_s32_f16,
vcvtph_s64_f16, vcvtph_u16_f16, vcvtph_u32_f16, vcvtph_u64_f16,
vnegh_f16, vrecpeh_f16, vrecpxh_f16, vrndh_f16, vrndah_f16, vrndih_f16,
vrndmh_f16, vrndnh_f16, vrndph_f16, vrndxh_f16, vrsqrteh_f16,
vsqrth_f16): New.
From-SVN: r238722
Jiong Wang [Mon, 25 Jul 2016 15:00:14 +0000 (15:00 +0000)]
[AArch64][6/14] ARMv8.2-A FP16 reduction vector intrinsics
gcc/
* config/aarch64/aarch64-simd-builtins.def (reduc_smax_scal_,
reduc_smin_scal_): Use VDQIF_F16.
(reduc_smax_nan_scal_, reduc_smin_nan_scal_): Use VHSDF.
* config/aarch64/aarch64-simd.md (reduc_<maxmin_uns>_scal_<mode>):
Use VHSDF.
(aarch64_reduc_<maxmin_uns>_internal<mode>): Likewise.
* config/aarch64/iterators.md (VDQIF_F16): New.
(vp): Support HF modes.
* config/aarch64/arm_neon.h (vmaxv_f16, vmaxvq_f16, vminv_f16,
vminvq_f16, vmaxnmv_f16, vmaxnmvq_f16, vminnmv_f16, vminnmvq_f16): New.
From-SVN: r238721
Jiong Wang [Mon, 25 Jul 2016 14:49:57 +0000 (14:49 +0000)]
[AArch64][5/10] ARMv8.2-A FP16 lane vector intrinsics
gcc/
* config/aarch64/aarch64-simd.md (*aarch64_mulx_elt_to_64v2df): Rename to
"*aarch64_mulx_elt_from_dup<mode>".
(*aarch64_mul3_elt<mode>): Update schedule type.
(*aarch64_mul3_elt_from_dup<mode>): Likewise.
(*aarch64_fma4_elt_from_dup<mode>): Likewise.
(*aarch64_fnma4_elt_from_dup<mode>): Likewise.
* config/aarch64/iterators.md (VMUL): Supprt half precision float modes.
(f, fp): Support HF modes.
* config/aarch64/arm_neon.h (vfma_lane_f16, vfmaq_lane_f16,
vfma_laneq_f16, vfmaq_laneq_f16, vfma_n_f16, vfmaq_n_f16, vfms_lane_f16,
vfmsq_lane_f16, vfms_laneq_f16, vfmsq_laneq_f16, vfms_n_f16,
vfmsq_n_f16, vmul_lane_f16, vmulq_lane_f16, vmul_laneq_f16,
vmulq_laneq_f16, vmul_n_f16, vmulq_n_f16, vmulx_lane_f16,
vmulxq_lane_f16, vmulx_laneq_f16, vmulxq_laneq_f16): New.
From-SVN: r238719
Jiong Wang [Mon, 25 Jul 2016 14:44:24 +0000 (14:44 +0000)]
[AArch64][4/10] ARMv8.2-A FP16 three operands vector intrinsics
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (fma<mode>4, fnma<mode>4): Extend to HF
modes.
* config/aarch64/arm_neon.h (vfma_f16, vfmaq_f16, vfms_f16,
vfmsq_f16): New.
From-SVN: r238718
Jiong Wang [Mon, 25 Jul 2016 14:30:52 +0000 (14:30 +0000)]
[AArch64][3/10] ARMv8.2-A FP16 two operands vector intrinsics
gcc/
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md
(aarch64_rsqrts<mode>): Extend to HF modes.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_SDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_SDI:mode>3): Likewise.
(aarch64_<maxmin_uns>p<mode>): Likewise.
(<su><maxmin><mode>3): Likewise.
(<maxmin_uns><mode>3): Likewise.
(<fmaxmin><mode>3): Likewise.
(aarch64_faddp<mode>): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(*aarch64_fac<optab><mode>): Rename to aarch64_fac<optab><mode>.
(add<mode>3): Extend to HF modes.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_div): Return false for
HF, V4HF and V8HF.
* config/aarch64/iterators.md (VDQ_HSDI, VSDQ_HSDI): New mode iterator.
* config/aarch64/arm_neon.h (vadd_f16): New.
(vaddq_f16, vabd_f16, vabdq_f16, vcage_f16, vcageq_f16, vcagt_f16,
vcagtq_f16, vcale_f16, vcaleq_f16, vcalt_f16, vcaltq_f16, vceq_f16,
vceqq_f16, vcge_f16, vcgeq_f16, vcgt_f16, vcgtq_f16, vcle_f16,
vcleq_f16, vclt_f16, vcltq_f16, vcvt_n_f16_s16, vcvtq_n_f16_s16,
vcvt_n_f16_u16, vcvtq_n_f16_u16, vcvt_n_s16_f16, vcvtq_n_s16_f16,
vcvt_n_u16_f16, vcvtq_n_u16_f16, vdiv_f16, vdivq_f16, vdup_lane_f16,
vdup_laneq_f16, vdupq_lane_f16, vdupq_laneq_f16, vdups_lane_f16,
vdups_laneq_f16, vmax_f16, vmaxq_f16, vmaxnm_f16, vmaxnmq_f16, vmin_f16,
vminq_f16, vminnm_f16, vminnmq_f16, vmul_f16, vmulq_f16, vmulx_f16,
vmulxq_f16, vpadd_f16, vpaddq_f16, vpmax_f16, vpmaxq_f16, vpmaxnm_f16,
vpmaxnmq_f16, vpmin_f16, vpminq_f16, vpminnm_f16, vpminnmq_f16,
vrecps_f16, vrecpsq_f16, vrsqrts_f16, vrsqrtsq_f16, vsub_f16,
vsubq_f16): Likewise.
From-SVN: r238717
Jiong Wang [Mon, 25 Jul 2016 14:20:37 +0000 (14:20 +0000)]
[AArch64][2/10] ARMv8.2-A FP16 one operand vector intrinsics
gcc/
* config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_rsqrte<mode>): Extend to HF modes.
(neg<mode>2): Likewise.
(abs<mode>2): Likewise.
(<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): Likewise.
(<optab><VDQF:mode><fcvt_target>2): Likewise.
(<fix_trunc_optab><VDQF:mode><fcvt_target>2): Likewise.
(ftrunc<VDQF:mode>2): Likewise.
(<optab><fcvt_target><VDQF:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(*sqrt<mode>2): Likewise.
(aarch64_frecpe<mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Return
false for V4HF and V8HF.
* config/aarch64/iterators.md (VHSDF, VHSDF_DF, VHSDF_SDF): New.
(VDQF_COND, fcvt_target, FCVT_TARGET, hcon): Extend mode attribute to HF modes.
(stype): New.
* config/aarch64/arm_neon.h (vdup_n_f16): New.
(vdupq_n_f16): Likewise.
(vld1_dup_f16): Use vdup_n_f16.
(vld1q_dup_f16): Use vdupq_n_f16.
(vabs_f16): New.
(vabsq_f16, vceqz_f16, vceqzq_f16, vcgez_f16, vcgezq_f16, vcgtz_f16,
vcgtzq_f16, vclez_f16, vclezq_f16, vcltz_f16, vcltzq_f16, vcvt_f16_s16,
vcvtq_f16_s16, vcvt_f16_u16, vcvtq_f16_u16, vcvt_s16_f16, vcvtq_s16_f16,
vcvt_u16_f16, vcvtq_u16_f16, vcvta_s16_f16, vcvtaq_s16_f16,
vcvta_u16_f16, vcvtaq_u16_f16, vcvtm_s16_f16, vcvtmq_s16_f16,
vcvtm_u16_f16, vcvtmq_u16_f16, vcvtn_s16_f16, vcvtnq_s16_f16,
vcvtn_u16_f16, vcvtnq_u16_f16, vcvtp_s16_f16, vcvtpq_s16_f16,
vcvtp_u16_f16, vcvtpq_u16_f16, vneg_f16, vnegq_f16, vrecpe_f16,
vrecpeq_f16, vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16, vrndi_f16,
vrndiq_f16, vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16, vrndp_f16,
vrndpq_f16, vrndx_f16, vrndxq_f16, vrsqrte_f16, vrsqrteq_f16, vsqrt_f16,
vsqrtq_f16): Likewise.
From-SVN: r238716
Jiong Wang [Mon, 25 Jul 2016 14:02:42 +0000 (14:02 +0000)]
[AArch64][1/10] ARMv8.2-A FP16 data processing intrinsics
gcc/
* config/aarch64/aarch64-simd.md
(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Use VALL_F16.
(aarch64_ext<mode>): Likewise.
(aarch64_rev<REVERSE:rev_op><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_evpc_trn): Support V4HFmode and
V8HFmode.
(aarch64_evpc_uzp): Likewise.
(aarch64_evpc_zip): Likewise.
(aarch64_evpc_ext): Likewise.
(aarch64_evpc_rev): Likewise.
* config/aarch64/arm_neon.h (__aarch64_vdup_lane_f16): New.
(__aarch64_vdup_laneq_f16): New..
(__aarch64_vdupq_lane_f16): New.
(__aarch64_vdupq_laneq_f16): New.
(vbsl_f16): New.
(vbslq_f16): New.
(vdup_n_f16): New.
(vdupq_n_f16): New.
(vdup_lane_f16): New.
(vdup_laneq_f16): New.
(vdupq_lane_f16): New.
(vdupq_laneq_f16): New.
(vduph_lane_f16): New.
(vduph_laneq_f16): New.
(vext_f16): New.
(vextq_f16): New.
(vmov_n_f16): New.
(vmovq_n_f16): New.
(vrev64_f16): New.
(vrev64q_f16): New.
(vtrn1_f16): New.
(vtrn1q_f16): New.
(vtrn2_f16): New.
(vtrn2q_f16): New.
(vtrn_f16): New.
(vtrnq_f16): New.
(__INTERLEAVE_LIST): Support float16x4_t, float16x8_t.
(vuzp1_f16): New.
(vuzp1q_f16): New.
(vuzp2_f16): New.
(vuzp2q_f16): New.
(vzip1_f16): New.
(vzip2q_f16): New.
(vmov_n_f16): Reimplement using vdup_n_f16.
(vmovq_n_f16): Reimplement using vdupq_n_f16..
From-SVN: r238715
Jiong Wang [Mon, 25 Jul 2016 13:42:43 +0000 (13:42 +0000)]
[AArch64][3/3] Migrate aarch64_expand_prologue/epilogue to aarch64_add_constant
gcc/
* config/aarch64/aarch64.c (aarch64_add_constant): New parameter
"frame_related_p". Generate CFA annotation when it's necessary.
(aarch64_expand_prologue): Use aarch64_add_constant.
(aarch64_expand_epilogue): Likewise.
(aarch64_output_mi_thunk): Pass "false" when calling
aarch64_add_constant.
From-SVN: r238714
Jiong Wang [Mon, 25 Jul 2016 13:36:33 +0000 (13:36 +0000)]
[AArch64][2/3] Optimize aarch64_add_constant to generate better addition sequences
gcc/
* config/aarch64/aarch64.c (aarch64_add_constant): Optimize instruction
sequences.
From-SVN: r238713
Jiong Wang [Mon, 25 Jul 2016 13:31:44 +0000 (13:31 +0000)]
[AArch64][1/3] Migrate aarch64_add_constant to new interface & kill aarch64_build_constant
gcc/
* config/aarch64/aarch64.c (aarch64_add_constant): New parameter "mode".
Use aarch64_internal_mov_immediate instead of aarch64_build_constant.
(aarch64_output_mi_thunk): Pass Pmode when calling aarch64_add_constant.
(aarch64_build_constant): Delete.
From-SVN: r238712
Georeth Chow [Mon, 25 Jul 2016 12:56:12 +0000 (12:56 +0000)]
Fix missing qualification in <ext/rope>
2016-07-25 Georeth Chow <georeth2010@gmail.com>
* include/ext/ropeimpl.h (rope<>::_S_dump(_RopeRep*, int)): Qualify
_S_concat enumerator.
* testsuite/ext/rope/6.cc: New test.
From-SVN: r238711
Alexander Monakov [Mon, 25 Jul 2016 12:37:29 +0000 (15:37 +0300)]
revert: nvptx: do not implicitly enable -ftoplevel-reorder
Revert
2016-07-20 Alexander Monakov <amonakov@ispras.ru>
* config/nvptx/nvptx.c (nvptx_option_override): Do not set
flag_toplevel_reorder.
From-SVN: r238710
Richard Biener [Mon, 25 Jul 2016 12:35:08 +0000 (12:35 +0000)]
cgraph.c (cgraph_node::verify_node): Compare against builtin by using DECL_BUILT_IN_CLASS and DECL_FUNCTION_CODE.
2016-07-25 Richard Biener <rguenther@suse.de>
* cgraph.c (cgraph_node::verify_node): Compare against builtin
by using DECL_BUILT_IN_CLASS and DECL_FUNCTION_CODE.
* tree-chkp.c (chkp_gimple_call_builtin_p): Likewise.
* tree-streamer.h (streamer_handle_as_builtin_p): Remove.
(streamer_get_builtin_tree): Likewise.
(streamer_write_builtin): Likewise.
* lto-streamer.h (LTO_builtin_decl): Remove.
* lto-streamer-in.c (lto_read_tree_1): Remove assert.
(lto_input_scc): Remove LTO_builtin_decl handling.
(lto_input_tree_1): Liekwise.
* lto-streamer-out.c (lto_output_tree_1): Remove special
handling of builtins.
(DFS::DFS): Likewise.
* tree-streamer-in.c (streamer_get_builtin_tree): Remove.
* tree-streamer-out.c (pack_ts_function_decl_value_fields): Remove
assert.
(streamer_write_builtin): Remove.
lto/
* lto.c (compare_tree_sccs_1): Remove streamer_handle_as_builtin_p uses.
(unify_scc): Likewise.
(lto_read_decls): Likewise.
From-SVN: r238709
Senthil Kumar Selvaraj [Mon, 25 Jul 2016 11:55:45 +0000 (11:55 +0000)]
Fix tests for targets with sizeof(int) != 32.
gcc/testsuite/
* gcc.dg/torture/pr69352.c (foo): Cast to intptr_t instead of long.
* gcc.dg/torture/pr69771.c: Require int32plus.
* gcc.dg/torture/pr71866.c (inb): Add cast to intptr_t.
From-SVN: r238708
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