Alyssa Rosenzweig [Wed, 6 Jan 2021 21:17:37 +0000 (16:17 -0500)]
pan/bi: Add bi_foreach_instr_in_tuple helper
Written in a funny way but easy to convince yourself of correctness by
considering cases.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Wed, 6 Jan 2021 17:21:36 +0000 (12:21 -0500)]
pan/bi: Add bi_foreach_clause_in_block_rev
Trivial absense.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Tue, 29 Dec 2020 22:21:37 +0000 (17:21 -0500)]
pan/bi: Add bi_{before,after}_clause cursors
Will be needed to insert spill code after scheduling once we have
multiple instructions in a clause.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Wed, 30 Dec 2020 18:41:14 +0000 (13:41 -0500)]
pan/bi: Add "soft" mode to DCE
We would like to reuse the DCE logic to eliminate register writes
without eliminating instructions, as a post-sched pass. This type of
operation will eventually generalize to intrinsics that write a register
*and* have side effects (just atomics, I think).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Thu, 21 Jan 2021 00:09:34 +0000 (19:09 -0500)]
pan/bi: Add dead branch elimination pass
Ported from Midgard due to the same quirk of our code generation.
Additional validation, though.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Sat, 9 Jan 2021 03:58:09 +0000 (22:58 -0500)]
pan/bi: Pass through wait_{6, 7} flags
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Sat, 9 Jan 2021 03:57:53 +0000 (22:57 -0500)]
pan/bi: Move bi_next_clause to bir.c
Not really packing specific anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Wed, 20 Jan 2021 21:40:52 +0000 (16:40 -0500)]
pan/bi: Pull out bi_count_read_registers helper
I want to transition away from the ad hoc masks anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Sat, 9 Jan 2021 02:38:09 +0000 (21:38 -0500)]
pan/bi: Fix M1/M2 decoding in disassembler
C's definition of the % operator has a footgun around sign conversion.
Avoid it and just use bitwise arithemtic instead like the hardware
would, fixing the disassembly and making buggy assembly more obvious.
Fixes:
08a9e5e3e89 ("pan/bi: Decode M values in disasm")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Wed, 6 Jan 2021 00:06:53 +0000 (19:06 -0500)]
pan/bi: Fix dependency wait calculation
Unconditional branches have a successor in the first slot only.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Thu, 31 Dec 2020 17:30:05 +0000 (12:30 -0500)]
pan/bi: Fix staging register packing
Writes are from the previous tuple, not the current one, otherwise we
incorrectly write to "two" places at once and raise an INSTR_INVALID_ENC
fault. While we're at it, fix the weird spacing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Wed, 30 Dec 2020 18:15:13 +0000 (13:15 -0500)]
pan/bi: Fix IDLE register mode packing
Was incorrectly returning zero. Special case like IDLE_1.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Tue, 19 Jan 2021 14:18:03 +0000 (09:18 -0500)]
pan/bi: Print disasm/stats with DEBUG=internal
Arguably more important than the IR prints.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Thu, 21 Jan 2021 00:03:44 +0000 (19:03 -0500)]
pan/bi: Lint for infinite loops
I would make this unconditional, but conditionally branching to the same
clause in a tight loop is (disturbingly) legal, as far as I know.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Thu, 21 Jan 2021 00:01:03 +0000 (19:01 -0500)]
pan/bi: Refactor PC-relative printing
Let's get the offset in a named variable for validation.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Tue, 19 Jan 2021 00:11:35 +0000 (19:11 -0500)]
pan/bi: Print FAU index in verbose mode
Even if we're not loading a uniform, this is useful information. The
uniform pretty-printing didn't correspond well to the hardware anyway so
this is a net win, although if somebody really wanted pretty-printing
could be added in here.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Mon, 18 Jan 2021 13:58:09 +0000 (08:58 -0500)]
pan/bi: Validate format 12 tuple count in disasm
We were throwing away this information. Let's just use a lookup table
and add an assertion. Would have caught a bug in this series resulting
in INSTR_INVALID_ENC faults.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Wed, 30 Dec 2020 19:16:51 +0000 (14:16 -0500)]
pan/bi: Add internal debug flag
Since
31864017510 ("pan/bi: Suppress disassembly for internal shaders"),
we haven't had a good way to debug blit shaders. I keep rewriting this
patch manually, let's just a debug flag for it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Sat, 9 Jan 2021 03:55:54 +0000 (22:55 -0500)]
panfrost: Allow waiting on slots 6/7 during preload
I don't understand the underlying uarch details but ATEST needs to wait
on slot 6 and BLEND needs to wait on both, so these bits are used if
ATEST/BLEND are in the first clause, which happens if e.g. a constant
colour is written, or if the input is preloaded.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Alyssa Rosenzweig [Thu, 7 Jan 2021 23:22:54 +0000 (18:22 -0500)]
panfrost: Fix TLS sizing if cores are missing
I have no idea if there are any implementations we care about that have
missing shader cores (a mask of 1101 or something like that), but if one
crops up, this would be a royal pain to debug so let's just get it
right...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8723>
Mike Blumenkrantz [Sat, 23 Jan 2021 15:42:48 +0000 (10:42 -0500)]
zink: move tess/geom shader info to vs shader key
now that there exists a shader key for vertex stages, we can stop modifying
the zink_shader values and instead use this as a more reliable method of detecting
the state
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8682>
Mike Blumenkrantz [Tue, 18 Aug 2020 19:06:15 +0000 (15:06 -0400)]
zink: flag shaders as needing update when clip_halfz changes
this means we may or may not need to run the nir pass in the shader,
so force this to go back through the update path using the shader key
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8682>
Mike Blumenkrantz [Tue, 18 Aug 2020 19:05:15 +0000 (15:05 -0400)]
zink: add shader key for vs shaders
we're reusing these for tes/gs for now too
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8682>
Mike Blumenkrantz [Sun, 24 Jan 2021 15:46:53 +0000 (10:46 -0500)]
zink: flag previous vertex stages as dirty when toggling a later stage
this ensures that the correct variant is used for streamout and halfz
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8682>
Mike Blumenkrantz [Wed, 19 Aug 2020 14:39:20 +0000 (10:39 -0400)]
zink: improve barrier helper for buffer resources and add check for barrier need
now we've got the ability to add fine-grained barriers for buffer resources, so we
can also have a utility function to check whether we need to use barriers and
then skip them when we don't
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8669>
Mike Blumenkrantz [Fri, 27 Nov 2020 18:00:46 +0000 (13:00 -0500)]
zink: add helper function for checking if access flags include write access
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8669>
Mike Blumenkrantz [Mon, 17 Aug 2020 20:09:26 +0000 (16:09 -0400)]
zink: add a stage param for buffer resource barriers
it's useful to be able to set this more granularly when doing resource
barriers
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8669>
Mike Blumenkrantz [Mon, 17 Aug 2020 19:07:41 +0000 (15:07 -0400)]
zink: add barrier helper for buffer resources
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8669>
Samuel Pitoiset [Fri, 29 Jan 2021 08:51:26 +0000 (09:51 +0100)]
radv: fix centroid with VRS coarse shading
Ported from RadeonSI.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8775>
Samuel Pitoiset [Fri, 29 Jan 2021 11:14:18 +0000 (12:14 +0100)]
radv: re-disable TC-compat HTILE for D32S8 on all generations
This actually introduced some VRS related regressions and some others.
Fixes:
cc5b6a0e897 ("radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8777>
Marcin Ślusarz [Mon, 25 Jan 2021 17:43:06 +0000 (18:43 +0100)]
intel/compiler: cache computed register pressure benefit
This halves the number of calls to get_register_pressure_benefit
and decreases shader-db CPU time by ~1.5%.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8741>
Pierre-Eric Pelloux-Prayer [Wed, 27 Jan 2021 10:59:59 +0000 (11:59 +0100)]
radeonsi/sqtt: forward string markers to sqtt
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8746>
Pierre-Eric Pelloux-Prayer [Wed, 27 Jan 2021 09:56:05 +0000 (10:56 +0100)]
radeonsi/sqtt: allow AMD_THREAD_TRACE_TRIGGER to be a frame number
This makes it easier to capture the exact same frame (for instance from an
apitrace replay).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8746>
Pierre-Eric Pelloux-Prayer [Mon, 25 Jan 2021 15:04:53 +0000 (16:04 +0100)]
radeonsi/sqtt: fix SQTT bo size overflow
Ported from
c40ea24ee009d8c9816ff6327f65be3fbd45deb7
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8746>
Pierre-Eric Pelloux-Prayer [Fri, 15 Jan 2021 17:09:59 +0000 (18:09 +0100)]
radeonsi/sqtt: use more event identifier
Using event identifiers allows to add a bit more context to the RGP trace.
Without this all draw calls are identified as vkCmdDraw.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8746>
Pierre-Eric Pelloux-Prayer [Wed, 27 Jan 2021 11:02:06 +0000 (12:02 +0100)]
ci: split src/mesa/**/* matching rule
Split the rule to avoid running useless tests when touching the driver specific
sources.
v2: removed src/mesa/drivers/x11/**/*
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net> (v2)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8735>
Kenneth Graunke [Tue, 17 Nov 2020 22:36:29 +0000 (14:36 -0800)]
iris: Enable PIPE_CAP_SHAREABLE_SHADERS.
Now that we store shader variants in the objects themselves rather
than a per-context hash table, they are actually global across
contexts. We can enable this feature.
This makes shaders shared across contexts, so apps can compile in
one and use it in another. This has always been allowed by GL,
but in the past we've simply recompiled the shaders in every context,
which is slow and painful.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7668>
Kenneth Graunke [Mon, 16 Nov 2020 21:17:08 +0000 (13:17 -0800)]
iris: Store a list of shader variants in the shader itself
We've traditionally stored shader variants in a per-context hash table,
based on a key with many per-stage fields. On older hardware supported
by i965, there were potentially quite a few variants, as many features
had to be emulated in shaders, including things like texture swizzling.
However, on the modern hardware targeted by iris, our NOS dependencies
are much smaller. We almost always guess the correct state when doing
the initial precompile, and so we have maybe 1-3 variants. iris NOS
keys are also dramatically smaller (4 to 24 bytes) than i965's.
Unlike the classic world, Gallium also provides a single kind of object
for API shaders---pipe_shader_state aka iris_uncompiled_shader. We can
simply store a list of shader variants there. This makes it possible
to access shader variants across contexts, rather than compiling them
separately for each context, which better matches how the APIs work.
To look up variants, we simply walk the list and memcmp the keys.
Since the list is almost always singular (and rarely ever long),
and the keys are tiny, this should be quite low overhead.
We continue storing internally generated shaders for BLORP and
passthrough TCS in the per-context hash table, as they don't have
an associated pipe_shader_state / iris_uncompiled_shader object.
(There can also be many BLORP shaders, and the blit keys are large,
so having a hash table rather than a list makes sense there.)
Because iris_uncompiled_shaders are shared across multiple contexts,
we do require locking when accessing this list. Fortunately, this
is a per-shader lock, rather than a global one. Additionally, since
we only append variants to the list, and generate the first one at
precompile time (while only one context has the uncompiled shader),
we can assume that it is safe to access that first entry without
locking the list. This means that we only have to lock when we
have multiple variants, which is relatively uncommon.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7668>
Kenneth Graunke [Wed, 27 Jan 2021 21:46:26 +0000 (13:46 -0800)]
iris: Refcount shader variants
There is a small gap of time where the currently bound uncompiled
shaders, and compiled shader variant, are out of sync. Specifically,
between pipe->bind_*_state() and the next draw.
Currently, shaders variants live entirely within a single context,
and when deleting an iris_uncompiled_shader, we check if any of its
variants are currently bound, and defer deleting those until the next
iris_update_compiled_shaders() hook runs and binds new shaders to
replace them. (This is due to the time gap between binding new
uncompiled shaders, and updating variants at draw time when we have
the required NOS in place.)
This works pretty well in a single context world. But as we move to
share compiled shader variants across multiple contexts, it breaks down.
When deleting a shader, we can't look at all contexts to see if its
variants are bound anywhere. We can't even quantify whether those
contexts will run a future draw any time soon, to update and unbind.
One fairly crazy solution would be to delete the variants anyway, and
leave the stale pointers to dead variants in place. This requires
removing any code that compares old and new variants. Today, we do
that sometimes for seeing if the old/new shaders toggled some feature.
Worse than that, though, we don't just have to avoid dereferences, we'd
have to avoid pointer comparisons. If we free a variant, and quickly
allocate a new variant, malloc may return the same pointer. If it's
for the same shader stage, we may get a new different program that has
the same pointer as a previously bound stale one, causing us to think
nothing had changed when we really needed to do updates. Again, this
is doable, but leaves the code fragile - we'd have to guard against
future patches adding such checks back in.
So, don't do that. Instead, do basic reference counting. When a
variant is bound in a context, up the reference. When it's unbound,
decrement it. When it hits zero, we know it's not bound anywhere and
is safe to delete, with no stale references. This ends up being
reasonably cheap anyway, since the atomic is usually uncontested.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7668>
James Park [Thu, 28 Jan 2021 16:37:12 +0000 (08:37 -0800)]
microsoft: Fix comma in variadic macro for MSVC
New preprocessor seems to be enabled by default when C17 mode is active.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8772>
James Park [Mon, 14 Dec 2020 19:35:13 +0000 (11:35 -0800)]
gallium/tessellator: Fix warning suppression
Single-line version of MSVC warning suppression does not extend beyond
the #endif directive. Use push/disable/pop instead.
Also suppress 26452, which is a similar analysis warning.
This could also be fixed with constexpr if, but C++17 would be required.
Fixes:
790516db0bf ("gallium/swr: fix gcc warnings")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8093>
Icecream95 [Thu, 28 Jan 2021 23:48:56 +0000 (12:48 +1300)]
panfrost: Add the tiler heap to fragment jobs
In some cases the GPU reads from the tiler heap in fragment jobs, so
always add it to GPU jobs.
Fixes faults in many applications that use multiple windows
(e.g. Firefox, plasmashell).
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4157
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8773>
Marek Olšák [Thu, 28 Jan 2021 04:12:54 +0000 (23:12 -0500)]
glapi: guard against invalid XML definitions for glthread
This would have prevented the bug that the previous commit fixes.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8753>
Marek Olšák [Thu, 28 Jan 2021 03:21:32 +0000 (22:21 -0500)]
glthread: fix glVertexAttribDivisor calls not being tracked by non-VBO uploads
marshal_call_after is ignored if the function is an alias of another
function. Move it to the right place.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8753>
Marek Olšák [Wed, 27 Jan 2021 23:40:16 +0000 (18:40 -0500)]
glthread: fix interpreting vertex size == GL_BGRA for vertex attribs
Fixes:
c9c9f57b022 - glthread: track pointers and strides for Pointer & EXT_dsa attrib functions
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4116
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8753>
Eric Anholt [Wed, 27 Jan 2021 23:56:42 +0000 (15:56 -0800)]
ci: Update baremetal kernel to 5.11-rc5 plus patches.
The dr_mode hack is now folded into the git tree. The uprev brings in a
shrinker fix for msm and a fix for the GPU_SET OOB messages on cheza
(possibly involved in piglit flakes).
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8768>
Kenneth Graunke [Wed, 27 Jan 2021 02:27:00 +0000 (18:27 -0800)]
iris: Move VS draw parameter dirty flagging to iris_bind_vs_state
Now that we're looking at shader info system values rather than
vs_prog_data, there's no reason we have to do this when updating
the shader variants. We can simply check it when binding a new
shader from the API point of view.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8759>
Kenneth Graunke [Wed, 27 Jan 2021 02:26:31 +0000 (18:26 -0800)]
iris: Minor code restyling in iris_bind_vs_state
We'll be adding more code here shortly, this will make it easier.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8759>
Kenneth Graunke [Wed, 27 Jan 2021 02:00:29 +0000 (18:00 -0800)]
iris: Use shader_info rather than vs_prog_data for draw parameter checks
brw_compile_vs sets the vs_prog_data fields based on the NIR program's
system values read info field. We can use that directly, enabling more
cleanups in the next patches.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8759>
Bas Nieuwenhuizen [Fri, 6 Nov 2020 23:38:39 +0000 (00:38 +0100)]
radv: Expose VK_KHR_workgroup_memory_explicit_layout.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8752>
Eric Anholt [Mon, 25 Jan 2021 23:03:55 +0000 (15:03 -0800)]
freedreno: Remove duplicate bc invalidate on flush_write_batch().
The fd_batch_flush() internals already do the invalidate at the end to
clean up the bc's references to the batch.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8729>
Eric Anholt [Mon, 25 Jan 2021 22:54:25 +0000 (14:54 -0800)]
freedreno: Early-out from the resource write path when we're the writer.
No need to do the other checks in this case, because then we know that
we've done the UBWC clears and recursed on stencil and added deps on read
batches.
Done as a separate patch to reduce behavior changes in my upcoming move of
the batch cache to the context.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8729>
Eric Anholt [Mon, 25 Jan 2021 18:42:42 +0000 (10:42 -0800)]
freedreno: Use a real type instead of void * for the fd_batch->key.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8729>
Jesse Natalie [Fri, 22 Jan 2021 21:51:43 +0000 (13:51 -0800)]
mapi: Undefine MemoryBarrier
Reviewed-by: Marek Ol\9aák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8661>
Jesse Natalie [Fri, 22 Jan 2021 21:24:42 +0000 (13:24 -0800)]
glapi: Undefine MemoryBarrier
Reviewed-by: Marek Ol\9aák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8661>
Jordan Justen [Sun, 24 Mar 2019 08:00:37 +0000 (01:00 -0700)]
anv: Support multiple engines with DRM_IOCTL_I915_GEM_CONTEXT_CREATE_EXT
v2 (Jason Ekstrand):
- Separate the anv_gem interface from anv_queue internals
- Rework on top of the new anv_queue_family stuff
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jordan Justen [Sun, 24 Mar 2019 06:50:44 +0000 (23:50 -0700)]
anv: Add anv_gem_count_engines
v2 (Jason Ekstrand):
- Take a drm_i915_query_engine_info
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jordan Justen [Sat, 23 Mar 2019 07:28:24 +0000 (00:28 -0700)]
anv: Gather engine info from i915 if available
v2 (Jason Ekstrand):
- Don't take an anv_physical_device in anv_gem_get_engine_info()
- Return the engine info from anv_gem_get_engine_info()
- Free the engine info in anv_physical_device_destroy()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jordan Justen [Sat, 23 Mar 2019 07:17:57 +0000 (00:17 -0700)]
anv: Support i915 query (DRM_IOCTL_I915_QUERY) from Linux v4.17
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jordan Justen [Tue, 24 Mar 2020 20:18:25 +0000 (13:18 -0700)]
anv: Print queue number with INTEL_DEBUG=bat
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jordan Justen [Tue, 14 Aug 2018 09:34:16 +0000 (02:34 -0700)]
anv: Turn device->queue into an array
Rework: Lionel
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jordan Justen [Sat, 6 Apr 2019 01:37:36 +0000 (18:37 -0700)]
anv: Add exec_flags to anv_queue
This may vary based on the newer kernel engines based contexts.
v2 (Jason Ekstrand):
- Initialize anv_queue::exec_flags in anv_queue_init
- Don't conflate this with refactors to get_reset_stats
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jason Ekstrand [Tue, 26 Jan 2021 07:13:36 +0000 (01:13 -0600)]
anv: Add an anv_queue_family struct
This is modeled on anv_memory_type and anv_memory_heap which we already
use for managing memory types. Each anv_queue_family contains some data
which is returned by vkGetPhysicalDeviceQueueFamilyProperties() verbatim
as well as some internal book-keeping bits. An array of queue families
along with a count is stored in the physical device. Each anv_queue
then contains a pointer to the anv_queue_family to which it belongs.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Lionel Landwerlin [Thu, 10 Dec 2020 16:34:52 +0000 (18:34 +0200)]
anv: store queue creation flags on anv_queue
v2 (Jason Ekstrand):
- Pass the whole VkDeviceQueueCreateInfo into anv_queue_init()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jason Ekstrand [Mon, 25 Jan 2021 22:36:01 +0000 (16:36 -0600)]
anv: Refactor anv_queue_finish()
By moving vk_object_base_finish() to the end and putting the thread
clean-up in an if block we both better mimic anv_queue_init() and have a
more correct object destruction order. It comes at the cost of a level
of indentation but that seems to actually make the function more clear.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Lionel Landwerlin [Fri, 11 Dec 2020 13:36:40 +0000 (15:36 +0200)]
anv: pass context to reset stats helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jason Ekstrand [Fri, 22 Jan 2021 22:51:44 +0000 (16:51 -0600)]
anv: Fix an old parameter name in GetDeviceQueue
I don't know if this is a typo or an artifact of ancient versions of the
Vulkan API. In any case, it's wrong.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Jason Ekstrand [Fri, 22 Jan 2021 22:45:12 +0000 (16:45 -0600)]
anv: Drop anv_dump
I originally wrote this several years ago to aid in app debugging. Now
that we have nice tools like RenderDoc, it's no longer needed. I don't
think anyone's really used it in 4 years or more.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
Witold Baryluk [Thu, 28 Jan 2021 17:55:29 +0000 (17:55 +0000)]
util: Use explicit relaxed reads for u_queue
These are no-op, but make clang thread sanitizer happy.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8230>
Jason Ekstrand [Wed, 27 Jan 2021 21:28:24 +0000 (15:28 -0600)]
intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND
I meant to do this years ago when I first added SHADER_OPCODE_SEND. At
the time, the only use for the extended descriptor was bindless handles
which were always one thing and never non-constant. However, it doesn't
actually require any extra instructions because we have to OR in ex_mlen
anyway.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8748>
BillKristiansen [Mon, 25 Jan 2021 20:21:01 +0000 (12:21 -0800)]
d3d12: fix for upside-down multisample stencil blit
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8704>
Christian Gmeiner [Wed, 27 Jan 2021 12:32:57 +0000 (13:32 +0100)]
vc4: add drm-shim
Is enought to run shader-db.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8736>
Mike Blumenkrantz [Wed, 27 Jan 2021 14:25:28 +0000 (09:25 -0500)]
ci: disable glcpp tests for now
these are too flaky to continue running for now
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8738>
Mike Blumenkrantz [Wed, 27 Jan 2021 14:03:45 +0000 (09:03 -0500)]
meson: add enable-glcpp-tests option
these are too intermittent to be left enabled on CI for now
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8738>
Mike Blumenkrantz [Wed, 27 Jan 2021 13:50:57 +0000 (08:50 -0500)]
Revert "glcpp: disable 'windows' tests"
This reverts commit
f7527f7f652814a700dddc13a5b737571248c86d.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8738>
Mike Blumenkrantz [Fri, 7 Aug 2020 23:17:57 +0000 (19:17 -0400)]
zink: export ssbo caps
PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT is needed
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Wed, 2 Dec 2020 17:22:51 +0000 (12:22 -0500)]
zink: flatten out ssbo/ubo variable decls in ntv
we were using a system of block=array<uvec4> here, but we can really
just simplify this to block=array<uint> to make all the related code much
simpler
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Sun, 9 Aug 2020 13:30:29 +0000 (09:30 -0400)]
zink: implement get_ssbo_size nir intrinsic
this is a little hacky since we're still using unpacked layout for everything,
requiring that we "adjust" the value we pass back to the user for std430 to
be the expected value as though we were using packed layout
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Fri, 7 Aug 2020 23:17:34 +0000 (19:17 -0400)]
zink: support nir_intrinsic_store_ssbo
this is gross, but it works
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Fri, 7 Aug 2020 23:16:01 +0000 (19:16 -0400)]
zink: rework ssbo indexing and binding
this is actually crazy, but there's no other way to do it from the variable.
ideally, nir would have a separate type for atomic counters to simplify this
and then also stop mangling binding/block index during lower_buffers
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Fri, 7 Aug 2020 23:14:01 +0000 (19:14 -0400)]
zink: handle more ssbo ops in ntv
this is easiest with a macro since it's already implemented for images
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Fri, 7 Aug 2020 23:12:20 +0000 (19:12 -0400)]
zink: handle null ssbo attachments without crashing
basically the same as any other null buffer descriptor attachment
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Tue, 12 Jan 2021 23:40:23 +0000 (18:40 -0500)]
zink: flag ssbo buffer resources as having pending writes per stage
I meant to squash this down but didn't get around to it
Fixes:
e79d905f5a0 ("zink: flag ssbo buffer resources as having pending writes on batch")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
Mike Blumenkrantz [Fri, 7 Aug 2020 18:57:39 +0000 (14:57 -0400)]
zink: add spirv builder function for OpAtomicStore
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8628>
cheyang [Tue, 15 Dec 2020 08:18:13 +0000 (16:18 +0800)]
glsl: redeclare built-in variable with separate shader
according to :
https://www.khronos.org/registry/OpenGL/extensions/EXT/EXT_separate_shader_objects.gles.txt
properly handle the declaration of these interface block varibales
Signed-off-by: cheyang <cheyang@bytedance.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8101>
Kenneth Graunke [Thu, 28 Jan 2021 07:27:02 +0000 (23:27 -0800)]
iris: Properly handle new unbind_num_trailing_slots parameters
Commits
0278d1fa323cf1f289..
b688ea31fcf7e20436 added a new parameter
to set_vertex_buffers(), set_shader_images(), and set_sampler_views()
which specifies a number of trailing slots to unbind. They updated
the iris functions to do the unbinding, but didn't update the code
to mark which things are bound in the bitfields. This meant that
later code would assume those unbound slots were bound, and crash
on a NULL dereference. All that's needed is to add that slot count
when unbinding things in the bitfield.
Fixes:
0278d1fa323 ("gallium: add unbind_num_trailing_slots to set_vertex_buffers")
Fixes:
72ff66c3d73 ("gallium: add unbind_num_trailing_slots to set_shader_images")
Fixes:
b688ea31fcf ("gallium: add unbind_num_trailing_slots to set_sampler_views")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8758>
Ian Romanick [Wed, 27 Jan 2021 20:01:26 +0000 (12:01 -0800)]
i965: Don't parse driconf again
It was already parsed in intelInitScree2, and the results are stored in
the screen.
Fixes:
d67ef485804 ("i965/screen: Allow drirc to set 'allow_rgb10_configs' again.")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7387>
Ian Romanick [Fri, 30 Oct 2020 19:28:22 +0000 (12:28 -0700)]
i965: Use allow_higher_compat_version option during screen initialization
Currently, `allow_higher_compat_version` is only used during context
creation. Doing that means an application that doesn't request a
specific version can be given a version higher than 3.0.
However, an application still cannot request a higher version via
glXCreateContextAttribsARB. The GLX and DRI layers will only see that
version 3.0 is supported, so context creation will fail before the drive
is called. For this to work, max_gl_compat_version must be set to a
higher version.
This enables running many piglit tests on i965 with
allow_higher_compat_version.
v2: Fix a typo in a comment. Noticed by Tim. Fix a typo in the commit
message. Noticed by the spell checker. :)
v3: Don't parse driconf again. Suggested by Tim.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7387>
Ian Romanick [Wed, 27 Jan 2021 19:55:01 +0000 (11:55 -0800)]
i965: Don't advertise OpenGL 3.3+ if driconf disables GL_ARB_blend_func_extended
This prevents the assertion added in "i965: Use
allow_higher_compat_version option during screen initialization" from
failing when disable_blend_func_extended=true.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7387>
Simon Zeni [Thu, 21 Jan 2021 04:19:37 +0000 (23:19 -0500)]
egl/dri2: enable EGL_WL_bind_wayland_display in EGL device platform
EGL_WL_bind_wayland_display was previously supported on all platforms,
except the EGL device platform.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8638>
Marek Olšák [Tue, 26 Jan 2021 20:26:18 +0000 (15:26 -0500)]
radeonsi: fix centroid with VRS coarse shading
This has no effect on other shading. It should have been the default value.
Fixes:
c3432ad8524 - radeonsi: add an option to enable 2x2 coarse shading for non-GUI elements
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8726>
Marek Olšák [Tue, 26 Jan 2021 05:35:10 +0000 (00:35 -0500)]
gallium/u_vbuf: skip draws with 0 vertices
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 2 Jan 2021 22:53:13 +0000 (17:53 -0500)]
st/mesa: set take_index_buffer_ownership to skip an atomic in u_threaded
This reduces overhead by skipping the atomic, which is slow on AMD Zen.
It uses the same mechanism as vertex buffers.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 2 Jan 2021 22:52:04 +0000 (17:52 -0500)]
gallium,u_threaded: add pipe_draw_info::take_index_buffer_ownership
to skip atomics in u_threaded_context. This will decrease CPU overhead.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 2 Jan 2021 21:35:15 +0000 (16:35 -0500)]
gallium/util: optimize pipe_vertex_buffer_reference binding the same buffer
This eliminates atomic ops when the buffer doesn't change.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 12 Dec 2020 22:10:00 +0000 (17:10 -0500)]
gallium/u_threaded: unify user and non-user codepaths in set_constant_buffer
We can do this cleanup thanks to take_ownership.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 12 Dec 2020 21:02:49 +0000 (16:02 -0500)]
gallium/u_threaded: add a null constant buffer codepath
This consumes less space in the batch buffer.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 26 Dec 2020 15:09:48 +0000 (10:09 -0500)]
gallium/u_upload_mgr: eliminate all atomics for the upload buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 2 Jan 2021 23:06:53 +0000 (18:06 -0500)]
st/mesa: skip atomics when binding UBOs
This uses the same mechanism as vertex buffers.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>
Marek Olšák [Sat, 2 Jan 2021 21:40:11 +0000 (16:40 -0500)]
st/mesa: eliminate all atomic ops when setting vertex buffers
This implements the same optimization as u_upload_mgr.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8298>