Marek Olšák [Thu, 2 Jun 2022 19:43:07 +0000 (15:43 -0400)]
amd/llvm,radeonsi/gfx11: switch to using GDS_STRMOUT registers
This is required by register shadowing (required by the new PAIRS packets),
preemption, user queues, and we only have to wait for VS after streamout,
not PS. This is how gfx11 streamout should have been done.
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21584>
Marek Olšák [Tue, 28 Feb 2023 04:07:02 +0000 (23:07 -0500)]
amd: add nir_intrinsic_xfb_counter_sub_amd and fix overflowed streamout offsets
Fixes:
5ec79f989988ba - ac/nir/ngg: nogs support streamout
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21584>
Mark Janes [Sat, 21 Jan 2023 07:19:34 +0000 (23:19 -0800)]
intel/fs: use generated workaround helpers for Wa_14017989577
Wa_14017989577 is a clone of Wa_14015360517, which applies to several
platforms beyond INTEL_PLATFORM_DG2_G10.
Update references to Wa_14017989577, and use the generated workaround
helper to ensure application to the proper platforms.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21744>
Emma Anholt [Tue, 7 Mar 2023 17:23:48 +0000 (09:23 -0800)]
ci/etnaviv: Drop the dEQP-GLES2.functional.uniform_api.random.94 xfail.
This has been consistently passing. I think I just missed it in my
previous update.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21769>
Emma Anholt [Tue, 7 Mar 2023 17:20:25 +0000 (09:20 -0800)]
ci: Add some xfail updates from VKCTS 1.3.5.0 for the manual jobs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21769>
Mike Blumenkrantz [Thu, 16 Feb 2023 17:42:51 +0000 (12:42 -0500)]
llvmpipe: fix LP_PERF=no_depth to ignore depth format
cc: mesa-stable
Reviewed-by: Brian Paul brianp@vmware.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21582>
Juan A. Suarez Romero [Mon, 20 Feb 2023 11:51:00 +0000 (12:51 +0100)]
v3d/v3dv: define performance counters in common
Both OpenGL and Vulkan drivers share the same performance counters.
Let's move them to a common place instead of duplicating.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21420>
Antonio Gomes [Tue, 27 Dec 2022 06:13:34 +0000 (03:13 -0300)]
iris: Add support for 2d images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Sat, 7 Jan 2023 02:54:24 +0000 (23:54 -0300)]
llvmpipe: Add new caps PIPE_CAP_LINEAR_IMAGE_(PITCH_ALIGNMENT|BASE_ADDRESS_ALIGNMENT)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Sat, 7 Jan 2023 02:54:04 +0000 (23:54 -0300)]
rusticl: Implement spec for cl_khr_image2d_from_buffer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Sat, 7 Jan 2023 02:52:05 +0000 (23:52 -0300)]
gallium: Add new caps PIPE_CAP_LINEAR_IMAGE_(PITCH_ALIGNMENT|BASE_ADDRESS_ALIGNMENT)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Mon, 12 Dec 2022 21:22:31 +0000 (18:22 -0300)]
lvmpipe/cs: Add support for 2d images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Sun, 26 Feb 2023 19:29:45 +0000 (16:29 -0300)]
mesa/st, nine, nouveau: Fix uninitialized pipe_sampler_view structs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Mon, 12 Dec 2022 20:35:49 +0000 (17:35 -0300)]
gallium, rusticl: Add tex2d_from_buf in image_view and sampler_view
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Wed, 7 Dec 2022 21:35:44 +0000 (18:35 -0300)]
rusticl: Enable mapImage for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Wed, 7 Dec 2022 16:04:00 +0000 (13:04 -0300)]
rusticl: Enable copy for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Tue, 6 Dec 2022 21:39:59 +0000 (18:39 -0300)]
rusticl: Enabling image fill for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Antonio Gomes [Tue, 6 Dec 2022 03:54:12 +0000 (00:54 -0300)]
rusticl: Enabling reading/writing for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
Daniel Schürmann [Fri, 3 Mar 2023 18:49:43 +0000 (19:49 +0100)]
radv/rt: move radv_pipeline_key from rt_variables to traversal_data
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
Daniel Schürmann [Tue, 7 Mar 2023 12:30:57 +0000 (13:30 +0100)]
radv: remove unused parameters from radv_compute_pipeline_compile()
Also make this function static.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
Daniel Schürmann [Tue, 7 Mar 2023 11:40:08 +0000 (12:40 +0100)]
radv/rt: introduce and use radv_rt_pipeline_compile()
This is essentially a code-duplication of radv_compute_pipeline_compile()
but will later be more specialized for the needs of RT pipelines.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
Daniel Schürmann [Tue, 7 Mar 2023 12:19:24 +0000 (13:19 +0100)]
radv: expose radv_pipeline_capture_shaders()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
Daniel Schürmann [Tue, 7 Mar 2023 12:17:12 +0000 (13:17 +0100)]
radv: expose radv_postprocess_nir()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
Samuel Pitoiset [Tue, 7 Mar 2023 12:21:55 +0000 (13:21 +0100)]
radv: fix defining RADV_USE_WSI_PLATFORM
RADV_USE_WSI_PLATFORM was unused in radv_CreateImage().
Fixes:
2a5d7f4926c ("radv: fix missing implementation of creating images from swapchains")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21763>
José Roberto de Souza [Mon, 24 Oct 2022 21:08:55 +0000 (14:08 -0700)]
iris: Move iris_bo_wait_gem() to i915/iris_bufmgr.c
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
José Roberto de Souza [Mon, 24 Oct 2022 20:53:34 +0000 (13:53 -0700)]
iris: Move iris_bo_busy_gem() to i915/iris_bufmgr.c
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
José Roberto de Souza [Mon, 6 Mar 2023 17:11:00 +0000 (09:11 -0800)]
iris: Move bo_set_caching to kmd backend
For the platforms that call it, it a function in the hot path so
moving it to kmd backend.
After this patch i915/iris_bufmgr.c is empty but not removing it
as next patch will add functions to it.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
José Roberto de Souza [Mon, 6 Mar 2023 17:04:53 +0000 (09:04 -0800)]
iris: Move bo_madvise to kmd backend
bo_madvise() is on hot path, so moving it to kmd backend.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
José Roberto de Souza [Thu, 9 Feb 2023 17:57:56 +0000 (09:57 -0800)]
intel/common: Implement the Xe functions for intel_gem
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21699>
José Roberto de Souza [Thu, 9 Feb 2023 17:45:56 +0000 (09:45 -0800)]
intel/common: Implement the Xe functions for intel_engine
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21699>
Samuel Pitoiset [Thu, 23 Feb 2023 08:50:17 +0000 (09:50 +0100)]
radv: fix border color swizzle for stencil-only format on GFX9+
Swizzle of 8-bit stencil format is defined as _x__ but the hw expects
BC_SWIZZLE_XYZW.
Fixes dEQP-VK.pipeline.monolithic.sampler.border_swizzle.*s8_uint*.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21482>
Tapani Pälli [Tue, 7 Mar 2023 11:39:28 +0000 (13:39 +0200)]
anv: fix sends_count_expectation assert on simd32
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21758>
Yogesh Mohan Marimuthu [Tue, 28 Feb 2023 14:48:17 +0000 (20:18 +0530)]
ac/surface: only adjust pitch if surf_pitch was modified
Modifying pitch for all LINEAR surface isn't correct;
the original change that modified surf_pitch was only
intended for YUV textures.
This fixes vkGetImageSubresourceLayout rowPitch return value
for VK_FORMAT_BC3_UNORM_BLOCK + VK_IMAGE_TILING_LINEAR.
Fixes:
fcc499d5 (ac/surface: adjust gfx9.pitch[*] based on surf->blk_w)
v2: add check for UYVY format (Pierre-Eric)
v3: move blk_w division to above if check (Pierre-Eric)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21595>
David Heidelberg [Tue, 7 Mar 2023 12:15:26 +0000 (13:15 +0100)]
ci/lavapipe: fixes typo
Fixes:
5ee724e180bd ("ci/lavapipe: add recent occasional flake")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21759>
Georg Lehmann [Tue, 14 Feb 2023 15:47:40 +0000 (16:47 +0100)]
aco: use bitfield array helpers for valu modifiers
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Tue, 14 Feb 2023 15:39:20 +0000 (16:39 +0100)]
aco: add bitfield array helper classes
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Tue, 21 Feb 2023 19:08:42 +0000 (20:08 +0100)]
aco: remove VOP[123C]P? structs
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Tue, 31 Jan 2023 17:03:01 +0000 (18:03 +0100)]
aco/optimizer: simplify using VALU instruction
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Wed, 11 Jan 2023 12:09:20 +0000 (13:09 +0100)]
aco/print_ir: simplify using VALU instruction
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Tue, 31 Jan 2023 12:14:46 +0000 (13:14 +0100)]
aco: validate VALU modifiers
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Tue, 31 Jan 2023 17:04:29 +0000 (18:04 +0100)]
aco/ra: set opsel_hi to zero when converting to VOP2
Otherwise the new modifier validation will fail.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Wed, 11 Jan 2023 11:12:33 +0000 (12:12 +0100)]
aco/ir: rework IR to have one common valu instruction struct
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Georg Lehmann [Fri, 3 Feb 2023 12:08:14 +0000 (13:08 +0100)]
aco: treat VINTERP_INREG as VALU
It's just v_fma with fixed DPP8 and builtin s_waitcnt_expcnt, so it can mostly
be handled as a pure VALU instruction.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
Samuel Pitoiset [Thu, 2 Mar 2023 09:24:37 +0000 (10:24 +0100)]
radv: fix incorrect stride for primitives generated query with GDS
When the query pool uses GDS (for NGG), the stride is 40.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8412
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21650>
Lionel Landwerlin [Sun, 5 Mar 2023 21:12:36 +0000 (23:12 +0200)]
nir: fix nir_ishl_imm
Both GLSL & SPIRV have undefined values for shift > bitsize. But SM5
says :
"This instruction performs a component-wise shift of each 32-bit
value in src0 left by an unsigned integer bit count provided by
the LSB 5 bits (0-31 range) in src1, inserting 0."
Better to not hard code the wrong behavior in NIR.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
e227bb9fd5 ("nir/builder: add ishl_imm helper")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@colllabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21720>
Samuel Pitoiset [Fri, 13 Jan 2023 16:04:01 +0000 (17:04 +0100)]
radv: do not add descriptor BOs on update when the global BO list is used
It's unnecessary and already checked elsewhere like in
vkCmdBindDescriptorSets(). This improves performance of vkoverhead
test #76 (descriptor_1image) by +18%. It's the same performance as
PRO on my Threadripper 1950X now. This should also slightly improve
texel and buffer descriptors.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20699>
Karol Herbst [Wed, 1 Mar 2023 12:39:47 +0000 (13:39 +0100)]
gallivm: fix lp_vec_add_offset_ptr for 32 bit builds
The function assumed ptrs are always 64 bit sized.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8267
Fixes:
442d1fe5ad6 ("gallivm: use masked intrinsics for global and scratch access.")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21604>
Karol Herbst [Tue, 28 Feb 2023 18:50:05 +0000 (19:50 +0100)]
rusticl/kernel: Images arg sizes also have to match the host pointer size
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8267
Fixes:
b0d698c5328 ("rusticl: correctly check global argument size")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21604>
Alyssa Rosenzweig [Fri, 3 Mar 2023 21:18:52 +0000 (16:18 -0500)]
agx: Assert that memory index is 32-bit reg
Semantics will be wrong otherwise (reading garbage).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Alyssa Rosenzweig [Fri, 3 Mar 2023 21:19:17 +0000 (16:19 -0500)]
agx/lower_address: Handle 16-bit offsets
These need to be upconverted for correctness.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Alyssa Rosenzweig [Fri, 3 Mar 2023 21:27:26 +0000 (16:27 -0500)]
agx/lower_address: Fix handling of 64-bit immediates
We can't add a 64-bit immediate with the hardware iadd, that won't work. What we
can do is add a 32-bit immediate, derived as the low 32-bits of a 64-bit
nir_ssa_def.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Alyssa Rosenzweig [Fri, 3 Mar 2023 20:25:42 +0000 (15:25 -0500)]
agx/lower_address: Handle 8-bit load/store
Should work ok with the implicit up-conversion that the backend does.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Alyssa Rosenzweig [Thu, 2 Mar 2023 06:06:39 +0000 (01:06 -0500)]
agx/lower_address: Handle large shifts
If we manage to fold in a left shift that's bigger than the hardware can do, we
should at least avoid generating a useless right shift to feed the hardware
rather bailing completely.
For motivation, this form of address arithmetic is encountered when indexing
into arrays with large power-of-two element sizes (array-of-structs).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Alyssa Rosenzweig [Thu, 2 Mar 2023 05:54:32 +0000 (00:54 -0500)]
agx/lower_address: Optimize "shift + constant"
Optimize address arithmetic of the form
base + u2u64((index << shift) + const)
into hardware operands
base, index << (shift - format_shift) + const'
which (if format_shift = shift) can be simply
base, index + const'
rather than the current naive translation
base, ((index << shift) + const) >> format_shift
This saves at least one pointless shift. We can't do this optimization with
nir_opt_algebraic, because explicitly optimizing "(a << #b) >> #b" to "a" isn't
sound due to overflow. But there's no overflow issue here, which is what this
whole pass is designed around.
For motivation, this address arithmetic implements "dynamically indexing into an
array inside of a C structure", where the const is the offset of the array
relative to the structure.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Alyssa Rosenzweig [Tue, 7 Mar 2023 02:15:25 +0000 (21:15 -0500)]
agx/lower_address: Break on match
Once we've matched a summand, commit to it. This avoids needlessly checking the
second source if the first matched, and removes some indentation/funny control
flow.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
Sergi Blanch Torne [Thu, 16 Feb 2023 09:47:07 +0000 (10:47 +0100)]
Revert "ci: disable Collabora's LAVA lab for maintance"
This reverts commit https://gitlab.freedesktop.org/mesa/mesa/-/commit/
6be7469df1e12bd57c697ff7e34bbda8286d67a2
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21356>
Mike Blumenkrantz [Fri, 3 Mar 2023 15:43:04 +0000 (10:43 -0500)]
zink: always set batch usage for descriptors after barrier
this otherwise breaks unordered promotion calc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Thu, 2 Mar 2023 15:01:44 +0000 (10:01 -0500)]
zink: set dynamic pcp for unordered cmdbuf
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Thu, 2 Mar 2023 14:56:11 +0000 (09:56 -0500)]
zink: bind descriptor buffers to unordered cmdbuf
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Tue, 28 Feb 2023 20:41:07 +0000 (15:41 -0500)]
zink: always set color writes on the unordered cmdbuf
this state has to be set, so ensure it is
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Wed, 1 Mar 2023 22:13:34 +0000 (17:13 -0500)]
zink: explicitly flush src clears when u_blittering
this otherwise relies on set_framebuffer_state flushing them,
which may or may not be accurate/desired
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Wed, 1 Mar 2023 19:17:32 +0000 (14:17 -0500)]
zink: don't unset existing access when adding resource binds
this breaks barrier calcs, but it was fine since there was a pre-barrier
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Wed, 1 Mar 2023 19:05:51 +0000 (14:05 -0500)]
zink: eliminate pre barrier for adding resource binds
this will automatically be handled by the copies below
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Tue, 28 Feb 2023 19:00:34 +0000 (14:00 -0500)]
zink: check for layout updates when unbinding samplerviews
not sure if it's a bug, but it should be consistent with shader image
unbinding, so here it is
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Tue, 28 Feb 2023 21:05:08 +0000 (16:05 -0500)]
zink: propagate valid_buffer_range when replacing buffer storage
this is otherwise unreliable
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Wed, 15 Feb 2023 19:34:23 +0000 (14:34 -0500)]
zink: fix descriptor update flagging on null ssbo set
this could unset the update flag if the last ssbo was null, which would
be a bug if it could ever be triggered
found by inspection
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mike Blumenkrantz [Mon, 6 Mar 2023 13:25:00 +0000 (08:25 -0500)]
zink: only add deferred barrier on fb unbind when layout needs to change
this otherwise may have been a surface that was never drawn to or
already had its layout corrected, in which case a deferred barrier
is not only unnecessary, it might be broken
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>
Mark Janes [Wed, 8 Feb 2023 03:41:01 +0000 (19:41 -0800)]
intel/fs: use generated helpers for Wa_1209978020 / Wa_18012201914
Wa_1209978020 is a clone of Wa_18012201914. Update references to
refer to the originating bug, and use generated helpers to ensure it
is applied to future platforms as needed.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21741>
Caio Oliveira [Thu, 2 Mar 2023 23:43:00 +0000 (15:43 -0800)]
intel/compiler: Drop non-scoped barrier handling
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Alyssa Rosenzweig [Wed, 1 Mar 2023 19:51:02 +0000 (14:51 -0500)]
gallivm: Drop non-scoped barrier handling
Now unreachable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Alyssa Rosenzweig [Wed, 1 Mar 2023 19:50:27 +0000 (14:50 -0500)]
ir3: Drop non-scoped barrier handling
Now unreachable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Alyssa Rosenzweig [Wed, 1 Mar 2023 19:49:42 +0000 (14:49 -0500)]
pan/mdg: Drop control_barrier handling
Now unreachable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Alyssa Rosenzweig [Wed, 1 Mar 2023 19:49:16 +0000 (14:49 -0500)]
pan/bi: Drop control_barrier handling
Now unreachable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Alyssa Rosenzweig [Wed, 1 Mar 2023 19:47:56 +0000 (14:47 -0500)]
glsl/nir: Use scoped_barrier for control barrier
Rather than control_barrier. This avoids the need to handle control_barrier at
all for backends that set use_scoped_barrier. This effectively matches what
spirv_to_nir emits, so Vulkan-capable compilers should be ok.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Caio Oliveira [Thu, 2 Mar 2023 20:59:18 +0000 (12:59 -0800)]
intel/compiler: Drop brw_nir_lower_scoped_barriers
Now that we handle scoped barriers with execution scope during
NIR -> Backend IR translation, this lowering is not needed anymore.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Caio Oliveira [Thu, 2 Mar 2023 22:12:58 +0000 (14:12 -0800)]
intel/vec4: Handle scoped barriers with execution scope
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Caio Oliveira [Thu, 2 Mar 2023 22:26:53 +0000 (14:26 -0800)]
intel/fs: Handle scoped barriers with execution scope
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
Yiwei Zhang [Fri, 10 Feb 2023 06:08:10 +0000 (22:08 -0800)]
venus: revert back the warn order
This reverts
- commit
4ae4e4362cfdab91be81c48195674d354ef45602
- commit
f54aa49c1439440c88a1c6a1046be11dba3ab44e
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>
Yiwei Zhang [Wed, 21 Sep 2022 21:08:41 +0000 (21:08 +0000)]
venus: vn_relax to abort on ring fatal status upon warn order
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>
Yiwei Zhang [Mon, 27 Feb 2023 01:29:09 +0000 (17:29 -0800)]
venus: propagate vn_ring to vn_relax
This is to prepare for vn_relax to check ring status as well as pinging
renderer.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>
Yiwei Zhang [Wed, 21 Sep 2022 20:43:51 +0000 (20:43 +0000)]
venus: abort ring submit when ring is in fatal status
This change also migrates to use the protocol defined status enums.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>
Yiwei Zhang [Sat, 4 Mar 2023 00:30:37 +0000 (16:30 -0800)]
venus: sync to latest protocol for ring status enum
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>
Mark Janes [Wed, 8 Feb 2023 02:00:58 +0000 (18:00 -0800)]
intel/fs: use generated workaround helpers for Wa_14010017096
This workaround does not apply beyond gen 12.0.
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21746>
Mark Collins [Mon, 6 Mar 2023 11:27:28 +0000 (11:27 +0000)]
meson: forcefully disable libdrm when host doesn't have it
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21724>
Alyssa Rosenzweig [Thu, 2 Mar 2023 18:30:47 +0000 (13:30 -0500)]
nir/opt_barrier: Generalize to control barriers
For GLSL, we want to optimize code like
memoryBarrierBuffer();
controlBarrier();
into a single scoped_barrier intrinsic for the backend to consume. Now that
backends can get scoped_barriers everywhere, what's left is enabling backends to
combine these barriers together. We already have an Intel-specific pass for
combining memory barriers; it just needs a teensy bit of generalization to allow
combining all sorts of barriers together.
This avoids code quality regression on Asahi when switching to purely scoped
barriers. It's probably useful for other backends too.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21661>
Faith Ekstrand [Mon, 27 Feb 2023 19:28:45 +0000 (13:28 -0600)]
intel: Use nir_lower_tex_options::lower_index_to_offset
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>
Alyssa Rosenzweig [Sun, 26 Feb 2023 04:03:58 +0000 (23:03 -0500)]
ir3: Use lower_index_to_offset
Instead of doing the add ourselves.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>
Alyssa Rosenzweig [Sun, 26 Feb 2023 04:02:17 +0000 (23:02 -0500)]
pan/bi: Use lower_index_to_offset
Instead of doing the add ourselves.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>
Alyssa Rosenzweig [Sun, 26 Feb 2023 03:59:07 +0000 (22:59 -0500)]
nir/lower_tex: Add lower_index_to_offset
Some backends can handle a constant texture index or a dynamic texture index but
not a constant texture index plus a dynamic texture offset. Add a nir_lower_tex
option to lower to one of these options.
v2: Use more straightforward code proposed by Faith.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>
Sam Edwards [Tue, 28 Feb 2023 22:46:30 +0000 (22:46 +0000)]
nouveau: Fix null dereference in nouveau_pushbuf_destroy
This may happen if the Nouveau device fails to initialize before
the pushbuf is set up; the abort logic will call this either way.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21611>
Daniel Stone [Mon, 6 Mar 2023 18:10:26 +0000 (18:10 +0000)]
ci/fdno: Only run full tests on a limited subset of machines
Though not many people run full test runs, it occupies 2/7 a630 slots
for nearly 2 hours. If more than one person does this at a time, it can
be an effective DoS and make merges time out.
Limit full runs to a subset of the runners, such that at least some of
them will always be available for us.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21737>
Rob Clark [Sat, 25 Feb 2023 18:49:29 +0000 (10:49 -0800)]
freedreno/common: Replace or_mask() with BitsetEnum<T>
Use template and operator overloading to make dealing with bitmask enums
shared between C and C++ easier.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21535>
Eric Engestrom [Mon, 6 Mar 2023 17:17:23 +0000 (17:17 +0000)]
v3d/ci: add dEQP-GLES3.functional.texture.specification.teximage2d_pbo.*_cube flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21735>
Mike Blumenkrantz [Mon, 6 Mar 2023 12:18:24 +0000 (07:18 -0500)]
zink: unbind fb on context destroy
this ensures that batch refs are added for fb surfaces on unbind, which
prevents stale batch tracking from persisting on resources
after the context is destroyed
fixes:
*EGL.functional.render.multi_context*
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21727>
Guilherme Gallo [Tue, 28 Feb 2023 23:46:44 +0000 (20:46 -0300)]
ci: Handle carriage return characters in LAVA logs
This commit updates LogFollower class to handle carriage return
characters in LAVA logs. LAVA treats carriage return characters as a
line break, so each carriage return in an output console is mapped to a
console line in LAVA.
The updated LogFollower class now merges lines that end with a carriage
return character into a single line, making the Gitlab sections work
correctly. In addition, the `remove_trailing_whitespace` method has been
updated to remove trailing `\r\n` characters from log lines.
The `test_lava_log_merge_carriage_return_lines` test function has also
been updated to test for carriage returns at the end of the previous
line.
Closes: #8242
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21614>
Italo Nicola [Thu, 15 Dec 2022 16:34:21 +0000 (13:34 -0300)]
hud: add GALLIUM_HUD_OPACITY envvar
GALLIUM_HUD_OPACITY can be used with a % value from 0 to 100, to specify
the opacity of the gallium hud background.
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20339>
Italo Nicola [Thu, 15 Dec 2022 16:44:41 +0000 (13:44 -0300)]
hud: use defines for default scale/rotation/visibility values
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20339>
Ruijing Dong [Wed, 1 Mar 2023 02:14:37 +0000 (21:14 -0500)]
raseonsi/vcn: fix a h264 decoding issue
reason:
some h264 streams have some strange pictures, from
vaapi input these pictures don't have a reference frame,
however, they are not intra only pictures, in MB layer
these pictures are looking for some references, if they
cannot find it. It could cause PF.
when reference pictures exist, it will need to set used_for
reference_flags, therefore if that is set, however the
number of reference frames is zero, which is odd, it
should be avoided.
solution:
In the above case, to scan the ref list so that it will
make at least one reference available to avoid crash, since
this is not accurate enough, it could cause some artifacts.
And in that case, it will need to be checked individually
for another solution.
closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1462
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8401
Cc: mesa-stable
Tested-by: llyyr <llyyr.public@gmail.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21732>
Mike Blumenkrantz [Thu, 2 Mar 2023 13:27:06 +0000 (08:27 -0500)]
zink: add frame trace markers on the queue
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21655>
Sonny Jiang [Thu, 2 Mar 2023 18:26:30 +0000 (12:26 -0600)]
radeonsi: Add NV12 support for AV1
8bit av1 decoding cannot use NV12 output, which is caused by missing NV12 RT format.
It's a regression caused by commit [
0504a3b0].
Fixes:
0504a3b0 ("radeonsi: correctly declare YUV420_10 RT Format support for AV1")
Cc: mesa-stable
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: David Wu <David.Wu3@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21697>