platform/upstream/llvm.git
16 months ago[libc] Add LIBC_INLINE_VAR for inline variables
Alex Brachet [Thu, 15 Jun 2023 23:37:03 +0000 (23:37 +0000)]
[libc] Add LIBC_INLINE_VAR for inline variables

These are the only variables I could find that use LIBC_INLINE. Note, these are namespace scoped constexpr so local linkage is implied. inline is useful here to silence clang's unused-const-variable variable. For Fuchsia, the distinction between LIBC_INLINE and LIBC_INLINE_VAR is helpful because we define LIBC_INLINE as `[[gnu::always_inline]] inline` when building with gcc. This isn't meaningful on variables.

Alternatively, we could make these variables simply constexpr and also add `[[maybe_unused]]`

Reviewed By: sivachandra, mcgrathr

Differential Revision: https://reviews.llvm.org/D152951

16 months ago[Clang] Fixes a diagnostic typo.
Mark de Wever [Thu, 15 Jun 2023 15:38:32 +0000 (17:38 +0200)]
[Clang] Fixes a diagnostic typo.

Some small style updates as drive-by.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D153038

16 months ago[libc++][doc] Move not yet adopted issues to C++26.
Mark de Wever [Thu, 15 Jun 2023 17:28:23 +0000 (19:28 +0200)]
[libc++][doc] Move not yet adopted issues to C++26.

The development of C++23 is complete, so these issues will be adopted in
C++26 (or later).

Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D153053

16 months ago[NFC] Autogenerate CodeGen/ARM/vlddup.ll
Amaury Séchet [Fri, 16 Jun 2023 15:33:30 +0000 (15:33 +0000)]
[NFC] Autogenerate CodeGen/ARM/vlddup.ll

16 months ago[Driver] Allow warning for unclaimed TargetSpecific options
Fangrui Song [Fri, 16 Jun 2023 15:32:25 +0000 (08:32 -0700)]
[Driver] Allow warning for unclaimed TargetSpecific options

For unclaimed target-agnostic options, we can apply clang_ignored_gcc_optimization_f_Group
to accept but warn about them.
```
% clang -c -fexpensive-optimizations a.c
clang: warning: optimization flag '-fexpensive-optimizations' is not supported [-Wignored-optimization-argument]
```

For an unclaimed target-specific option, one target may want to accept but warn
about it. Add `llvm::opt::Arg::IgnoredTargetSpecific` to support this warning
need.

Close https://github.com/llvm/llvm-project/issues/63282

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D152856

16 months ago[NFC] Autogenerate CodeGen/ARM/sub-cmp-peephole.ll
Amaury Séchet [Fri, 16 Jun 2023 15:11:14 +0000 (15:11 +0000)]
[NFC] Autogenerate CodeGen/ARM/sub-cmp-peephole.ll

16 months ago[LV] Use VPValues when creating GEP with all invariant indices.
Florian Hahn [Fri, 16 Jun 2023 15:14:01 +0000 (16:14 +0100)]
[LV] Use VPValues when creating GEP with all invariant indices.

Update VPWidenGEPRecipe::execute to use the VPValue operands of the
recipe when creating the GEP instruction.

Fixes #63340.

16 months ago[gn build] Port 31eeba3f7c0e
LLVM GN Syncbot [Fri, 16 Jun 2023 14:54:49 +0000 (14:54 +0000)]
[gn build] Port 31eeba3f7c0e

16 months ago[libc++] Introduce __make_uninitialized_buffer and use it instead of get_temporary_buffer
Nikolas Klauser [Fri, 16 Jun 2023 14:50:54 +0000 (07:50 -0700)]
[libc++] Introduce __make_uninitialized_buffer and use it instead of get_temporary_buffer

This will also be used in some PSTL backends.

Reviewed By: ldionne, #libc, Mordante

Spies: arichardson, mstorsjo, Mordante, sstefan1, jplehr, libcxx-commits

Differential Revision: https://reviews.llvm.org/D152208

16 months ago[mlir] Move symbol loading from mlir-cpu-runner to ExecutionEngine.
Ingo Müller [Thu, 15 Jun 2023 14:33:22 +0000 (14:33 +0000)]
[mlir] Move symbol loading from mlir-cpu-runner to ExecutionEngine.

Both the mlir-cpu-runner and the execution engine allow to provide a
list of shared libraries that should be loaded into the process such
that the jitted code can use the symbols from those libraries. The
runner had implemented a protocol that allowed libraries to control
which symbols it wants to provide in that context (with a function
called __mlir_runner_init). In absence of that, the runner would rely on
the loading mechanism of the execution engine, which didn't do anything
particular with the symbols, i.e., only symbols with public visibility
were visible to jitted code.

Libraries used a mix of the two mechanisms: while the runner utils and C
runner utils libs (and potentially others) used public visibility, the
async runtime lib (as the only one in the monorepo) used the loading
protocol. As a consequence, the async runtime library could not be used
through the Python bindings of the execution engine.

This patch moves the loading protocol from the runner to the execution
engine. For the runner, this should not change anything: it lets the
execution engine handle the loading which now implements the same
protocol that the runner had implemented before. However, the Python
binding now get to benefit from the loading protocol as well, so the
async runtime library (and potentially other out-of-tree libraries) can
now be used in that context.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D153029

16 months ago[Driver] Use DenseSet::contains (NFC)
Kazu Hirata [Fri, 16 Jun 2023 14:48:20 +0000 (07:48 -0700)]
[Driver] Use DenseSet::contains (NFC)

16 months ago[BOLT] Use {StringMap,DenseMapBase}::lookup (NFC)
Kazu Hirata [Fri, 16 Jun 2023 14:48:19 +0000 (07:48 -0700)]
[BOLT] Use {StringMap,DenseMapBase}::lookup (NFC)

16 months ago[AMDGPU] Regenerate llvm.amdgcn.s.buffer.load checks
Jay Foad [Fri, 16 Jun 2023 14:21:13 +0000 (15:21 +0100)]
[AMDGPU] Regenerate llvm.amdgcn.s.buffer.load checks

16 months ago[GlobalISel][X86] Add handling of scalar G_UADDO/G_USUBO opcodes
Simon Pilgrim [Fri, 16 Jun 2023 14:15:20 +0000 (15:15 +0100)]
[GlobalISel][X86] Add handling of scalar G_UADDO/G_USUBO opcodes

This finally allows x86 globalisel to lower addition/subtraction of illegal types without fallback :)

16 months agoRevert "[lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows"
Saleem Abdulrasool [Fri, 16 Jun 2023 14:06:09 +0000 (07:06 -0700)]
Revert "[lit] Avoid os.path.realpath in lit.py due to MAX_PATH limitations on Windows"

This reverts commit c1cf459cbd79cc7d6ca834390649fb9185a4b237.

Reverting to permit time to explore the underlying issue.  This change
regressed the clang-PPC64-AIX and m68k-linux-cross builders.

Differential Revision: https://reviews.llvm.org/D153138
Reviewed By: compnerd

16 months ago[clang][Interp] Handle PredefinedExprs
Timm Bäder [Wed, 19 Apr 2023 06:49:21 +0000 (08:49 +0200)]
[clang][Interp] Handle PredefinedExprs

Differential Revision: https://reviews.llvm.org/D148689

16 months ago[CGP] Fix infinite loop in icmp operand swapping
Nikita Popov [Fri, 16 Jun 2023 13:47:39 +0000 (15:47 +0200)]
[CGP] Fix infinite loop in icmp operand swapping

Don't swap the operands if they're the same. Fixes the issue reported
at https://reviews.llvm.org/D152541#4427017.

16 months ago[libc++][NFC] Consistently qualify malloc and free calls with std::
Louis Dionne [Wed, 14 Jun 2023 21:05:00 +0000 (14:05 -0700)]
[libc++][NFC] Consistently qualify malloc and free calls with std::

16 months ago[libc++] Make libc++ and libc++abi's definitions of operator new be exact copies
Louis Dionne [Wed, 14 Jun 2023 20:59:45 +0000 (13:59 -0700)]
[libc++] Make libc++ and libc++abi's definitions of operator new be exact copies

This allows mechanically copying any changes made to `operator new`
from libc++ into libc++abi as-is. This is also a step towards
de-duplicating this code entirely.

Differential Revision: https://reviews.llvm.org/D153035

16 months ago[clang][Interp] Check inc/dec family of ops for initialization
Timm Bäder [Thu, 4 May 2023 13:31:24 +0000 (15:31 +0200)]
[clang][Interp] Check inc/dec family of ops for initialization

Differential Revision: https://reviews.llvm.org/D149846

16 months ago[OCaml] Rename link_modules' to link_modules
Alan Hu [Fri, 16 Jun 2023 00:56:39 +0000 (20:56 -0400)]
[OCaml] Rename link_modules' to link_modules

Commit 434e956 renamed link_modules to link_modules' for unclear reasons.
Based on the commit's diff, the author possibly intended to have two
functions, link_modules to bind to LLVMLinkModules and link_modules' to
bind to LLVMLinkModules2. However, there is only one function. link_modules'
appears in LLVM 3.8 onwards.

Differential Revision: https://reviews.llvm.org/D153090

16 months ago[clangd] Remove unused includes in IncludeCleaner.cpp, NFC
Haojian Wu [Fri, 16 Jun 2023 13:15:07 +0000 (15:15 +0200)]
[clangd] Remove unused includes in IncludeCleaner.cpp, NFC

16 months ago[InstCombine][AArch64] Fix phi insertion point
Nikita Popov [Fri, 16 Jun 2023 12:58:33 +0000 (14:58 +0200)]
[InstCombine][AArch64] Fix phi insertion point

Fix the issue reported at https://reviews.llvm.org/rG724f4a5bac25#inline-9083,
by specifying the correct insertion point for the new phi.

16 months ago[InstCombine] Regenerate test checks (NFC)
Nikita Popov [Fri, 16 Jun 2023 12:50:04 +0000 (14:50 +0200)]
[InstCombine] Regenerate test checks (NFC)

16 months ago[GlobalISel][X86] Add handling of scalar G_USUBE opcodes
Simon Pilgrim [Fri, 16 Jun 2023 12:31:50 +0000 (13:31 +0100)]
[GlobalISel][X86] Add handling of scalar G_USUBE opcodes

Extend the G_UADDE handling to also support G_USUBE

16 months ago[X86] Fix callee side of receiving byval args on the stack
Hans Wennborg [Thu, 15 Jun 2023 13:01:36 +0000 (15:01 +0200)]
[X86] Fix callee side of receiving byval args on the stack

See the discussion in
https://discourse.llvm.org/t/generic-llvm-ir-windows-x64-argument-passing-issue-in-llvm-11-0-0-and-later/71350

D51842 implemented byval lowering for Win64. D83175 made the call
lowering honor the "from now on treat this as a regular pointer" comment
also when the argument gets passed on the stack. However, it didn't
update the callee side.

Differential revision: https://reviews.llvm.org/D153020

16 months ago[clangd] Skip function parameter decls when evaluating variables on hover.
Viktoriia Bakalova [Thu, 15 Jun 2023 12:44:07 +0000 (12:44 +0000)]
[clangd] Skip function parameter decls when evaluating variables on hover.

Differential Revision: https://reviews.llvm.org/D153015

16 months ago[mlir][nvvm] Introduce `mbarrier.arrive`
Guray Ozen [Fri, 16 Jun 2023 11:52:29 +0000 (13:52 +0200)]
[mlir][nvvm] Introduce `mbarrier.arrive`

It introduces `mbarrier.arrive` that are in ptx78.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D153021

16 months ago[mlir][nvvm] Introduce `mbarrier.inval`
Guray Ozen [Fri, 16 Jun 2023 08:14:00 +0000 (10:14 +0200)]
[mlir][nvvm] Introduce `mbarrier.inval`

Introduce support for PTX's `mbarrier.inval` .

Contiunation of D151334

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D151338

16 months ago[mlir][nvvm] Implement `mbarrier.init`
Guray Ozen [Fri, 16 Jun 2023 08:03:30 +0000 (10:03 +0200)]
[mlir][nvvm] Implement `mbarrier.init`

NV GPUs provides split arrive/wait barriers that one can syncronize a subgroup of threads in CTA. It is particularly important for Hopper GPUs and allows tracking engines like TMA. See for more details:
https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-mbarrier

This initial implementation sets the foundation for future enhancements and additions.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D151334

16 months ago[MC] Use regunits instead of MCRegUnitIterator. NFC.
Jay Foad [Fri, 16 Jun 2023 10:01:29 +0000 (11:01 +0100)]
[MC] Use regunits instead of MCRegUnitIterator. NFC.

Differential Revision: https://reviews.llvm.org/D153122

16 months ago[bazel][mlir] Port 65305aeab99ad8ea09dd85e28a41c657152a08fb
Benjamin Kramer [Fri, 16 Jun 2023 11:20:32 +0000 (13:20 +0200)]
[bazel][mlir] Port 65305aeab99ad8ea09dd85e28a41c657152a08fb

16 months ago[CGTypes] Remove recursion protection
Nikita Popov [Thu, 15 Jun 2023 07:13:18 +0000 (09:13 +0200)]
[CGTypes] Remove recursion protection

With opaque pointers, it should no longer be necessary to protect
against recursion when converting Clang types to LLVM types, as
recursion can only be introduced via pointer types.

Differential Revision: https://reviews.llvm.org/D152999

16 months ago[lldb] Remove unused directive from test for D153043
Jaroslav Sevcik [Fri, 16 Jun 2023 10:35:41 +0000 (12:35 +0200)]
[lldb] Remove unused directive from test for D153043

16 months ago[GlobalISel][X86] Add s8/s16/s64 handling of G_UADDE opcodes
Simon Pilgrim [Fri, 16 Jun 2023 10:45:36 +0000 (11:45 +0100)]
[GlobalISel][X86] Add s8/s16/s64 handling of G_UADDE opcodes

16 months ago[Clang] Fix compare-record.c test on s390x (NFC)
Nikita Popov [Fri, 16 Jun 2023 10:41:23 +0000 (12:41 +0200)]
[Clang] Fix compare-record.c test on s390x (NFC)

s390x looks through pointers when determining the "externally
visible vector ABI". For that reason, the test shows different
behavior just on that platform.

Adjust the test in the reverse direction of what I originall did:
Make sure that the type behind the pointer is always queried, by
dereferencing the pointer.

16 months ago[AMDGPU] Regenerate a few checks
Jay Foad [Fri, 16 Jun 2023 10:38:56 +0000 (11:38 +0100)]
[AMDGPU] Regenerate a few checks

16 months ago[clang][Sema] Provide source range to several Wunused warnings
Takuya Shimizu [Fri, 16 Jun 2023 10:26:53 +0000 (19:26 +0900)]
[clang][Sema] Provide source range to several Wunused warnings

When the diagnosed function/variable is a template specialization, the source range covers the specialization arguments.
e.g.
```
warning: unused function 'func<int>' [-Wunused-function]
template <> int func<int> () {}
                ^~~~~~~~~
```
This comes in line with the printed text in the warning message. In the above case, `func<int>`

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D152707

16 months ago[gn build] Port f873029386dd
LLVM GN Syncbot [Fri, 16 Jun 2023 10:20:24 +0000 (10:20 +0000)]
[gn build] Port f873029386dd

16 months ago[BOLT] Add minimal RISC-V 64-bit support
Job Noorman [Fri, 16 Jun 2023 09:49:19 +0000 (11:49 +0200)]
[BOLT] Add minimal RISC-V 64-bit support

Just enough features are implemented to process a simple "hello world"
executable and produce something that still runs (including libc calls).
This was mainly a matter of implementing support for various
relocations. Currently, the following are handled:

- R_RISCV_JAL
- R_RISCV_CALL
- R_RISCV_CALL_PLT
- R_RISCV_BRANCH
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_GOT_HI20
- R_RISCV_PCREL_HI20
- R_RISCV_PCREL_LO12_I
- R_RISCV_RELAX
- R_RISCV_NONE

Executables linked with linker relaxation will probably fail to be
processed. BOLT relocates .text to a high address while leaving .plt at
its original (low) address. This causes PC-relative PLT calls that were
relaxed to a JAL to not fit their offset in an I-immediate anymore. This
is something that will be addressed in a later patch.

Changes to the BOLT core are relatively minor. Two things were tricky to
implement and needed slightly larger changes. I'll explain those below.

The R_RISCV_CALL(_PLT) relocation is put on the first instruction of a
AUIPC/JALR pair, the second does not get any relocation (unlike other
PCREL pairs). This causes issues with the combinations of the way BOLT
processes binaries and the RISC-V MC-layer handles relocations:
- BOLT reassembles instructions one by one and since the JALR doesn't
  have a relocation, it simply gets copied without modification;
- Even though the MC-layer handles R_RISCV_CALL properly (adjusts both
  the AUIPC and the JALR), it assumes the immediates of both
  instructions are 0 (to be able to or-in a new value). This will most
  likely not be the case for the JALR that got copied over.

To handle this difficulty without resorting to RISC-V-specific hacks in
the BOLT core, a new binary pass was added that searches for
AUIPC/JALR pairs and zeroes-out the immediate of the JALR.

A second difficulty was supporting ABS symbols. As far as I can tell,
ABS symbols were not handled at all, causing __global_pointer$ to break.
RewriteInstance::analyzeRelocation was updated to handle these
generically.

Tests are provided for all supported relocations. Note that in order to
test the correct handling of PLT entries, an ELF file produced by GCC
had to be used. While I tried to strip the YAML representation, it's
still quite large. Any suggestions on how to improve this would be
appreciated.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D145687

16 months ago[DWARFLinker][Reland] Handle DW_OP_GNU_push_tls_address while check for variable...
Alexey Lapshin [Thu, 15 Jun 2023 08:23:41 +0000 (10:23 +0200)]
[DWARFLinker][Reland] Handle DW_OP_GNU_push_tls_address while check for variable location.

The D147066 changed the way how DWARF location expressions are handled.
Now expressions are parsed and their operands are analysed. New handling
misses the DW_OP_GNU_push_tls_address extention. This patch adds handling
DW_OP_GNU_push_tls_address while checking for addresses.

Differential Revision: https://reviews.llvm.org/D153010

16 months ago[mlir][ArmSME] Insert intrinsics to enable/disable ZA
Cullen Rhodes [Fri, 16 Jun 2023 09:27:20 +0000 (09:27 +0000)]
[mlir][ArmSME] Insert intrinsics to enable/disable ZA

This patch adds two LLVM intrinsics to the ArmSME dialect:

  * llvm.aarch64.sme.za.enable
  * llvm.aarch64.sme.za.disable

for enabling the ZA storage array [1], as well as patterns for inserting
them during legalization to LLVM at the start and end of functions if
the function has the 'arm_za' attribute (D152695).

In the future ZA should probably be automatically enabled/disabled when
lowering from vector to SME, but this should be sufficient for now at
least until we have patterns lowering to SME instructions that use ZA.

N.B. The backend function attribute 'aarch64_pstate_za_new' can be used
manage ZA state (as was originally tried in D152694), but it emits calls
to the following SME support routines [2] for the lazy-save mechanism
[3]:

  * __arm_tpidr2_restore
  * __arm_tpidr2_save

These will soon be added to compiler-rt but there's currently no public
implementation, and using this attribute would introduce an MLIR
dependency on compiler-rt. Furthermore, this mechanism is for routines
with ZA enabled calling other routines with it also enabled. We can
choose not to enable ZA in the compiler when this is case.

Depends on D152695

[1] https://developer.arm.com/documentation/ddi0616/aa
[2] https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#sme-support-routines
[3] https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#the-za-lazy-saving-scheme

Reviewed By: awarzynski, dcaballe

Differential Revision: https://reviews.llvm.org/D153050

16 months agoRevert "[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable...
Alexey Lapshin [Fri, 16 Jun 2023 09:37:11 +0000 (11:37 +0200)]
Revert "[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location."

This reverts commit e89738451a3830d80fcf23554fd0b297bca60266.

16 months ago[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 15.
Ivan Kosarev [Fri, 16 Jun 2023 09:25:49 +0000 (10:25 +0100)]
[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 15.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D152908

16 months ago[mlir][ArmSME] Extend streaming-mode pass to support enabling ZA
Cullen Rhodes [Fri, 16 Jun 2023 09:14:53 +0000 (09:14 +0000)]
[mlir][ArmSME] Extend streaming-mode pass to support enabling ZA

This patch extends the 'enable-arm-streaming' pass with a new option to
enable the ZA storage array by adding the 'arm_za' attribute to
'func.func' ops.

A later patch will insert `llvm.aarch64.sme.za.enable` at the beginning
of 'func.func' ops and `llvm.aarch64.sme.za.disable` before
`func.return` statements when lowering to LLVM dialect.

Currently the pass only supports enabling ZA with streaming-mode on but
the SME LDR, STR and ZERO instructions can access ZA when not in
streaming-mode (section B1.1.1, IDGNQM [1]), so it may be worth making
these options independent in the future.

N.B. This patch is generally useful in the context of SME enablement in
MLIR, but it will help enable writing an integration test for rewrite
pattern that lowers `vector.transfer_write` -> `zero {za}` (D152508).

[1] https://developer.arm.com/documentation/ddi0616/aa

Reviewed By: awarzynski, dcaballe

Differential Revision: https://reviews.llvm.org/D152695

16 months ago[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.
Ivan Kosarev [Fri, 16 Jun 2023 09:07:50 +0000 (10:07 +0100)]
[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 11.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D152904

16 months ago[RISCV][NFC] Simplify code.
Jianjian GUAN [Fri, 16 Jun 2023 02:09:22 +0000 (10:09 +0800)]
[RISCV][NFC] Simplify code.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D153095

16 months ago[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.
Alexey Lapshin [Thu, 15 Jun 2023 08:23:41 +0000 (10:23 +0200)]
[DWARFLinker] Handle DW_OP_GNU_push_tls_address while check for variable location.

The D147066 changed the way how DWARF location expressions are handled.
Now expressions are parsed and their operands are analysed. New handling
misses the DW_OP_GNU_push_tls_address extention. This patch adds handling
DW_OP_GNU_push_tls_address while checking for addresses.

Differential Revision: https://reviews.llvm.org/D153010

16 months ago[mlir][llvm] Add memcpy support for mem2reg/sroa.
Théo Degioanni [Fri, 16 Jun 2023 08:34:59 +0000 (08:34 +0000)]
[mlir][llvm] Add memcpy support for mem2reg/sroa.

This revision introduces SROA and mem2reg support for the family of
memcpy-like intrinsics (memcpy, memcpy.inline and memmove).

The mem2reg implementation transforms memcpys of full types into loads
and store. Memcpy between two promotable slots always disappear.

The SROA implementation transforms memcpys of *entire* aggregate types
into memcpys of all of their fields.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D152898

16 months ago[LoongArch] Some cleanup and readability improvements to LoongArchISelLowering.cpp...
Weining Lu [Fri, 16 Jun 2023 01:08:26 +0000 (09:08 +0800)]
[LoongArch] Some cleanup and readability improvements to LoongArchISelLowering.cpp, NFC

16 months ago[include-cleaner] Reorder SymbolReference fields to avoid padding space, NFC
Haojian Wu [Thu, 15 Jun 2023 13:38:03 +0000 (15:38 +0200)]
[include-cleaner] Reorder SymbolReference fields to avoid padding space, NFC

This will bring down the size from 40 bytes to 32 bytes.

Differential Revision: https://reviews.llvm.org/D153018

16 months ago[clang][Interp] Handle LambdaExprs
Timm Bäder [Tue, 14 Mar 2023 10:08:16 +0000 (11:08 +0100)]
[clang][Interp] Handle LambdaExprs

Differential Revision: https://reviews.llvm.org/D146030

16 months ago[llvm-exegesis] Use MCJIT only for execution
Pavel Kosov [Thu, 8 Jun 2023 16:14:00 +0000 (19:14 +0300)]
[llvm-exegesis] Use MCJIT only for execution

Initially, llvm-exegesis was generating the benchmark code for the
host CPU to execute it inside its own process. Thus, MCJIT was reused
for fetching function's bytes to fill the assembled_snippet field in
the benchmark report.

Later, the --mtriple and --benchmark-phase command line options were
introduced that are handy for testing snippet generation even if
snippet execution is not possible. In that setup, MCJIT is asked to
parse an object file for a foreign CPU or operating system that is
probably not guaranteed to succeed and was actually observed to fail
in https://reviews.llvm.org/D145763.

This commit implements a much simplified function's code fetching,
assuming the benchmark function is the only function in the object file
and it spans across the entire text section (note that MCJIT-based code
has more or less the same assumption - see TrackingSectionMemoryManager
class).

~~~

Huawei RRI, OS Lab

Reviewed By: courbet

Differential Revision: https://reviews.llvm.org/D148921

16 months ago[clang] Don't create import decls without -fmodules
Kadir Cetinkaya [Fri, 26 May 2023 21:14:41 +0000 (23:14 +0200)]
[clang] Don't create import decls without -fmodules

When modules are disabled, there's no loaded module for these import
decls to point at. This results in crashes when there are modulemap
files but no -fmodules flag (this configuration is used for layering
check violations).

This patch makes sure import declarations are introduced only when
modules are enabled, which makes this case similar to textual headers
(no import decls are created for #include of textual headers from a
modulemap).

Differential Revision: https://reviews.llvm.org/D152274

16 months ago[RISCV] Fix spelling Compess->Compress. Fix 80 columns. NFC
Craig Topper [Fri, 16 Jun 2023 07:02:15 +0000 (00:02 -0700)]
[RISCV] Fix spelling Compess->Compress. Fix 80 columns. NFC

16 months agoRemove clang/ModuleInfo.txt
Jonas Hahnfeld [Thu, 15 Jun 2023 07:39:20 +0000 (09:39 +0200)]
Remove clang/ModuleInfo.txt

The script build-for-llvm-top.sh and LLVM's ModuleInfo.txt are gone
since a long time (commit d20ea7dc59 in November 2011), and llvm-top
itself has even been removed from llvm-archive (it can be found here:
https://github.com/llvm/llvm-archive/tree/cab7f8f160f0bd8d20d9a4036aa4083f2bc2740a/llvm-top
) so delete Clang's ModuleInfo.txt as well.

Differential Revision: https://reviews.llvm.org/D152995

16 months agoRevert "[lldb] Rate limit progress reports -- different approach [WIP-ish]"
Pavel Labath [Fri, 16 Jun 2023 07:09:41 +0000 (09:09 +0200)]
Revert "[lldb] Rate limit progress reports -- different approach [WIP-ish]"

This reverts commit c30853460da7446f92bc1e516f9cbe2c5df6e136, which I
pushed accidentally -- sorry.

16 months ago[lldb] Fix MainLoopTest for changes in D152712
Pavel Labath [Fri, 16 Jun 2023 07:05:27 +0000 (09:05 +0200)]
[lldb] Fix MainLoopTest for changes in D152712

16 months ago[lldb] Rate limit progress reports -- different approach [WIP-ish]
Pavel Labath [Wed, 7 Jun 2023 09:52:45 +0000 (11:52 +0200)]
[lldb] Rate limit progress reports -- different approach [WIP-ish]

Have the Progress class spawn a thread to periodically send progress
reports.

The reporting period could be made configurable, but for now I've
hardcoded it to 100ms. (This is the main WIP part)

It could be argued that creating a thread for progress reporting adds
overhead, but I would counter that by saying "If the task is so fast
that creating a thread noticably slows it down, then it really doesn't
need progress reporting".

For me, this speeds up DWARF indexing by about 1.5% (which is only
slightly above the error bars), but I expect it will have a much bigger
impact in situations where printing a single progress update takes a
nontrivial amount of time.

Differential Revision: https://reviews.llvm.org/D152364

16 months ago[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation
Fangrui Song [Fri, 16 Jun 2023 06:26:25 +0000 (23:26 -0700)]
[RISCV] relaxDwarfCallFrameFragment: remove unneeded relocations for relaxation

If `evaluateAsAbsolute(Value, Layout.getAssembler())` returns true, we
know the address delta is a constant and can suppress relocations
(usually SET6/SUB6).

While here, replace two evaluateKnownAbsolute calls (subtle; avoid if possible)
with evaluateAsAbsolute.

16 months ago[lldb] Fix handling of cfi_restore in the unwinder
Jaroslav Sevcik [Thu, 15 Jun 2023 16:10:25 +0000 (18:10 +0200)]
[lldb] Fix handling of cfi_restore in the unwinder

Currently, lldb's unwinder ignores cfi_restore opcodes for registers
that are not set in the first row of the unwinding info. This prevents
unwinding of failed assertion in Chrome/v8 (https://github.com/v8/v8).
The attached test is an x64 copy of v8's function that failed to unwind
correctly (V8_Fatal).

This patch changes handling of cfi_restore to reset the location if
the first unwind table row does not map the restored register.

Differential Revision: https://reviews.llvm.org/D153043

16 months ago[LICM] Sunk instructions with invalid source location.
Carlos Alberto Enciso [Fri, 16 Jun 2023 05:19:45 +0000 (06:19 +0100)]
[LICM] Sunk instructions with invalid source location.

Building the given test case with 'clang -O2 -g' the call to
'getInOrder' is sunk out of the loop by LICM, but the source
location is not dropped.

Reviewed By: aprantl, fdeazeve

Differential Revision: https://reviews.llvm.org/D152691

16 months ago[AIX][tests] Temporarily disable test index-with-module.m
Jake Egan [Fri, 16 Jun 2023 05:22:21 +0000 (01:22 -0400)]
[AIX][tests] Temporarily disable test index-with-module.m

This test is failing on AIX due to patch D151938. Disable it for now to get the bot green while we investigate.

16 months ago[CGP] Additional tests for removing operand of assume. NFC.
Serguei Katkov [Fri, 16 Jun 2023 04:12:53 +0000 (11:12 +0700)]
[CGP] Additional tests for removing operand of assume. NFC.

16 months ago[AIX] Disable test for missing DWARF section
Jake Egan [Fri, 16 Jun 2023 04:32:26 +0000 (00:32 -0400)]
[AIX] Disable test for missing DWARF section

This new test is failing on AIX due to an unsupported DWARF section, so disable it (same rationale as patch D111336).

16 months ago[lldb][TerminalTest] Fix assertion failure
Kazuki Sakamoto [Fri, 16 Jun 2023 00:33:36 +0000 (17:33 -0700)]
[lldb][TerminalTest] Fix assertion failure

D152712 replaced `llvm::sys::RetryAfterSignal(-1, ::open)` with
`FileSystem::Instance().Open` for bionic in PseudoTerminal::OpenSecondary, and
FileSystem::Instance() is failing with assertion on arm Linux.

The assertion should be FileSystem re-initialization check, therefore the
hypothesis is that TerminalTest tests are initializing FileSystem instance
repeatedly.

Use SubsystemRAII<FileSystem> to ensure tearing down the FileSystem instance.

Differential Revision: https://reviews.llvm.org/D153091

16 months ago[MC][test] Add some label difference tests
Fangrui Song [Fri, 16 Jun 2023 03:40:14 +0000 (20:40 -0700)]
[MC][test] Add some label difference tests

16 months ago[RegAlloc] Simplify RegAllocEvictionAdvisor::canReassign (NFC)
Sergei Barannikov [Mon, 12 Jun 2023 02:03:21 +0000 (05:03 +0300)]
[RegAlloc] Simplify RegAllocEvictionAdvisor::canReassign (NFC)

Use range-based for loops.
The return type has been changed to bool because the method is only
used in boolean contexts.

Reviewed By: mtrofin

Differential Revision: https://reviews.llvm.org/D152665

16 months ago[MC] Add MCRegisterInfo::regunits for iteration over register units
Sergei Barannikov [Sun, 21 May 2023 01:28:33 +0000 (04:28 +0300)]
[MC] Add MCRegisterInfo::regunits for iteration over register units

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098

16 months ago[MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator
Sergei Barannikov [Sun, 11 Jun 2023 19:32:23 +0000 (22:32 +0300)]
[MC] Merge MC[Sub,Super]RegIterator with mc_[sub,super]_reg_iterator

Turn MC*RegIterator into fully qualified iterators by deriving them from
iterator_adaptor_base. This makes mc_*_reg iterators redundant.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D152655

16 months ago[DAG] Unroll opereand when its type is illegal for ldexp.
tianleli [Fri, 16 Jun 2023 01:15:43 +0000 (09:15 +0800)]
[DAG] Unroll opereand when its type is illegal for ldexp.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D152997

16 months agoRevert "[CodeGen] Disable default copy ctor and copy assignment operator for class...
Bing1 Yu [Fri, 16 Jun 2023 01:42:36 +0000 (09:42 +0800)]
Revert "[CodeGen] Disable default copy ctor and copy assignment operator for class Array"

This reverts commit 466678b5202052dcd38fdfc3f764fb5d5de7c34b.

16 months ago[MC] Improve .subsection diagnostic
Fangrui Song [Fri, 16 Jun 2023 01:35:51 +0000 (18:35 -0700)]
[MC] Improve .subsection diagnostic

16 months agolldb [NFC] Add logging to Process when address masks are updated
Jason Molenda [Fri, 16 Jun 2023 00:37:42 +0000 (17:37 -0700)]
lldb [NFC] Add logging to Process when address masks are updated

To aid in integration testing/debugging. Verifying that the address
mask/addressable bits values from different sources are correctly
registered by lldb.

16 months ago[mlir][doc] Fix the layout of the table for the tosa.cast permissible operations
Kai Sasaki [Thu, 15 Jun 2023 23:59:31 +0000 (08:59 +0900)]
[mlir][doc] Fix the layout of the table for the tosa.cast permissible operations

We can make the table for the `tosa.cast` permissible operations readable by utilizing the markdown table format.

{F27924602}

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D152992

16 months ago[mlir][sparse] enhance element-wise fusion heuristics
Aart Bik [Thu, 15 Jun 2023 21:10:24 +0000 (14:10 -0700)]
[mlir][sparse] enhance element-wise fusion heuristics

We prevent merging a sparse-in/dense-out with dense-in
kernels because the result is usuall not sparsifiable.
Dense kernels and sparse kernels are still fused, obviously.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D153077

16 months ago[mlir][sparse][gpu] recognizing sddmm pattern in GPU libgen path
Kun Wu [Thu, 15 Jun 2023 23:48:06 +0000 (23:48 +0000)]
[mlir][sparse][gpu] recognizing sddmm pattern in GPU libgen path

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D151582

16 months ago[scudo] Disable OddEvenTags by default.
Evgenii Stepanov [Wed, 14 Jun 2023 23:58:20 +0000 (16:58 -0700)]
[scudo] Disable OddEvenTags by default.

Scudo has zero-tagged headers between any two allocation that will catch
a linear buffer overflow of up to 16 bytes. OddEvenTags extends this
guarantee to one chunk of the given SizeClass at the cost of the reduced
entropy for all heap tags (i.e. lower chance to catch use-after-free and
large overflows).

Given that the first 16 bytes are already deterministic, I feel this is
a bad tradeoff.

Differential Revision: https://reviews.llvm.org/D152984

16 months ago[compiler-rt] Go back to using the 32-bit allocator for Fuchsia+RISCV64
Leonard Chan [Thu, 15 Jun 2023 23:14:05 +0000 (23:14 +0000)]
[compiler-rt] Go back to using the 32-bit allocator for Fuchsia+RISCV64

Due to logic in the 64-bit allocator, the smallest allocation we can
zx_vmar_allocate is 2^37 bytes, but this is too large to allocate for
the standalone lsan allocator on a 39-bit VMA. This leads to the
zx_vmar_allocate call when initially setting up the allocator to fail.
This is similar to what android experiences on a 64-bit system with a
small vma. (See sanitizer_allocator_test.cpp).

This effectively reverts f6c4808d95221a5838e14474d95c6fe85bb1488a and
has Fuchsia use the 32-bit allocator for RISCV.

16 months ago[Sanitizers] Remove unused parameter from COMMON_INTERCEPTOR_MUNMAP_IMPL
Kirill Stoimenov [Thu, 15 Jun 2023 22:59:37 +0000 (22:59 +0000)]
[Sanitizers] Remove unused parameter from COMMON_INTERCEPTOR_MUNMAP_IMPL

This was a result of copy/paste from the MMAP interceptor which uses the parameter to swtich between mmap and mmap64.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D152980

16 months ago[MC] Remove unneeded special cases from AttemptToFoldSymbolOffsetDifference
Fangrui Song [Thu, 15 Jun 2023 23:12:10 +0000 (16:12 -0700)]
[MC] Remove unneeded special cases from AttemptToFoldSymbolOffsetDifference

16 months ago[scudo] Do not compile timing.cpp if LLVM_LIBC_INCLUDE_SCUDO=on
Alfred Persson Forsberg [Thu, 15 Jun 2023 23:08:57 +0000 (00:08 +0100)]
[scudo] Do not compile timing.cpp if LLVM_LIBC_INCLUDE_SCUDO=on

Temporary hack until LLVM libc supports inttypes.h print format macros

timing.h uses the PRId64 macro which is not included in llvm libc yet

Bug: https://github.com/llvm/llvm-project/issues/63317

Reviewed By: michaelrj, thesamesam, Chia-hungDuan

Differential Revision: https://reviews.llvm.org/D152979

16 months ago[CGCall] Prune ArgStruct [-Wunused-variable]
NAKAMURA Takumi [Thu, 15 Jun 2023 23:00:00 +0000 (08:00 +0900)]
[CGCall] Prune ArgStruct [-Wunused-variable]

It has been unused since b92ccc355acb

16 months agoReland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported...
Vladislav Dzhidzhoev [Thu, 15 Jun 2023 10:22:16 +0000 (12:22 +0200)]
Reland "[DebugMetadata][DwarfDebug] Fix DWARF emisson of function-local imported entities (3/7)"

Got rid of non-determinism in MetadataLoader.cpp.

Authored-by: Kristina Bessonova <kbessonova@accesssoftek.com>
Differential Revision: https://reviews.llvm.org/D144004

16 months agoAdd a fatal error for debug builds when disagreement about stepping
Jason Molenda [Thu, 15 Jun 2023 22:39:01 +0000 (15:39 -0700)]
Add a fatal error for debug builds when disagreement about stepping

On one CI bot we're seeing a failure where the kernel reports that
we have completed an instruction step (via a mach exception) and
lldb doesn't think the thread was doing an instruction step.  It
takes the conservative approach of stopping at this point, breaking
tests.

This patch adds an llvm fatal error for debug builds where it will
log the state of the thread and the AArch64 ESR, to confirm what
the hardware reported as the exception so we can double check the
kernel's interpretation.

I'll change this to an lldbassert without the runtime details in
the string once we have an idea what is happening.  the hope is
that this will get hit on the CI bot soon.

Differential Revision: https://reviews.llvm.org/D153079

16 months ago[scudo] Group MappedUser/AllocatedUser into PagesInfo (NFC)
Chia-hung Duan [Thu, 8 Jun 2023 03:20:52 +0000 (03:20 +0000)]
[scudo] Group MappedUser/AllocatedUser into PagesInfo (NFC)

Create a new PagesInfo to contain all the information about pages. This
is the preparation of adding new lock for page operations.

Note that primary32 hasn't switched to MemMap. Will add PagesInfo later
when we move to MemMap in primary32.

Differential Revision: https://reviews.llvm.org/D149142

16 months ago[scudo] Group poppedBlocks/pushedBlocks into BlocksInfo (NFC)
Chia-hung Duan [Thu, 8 Jun 2023 03:20:40 +0000 (03:20 +0000)]
[scudo] Group poppedBlocks/pushedBlocks into BlocksInfo (NFC)

Create a new BlocksInfo to contain a list of blocks, poppedBlocks and
pushedBlocks. This is the preparation of adding new lock for operations
on freelist.

Differential Revision: https://reviews.llvm.org/D149143

16 months ago[llvm-cov] Normalize paths by removing dots
Oleksii Odynochenko [Thu, 15 Jun 2023 20:52:22 +0000 (13:52 -0700)]
[llvm-cov] Normalize paths by removing dots

We were producing inconsistent results when a file appeared multiple
times in gcno/gcda files if the instances had differing relative paths.

This patch unifies filenames, so coverage results are merged.

Patch by Oleksii Odynochenko. Thanks!

Differential Revision: https://reviews.llvm.org/D152453

16 months ago[RISCV] Prevent vsetvli insertion from deleting some vsetvli instructions
Craig Topper [Thu, 15 Jun 2023 22:18:47 +0000 (15:18 -0700)]
[RISCV] Prevent vsetvli insertion from deleting some vsetvli instructions

If the result register is used, it is not safe to delete.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D153076

16 months ago[MC] Remove unneeded isUndefined() for isSymbolRefDifferenceFullyResolved. NFC
Fangrui Song [Thu, 15 Jun 2023 22:07:04 +0000 (15:07 -0700)]
[MC] Remove unneeded isUndefined() for isSymbolRefDifferenceFullyResolved. NFC

The only caller `AttemptToFoldSymbolOffsetDifference` has performed the same
checks.

16 months ago[lldb][NFCI] Remove use of ConstString from IOHandler
Alex Langford [Fri, 26 May 2023 22:50:26 +0000 (15:50 -0700)]
[lldb][NFCI] Remove use of ConstString from IOHandler

None of these need to be in the ConstString StringPool. For the most
part they are constant strings and do not require fast comparisons.

I did change IOHandlerDelegateMultiline slightly -- specifically, the
`m_end_line` member always has a `\n` at the end of it now. This was so
that `IOHandlerGetControlSequence` can always return a StringRef. This
did require a slight change to `IOHandlerIsInputComplete` where we must
drop the newline before comparing it against the input parameter.

Differential Revision: https://reviews.llvm.org/D151597

16 months ago[lldb] Symtab::SectionFileAddressesChanged should clear the file address map instead...
Alex Langford [Fri, 9 Jun 2023 19:31:56 +0000 (12:31 -0700)]
[lldb] Symtab::SectionFileAddressesChanged should clear the file address map instead of name map

Currently, `SectionFileAddressesChanged` clears out the `name_to_index`
map and sets `m_file_addr_to_index_compute` to false. This is strange,
as these two fields are used for different purposes. What we should be
doing is clearing the file address to index mapping.

There are 2 bugs here:
1. If we call SectionFileAddressesChanged after the name indexes have
   been computed, we end up with an empty name to index map, so lookups
   will fail. This doesn't happen today because we don't initialize the
   name indexes before calling this, but this is a refactor away from
   failing in this way.
2. Because we don't clear `m_file_addr_to_index` but still set it's
   computed flag to false, it ends up with twice the amount of
   information. One entry will be correct (since it was recalculated),
   one entry will be outdated.

rdar://110192434

Differential Revision: https://reviews.llvm.org/D152579

16 months ago[GlobalISel][X86] Add i128 add/sub test coverage for narrowing on x86_64 triples
Simon Pilgrim [Thu, 15 Jun 2023 21:40:42 +0000 (22:40 +0100)]
[GlobalISel][X86] Add i128 add/sub test coverage for narrowing on x86_64 triples

16 months ago[GlobalIsel][X86] Avoid IMPLICIT_DEF in irregular types for CTTZ/CTLZ legalization...
Simon Pilgrim [Thu, 15 Jun 2023 19:06:58 +0000 (20:06 +0100)]
[GlobalIsel][X86] Avoid IMPLICIT_DEF in irregular types for CTTZ/CTLZ legalization tests

IMPLICIT_DEF can lead to some pretty weird G_UNMERGE_VALUES of long lists of s1 values, try to use a real source value instead

16 months ago[CUDA] Updated CUDA versions mentioned in CompileCudaWithLLVM.rst
Artem Belevich [Thu, 15 Jun 2023 21:26:21 +0000 (14:26 -0700)]
[CUDA] Updated CUDA versions mentioned in CompileCudaWithLLVM.rst

16 months ago[lldb][Android] Use a lambda for calls to ::open in RetryAfterSignal
Kazuki Sakamoto [Mon, 12 Jun 2023 15:30:45 +0000 (08:30 -0700)]
[lldb][Android] Use a lambda for calls to ::open in RetryAfterSignal

lldb-server for Android does not build with NDK r21 and above due to
RetryAfterSignal and Bionic ::open mismatch.
https://github.com/llvm/llvm-project/issues/54727

Apply the LLVM patch to LLDB.
https://github.com/llvm/llvm-project/commit/0a0e411204a2baa520fd73a8d69b664f98b428ba

> In Bionic, open can be overloaded for _FORTIFY_SOURCE support, causing
> compile errors of RetryAfterSignal due to overload resolution. Wrapping
> the call in a lambda avoids this.

Differential Revision: https://reviews.llvm.org/D152712

16 months ago[SimplifyCFG] Add textual pass params for FoldTwoEntryPHINode and SimplifyCondBranch
Arthur Eubanks [Thu, 15 Jun 2023 21:06:15 +0000 (14:06 -0700)]
[SimplifyCFG] Add textual pass params for FoldTwoEntryPHINode and SimplifyCondBranch

16 months ago[RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive...
Philip Reames [Thu, 15 Jun 2023 21:00:57 +0000 (14:00 -0700)]
[RISCV][InsertVSETVLI] Treat vmv.v.i as-if it were vmv.s.x when VL=1, and inactive lanes are undefined

A vmv.v.i/x splats the immediate to all active lanes. For the active lanes, this is the same as vmv.s.x which inserts one scalar into the low lane. If we can ignore all the inactive lanes (because they are known undefined), then the two are semantically equivalent. We already reason about compatible VL/VTYPE combinations for vmv.s.x, apply the same logic to vmv.v.i.

Unlike a vmv.s.x, we do need to be careful not to increase LMUL. A splat instruction is probably linear in LMUL, so restrict this to LMUL1.

Differential Revision: https://reviews.llvm.org/D152845

16 months ago[mlir][sparse] using stable_sort to make sure the compiled code are consistent betwee...
Peiming Liu [Thu, 15 Jun 2023 21:04:46 +0000 (21:04 +0000)]
[mlir][sparse] using stable_sort to make sure the compiled code are consistent between different builds configuration

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D153074

16 months ago[mlir][sparse] proper in-place SDDMM with spy function
Aart Bik [Wed, 14 Jun 2023 22:18:00 +0000 (15:18 -0700)]
[mlir][sparse] proper in-place SDDMM with spy function

This specific operation matches the cuSPARSE SDDMM semantics exactly.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D152969