Dan Murphy [Thu, 11 Jul 2013 18:10:27 +0000 (13:10 -0500)]
gpio: tca642x: Add the tca642x gpio expander driver
Add the tca642x gpio expander driver
Datasheet:
http://www.ti.com/product/tca6424a
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Justin Waters [Thu, 11 Jul 2013 13:55:03 +0000 (09:55 -0400)]
am335x_evm: Add am335x_boneblack variant
The BeagleBone Black differs from the other AM335x boards in a few
significant ways, so it makes sense to create a custom configuration
for it. In particular, it uses eMMC instead of NAND flash.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Justin Waters [Thu, 11 Jul 2013 13:55:02 +0000 (09:55 -0400)]
am335x_evm: Add support for eMMC environment
Some boards, such as the BeagleBone Black, have an eMMC chip intstead
of NAND. We can use the eMMC boot partition to store the environment,
since it isn't used for anything else. This allows us to have a
configurable environment on those boards.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Justin Waters [Thu, 11 Jul 2013 13:55:01 +0000 (09:55 -0400)]
Add additional MLO images to .gitignore
This rule catches images such as MLO.byteswap
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Justin Waters [Thu, 11 Jul 2013 13:55:00 +0000 (09:55 -0400)]
am335x_evm: Rework bootcmd to handle two MMC devs
The BeagleBone Black can boot from either the MMC card
or eMMC chip on board. We should try both interfaces.
This modification also allows a graceful fallback if
a device exists but boot images are not present on it.
Changes for v2:
* Fix boot partition - it should always show up as mmcblk0p2
* Fix missing FDT load
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Justin Waters [Thu, 11 Jul 2013 13:54:59 +0000 (09:54 -0400)]
am335x_evm: Add command line editing
Many modern U-Boot ports enable command line editing and
a history buffer. The am335x_evm configuration is fairly
comprehensive as it is, so a few extra kb should not be
noticable, and it adds a very convenient feature.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Justin Waters [Thu, 11 Jul 2013 13:54:58 +0000 (09:54 -0400)]
am335x_evm: Make NAND support modular
Give the user the ability to disable NAND support by defining
CONFIG_NO_NAND. This will allow custom hardware to easily support
this configuration.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
[trini: Make apply on top of other series]
Signed-off-by: Tom Rini <trini@ti.com>
Heiko Schocher [Tue, 23 Jul 2013 13:32:36 +0000 (15:32 +0200)]
net, phy, cpsw: fix gigabit register access
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:13:05 +0000 (15:13 -0400)]
board/ti/am335x/README: Document NOR programming
The Beaglebone White may be populated with a memory cape that has a NOR
module. Document how to program it.
Signed-off-by: Tom Rini <trini@ti.com>
Steve Kipisz [Thu, 18 Jul 2013 19:13:04 +0000 (15:13 -0400)]
am335x_evm: Add support to boot from NOR.
NOR requires that s_init be within the first 4KiB of the image so that
we can perform the rest of the required pinmuxing to talk with the rest
of NOR that we are found on. When NOR_BOOT is set we save our
environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid
using SPL for this case and u-boot.bin is written directly to the start
of NOR.
We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c
with TI81xx checks as at this time U-Boot does not discard unused
sections in the main build and this code relies on functions specific to
(and only provided in) ti81xx-related code.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Steve Kipisz [Thu, 18 Jul 2013 19:13:03 +0000 (15:13 -0400)]
am335x_evm: Add support for the NOR module on the memory cape
This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Clean up config changes slightly]
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:13:02 +0000 (15:13 -0400)]
am33xx: Correct gpmc_cfg->irqstatus/enable
Based on our usage of the GPMC, either with NOR or NAND we do not need
to be setting the irqstatus or irqenable bits and should clear them like
we have historically.
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:13:01 +0000 (15:13 -0400)]
am335x_evm: Rework board_is_foo() checks
We rework the various board_is_foo() checks to take a pointer to
struct am335x_baseboard_id rather than using a local copy in board.c.
This allows us to make use of the same checks in mux.c as well as fixing
problems when this code could be running from read-only memory.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:12:59 +0000 (15:12 -0400)]
am335x_evm: Update SPI_BOOT support, add MTDPARTS info
- Style cleanup (# define -> #define)
- Due to ROM issues, redudant loading isn't feasible, so drop.
- Given extra space, increase max size of U-Boot to 512KiB
- Correct env size to match usage (we had not re-defined ENV_SIZE).
- Given extra space, keep env size as 128KiB, add redundant environment.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 18 Jul 2013 19:12:58 +0000 (15:12 -0400)]
am335x_evm: Drop useless CONFIG_ENV_IS_NOWHERE
We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define
of NOWHERE.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Wed, 17 Jul 2013 16:24:30 +0000 (12:24 -0400)]
board/ti/am335x/README: Document NAND programming
The AM335x GP EVM ships with NAND. Document programming of the chip
including the redundant locations that the ROM will check.
Signed-off-by: Tom Rini <trini@ti.com>
Nishanth Menon [Mon, 15 Jul 2013 12:11:33 +0000 (07:11 -0500)]
omap3_beagle: support booting from zImage and device tree as last option
If no other bootoption works, try loading up device tree and zImage.
This is selected as the last option to allow backward compatibility as
well as support the recent trend in moving kernel boot to using zImage
and device tree.
NOTE: if uImage is present in bootpart, it will try this first and
will assume this is to be booted with bootm (so may be concatenated
image or plain vanilla ATAG MACHINE_ID based image)
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Mon, 15 Jul 2013 12:11:32 +0000 (07:11 -0500)]
omap3_beagle: support findfdt and loadfdt for devicetree support
For folks not using concatenated device tree with uImage, having
an handy function to find and load device tree is very handy.
So introduce findfdt and loadfdt and run findfdt by default to make
it easier on user scripts.
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Mon, 15 Jul 2013 12:11:31 +0000 (07:11 -0500)]
omap3_beagle: enable CMD_FS_GENERIC and simplify load of image/ramdisk
CMD_FS_GENERIC allows us to simplify where we load up our image from
either from ext2/fat etc. So, lets use that instead of cumbersome
options we currently use. Sticking with existing conventions,
defaults will be:
ramdisk=ramdisk.gz
bootpart=0:2 (second partition)
bootdir=/boot (/boot in second partition)
This matches with the default behavior, these can be overriden by
env files as needed.
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Mon, 15 Jul 2013 12:11:30 +0000 (07:11 -0500)]
beagleboard: remove RevB support for BeagleBoard Xm
As reported in http://marc.info/?l=u-boot&m=
137358037827735&w=2
There is no need for the "xMB" variant, as the gpio pins used for
identification where never changed from the xMA when the newer silcon
was used for the xMB, So rename XM A revision as AB revision
and report accordingly
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Mon, 15 Jul 2013 12:11:29 +0000 (07:11 -0500)]
omap3_beagle: replace uImage.beagle with generic uImage
e682930867f7dfc4a01784fe452fad9e962d65a
(BeagleBoard: config: use uImage.beagle for tftp)
Introduced uImage.beagle which does not happen to be default output
file of Linux kernel build make uImage (output is uImage).
So, replace uImage.beagle with uImage
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Mon, 15 Jul 2013 12:11:28 +0000 (07:11 -0500)]
omap3_beagle: remove JFFS2 support.
We do not use JFFS2 by default and it conflicts with
CONFIG_CMD_FS_GENERIC (ls command is the same). Since most of our
BOOTCMD can be simplified by using the FS_GENERIC, dropping JFFS2
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
Mugunthan V N [Mon, 8 Jul 2013 10:34:43 +0000 (16:04 +0530)]
ARM: DRA7xx: Enable CPSW Ethernet support
Enabling CPSW Ethernet support in DRA7xx EVM.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 8 Jul 2013 10:34:42 +0000 (16:04 +0530)]
ARM: DRA7xx: Add CPSW and MDIO pinmux support
Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 8 Jul 2013 10:34:41 +0000 (16:04 +0530)]
ARM: DRA7xx: Add CPSW support to DRA7xx EVM
Adding support for CPSW Ethernet support found in DRA7xx EVM
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 8 Jul 2013 10:34:40 +0000 (16:04 +0530)]
ARM: DRA7xx: Enable GMAC clock control
Enabling CPSW module by enabling GMAC clock control
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Lokesh Vutla [Mon, 8 Jul 2013 10:34:39 +0000 (16:04 +0530)]
ARM: DRA7xx: Lock DPLL_GMAC
Locking DPLL_GMAC
[mugunthanvnm@ti.com:Configure only if CPSW is selected]
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 8 Jul 2013 10:34:38 +0000 (16:04 +0530)]
drivers: net: cpsw: Enable statistics for all port
Enable hardware statistics for all ports, enabling only to host port is useless
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 8 Jul 2013 10:34:37 +0000 (16:04 +0530)]
drivers: net: cpsw: remove hard coding bd ram for cpsw
BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Tom Rini [Mon, 8 Jul 2013 16:15:18 +0000 (12:15 -0400)]
am335x_evm: Add basic README
Add a README for the family of boards the am335x_evm covers, and include
instructions on preparing and using falcon mode, for various media.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tom Rini [Mon, 8 Jul 2013 16:15:17 +0000 (12:15 -0400)]
am335x_evm: Correct CONFIG_CMD_SPL_WRITE_SIZE
We use CONFIG_CMD_SPL_WRITE_SIZE when reading/writing the args portion
of falcon mode to NAND. Previously it was half the size of the
eraseblock which is too small, increase to eraseblock size.
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Mon, 8 Jul 2013 16:15:16 +0000 (12:15 -0400)]
am335x_evm: Update eMMC falcon mode locations
The previous location used for the "args" portion of falcon mode was too
small to allow for a device tree to be saved there, so move the location
slightly and increase the size. In addition, our previous kernel
location was part of the area we set aside for U-Boot itself, so move it
up a bit higher.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Tom Rini [Mon, 8 Jul 2013 16:15:15 +0000 (12:15 -0400)]
am335x_evm: Correct DFU ALT settings for falcon mode
Now that we have falcon mode enabled, the partiton numbers for NAND have
changed, and we need to list entries for updating these parts of the
system. While adding falcon mode entires for eMMC (raw), we round up
the limit on U-Boot for ease of math later.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Tom Rini [Mon, 8 Jul 2013 16:15:14 +0000 (12:15 -0400)]
README.falcon: Note how we determine if we can boot the OS or not
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
Andreas Bießmann [Mon, 8 Jul 2013 13:21:34 +0000 (15:21 +0200)]
omap3/sys_info: fix printout of OMAP36XX L3 freqency
The OMAP36xx/OMAP37xx family uses L3 frequency of 200MHz instead of 165MHz
used by OMAP34xx/OMAP35xx.
Also fix checkpatch warning about alignment.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tom Rini [Fri, 28 Jun 2013 18:43:01 +0000 (14:43 -0400)]
spl_mmc.c: Detect missing kernel image in RAW MMC
Currently, we assume that if we can read from MMC correctly, we have
found a valid image. This is not the case as an empty area will read
just fine. Add a check for a valid IH_MAGIC.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Christian Riesch [Fri, 14 Jun 2013 12:22:36 +0000 (14:22 +0200)]
da850evm: Use clrbits function with correct endianess
The current code uses clrbits_be32 which is incorrect since we are on
a little endian machine here. This patch fixes this issue and also removes
some unnecessary code: Reading the current GPIO bank state is not required
if we are using the SET and CLEAR GPIO registers for setting/clearing
bits.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Cc: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Stefan Roese [Fri, 14 Jun 2013 08:55:00 +0000 (10:55 +0200)]
arm: omap3: spl: Fix problem with 8bit NAND devices
Currently in OMAP3 SPL, the GPMC for NAND is configured for 16bit
access. This patch adds support for 8bit NAND devices as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Albert ARIBAUD [Thu, 25 Jul 2013 15:57:46 +0000 (17:57 +0200)]
Merge branch 'u-boot/master' into u-boot-arm/master
Tom Rini [Thu, 25 Jul 2013 12:22:08 +0000 (08:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-nds32
Tom Rini [Wed, 24 Jul 2013 13:34:30 +0000 (09:34 -0400)]
qemu-malta: Update for SPDX license identifiers
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Wed, 24 Jul 2013 13:30:46 +0000 (09:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.
Conflicts:
arch/mips/cpu/mips64/start.S
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Wed, 24 Jul 2013 13:25:40 +0000 (09:25 -0400)]
drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiers
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Dinh Nguyen [Tue, 2 Jul 2013 22:00:18 +0000 (17:00 -0500)]
socfpga: Move board/socfpga_cyclone5 to board/socfpga
Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
v2:
- Add Reviewed-by: Pavel Machek
- Cc: Tom Rini
ken kuo [Wed, 24 Jul 2013 18:17:11 +0000 (02:17 +0800)]
nds32: Enable FPU if the version of CPU supported
Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Tom Rini [Wed, 24 Jul 2013 13:39:00 +0000 (09:39 -0400)]
nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiers
Signed-off-by: Tom Rini <trini@ti.com>
ken kuo [Wed, 24 Jul 2013 18:24:54 +0000 (02:24 +0800)]
nds32: Convert Makefiles to use COBJS-y style
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Rob Herring [Thu, 13 Jun 2013 03:24:54 +0000 (22:24 -0500)]
highbank: enable keyed autoboot stop
Restrict autoboot interruption to "s" or "d" keys. This will prevent some
unwanted stopping and also allow disabling the reset on command timeout.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:53 +0000 (22:24 -0500)]
ARM: highbank: compile misc_init_r only if CONFIG_MISC_INIT_R
Compile misc_init_r only if CONFIG_MISC_INIT_R is enabled.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:52 +0000 (22:24 -0500)]
ARM: highbank: setup peripherals based on power domain status
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:51 +0000 (22:24 -0500)]
ARM: highbank: enable reset on command timeout
Enable resetting on command timeout. The timeout is set with environment
setting bootretry.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:50 +0000 (22:24 -0500)]
ARM: highbank: avoid bss write in timer_init
The timer_init function is called before relocation and writes to bss data
were corrupting relocation data. Fix this by removing the call to
reset_timer_masked. The initial timer count should be 0 or near 0 anyway,
so initializing the variables are not needed.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:49 +0000 (22:24 -0500)]
ARM: highbank: set timer prescaler to 256
The 150MHz clock rate gives u-boot time functions problems and there's no
benefit to a fast clock, so lower the rate.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:48 +0000 (22:24 -0500)]
ARM: highbank: fix get_tbclk value to timer rate
get_tbclk should return the timer's frequency, not CONFIG_SYS_HZ.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:47 +0000 (22:24 -0500)]
ARM: highbank: update config options
Various changes to highbank config:
Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:46 +0000 (22:24 -0500)]
net: calxedaxgmac: enable rx cut-thru
There is no reason to wait for the entire frame to start DMA on receive,
so enable rx cut-thru for better performance.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Rob Herring [Thu, 13 Jun 2013 03:24:45 +0000 (22:24 -0500)]
ARM: move interrupt_init to before relocation
interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:36 +0000 (12:59 +0200)]
MIPS: mips32/cache.S: use v1 register for indirect function calls
Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:35 +0000 (12:59 +0200)]
MIPS: mips32/cache.S: store cache line size in t8 register
Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:34 +0000 (12:59 +0200)]
MIPS: mips32/cache.S: save return address in t9 register
Synchronize the code with mips64/cache.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Fri, 14 Jun 2013 12:47:10 +0000 (14:47 +0200)]
MIPS: xburst/start.S: rework relocation info check
Make it similar to the code in mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:32 +0000 (12:59 +0200)]
MIPS: xburst/start.S: use t8 register for dynamic relocation
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:31 +0000 (12:59 +0200)]
MIPS: xburst/start.S: save gd in s0 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:30 +0000 (12:59 +0200)]
MIPS: xburst/start.S: save relocation offset in s1 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:29 +0000 (12:59 +0200)]
MIPS: xburst/start.S: save relocation address in s2 register
Synchronize the code with mips{32,64}/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:28 +0000 (12:59 +0200)]
MIPS: mips32/start.S: rework relocation info check
Make it similar to the code in mips64/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 13 Jun 2013 10:59:27 +0000 (12:59 +0200)]
MIPS: mips32/start.S: use t8 register for dynamic relocation
Synchronize the code with mips64/start.S, in order to
allow further unifications.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 12 Jun 2013 16:02:46 +0000 (18:02 +0200)]
MIPS: mips32/cache.S: remove superfluous register assignment
The t4 register already holds the cache
line size, and the value of the register
is not changed in mips_init_icache.
Get the cache line size value from t4 for
mips_init_dcache as well and remove the
superfluous assignment of t5 register.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos [Wed, 12 Jun 2013 16:02:45 +0000 (18:02 +0200)]
MIPS: remove obsolete TODO items
The MIPS code uses centralized u-boot.lds script already,
and dynamic relocation is supported as well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 12 Jun 2013 16:02:44 +0000 (18:02 +0200)]
MIPS: mips64/interrupt.c: remove superfluous include
Nothing is used from asm/mipsregs.h.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 12 Jun 2013 16:02:43 +0000 (18:02 +0200)]
MIPS: mips32/time.c: fix checkpatch errors/warnings
Checking mips32/time.c with checkpatch.pl shows this:
arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
total: 1 errors, 1 warnings, 0 checks, 85 lines checked
Fix the code to make checkpatch.pl happy.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:44 +0000 (03:57 +0000)]
MIPS: qemu-malta: bring up ethernet
Qemu emulates a PCNET PCI card for the Malta CoreLV board.
Enable the pcnet driver and add board specific ethernet
initialization function to bring it up. Also enable the
CONFIG_CMD_NET and CONFIG_CMD_PING options.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:42 +0000 (03:57 +0000)]
MIPS: qemu-malta: add PCI support
Qemu emulates the Galileo GT64120 System Controller
which provides a CPU bus to PCI bus bridge.
The patch adds driver for this bridge and enables
PCI support for the emulated Malta board.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:41 +0000 (03:57 +0000)]
MIPS: qemu-malta: setup GT64120 registers as done by YAMON
Move the GT64120 register base to 0x1be00000
and setup PCI BAR registers as done by the
original YAMON bootloader.
This is needed for running Linux kernel.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:39 +0000 (03:57 +0000)]
MIPS: qemu-malta: enable flash support
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:38 +0000 (03:57 +0000)]
MIPS: qemu-malta: add reset support
The MIPS Malta board has a SOFTRES register. Writing a
magic value into that register initiates a board reset.
Use this feature to implement reset support.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:37 +0000 (03:57 +0000)]
MIPS: qemu-malta: add support for emulated MIPS Malta board
Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.
This is enough to boot U-Boot to the command prompt
both in little and big endian mode.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:46 +0000 (03:57 +0000)]
MIPS: start.S: emulate REVISION register for qemu-malta
On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.
This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:40 +0000 (03:57 +0000)]
MIPS: import gt64120.h header from Linux
The Linux specific register access macros, the
extern function declarations and the UL suffixes
has been removed.
The header file will be used for the qemu-malta
board.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 22 May 2013 03:57:43 +0000 (03:57 +0000)]
net: pcnet: use pci_virt_to_mem to obtain buffer addresses
The pcnet driver uses the pci_phys_to_mem function
to get the memory address of the DMA buffers. This
This assumes an 1:1 mapping between the PCI and
physical memory which is not true on all platforms.
On MIPS platform U-Boot is running within a mapped
memory region, and the pci_phys_to_mem macro can't
be used to obtain the memory address of the buffers.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Tom Rini [Wed, 24 Jul 2013 13:50:52 +0000 (09:50 -0400)]
MIPS: mips64: fix typos in copyright text of start.S
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Conflicts:
arch/mips/cpu/mips64/start.S
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Wed, 24 Jul 2013 13:22:28 +0000 (09:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.
Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <trini@ti.com>
Wolfgang Denk [Mon, 8 Jul 2013 10:11:35 +0000 (12:11 +0200)]
Add eCos-2.0 SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 8 Jul 2013 09:58:49 +0000 (11:58 +0200)]
Add LGPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 8 Jul 2013 09:48:07 +0000 (11:48 +0200)]
Add LGPL-2.1+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 8 Jul 2013 07:37:19 +0000 (09:37 +0200)]
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
Wolfgang Denk [Fri, 21 Jun 2013 08:22:36 +0000 (10:22 +0200)]
Licenses: introduce SPDX Unique Lincense Identifiers
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files. This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports. An additional problem
is that even the same lincenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique Lincense Identifiers
as defined by the Linux Foundation's SPDX project [1]. For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:
SPDX-License-Identifier: GPL-2.0+
We use the SPDX Unique Lincense Identifiers here; these are available
at [2].
Note: From the legal point of view, this patch is supposed to be only
a change to the textual representation of the license information,
but in no way any change to the actual license terms. With this patch
applied, all files will still be licensed under the same terms they
were before.
Note 2: The apparent difference between the old "COPYING" and the new
"Licenses/gpl-2.0.txt" only results from switching to the upstream
version of the license which is differently formatted; there are not
any actual changes to the content.
Note 3: There are some recurring questions about linense issues, such
as:
- Is a "All Rights Reserved" clause a problem in GPL code?
- Are files without any license header a problem?
- Do we need license headers at all?
The following excerpt from an e-mail by Daniel B. Ravicher should help
with these:
| Message-ID: <
4ADF8CAA.5030808@softwarefreedom.org>
| Date: Wed, 21 Oct 2009 18:35:22 -0400
| From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org>
| To: Wolfgang Denk <wd@denx.de>
| Subject: Re: GPL and license cleanup questions
|
| Mr. Denk,
|
| Wolfgang Denk wrote:
| > - There are a number of files which do not include any specific
| > license information at all. Is it correct to assume that these files
| > are automatically covered by the "GPL v2 or later" clause as
| > specified by the COPYING file in the top level directory of the
| > U-Boot source tree?
|
| That is a very fact specific analysis and could be different across the
| various files. However, if the contributor could reasonably be expected
| to have known that the project was licensed GPLv2 or later at the time
| she made her contribution, then a reasonably implication is that she
| consented to her contributions being distributed under those terms.
|
| > - Do such files need any clean up, for example should we add GPL
| > headers to them, or is this not needed?
|
| If the project as a whole is licensed under clear terms, you need not
| identify those same terms in each file, although there is no harm in
| doing so.
|
| > - There are other files, which include both a GPL license header
| > _plus_ some copyright note with an "All Rights Reserved" clause. It
| > has been my understanding that this is a conflict, and me must ask
| > the copyright holders to remove such "All Rights Reserved" clauses.
| > But then, some people claim that "All Rights Reserved" is a no-op
| > nowadays. License checking tools (like OSLC) seem to indicate this is
| > a problem, but then we see quite a lot of "All rights reserved" in
| > BSD-licensed files in gcc and glibc. So what is the correct way to
| > deal with such files?
|
| It is not a conflict to grant a license and also reserve all rights, as
| implicit in that language is that you are reserving all "other" rights
| not granted in the license. Thus, a file with "Licensed under GPL, All
| Rights Reserved" would mean that it is licensed under the GPL, but no
| other rights are given to copy, modify or redistribute it.
|
| Warm regards,
| --Dan
|
| Daniel B. Ravicher, Legal Director
| Software Freedom Law Center (SFLC) and Moglen Ravicher LLC
| 1995 Broadway, 17th Fl., New York, NY 10023
| (212) 461-1902 direct (212) 580-0800 main (212) 580-0898 fax
| ravicher@softwarefreedom.org www.softwarefreedom.org
[1] http://spdx.org/
[2] http://spdx.org/licenses/
Signed-off-by: Wolfgang Denk <wd@denx.de>
Axel Lin [Mon, 8 Jul 2013 06:29:52 +0000 (14:29 +0800)]
nds32: ag101/ag102: Fix setting lastdec and now values
The timer3 counter unit for lastdesc and now values are inconsistent in current
code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is
second. However, CONFIG_SYS_HZ is defined as 1000 in board config file.
This means the accuracy of "lastdec" and "now" should be in millisecond,
thus fix the equation to set lastdec and now variables accordingly.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
ken kuo [Sat, 8 Jun 2013 03:14:12 +0000 (11:14 +0800)]
nds32: Enable the function of passing parameters to Linux
Add a header file, setup.h, which copy from Linux source code,
this file contain structures are used to pass initialisation parameters
to Linux. Enable this function on adp-ag101/adp-ag101p target
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
ken kuo [Sat, 8 Jun 2013 03:14:11 +0000 (11:14 +0800)]
nds32: Enable SDIO and EXT2 command support for Andes board
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
ken kuo [Sat, 8 Jun 2013 03:14:09 +0000 (11:14 +0800)]
nds32: Enable two banks of SDRAM on Andes board
The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Gabor Juhos [Sun, 26 May 2013 10:11:31 +0000 (12:11 +0200)]
nds32: adp-ag102: use 'faraday/ftpci100.h' for pci_ftpci_init
Due to improper external function declaration,
building U-Boot for the adp-ag102 board shows
this warning:
adp-ag102.c: In function 'pci_init_board':
adp-ag102.c:95: warning: function declaration isn't a prototype
Include the 'faraday/ftpci100.h' header which
provides the proper declaration and remove the
local declaration to get rid of the warning.
Compile tested only.
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos [Sun, 26 May 2013 10:11:30 +0000 (12:11 +0200)]
pci: move pci_ftpci100.h to include/faraday/ftpci100.h
Even though the header files is used only by the
pci_ftpci100 driver, it contains declaration for
a function which is used by external code.
Move the header file to a common location which
lets external code use it.
Compile tested only.
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos [Sun, 26 May 2013 10:11:29 +0000 (12:11 +0200)]
pci: add prototype for pci_ftpci_init() function
The pci_ftpci_init() function is implemented
in 'drivers/pci/pci_ftpci100.c' however it is
always called by external code.
Add function declaration into ftpci100.h to
make it visible for external code.
Compile tested only.
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos [Sun, 26 May 2013 10:11:28 +0000 (12:11 +0200)]
block: constify sect_buf argument of ide_write_data
Add a const keyword to the sect_buf argument of
ide_write_data to fix the following warning:
cmd_ide.c: In function '__ide_output_data':
cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type
/devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *'
Also modify the driver-model documentation to
match with the new prototype.
Compile tested only.
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos [Sun, 26 May 2013 10:11:27 +0000 (12:11 +0200)]
mmc: ftsdc010_mci: fix build error if CONFIG_FTSDC010_SDIO is not defined
The FTSDC010_DCR_FIFO_RST symbol is conditionally
defined in <faraday/ftsdc010.h> and it is available
available when CONFIG_FTSDC010_SDIO is enabled.
However the actual driver code unconditionally uses
the FTSDC010_DCR_FIFO_RST constant and this causes
build error if CONFIG_FTSDC010_SDIO is not enabled.
The following error happens when compiling for the
adp-ag101 board:
ftsdc010_mci.c: In function 'ftsdc010_request':
ftsdc010_mci.c:178: error: 'FTSDC010_DCR_FIFO_RST' undeclared (first use in this function)
ftsdc010_mci.c:178: error: (Each undeclared identifier is reported only once
ftsdc010_mci.c:178: error: for each function it appears in.)
The patch ensures that the FTSDC010_DCR_FIFO_RST
symbol gets used only if CONFIG_FTSDC010_SDIO is
defined.
Compile tested only.
Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Reviewed-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Gabor Juhos [Sun, 26 May 2013 10:11:26 +0000 (12:11 +0200)]
nds32: introduce macros for bit manipulation
U-Boot does not compile for the adp-ag101 boards since
commit
f6c3b34697bf8bf05cb4e81c2fd3cadb9a98daea (mmc:
update Faraday FTSDC010 for rw performance)
The driver assumes that the bit manipulation macros
are provided by all architectures. This is not the
case for nds32 and it causes a build error like this:
ftsdc010_mci.c: In function 'ftsdc010_clkset':
ftsdc010_mci.c:118: warning: implicit declaration of function 'setbits_le32'
ftsdc010_mci.c:123: warning: implicit declaration of function 'clrbits_le32'
drivers/mmc/libmmc.o: In function `ftsdc010_request':
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `setbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:243: undefined reference to `clrbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `clrbits_le32'
drivers/mmc/libmmc.o: In function `ftsdc010_clkset':
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:121: undefined reference to `setbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32'
/devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32'
The patch adds bit manipulation macros for the
nds32 architecture to avoid the errors. The macros
are copied from the ARM implementation.
Compile tested only.
Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Tom Rini [Mon, 22 Jul 2013 19:57:32 +0000 (15:57 -0400)]
Prepare v2013.07
Signed-off-by: Tom Rini <trini@ti.com>
naveen krishna chatradhi [Mon, 29 Apr 2013 22:58:52 +0000 (15:58 -0700)]
fdtdec: Add compatible string for High speed i2c
Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller
available on exynos5 SoCs from Samsung.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Kuo-Jung Su [Wed, 8 May 2013 07:36:26 +0000 (15:36 +0800)]
i2c: add Faraday FTI2C010 I2C controller support
Faraday FTI2C010 is a multi-function I2C controller
which supports both master and slave mode.
This patch simplily implements the master mode only.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Heiko Schocher <hs@denx.de>