platform/upstream/mesa.git
3 years agopanfrost: Disable AFBC on v7
Alyssa Rosenzweig [Thu, 3 Jun 2021 21:38:35 +0000 (17:38 -0400)]
panfrost: Disable AFBC on v7

Broken in several ways. Hide it until we can get this sorted, and have a
test plan to keep it sorted.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopanfrost: Add missing 'Reverse issue order flag'
Alyssa Rosenzweig [Tue, 1 Jun 2021 21:51:05 +0000 (17:51 -0400)]
panfrost: Add missing 'Reverse issue order flag'

Should fix an issue I'm seeing. Spoiler alert, it does not.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopanfrost: Remove AFBC format fixups
Alyssa Rosenzweig [Tue, 1 Jun 2021 19:47:20 +0000 (15:47 -0400)]
panfrost: Remove AFBC format fixups

It's too complicated and probably for no actual benefit. The main reason
we have BGR formats is for display, but that's export and doesn't get
hit by this path. Internal BGRA textures are possible with a Mesa
extension but sufficiently rare that I regret suggesting this as a
possible optimization. My apologies, and thanks for the fish.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Don't allocate past the end of the reg file
Alyssa Rosenzweig [Tue, 8 Jun 2021 20:04:05 +0000 (16:04 -0400)]
pan/bi: Don't allocate past the end of the reg file

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Track words instead of bytes in RA
Alyssa Rosenzweig [Tue, 8 Jun 2021 18:49:04 +0000 (14:49 -0400)]
pan/bi: Track words instead of bytes in RA

Reduces RA memory footprint by 4x, fixing an OOM in the following dEQP
test that otherwise would allocate 8GB of memory...

   dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Simplify spill code
Alyssa Rosenzweig [Tue, 8 Jun 2021 18:35:52 +0000 (14:35 -0400)]
pan/bi: Simplify spill code

Now allow spilling all nodes. Fixes failed spilling in

dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.21

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Emit a dummy ATEST if needed
Alyssa Rosenzweig [Wed, 2 Jun 2021 22:30:30 +0000 (18:30 -0400)]
pan/bi: Emit a dummy ATEST if needed

Match what the blob does, since Bifrost has so many random errata we'd
be fools not to.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Lower 64-bit ints again
Alyssa Rosenzweig [Wed, 2 Jun 2021 22:08:41 +0000 (18:08 -0400)]
pan/bi: Lower 64-bit ints again

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Lower stores with component != 0
Alyssa Rosenzweig [Wed, 2 Jun 2021 14:46:57 +0000 (10:46 -0400)]
pan/bi: Lower stores with component != 0

If the shader packs multiple varyings into the same location with
different location_frac, we'll need to lower to a single varying store
that collects all of the channels together. This is not trivial during
code gen, but it is trivial to do in NIR right before codegen by relying
on nir_lower_io_to_temporaries. Since we're guaranteed all varyings will
be written exactly once, in the exit block, we can scan the shader
linearly and collect stores together in a single pass.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Lower loads with component > 0
Alyssa Rosenzweig [Wed, 2 Jun 2021 00:24:31 +0000 (20:24 -0400)]
pan/bi: Lower loads with component > 0

We have no native way to swizzle out a nonzero component in a load, but
we can simply load extra components and do the swizzle in shader
instructions. This is inefficient, since it loads data to discard
immediately, but it's required for conformance in some edge cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Handle images in vertex shaders
Alyssa Rosenzweig [Tue, 1 Jun 2021 22:50:30 +0000 (18:50 -0400)]
pan/bi: Handle images in vertex shaders

We need to offset by the number of attributes, since the primary
attribute table is shared for images and vertex attributes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Model +BLEND clobbering of r48
Alyssa Rosenzweig [Tue, 25 May 2021 19:49:27 +0000 (15:49 -0400)]
pan/bi: Model +BLEND clobbering of r48

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Don't restrict the register file in non-blend shaders
Alyssa Rosenzweig [Tue, 25 May 2021 17:56:41 +0000 (13:56 -0400)]
pan/bi: Don't restrict the register file in non-blend shaders

Now that preloading is handled correctly, there's nothing 'special'
about R59 and up, so this gets us a few more registers to work with.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Allow move/sink in blend shaders
Alyssa Rosenzweig [Tue, 25 May 2021 17:52:56 +0000 (13:52 -0400)]
pan/bi: Allow move/sink in blend shaders

Now that we handle precolouring we don't need to workaround anything.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Model interference with preloaded regs
Alyssa Rosenzweig [Tue, 25 May 2021 17:50:54 +0000 (13:50 -0400)]
pan/bi: Model interference with preloaded regs

Now that we have affinity masks in RA, we can handle this as an easy
case of register liveness analysis, rather than creating pseudo-nodes
and trying hard to coalesce the resulting moves.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Explicit zero reg_live_{in, out} when needed
Alyssa Rosenzweig [Tue, 25 May 2021 17:50:13 +0000 (13:50 -0400)]
pan/bi: Explicit zero reg_live_{in, out} when needed

I want to use these fields for a similar purpose in the register
allocator, so they won't be zero anymore for scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Inline spilling in RA
Alyssa Rosenzweig [Tue, 25 May 2021 16:22:55 +0000 (12:22 -0400)]
pan/bi: Inline spilling in RA

Should be faster for both spill and not spill cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Use explicit affinities in RA
Alyssa Rosenzweig [Tue, 25 May 2021 17:52:48 +0000 (13:52 -0400)]
pan/bi: Use explicit affinities in RA

Inline LCRA to allow us to make the change without disrupting Midgard,
and get some nice cleanup from doing so.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Allow IADD.u32 on FMA as *IADDC
Alyssa Rosenzweig [Thu, 6 May 2021 17:10:00 +0000 (13:10 -0400)]
pan/bi: Allow IADD.u32 on FMA as *IADDC

There's a common special case, slight boost in scheduler freedom.

total nops in shared programs: 101130 -> 101048 (-0.08%)
nops in affected programs: 1677 -> 1595 (-4.89%)
helped: 13
HURT: 0
helped stats (abs) min: 6 max: 8 x̄: 6.31 x̃: 6
helped stats (rel) min: 3.24% max: 25.00% x̄: 7.42% x̃: 4.48%
95% mean confidence interval for nops value: -6.76 -5.85
95% mean confidence interval for nops %-change: -12.02% -2.81%
Nops are helped.

total clauses in shared programs: 27076 -> 27075 (<.01%)
clauses in affected programs: 8 -> 7 (-12.50%)
helped: 1
HURT: 0

total quadwords in shared programs: 113142 -> 113113 (-0.03%)
quadwords in affected programs: 1935 -> 1906 (-1.50%)
helped: 13
HURT: 0
helped stats (abs) min: 2 max: 4 x̄: 2.23 x̃: 2
helped stats (rel) min: 0.95% max: 7.50% x̄: 2.16% x̃: 1.26%
95% mean confidence interval for quadwords value: -2.59 -1.87
95% mean confidence interval for quadwords %-change: -3.45% -0.88%
Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Track liveness while scheduling
Alyssa Rosenzweig [Thu, 6 May 2021 15:11:09 +0000 (11:11 -0400)]
pan/bi: Track liveness while scheduling

If we know that a value is killed in the next tuple, there is no need to
write it out to the register file. We already handled this as a packing
fixup. However, avoiding this write also frees up an extra slot in the
register block, which offers additional scheduling freedom. To take
advantage of this, we extend liveness analysis to work while scheduling,
and modify the schedulable predicate accordingly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Add post-RA optimizer
Alyssa Rosenzweig [Tue, 4 May 2021 21:49:24 +0000 (17:49 -0400)]
pan/bi: Add post-RA optimizer

Delete coalesced moves. Now this is trivial! See e.g shaders/tesseract/118.shader_test

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Bundle after RA
Alyssa Rosenzweig [Tue, 4 May 2021 21:27:07 +0000 (17:27 -0400)]
pan/bi: Bundle after RA

Flag day change to swap the order of the "scheduler" with the register
allocator. This gives RA much more freedom without significantly
hndering bundling.

It also opens up the door to Adult-level Scheduling which would occur
prior to bundling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Fix bi_rewrite_passthrough ordering
Alyssa Rosenzweig [Wed, 5 May 2021 18:06:26 +0000 (14:06 -0400)]
pan/bi: Fix bi_rewrite_passthrough ordering

The ordering is irrelevant for SSA form input, but is very relevant for
register input.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Simplify TEXC codegen for sr_count=0
Alyssa Rosenzweig [Wed, 5 May 2021 19:48:35 +0000 (15:48 -0400)]
pan/bi: Simplify TEXC codegen for sr_count=0

Obscure case.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Use TEXS_2D for rect textures
Alyssa Rosenzweig [Tue, 4 May 2021 21:42:13 +0000 (17:42 -0400)]
pan/bi: Use TEXS_2D for rect textures

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agopan/bi: Pull out bi_count_write_registers
Alyssa Rosenzweig [Tue, 4 May 2021 21:20:45 +0000 (17:20 -0400)]
pan/bi: Pull out bi_count_write_registers

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>

3 years agovulkan: fix back compat with Android Oreo and below
Yiwei Zhang [Thu, 10 Jun 2021 16:26:01 +0000 (16:26 +0000)]
vulkan: fix back compat with Android Oreo and below

buffer_handle_t definition was previously inside the deprecated
system/core/include/system/window.h.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11301>

3 years agosvga: Initialize pipe_shader_state for transform shaders
Neha Bhende [Wed, 9 Jun 2021 18:08:28 +0000 (11:08 -0700)]
svga: Initialize pipe_shader_state for transform shaders

This fixes crashes for opengl apps. Issue is found in vmware
internal testing

Fixes: f01c0565bb9 ("draw: free the NIR IR.")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11274>

3 years agoutil/blitter: remove duplicated set_sample_mask calls
Mike Blumenkrantz [Thu, 10 Jun 2021 09:49:05 +0000 (05:49 -0400)]
util/blitter: remove duplicated set_sample_mask calls

it doesn't make sense to have both, so just keep the simpler one

no functional changes because this was redundant

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11294>

3 years agoswrast: Fix a warning from gcc 11
Adam Jackson [Fri, 4 Jun 2021 17:40:52 +0000 (13:40 -0400)]
swrast: Fix a warning from gcc 11

gcc 11 dixit:

   In function ‘sample_2d_ewa’,
       inlined from ‘sample_lambda_2d_aniso’ at ../src/mesa/swrast/s_texfilter.c:1995:10:
   ../src/mesa/swrast/s_texfilter.c:1729:13: warning: ‘sample_2d_nearest’ reading 16 bytes from a region of size 8 [-Wstringop-overread]
    1729 |             sample_2d_nearest(ctx, samp, img, newCoord, rgba);
         |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   ../src/mesa/swrast/s_texfilter.c: In function ‘sample_lambda_2d_aniso’:
   ../src/mesa/swrast/s_texfilter.c:1729:13: note: referencing argument 4 of type ‘const GLfloat *’ {aka ‘const float *’}

Indeed, newCoord is GLfloat[2] but the argument is typed GLfloat[4],
even though only the first two (s and t) are ever read. Fix the array
size in the function signature to reflect the maximum element actually
addressed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11273>

3 years agonouveau: Don't require RTTI and use it only when enabled
Roman Stratiienko [Fri, 28 May 2021 16:00:50 +0000 (19:00 +0300)]
nouveau: Don't require RTTI and use it only when enabled

The only case RTTI is used in nouveau is type assertion at:
File src/gallium/drivers/nouveau/codegen/nv50_ir.cpp:

    assert(typeid(*i) == typeid(*this));

This assertion is used 'to be on the safe side' only and not mandatory.

In Android we do not have rtti for libLLVM therefore this assertion
has to be skipped.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11069>

3 years agov3dv: enable KHR_uniform_buffer_standard_layout
Charlie [Wed, 9 Jun 2021 19:20:34 +0000 (20:20 +0100)]
v3dv: enable KHR_uniform_buffer_standard_layout

We already support this memory layout. All relevant CTS tests seem to
pass

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11276>

3 years agov3dv: enable KHR_incremental_present
Charlie [Wed, 9 Jun 2021 19:16:30 +0000 (20:16 +0100)]
v3dv: enable KHR_incremental_present

All bits should already be provided by wsi/common.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11276>

3 years agov3dv: enable KHR_sampler_mirror_clamp_to_edge
Charlie [Wed, 9 Jun 2021 19:08:40 +0000 (20:08 +0100)]
v3dv: enable KHR_sampler_mirror_clamp_to_edge

This is already implemented

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11276>

3 years agov3dv: enable KHR_image_format_list
Charlie [Wed, 9 Jun 2021 19:04:40 +0000 (20:04 +0100)]
v3dv: enable KHR_image_format_list

There's nothing checking for mutable formats, so this needs no changes

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11276>

3 years agonir: document that ACCESS_RESTRICT is not set at intrinsics
Rhys Perry [Fri, 15 Jan 2021 12:54:45 +0000 (12:54 +0000)]
nir: document that ACCESS_RESTRICT is not set at intrinsics

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>

3 years agonir/opt_load_store_vectorize: only require one variable to be restrict
Rhys Perry [Fri, 15 Jan 2021 13:01:14 +0000 (13:01 +0000)]
nir/opt_load_store_vectorize: only require one variable to be restrict

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>

3 years agonir/opt_load_store_vectorize: check for restrict at the variable
Rhys Perry [Fri, 23 Oct 2020 14:31:28 +0000 (15:31 +0100)]
nir/opt_load_store_vectorize: check for restrict at the variable

SPIR-V -> NIR doesn't set ACCESS_RESTRICT at the intrinsic.

fossil-db (GFX10.3):
Totals from 3 (0.00% of 139391) affected shaders:
CodeSize: 12364 -> 12356 (-0.06%)
Instrs: 2493 -> 2494 (+0.04%); split: -0.04%, +0.08%
Cycles: 15279372 -> 15295756 (+0.11%); split: -0.11%, +0.21%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>

3 years agonir/load_store_vectorizer: fix check_for_robustness() with indirect loads
Rhys Perry [Fri, 6 Nov 2020 19:27:09 +0000 (19:27 +0000)]
nir/load_store_vectorizer: fix check_for_robustness() with indirect loads

fossil-db (GFX10.3, robustness2 enabled):
Totals from 13958 (9.54% of 146267) affected shaders:
VGPRs: 609168 -> 624304 (+2.48%); split: -0.05%, +2.53%
CodeSize: 48229504 -> 48488392 (+0.54%); split: -0.02%, +0.56%
MaxWaves: 354426 -> 349448 (-1.40%); split: +0.00%, -1.41%
Instrs: 9332093 -> 9375053 (+0.46%); split: -0.03%, +0.49%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>

3 years agov3dv: document two supported extensions
Charlie Birks [Wed, 9 Jun 2021 14:57:51 +0000 (14:57 +0000)]
v3dv: document two supported extensions

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11268>

3 years agoradv: increase maxComputeSharedMemorySize
Rhys Perry [Wed, 9 Jun 2021 11:47:39 +0000 (12:47 +0100)]
radv: increase maxComputeSharedMemorySize

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11262>

3 years agoaco: fix emit_mbcnt() with a VGPR mask
Rhys Perry [Thu, 10 Jun 2021 10:07:31 +0000 (11:07 +0100)]
aco: fix emit_mbcnt() with a VGPR mask

Found by inspection. Should be possible with nir_intrinsic_mbcnt_amd.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11295>

3 years agov3dv: implement VK_KHR_get_display_properties2
Iago Toral Quiroga [Wed, 9 Jun 2021 10:00:18 +0000 (12:00 +0200)]
v3dv: implement VK_KHR_get_display_properties2

This is entirely implemented in the common WSI code, we just need to
implement the API entry points.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11287>

3 years agoglapi: fix Warray-parameter
Michel Zou [Sat, 5 Jun 2021 07:27:02 +0000 (09:27 +0200)]
glapi: fix Warray-parameter

Fixes these new gcc11 warnings:

In file included from ../src/mapi/glapi/glapi_dispatch.c:174:
src/mapi/glapi/gen/glapitemp.h:3191:68: warning: argument 1 of type 'const GLdouble *' {aka 'const double *'} declared as a pointer [-Warray-parameter=]
 3191 | KEYWORD1 void KEYWORD2 NAME(LoadTransposeMatrixd)(const GLdouble * m)
      |                                                   ~~~~~~~~~~~~~~~~~^
In file included from ../src/mapi/glapi/glapi_priv.h:31,
                 from ../src/mapi/glapi/glapi_dispatch.c:40:
../include/GL/gl.h:1901:62: note: previously declared as an array 'const GLdouble[16]' {aka 'const double[16]'}
 1901 | GLAPI void GLAPIENTRY glLoadTransposeMatrixd( const GLdouble m[16] );

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11198>

3 years agoaco: Use as_vgpr for the second source of mbcnt_amd.
Timur Kristóf [Thu, 10 Jun 2021 09:40:16 +0000 (11:40 +0200)]
aco: Use as_vgpr for the second source of mbcnt_amd.

Fixes: 1e49018cedf700fd21fe1498d24742cecf4b5ff4
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11292>

3 years agoci: add expected list of failures for Bonaire (RADV)
Samuel Pitoiset [Tue, 8 Jun 2021 07:00:07 +0000 (09:00 +0200)]
ci: add expected list of failures for Bonaire (RADV)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11239>

3 years agozink: fix caching of shader variants with inlined uniforms
Mike Blumenkrantz [Tue, 25 May 2021 18:17:56 +0000 (14:17 -0400)]
zink: fix caching of shader variants with inlined uniforms

attempting to read the inlined uniforms directly after the variant key
using the size of the variant is not going to work since the variant union
is (sometimes) much larger than the size of the actual struct being used,
meaning that this would just copy a bunch of zeroes instead of the actual
inlined uniforms

Fixes: 7f28775edcc ("zink: implement uniform inlining")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11003>

3 years agoradv/winsys: add a small comment explaining the CHAIN bit
Samuel Pitoiset [Tue, 8 Jun 2021 12:46:58 +0000 (14:46 +0200)]
radv/winsys: add a small comment explaining the CHAIN bit

Without it the hardware launches an IB2 which might hang in some
rare situations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11214>

3 years agoradv: do not launch an IB2 for secondary cmdbuf with INDIRECT_MULTI on GFX7
Samuel Pitoiset [Mon, 7 Jun 2021 08:14:01 +0000 (10:14 +0200)]
radv: do not launch an IB2 for secondary cmdbuf with INDIRECT_MULTI on GFX7

It's illegal to emit DRAW_{INDEX}_INDIRECT_MULTI from an IB2 on GFX7.

PAL applies this workaround for indirect dispatches and also on
GFX8-9 but it doesn't seem needed.

This fixes various GPU hangs on Bonaire (GFX7).

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11214>

3 years agopanfrost/ci: Add some failures that crept in
Tomeu Vizoso [Wed, 9 Jun 2021 16:46:49 +0000 (13:46 -0300)]
panfrost/ci: Add some failures that crept in

For a few days the CI wasn't reporting failures, and these crept in.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11218>

3 years agoiris/ci: Update the checksums for the pixmark-piano trace
Tomeu Vizoso [Wed, 9 Jun 2021 16:45:03 +0000 (13:45 -0300)]
iris/ci: Update the checksums for the pixmark-piano trace

The rendering changed while the CI was down. The rendering still looks
good, only some pixels in the edges have changed, probably due to
blending?

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11218>

3 years agoci/lava: Handle proxy download failures
Daniel Stone [Wed, 9 Jun 2021 14:00:50 +0000 (15:00 +0100)]
ci/lava: Handle proxy download failures

LAVA doesn't consider failure to download a kernel/initramfs as an
infrastructure error, rather just a user error for supplying a broken
URL. We know our URLs aren't broken (because we're perfect), so assume
that failures in download validation are network issues and retry when
we hit them.

LAVA itself has been fixed to retry internally, so we'll get that when
upgrade in a couple of weeks, but gloss over it for now.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11218>

3 years agoci/lava: Iterate all job results, not just the first
Daniel Stone [Wed, 9 Jun 2021 13:53:23 +0000 (14:53 +0100)]
ci/lava: Iterate all job results, not just the first

Each step in a LAVA job returns separate results; a successfully-retired
job can have about 12 entries. Make sure we iterate through all of them
when we're looking for infrastructure errors.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11218>

3 years agoci/lava: do not save lava.yaml in the artifacts
Gustavo Padovan [Tue, 8 Jun 2021 17:47:33 +0000 (14:47 -0300)]
ci/lava: do not save lava.yaml in the artifacts

We want to avoid leaking private data used in merge process.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11218>

3 years agoci/lava: propely report test failure through sys.exit()
Gustavo Padovan [Mon, 7 Jun 2021 11:03:24 +0000 (08:03 -0300)]
ci/lava: propely report test failure through sys.exit()

We added lava_job_submitter.py to improve our robusteness, but
the final result reporting was not handled correctly by the script.

This change fix it by properly calling sys.exit() on failures.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11218>

3 years agov3dv: don't lower vulkan resource index result to scalar
Iago Toral Quiroga [Wed, 9 Jun 2021 06:44:07 +0000 (08:44 +0200)]
v3dv: don't lower vulkan resource index result to scalar

The intrinsic produces a vec2, so let's honor that and avoid the weird
lowering to scalar and later reconstruction to vec2 when we find
load vulkan descriptor intrinsics.

It fixes tests like this (which require that we expose KHR_spirv_1_4):
dEQP-VK.spirv_assembly.instruction.spirv1p4.opptrequal.null_comparisons_ssbo_equal
that otherwise produce bad code that tries to access a vec2 from the result of
that intrinsic, leading to NIR validation errors.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11257>

3 years agov3dv: expose KHR_variable_pointers
Iago Toral Quiroga [Tue, 8 Jun 2021 09:05:36 +0000 (11:05 +0200)]
v3dv: expose KHR_variable_pointers

We only support the VariablePointersStorageBuffer feature for now,
which is the only one that is mandatory, and for which we seem to
be passing all the relevant tests already.

Exposing the optional VariablePointers feature would require that
we support non-constant indexing on UBO/SSBO first.

Relevant CTS tests:
dEQP-VK.*pointer*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11257>

3 years agou_blitter: fix stencil blit fallback for crocus.
Dave Airlie [Wed, 9 Jun 2021 22:30:44 +0000 (08:30 +1000)]
u_blitter: fix stencil blit fallback for crocus.

crocus needs the sampler view decl to know it's a uint return value.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11280>

3 years agou_blitter: fix fs used when no color emitted
Dave Airlie [Thu, 24 Dec 2020 02:58:48 +0000 (12:58 +1000)]
u_blitter: fix fs used when no color emitted

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11280>

3 years agofreedreno: Remove assert
Rob Clark [Wed, 9 Jun 2021 17:42:53 +0000 (10:42 -0700)]
freedreno: Remove assert

In multi-context scenarios, one context writing to a resource can race
with a pctx->flush_resource() on another context/thread.  Which means
that by the end of flush_resource() we can have a new write_batch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agofreedreno: Add tid to DBG() msgs
Rob Clark [Wed, 9 Jun 2021 17:11:05 +0000 (10:11 -0700)]
freedreno: Add tid to DBG() msgs

I keep hacking this up locally when debugging TC sort of issues.  Which
is maybe a sign that we should just add this upstream.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agofreedreno: Move assert
Rob Clark [Tue, 8 Jun 2021 22:18:52 +0000 (15:18 -0700)]
freedreno: Move assert

The batch can be flushed immediately after unlocking, so this assert
needs to move.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agofreedreno: Add string-marker debug trace
Rob Clark [Tue, 8 Jun 2021 22:16:04 +0000 (15:16 -0700)]
freedreno: Add string-marker debug trace

This is useful in combination with --markers arg to apitrace.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agogallium/u_threaded: Missing driver-thread marking
Rob Clark [Tue, 8 Jun 2021 22:09:57 +0000 (15:09 -0700)]
gallium/u_threaded: Missing driver-thread marking

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agofreedreno: Fix fdperf flush
Rob Clark [Tue, 8 Jun 2021 20:26:14 +0000 (13:26 -0700)]
freedreno: Fix fdperf flush

We created and initialized the fence, but forgot to pass it to
fd_submit_flush().

Fixes: aafcd8aacb8 ("freedreno: Re-work fd_submit fence interface")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agofreedreno: Fix batch flush race condition
Rob Clark [Sat, 5 Jun 2021 19:13:24 +0000 (12:13 -0700)]
freedreno: Fix batch flush race condition

We need to remove the batch cache entry before marking as flushed.

Note that we are already holding the batch lock, to prevent flushing
something that another context is emitting cmdstream to, but there is
a window between batch cache lookup (under screen lock) and acquiring
the batch lock that could previously result in batch cache lookup
returning a flushed batch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11200>

3 years agoiris: Move target_to_isl_surf_dim to iris_resource.c
Jason Ekstrand [Tue, 8 Jun 2021 22:09:38 +0000 (17:09 -0500)]
iris: Move target_to_isl_surf_dim to iris_resource.c

It's only remaining caller lives there.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11235>

3 years agoiris: Use isl_surf_get_image_surf instead of hand-rolling it
Jason Ekstrand [Thu, 3 Jun 2021 22:49:02 +0000 (17:49 -0500)]
iris: Use isl_surf_get_image_surf instead of hand-rolling it

For the 3D RT read case on BDW, we can use the ISL helper.  For the 1D
array case, we don't actually need to flatten; we can just smash it to a
2D array surface because the layout for 1D and 2D is the same on BDW.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11235>

3 years agoRevert "st/mesa: execute glFlush asynchronously if no image has been imported/exported"
Rob Clark [Wed, 9 Jun 2021 20:29:50 +0000 (13:29 -0700)]
Revert "st/mesa: execute glFlush asynchronously if no image has been imported/exported"

A number of the piglit glx tests use multiple contexts on a single
thread, and previously the flush in MakeCurrent() was enforcing the
ordering between draws on those different contexts.  When that flush
made ASYNC, now there is nothing ordering the draws because we have
two (or more) driver threads for a single frontend thread which is
using nothing more than glxMakeCurrent() to enforce the ordering.

This reverts commit 057a702a3f6a78a8bcd347a74e5a79d70dfc4153.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4903
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11278>

3 years agoutil/vbuf: fix buffer overrun in attribute conversions
Mike Blumenkrantz [Sun, 23 May 2021 19:16:31 +0000 (15:16 -0400)]
util/vbuf: fix buffer overrun in attribute conversions

using the stride to calculate the buffer map size here is not correct, as
the stride is not necessarily equal to the attribute size, it's only the distance
between elements. for the case of overlapping elements (cts does this), the result
is that the attribute conversion will read past the end of the mapped src region

this is usually fine for drivers when they directly map the vertex buffer, as the memory
past the requested region is usually made available, but in the case where the readback
occurs using a staging resource sized exactly to the map region, this overflows and fails
silently, not even triggering a valgrind error because gpu memory lol

instead, add the size of the largest possible element, which will automatically be clamped
and ensure any staging buffers are correctly sized

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10963>

3 years agoadd execmem build option
John Bates [Tue, 25 May 2021 20:21:40 +0000 (13:21 -0700)]
add execmem build option

The execmem option can be set to false to disable the dynamic
dispatch patching that requires mmap(PROT_WRITE | PROT_EXEC),
which is undesirable on some platforms.

Signed-off-by: John Bates <jbates@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10987>

3 years agoegl/android: refactor to use the legit vndk/window.h header
Yiwei Zhang [Sun, 6 Jun 2021 19:59:05 +0000 (19:59 +0000)]
egl/android: refactor to use the legit vndk/window.h header

Using the system/window.h header can potentially cause AHB breakage
because the system header is reserved for platform internal use.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11206>

3 years agoegl/android: fix cached buffer slots for EGL Android winsys
Yiwei Zhang [Sun, 6 Jun 2021 06:31:58 +0000 (06:31 +0000)]
egl/android: fix cached buffer slots for EGL Android winsys

Android WSI api contract requires to allocate min_undequeued_buffers + 2
to achieve "triple buffering" effect, which is when the composer backend
acquired the allowed max numbder of buffers, the producer still has 2
buffers to rotate.

ANativeWindow either belongs to SurfaceView which presents directly to
SurfaceFlinger or belongs to other surfaces from the UI framework. For
the former, SurfaceFlinger hardcodes triple buffering for EGL. For the
latter, the surface caps decide the buffer limits or HWUI intercepts and
adjusts the min_undequeued_buffers to hint the EGL implementation to
prepare enough buffer cache slots while HWUI sets the max dequeued
buffer count accordingly.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11206>

3 years agoclassic/xlib: Fix the build after !9817
Adam Jackson [Wed, 9 Jun 2021 15:20:59 +0000 (11:20 -0400)]
classic/xlib: Fix the build after !9817

This commit mostly exists to be backported to 21.1.x, because the
classic binding to xlib is soon to be retired.

Fixes: 4daef7ffe37 mesa: Remove redundant gl_config::sampleBuffers
Closes: mesa/mesa#4900
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11270>

3 years agozink/ci: increase piglit and deqp-runner timeouts
Erik Faye-Lund [Wed, 9 Jun 2021 15:56:19 +0000 (17:56 +0200)]
zink/ci: increase piglit and deqp-runner timeouts

A bunch of tests are currently taking ~60 seconds, dangerously close to
the current 60 seconds timeout. Add some congesion or just bad luck to
a runner, or some other background-task, and we can very easily be
pushed above that.

Since we're rendering on LLVMpipe rather than HW, this isn't as
unreasonable as it might sound at first. So let's copy a trick from
VirGL's CI playbook, and bump the timeout to 180 seconds, three times
of what we currently use.

That might seem a bit excessive, but it's better to make it *very*
unlikely to cause trouble than a little bit unlikely.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11272>

3 years agoci: Add Piglit gl-1.0-blend-func to everyone's skips
Daniel Stone [Wed, 9 Jun 2021 14:43:46 +0000 (15:43 +0100)]
ci: Add Piglit gl-1.0-blend-func to everyone's skips

I've seen this timing out on Zink, v3d, radeonsi, and Panfrost
periodically, but more and more lately. Try to minimise the damage by
just universally skipping it until someone comes up with a better idea.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11267>

3 years agoci: Run tests inside Crosvm
Tomeu Vizoso [Thu, 4 Feb 2021 14:14:26 +0000 (15:14 +0100)]
ci: Run tests inside Crosvm

Allow running tests within Crosvm for testing the virtio-gpu winsys in
Virgl, tested with Piglit only for now.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10862>

3 years agoci: Store the credentials in /tmp
Tomeu Vizoso [Thu, 4 Feb 2021 14:19:16 +0000 (15:19 +0100)]
ci: Store the credentials in /tmp

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10862>

3 years agoci: Move Kernel build tasks into its own file
Tomeu Vizoso [Mon, 8 Mar 2021 13:05:08 +0000 (14:05 +0100)]
ci: Move Kernel build tasks into its own file

Allows to reuse the Kernel build tasks everywhere it is needed.

The x86_test-gl container now need a kernel image to use for the crosvm environment,
Reuse this task there.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10862>

3 years agoci: Build Crosvm in our container
Tomeu Vizoso [Thu, 4 Feb 2021 14:10:08 +0000 (15:10 +0100)]
ci: Build Crosvm in our container

And also add the required bits to the x86_64 kernel.

syslogd is needed by Crosvm.

iptables is needed to route packets in and out the VM.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10862>

3 years agoci/windows: Re-enable Windows build
Daniel Stone [Wed, 9 Jun 2021 12:33:15 +0000 (13:33 +0100)]
ci/windows: Re-enable Windows build

The GStreamer-provided Windows build machine is back now.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11261>

3 years agoci/windows: Artifact Meson build and test logs
Daniel Stone [Wed, 9 Jun 2021 11:39:32 +0000 (12:39 +0100)]
ci/windows: Artifact Meson build and test logs

These are useful, especially when tests fail. The other jobs do this, so
fall into line.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11261>

3 years agomesa: also flush after compute dispatch when debug flag enabled
Ilia Mirkin [Sun, 6 Jun 2021 18:51:19 +0000 (14:51 -0400)]
mesa: also flush after compute dispatch when debug flag enabled

This makes MESA_DEBUG=flush also flush after compute dispatches.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11205>

3 years agoci/radeonsi: Skip flaky glx-swap-copy test
Daniel Stone [Wed, 9 Jun 2021 13:20:58 +0000 (14:20 +0100)]
ci/radeonsi: Skip flaky glx-swap-copy test

This seems to be failing a bunch lately, so let's just skip it for now.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11265>

3 years agozink: export PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS
Mike Blumenkrantz [Fri, 2 Apr 2021 21:40:55 +0000 (17:40 -0400)]
zink: export PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS

dynamic state required because pipeline hashing for this would be too pita

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: use dynamic state to apply sample locations during draw
Mike Blumenkrantz [Fri, 2 Apr 2021 21:40:21 +0000 (17:40 -0400)]
zink: use dynamic state to apply sample locations during draw

not even going to attempt to figure out how to efficiently hash this

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: add a pipe_context::evaluate_depth_buffer hook
Mike Blumenkrantz [Fri, 2 Apr 2021 21:39:30 +0000 (17:39 -0400)]
zink: add a pipe_context::evaluate_depth_buffer hook

this works by flagging the next barrier to use the current sample locations
so that everything works as expected during decompression

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: update vk sample location info during framebuffer setup
Mike Blumenkrantz [Fri, 2 Apr 2021 21:36:28 +0000 (17:36 -0400)]
zink: update vk sample location info during framebuffer setup

this needs to be stored as a persistent thing on the ctx so it can be
reused without needing to be recalculated

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: add a util function for populating VkSampleLocationsInfoEXT
Mike Blumenkrantz [Fri, 2 Apr 2021 21:35:36 +0000 (17:35 -0400)]
zink: add a util function for populating VkSampleLocationsInfoEXT

this will be reused

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: also flag sample_locations_changed if framebuffer samples changes
Mike Blumenkrantz [Fri, 2 Apr 2021 21:34:49 +0000 (17:34 -0400)]
zink: also flag sample_locations_changed if framebuffer samples changes

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: add a pipe_context::set_sample_locations hook
Mike Blumenkrantz [Fri, 2 Apr 2021 21:32:34 +0000 (17:32 -0400)]
zink: add a pipe_context::set_sample_locations hook

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink; add a pipe_screen::get_sample_pixel_grid hook
Mike Blumenkrantz [Fri, 2 Apr 2021 21:31:44 +0000 (17:31 -0400)]
zink; add a pipe_screen::get_sample_pixel_grid hook

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: set VK_IMAGE_CREATE_SAMPLE_LOCATIONS_COMPATIBLE_DEPTH_BIT_EXT on zs rts
Mike Blumenkrantz [Fri, 2 Apr 2021 21:31:13 +0000 (17:31 -0400)]
zink: set VK_IMAGE_CREATE_SAMPLE_LOCATIONS_COMPATIBLE_DEPTH_BIT_EXT on zs rts

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agozink: populate maxSampleLocationGridSize for all available sample sizes on init
Mike Blumenkrantz [Fri, 2 Apr 2021 19:16:17 +0000 (15:16 -0400)]
zink: populate maxSampleLocationGridSize for all available sample sizes on init

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11189>

3 years agoamd: Add extra source to the mbcnt_amd NIR intrinsic.
Timur Kristóf [Wed, 9 Jun 2021 09:00:22 +0000 (11:00 +0200)]
amd: Add extra source to the mbcnt_amd NIR intrinsic.

The v_mbcnt instructions can take an extra source that they add to
the result. This is not exposed in SPIR-V but we now expose it in NIR.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>

3 years agoac/nir: Refactor and optimize the repacking sequence.
Timur Kristóf [Fri, 28 May 2021 19:59:21 +0000 (21:59 +0200)]
ac/nir: Refactor and optimize the repacking sequence.

According to feedback, the terminology with "exclusive scan"
and "reduction" is difficult. Change it to use "repack" instead,
which better fits what this sequence is actually used for.

The new sequence stores only 1 byte / wave to LDS, and uses packed
instructions to produce the results. This has lower latency and
fewer instructions than what we previously had.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>

3 years agoaco: Keep VGPR destinations for uniform shared loads when beneficial.
Timur Kristóf [Fri, 28 May 2021 20:08:45 +0000 (22:08 +0200)]
aco: Keep VGPR destinations for uniform shared loads when beneficial.

When the result of these loads is only used by cross-lane instructions,
it is beneficial to use a VGPR destination. This is because this allows
to put the s_waitcnt further down, which decreases latency.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>

3 years agoaco: Implement byte and lane permute intrinsics.
Timur Kristóf [Fri, 28 May 2021 19:57:43 +0000 (21:57 +0200)]
aco: Implement byte and lane permute intrinsics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>

3 years agonir: Add AMD-specific byte and lane permute intrinsics.
Timur Kristóf [Fri, 28 May 2021 19:57:19 +0000 (21:57 +0200)]
nir: Add AMD-specific byte and lane permute intrinsics.

These map directly to v_perm_b32 and v_permlane_b32.
Unfortunately there is no corresponding NIR opcode or
intrinsics, and it's too tedious to puzzle these things
together from the existing NIR instructions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>

3 years agoaco: Add validation for v_permlane instructions.
Timur Kristóf [Fri, 28 May 2021 19:56:50 +0000 (21:56 +0200)]
aco: Add validation for v_permlane instructions.

Previously there hasn't been any validation for these instructions,
but after shooting myself in the leg with it a few times, I decided
to add the validation now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11072>