Richard Biener [Mon, 25 Jul 2022 10:10:48 +0000 (12:10 +0200)]
middle-end/106414 - fix mistake in ~(x ^ y) -> x == y pattern
When compares are integer typed the inversion with ~ isn't properly
preserved by the equality comparison even when converting the
result properly. The following fixes this by restricting the
input precisions accordingly.
PR middle-end/106414
* match.pd (~(x ^ y) -> x == y): Restrict to single bit
precision types.
* gcc.dg/torture/pr106414-1.c: New testcase.
* gcc.dg/torture/pr106414-2.c: Likewise.
Andre Simoes Dias Vieira [Mon, 25 Jul 2022 09:27:13 +0000 (10:27 +0100)]
aarch64: Implement ACLE Data Intrinsics
This patch adds support for the ACLE Data Intrinsics to the AArch64 port.
gcc/ChangeLog:
2022-07-25 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/aarch64/aarch64.md (rbit<mode>2): Rename this ...
(@aarch64_rbit<mode>): ... to this and change it in...
(ffs<mode>2,ctz<mode>2): ... here.
(@aarch64_rev16<mode>): New.
* config/aarch64/aarch64-builtins.cc: (aarch64_builtins):
Define the following enum AARCH64_REV16, AARCH64_REV16L,
AARCH64_REV16LL, AARCH64_RBIT, AARCH64_RBITL, AARCH64_RBITLL.
(aarch64_init_data_intrinsics): New.
(aarch64_general_init_builtins): Add call to
aarch64_init_data_intrinsics.
(aarch64_expand_builtin_data_intrinsic): New.
(aarch64_general_expand_builtin): Add call to
aarch64_expand_builtin_data_intrinsic.
* config/aarch64/arm_acle.h (__clz, __clzl, __clzll, __cls, __clsl,
__clsll, __rbit, __rbitl, __rbitll, __rev, __revl, __revll, __rev16,
__rev16l, __rev16ll, __ror, __rorl, __rorll, __revsh): New.
gcc/testsuite/ChangeLog:
2022-07-25 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gcc.target/aarch64/acle/data-intrinsics.c: New test.
Martin Liska [Mon, 25 Jul 2022 06:59:42 +0000 (08:59 +0200)]
docs: remove recently added trailing whitespaces
gcc/ChangeLog:
* doc/extend.texi: Remove trailing whitespaces.
* doc/invoke.texi: Likewise.
Aldy Hernandez [Sun, 24 Jul 2022 17:42:11 +0000 (19:42 +0200)]
frange class to represent floating point ranges
This implements a basic frange class to represent floating point
ranges. Although it is meant to be a base for further development, it
is enough to handle relations and propagate NAN and other properties.
For ranger clients to become floating point aware, we still need the
range-op entries, which I will submit later this week. Since those
entries require specialized FP knowledge, I will ask for a review from
the FP experts before committing.
Once range-op entries come live, all ranger clients that have been
converted to the type agnostic vrange API will become FP aware: evrp,
DOM, the threaders, loop-ch, etc. (Still missing is loop unswitching,
as a lot of the int_range* temporaries should be Value_Range. I don't
have enough cycles to convert loop unswitching, but could gladly give
guidance. It should be straightforward for those familiar with the
code ;-)).
Samples things we handle:
* We can set the FP properties (!NAN, !INF, etc) at assignment from
constants (and propagate them throughout the CFG):
float z = 0.0;
if (__builtin_isnan (z))
link_error ();
* The relation oracle works in tandem with the FP ranges:
if (x > y)
;
else if (!__builtin_isnan (x) && !__builtin_isnan (y))
{
// If x and y are not NAN, the x <= y relationship holds, and the
// following conditional can be folded away.
if (x <= y)
bar ();
}
* We know the true side of all ordered conditionals (except !=)
implies !NAN:
if (x > y)
{
if (__builtin_isnan (x) || __builtin_isnan (y))
link_error ();
}
Range-ops also works correctly with -ffinite-math-only, and avoids
checking for NANs, etc.
I believe this is enough to get a fully fleshed out floating point
support for evrp and friends, but doing so is beyond my limited FP
knowledge. For example, frange could be enhanced to track constant
endpoints, and we could track other FP properties aside from NAN.
Further discussion is gladly welcome.
Tested on x86-64 Linux.
gcc/ChangeLog:
* value-range-pretty-print.cc (vrange_printer::visit): New.
(vrange_printer::print_frange_prop): New.
* value-range-pretty-print.h (class vrange_printer): Add visit and
print_frange_prop.
* value-range-storage.h (vrange_allocator::alloc_vrange): Handle frange.
(vrange_allocator::alloc_frange): New.
* value-range.cc (vrange::operator=): Handle frange.
(vrange::operator==): Same.
(frange::accept): New.
(frange::set): New.
(frange::normalize_kind): New.
(frange::union_): New.
(frange::intersect): New.
(frange::operator=): New.
(frange::operator==): New.
(frange::supports_type_p): New.
(frange::verify_range): New.
* value-range.h (enum value_range_discriminator): Handle frange.
(class fp_prop): New.
(FP_PROP_ACCESSOR): New.
(class frange_props): New.
(FRANGE_PROP_ACCESSOR): New.
(class frange): New.
(Value_Range::init): Handle frange.
(Value_Range::operator=): Same.
(Value_Range::supports_type_p): Same.
(frange_props::operator==): New.
(frange_props::union_): New.
(frange_props::intersect): New
(frange::frange): New.
(frange::type): New.
(frange::set_varying): New.
(frange::set_undefined): New.
Peter Bergner [Mon, 25 Jul 2022 05:51:44 +0000 (00:51 -0500)]
rs6000: Adjust -mdejagnu-cpu to filter out -mtune [PR106345]
As PR106345 shows, when configuring compiler with an explicit
option --with-tune=<value>, it would cause some test cases to
fail if their test points are sensitive to tune setting, such
as: group_ending_nop, loop align etc. It doesn't help that
even to specify one explicit -mcpu=.
This patch is to adjust the behavior of -mdejagnu-cpu by
filtering out all -mcpu= and -mtune= options, then test cases
would use <cpu> as tune as the one specified by -mdejagnu-cpu.
2022-07-25 Peter Bergner <bergner@linux.ibm.com>
Kewen Lin <linkw@linux.ibm.com>
PR testsuite/106345
gcc/ChangeLog:
* config/rs6000/rs6000.h (DRIVER_SELF_SPECS): Adjust -mdejagnu-cpu
to filter out all -mtune options.
Jason Merrill [Fri, 22 Jul 2022 23:25:36 +0000 (19:25 -0400)]
c++: correct testcase PR number
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/nsdmi-union7.C: Fix PR number.
GCC Administrator [Mon, 25 Jul 2022 00:16:29 +0000 (00:16 +0000)]
Daily bump.
Aldy Hernandez [Sun, 24 Jul 2022 05:55:02 +0000 (07:55 +0200)]
Minor fixes to vr_values to not die on non integral types.
The legacy code in vr_values mostly works on integral types (with few
exceptions such as some conversions from float). This patch makes
vr_values::range_of_expr not die when asked for a range of an
unsupported type. It also keeps the min/max simplification code from
being called on non integrals, similarly to what many of the other
assignment code is doing.
This is all a nop on the current code, but will keep us from
misbehaving when VRP starts working on non-integrals.
Tested on x86-64 Linux.
gcc/ChangeLog:
* value-query.cc (range_query::get_value_range): Add assert.
* vr-values.cc (vr_values::range_of_expr): Make sure we don't ICE
on unsupported types in vr_values.
(simplify_using_ranges::simplify): Same.
Aldy Hernandez [Wed, 20 Jul 2022 18:37:45 +0000 (20:37 +0200)]
Tweaks to global ranges.
The global get_nonzero_bits was previously returning -1 for
unsupported types. I dropped this in the conversion to global ranges
and it's causing a problem in the frange work, where CCP is asking for
the nonzero bits of non-integral types. CCP may require further
tweaks, but for now, restore the original behavior.
Also, I'm removing old checks for precision that no longer hold, now
that we handle various types for global ranges.
Tested on x86-64 Linux.
gcc/ChangeLog:
* tree-ssanames.cc (get_nonzero_bits): Return -1 for unsupported
types.
* value-query.cc (get_ssa_name_range_info): Remove precision check.
Aldy Hernandez [Wed, 20 Jul 2022 18:36:54 +0000 (20:36 +0200)]
Allow registering same SSA name relations in oracle.
Similarly to what we did for the relation oracle, but for the path
oracle. This was found while working on frange, where we can test for
x == x while checking for NANness.
Tested on x86-64 Linux.
gcc/ChangeLog:
* value-relation.cc (value_relation::set_relation): Remove assert.
(path_oracle::register_relation): Exit when trying to register
same SSA name relations.
Aldy Hernandez [Wed, 20 Jul 2022 18:35:15 +0000 (20:35 +0200)]
Convert some uses in ranger_cache and DOM to vrange.
Here are a few conversions to type agnostic vrange I found while
working on frange.
Tested on x86-64 Linux.
gcc/ChangeLog:
* gimple-range-cache.cc (ranger_cache::edge_range): Convert to vrange.
(ranger_cache::range_from_dom): Same.
* tree-ssa-dom.cc
(dom_opt_dom_walker::set_global_ranges_from_unreachable_edges): Same.
Roger Sayle [Sun, 24 Jul 2022 11:22:22 +0000 (12:22 +0100)]
PR target/106303: Fix TImode STV related failures on x86.
This patch resolves PR target/106303 (and the related PRs 106347,
106404, 106407) which are ICEs caused by my improvements to x86_64's
128-bit TImode to V1TImode Scalar to Vector (STV) pass. My apologies
for the breakage. The issue is that data flow analysis is used to
partition usage of each TImode pseudo into "chains", where each
chain is analyzed and if suitable converted to vector operations.
The problems appears when some chains for a pseudo are converted,
and others aren't as RTL sharing can result in some mode changes
leaking into other instructions that aren't/shouldn't/can't be
converted, which eventually leads to an ICE for mismatched modes.
My first approach to a fix was to unify more of the STV infrastructure,
reasoning that if TImode STV was exhibiting these problems, but DImode
and SImode STV weren't, the issue was likely to be caused/resolved by
these remaining differences. This appeared to fix some but not all of
the reported PRs. A better solution was then proposed by H.J. Lu in
Bugzilla, that we need to iterate the removal of candidates in the
function timode_remove_non_convertible_regs until there are no further
changes. As each chain is removed from consideration, it in turn may
affect whether other insns/chains can safely be converted.
2022-07-24 Roger Sayle <roger@nextmovesoftware.com>
H.J. Lu <hjl.tools@gmail.com>
gcc/ChangeLog
PR target/106303
PR target/106347
* config/i386/i386-features.cc (make_vector_copies): Move from
general_scalar_chain to scalar_chain.
(convert_reg): Likewise.
(convert_insn_common): New scalar_chain method split out from
general_scalar_chain convert_insn.
(convert_registers): Move from general_scalar_chain to
scalar_chain.
(scalar_chain::convert): Call convert_insn_common before calling
convert_insn.
(timode_remove_non_convertible_regs): Iterate until there are
no further changes to the candidates.
* config/i386/i386-features.h (scalar_chain::hash_map): Move
from general_scalar_chain.
(scalar_chain::convert_reg): Likewise.
(scalar_chain::convert_insn_common): New shared method.
(scalar_chain::make_vector_copies): Move from general_scalar_chain.
(scalar_chain::convert_registers): Likewise. No longer virtual.
(general_scalar_chain::hash_map): Delete. Moved to scalar_chain.
(general_scalar_chain::convert_reg): Likewise.
(general_scalar_chain::make_vector_copies): Likewise.
(general_scalar_chain::convert_registers): Delete virtual method.
(timode_scalar_chain::convert_registers): Likewise.
gcc/testsuite/ChangeLog
PR target/106303
PR target/106347
* gcc.target/i386/pr106303.c: New test case.
* gcc.target/i386/pr106347.c: New test case.
GCC Administrator [Sun, 24 Jul 2022 00:16:21 +0000 (00:16 +0000)]
Daily bump.
Immad Mir [Sat, 23 Jul 2022 05:14:23 +0000 (10:44 +0530)]
Adding three new function attributes for static analysis of file descriptors
This patch adds three new function attributes to GCC that
are used for static analysis of usage of file descriptors:
1) __attribute__ ((fd_arg(N))): The attributes may be applied to a function that
takes an open file descriptor at refrenced argument N.
It indicates that the passed filedescriptor must not have been closed.
Therefore, when the analyzer is enabled with -fanalyzer, the
analyzer may emit a -Wanalyzer-fd-use-after-close diagnostic
if it detects a code path in which a function with this attribute is
called with a closed file descriptor.
The attribute also indicates that the file descriptor must have been checked for
validity before usage. Therefore, analyzer may emit
-Wanalyzer-fd-use-without-check diagnostic if it detects a code path in
which a function with this attribute is called with a file descriptor that has
not been checked for validity.
2) __attribute__((fd_arg_read(N))): The attribute is identical to
fd_arg, but with the additional requirement that it might read from
the file descriptor, and thus, the file descriptor must not have been opened
as write-only.
The analyzer may emit a -Wanalyzer-access-mode-mismatch
diagnostic if it detects a code path in which a function with this
attribute is called on a file descriptor opened with O_WRONLY.
3) __attribute__((fd_arg_write(N))): The attribute is identical to fd_arg_read
except that the analyzer may emit a -Wanalyzer-access-mode-mismatch diagnostic if
it detects a code path in which a function with this attribute is called on a
file descriptor opened with O_RDONLY.
gcc/analyzer/ChangeLog:
* sm-fd.cc (fd_param_diagnostic): New diagnostic class.
(fd_access_mode_mismatch): Change inheritance from fd_diagnostic
to fd_param_diagnostic. Add new overloaded constructor.
(fd_use_after_close): Likewise.
(unchecked_use_of_fd): Likewise and also change name to fd_use_without_check.
(double_close): Change name to fd_double_close.
(enum access_directions): New.
(fd_state_machine::on_stmt): Handle calls to function with the
new three function attributes.
(fd_state_machine::check_for_fd_attrs): New.
(fd_state_machine::on_open): Use the new overloaded constructors
of diagnostic classes.
gcc/c-family/ChangeLog:
* c-attribs.cc: (c_common_attribute_table): add three new attributes
namely: fd_arg, fd_arg_read and fd_arg_write.
(handle_fd_arg_attribute): New.
gcc/ChangeLog:
* doc/extend.texi: Add fd_arg, fd_arg_read and fd_arg_write under
"Common Function Attributes" section.
* doc/invoke.texi: Add docs to -Wanalyzer-fd-access-mode-mismatch,
-Wanalyzer-use-after-close, -Wanalyzer-fd-use-without-check that these
warnings may be emitted through usage of three function attributes used
for static analysis of file descriptors namely fd_arg, fd_arg_read and
fd_arg_write.
gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/fd-5.c: New test.
* gcc.dg/analyzer/fd-4.c: Remove quotes around 'read-only' and
'write-only'.
* c-c++-common/attr-fd.c: New test.
Signed-off-by: Immad Mir <mirimmad17@gmail.com>
GCC Administrator [Sat, 23 Jul 2022 00:16:27 +0000 (00:16 +0000)]
Daily bump.
David Malcolm [Fri, 22 Jul 2022 23:50:54 +0000 (19:50 -0400)]
analyzer: fix state explosion on va_arg [PR106413]
Fix state explosion on va_arg when the call to va_start is in the
top-level function of the analysis.
gcc/analyzer/ChangeLog:
PR analyzer/106413
* varargs.cc (region_model::impl_call_va_start): Avoid iterating
through non-existant variadic arguments by initializing the
impl_region to "UNKNOWN" if the va_start occurs in the top-level
function to the analysis.
gcc/testsuite/ChangeLog:
PR analyzer/106413
* gcc.dg/analyzer/torture/stdarg-4.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Fri, 22 Jul 2022 23:50:37 +0000 (19:50 -0400)]
analyzer: fix ICE in binding_cluster ctor [PR106401]
gcc/analyzer/ChangeLog:
PR analyzer/106401
* store.cc (binding_cluster::binding_cluster): Remove overzealous
assertion; we're checking for tracked_p in
store::get_or_create_cluster.
gcc/testsuite/ChangeLog:
PR analyzer/106401
* gcc.dg/analyzer/memcpy-2.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Patrick Palka [Fri, 22 Jul 2022 22:42:02 +0000 (18:42 -0400)]
c++: CTAD from initializer list [PR106366]
During CTAD, we currently perform the first phase of overload resolution
from [over.match.list] only if the class template has a list constructor.
But according to [over.match.class.deduct]/4 it should be enough to just
have a guide that looks like a list constructor (which is a more general
criterion in light of user-defined guides).
PR c++/106366
gcc/cp/ChangeLog:
* pt.cc (do_class_deduction): Don't consider TYPE_HAS_LIST_CTOR
when setting try_list_ctor. Reset args even when try_list_ctor
is true and there are no list candidates. Call resolve_args on
the reset args. Rename try_list_ctor to try_list_cand.
gcc/testsuite/ChangeLog:
* g++.dg/cpp1z/class-deduction112.C: New test.
Jason Merrill [Fri, 22 Jul 2022 21:39:06 +0000 (17:39 -0400)]
c++: correct ChangeLog PR number
Marek Polacek [Fri, 22 Jul 2022 20:47:34 +0000 (16:47 -0400)]
Fix CL entry
Tim Lange [Fri, 22 Jul 2022 19:44:07 +0000 (21:44 +0200)]
Fix handling of zero capacity regions in -Wanalyzer-allocation-size [PR106394]
This patch unifies the handling of zero capacity regions for structs
and other types in the allocation size checker.
Regression-tested on x86_64 Linux.
2022-07-22 Tim Lange <mail@tim-lange.me>
gcc/analyzer/ChangeLog:
PR analyzer/106394
* region-model.cc (capacity_compatible_with_type): Always return true
if alloc_size is zero.
gcc/testsuite/ChangeLog:
PR analyzer/106394
* gcc.dg/analyzer/pr106394.c: New test.
Takayuki 'January June' Suwa [Fri, 22 Jul 2022 11:15:50 +0000 (20:15 +0900)]
xtensa: Optimize "bitwise AND NOT with imm" followed by "branch if (not) equal to zero"
The RTL combiner will transform "if ((x & C) == C) goto label;"
into "if ((~x & C) == 0) goto label;" and will try to match it with
the insn patterns.
/* example */
void test_0(int a) {
if ((char)a == 255)
foo();
}
void test_1(int a) {
if ((unsigned short)a == 0xFFFF)
foo();
}
void test_2(int a) {
if ((a & 0x00003F80) != 0x00003F80)
foo();
}
;; before
test_0:
extui a2, a2, 0, 8
movi a3, 0xff
bne a2, a3, .L1
j.l foo, a9
.L1:
ret.n
test_1:
movi.n a3, -1
extui a2, a2, 0, 16
extui a3, a3, 16, 16
bne a2, a3, .L3
j.l foo, a9
.L3:
ret.n
test_2:
movi a3, 0x80
extui a2, a2, 7, 7
addmi a3, a3, 0x3f00
slli a2, a2, 7
beq a2, a3, .L5
j.l foo, a9
.L5:
ret.n
;; after
test_0:
movi a3, 0xff
bnall a2, a3, .L1
j.l foo, a9
.L1:
ret.n
test_1:
movi.n a3, -1
extui a3, a3, 16, 16
bnall a2, a3, .L3
j.l foo, a9
.L3:
ret.n
test_2:
movi a3, 0x80
addmi a3, a3, 0x3f00
ball a2, a3, .L5
j.l foo, a9
.L5:
ret.n
gcc/ChangeLog:
* config/xtensa/xtensa.md (*masktrue_const_bitcmpl):
Add a new insn_and_split pattern, and a few split patterns for
spacial cases.
Ian Lance Taylor [Fri, 22 Jul 2022 18:38:20 +0000 (11:38 -0700)]
libgo: use POSIX shell arithmetic expansion
Avoid bash-specific ((expression)) syntax. As the bash syntax
converts a non-zero value to a zero status (and a zero value to a 1
status), and POSIX arithmetic expansion does not, we have to negate
the result.
Based on patch by Sören Tempel.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/419154
Richard Sandiford [Fri, 22 Jul 2022 14:05:57 +0000 (15:05 +0100)]
graphds: Fix description of SCC algorithm
graphds_scc says that it uses Tarjan's algorithm, but it looks like
it uses Kosaraju's algorithm instead (dfs one way followed by dfs
the other way).
gcc/
* graphds.cc (graphds_scc): Fix algorithm attribution.
Martin Liska [Fri, 22 Jul 2022 09:26:08 +0000 (11:26 +0200)]
Allow space in git commit-mklog args
contrib/ChangeLog:
* git-commit-mklog.py: Do not parse -b argument.
Pass mklog_args as json environment variable.
* mklog.py: Parse GCC_MKLOG_ARGS and append it to sys.argv.
* prepare-commit-msg: Do not append GCC_MKLOG_ARGS to args.
Rainer Orth [Fri, 22 Jul 2022 11:18:14 +0000 (13:18 +0200)]
libsanitizer: Fix Solaris 11.3 compilation [PR105531]
The libsanitizer build has been broken on Solaris 11.3 by the latest
import. An upstream patch to fix this has now been committed:
[sanitizer_common] Support Solaris < 11.4 in GetStaticTlsBoundary
https://reviews.llvm.org/D120059
I'd like to cherry-pick it into libsanitizer, too.
Bootstrapped without regressions on sparc-sun-solaris2.11,
i386-pc-solaris2.11 (both Solaris 11.3 and 11.4), and
x86_64-pc-linux-gnu.
2022-07-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
libsanitizer:
PR sanitizer/105531
* sanitizer_common/sanitizer_linux_libcdep.cpp,
sanitizer_common/sanitizer_solaris.h:: Cherry-pick
llvm-project revision
3776db9a4fd2080d23d6a5f52e405eea44558761.
Martin Liska [Fri, 22 Jul 2022 09:39:58 +0000 (11:39 +0200)]
mklog: fill-up subject prefix only for a single PR
contrib/ChangeLog:
* mklog.py: Use component: [PR xyz] only when one PR is used.
Richard Biener [Fri, 22 Jul 2022 08:13:06 +0000 (10:13 +0200)]
tree-optimization/106403 - fix ICE with VN of .STORE_LANES
While .STORE_LANES is not supported by the recent VN patch we were
still accessing the stored value and valueizing it - but
internal_fn_stored_value_index does not support .STORE_LANES and
we failed to honor that case. Fixed by simply moving the affected
code below the check for the actual supported internal functions.
PR tree-optimization/106403
* tree-ssa-sccvn.cc (vn_reference_lookup_3): Move stored
value valueization after check for IFN_MASKED_STORE or
IFN_LEN_STORE.
Richard Biener [Fri, 22 Jul 2022 07:57:38 +0000 (09:57 +0200)]
tree-optimization/106397 - array prefetch and LC SSA
The following fixes maintaining LC SSA when array prefetch inserts
mfence instructions on loop exits that do not use memory. It also
fixes the latent issue that it might split exit edges for this
which will break LC SSA for non-virtuals as well. It should also
make the process cheaper by accumulating the required (LC) SSA
update until the end of the pass.
PR tree-optimization/106397
* tree-ssa-loop-prefetch.cc (emit_mfence_after_loop): Do
not update SSA form here.
(mark_nontemporal_stores): Return whether we marked any
non-temporal stores and inserted mfence.
(loop_prefetch_arrays): Note when we need to update SSA.
(tree_ssa_prefetch_arrays): Perform required (LC) SSA update
at the end of the pass.
* gcc.dg/pr106397.c: New testcase.
Richard Biener [Fri, 22 Jul 2022 07:00:37 +0000 (09:00 +0200)]
tree-optimization/106387 - properly create SSA name for realigned load
The following fixes an oversight triggering after the recent change
to bump_vector_ptr.
PR tree-optimization/106387
* tree-vect-stmts.cc (vectorizable_load): Use make_ssa_name
if ptr is not an SSA name.
Martin Liska [Fri, 22 Jul 2022 07:28:48 +0000 (09:28 +0200)]
remove 'continue' as last statement in loop
PR other/106370
gcc/cp/ChangeLog:
* init.cc (sort_mem_initializers): Remove continue as last stmt
in a loop.
libiberty/ChangeLog:
* _doprnt.c: Remove continue as last stmt
in a loop.
liuhongt [Fri, 22 Jul 2022 01:54:52 +0000 (09:54 +0800)]
Adjust testcase.
r13-1762-gf9d4c3b45c5ed5f45c8089c990dbd4e181929c3d lower complex type
move to scalars, but testcase pr23911 is supposed to scan __complex__
constant which is never available, so adjust testcase to scan
IMAGPART/REALPART_EXPR constants separately.
gcc/testsuite/ChangeLog
PR tree-optimization/106010
* gcc.dg/pr23911.c: Scan IMAGPART/REALPART_EXPR = ** instead
of __complex__ since COMPLEX_CST is lower to scalars.
liuhongt [Thu, 7 Jul 2022 06:33:32 +0000 (14:33 +0800)]
Extend 16/32-bit vector bit_op patterns with (m,0,i) alternative.
And split it after reload.
gcc/ChangeLog:
PR target/106038
* config/i386/mmx.md (<code><mode>3): New define_expand, it's
original "<code><mode>3".
(*<code><mode>3): New define_insn, it's original
"<code><mode>3" be extended to handle memory and immediate
operand with ix86_binary_operator_ok. Also adjust define_split
after it.
(mmxinsnmode): New mode attribute.
(*mov<mode>_imm): Refactor with mmxinsnmode.
* config/i386/predicates.md
(register_or_x86_64_const_vector_operand): New predicate.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr106038-1.c: New test.
Will Schmidt [Fri, 22 Jul 2022 00:38:22 +0000 (19:38 -0500)]
[PATCH, rs6000] Cleanup some vstrir define_expand naming inconsistencies
This cleans up some of the naming around the vstrir and vstril
instruction definitions, with some cosmetic changes for consistency.
No functional changes.
Regtested just in case, no regressions.
[V2] Used 'direct' instead of 'internal', and cosmetically reworked
the changelog.
gcc/
* config/rs6000/altivec.md:
(vstrir_code_<mode>): Rename to...
(vstrir_direct_<mode>): ... this.
(vstrir_p_code_<mode>): Rename to...
(vstrir_p_direct_<mode>): ... this.
(vstril_code_<mode>): Rename to...
(vstril_direct_<mode>): ... this.
(vstril_p_code_<mode>): Rename to...
(vstril_p_direct_<mode>): ... this.
Will Schmidt [Fri, 22 Jul 2022 00:35:13 +0000 (19:35 -0500)]
[PATCH, rs6000] Additional cleanup of rs6000_builtin_mask
Post the rs6000 builtins rewrite, some of the leftover builtin
code is redundant and can be removed.
This replaces the usage of bu_mask in rs6000_target_modify_macros
with checks against the rs6000_isa_flags equivalent directly. Thusly
the bu_mask variable can be removed. After this update there
are no other uses of rs6000_builtin_mask_calculate, so that function
can also be safely removed.
No functional change, though some output under debug has been removed.
[V2] Per patch review and subsequent investigations, the
rs6000_builtin_mask and x_rs6000_builtin_mask can also be removed, as
well as the entirety of the rs6000_builtin_mask_names table.
gcc/
* config/rs6000/rs6000-c.cc: Update comments.
(rs6000_target_modify_macros): Remove bu_mask references.
(rs6000_define_or_undefine_macro): Replace bu_mask reference
with a rs6000_cpu value check.
(rs6000_cpu_cpp_builtins): Remove rs6000_builtin_mask_calculate()
parameter from call to rs6000_target_modify_macros.
* config/rs6000/rs6000-protos.h (rs6000_target_modify_macros,
rs6000_target_modify_macros_ptr): Remove parameter from extern
for the prototype.
* config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): Remove
parameter from prototype, update calls to this function.
(rs6000_print_builtin_options): Remove prototype, call and function.
(rs6000_builtin_mask_calculate): Remove function.
(rs6000_debug_reg_global): Remove call to rs6000_print_builtin_options.
(rs6000_option_override_internal): Remove rs6000_builtin_mask var
and builtin_mask debug output.
(rs6000_builtin_mask_names): Remove.
(rs6000_pragma_target_parse): Remove prev_bumask, cur_bumask,
diff_bumask references; Update calls to rs6000_target_modify_ptr.
* config/rs6000/rs6000.opt (rs6000_builtin_mask): Remove.
GCC Administrator [Fri, 22 Jul 2022 00:16:33 +0000 (00:16 +0000)]
Daily bump.
David Malcolm [Thu, 21 Jul 2022 21:29:26 +0000 (17:29 -0400)]
analyzer: fix -Wanalyzer-va-list-exhausted false +ve on va_arg in subroutine [PR106383]
gcc/analyzer/ChangeLog:
PR analyzer/106383
* varargs.cc (region_model::impl_call_va_arg): When determining if
we're doing interprocedural analysis, use the stack depth of the
frame in which va_start was called, rather than the current stack
depth.
gcc/testsuite/ChangeLog:
PR analyzer/106383
* gcc.dg/analyzer/stdarg-3.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Sam Feifer [Thu, 21 Jul 2022 20:31:41 +0000 (16:31 -0400)]
match.pd: Add new abs pattern [PR94920]
This patch is intended to fix a missed optimization in match.pd. It optimizes (x >= 0 ? x : 0) + (x <= 0 ? -x : 0) to just abs(x). Additionally, the pattern (x <= 0 ? -x : 0) now gets optimized to max(-x, 0), which helps with the other simplification rule.
Tests are also included to be added to the testsuite.
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
PR tree-optimization/94920
gcc/ChangeLog:
* match.pd (x >= 0 ? x : 0) + (x <= 0 ? -x : 0): New simplification.
(x <= 0 ? -x : 0): New simplification.
gcc/testsuite/ChangeLog:
* g++.dg/pr94920-1.C: New test.
* g++.dg/pr94920.C: New test.
* gcc.dg/pr94920-2.c: New test.
Jason Merrill [Thu, 21 Jul 2022 00:00:58 +0000 (20:00 -0400)]
c++: defaulted friend op== [PR106361]
Now non-member functions can be defaulted, so this assert is wrong.
move_signature_fn_p already checks for ctor or op=.
PR c++/106361
gcc/cp/ChangeLog:
* decl.cc (move_fn_p): Remove assert.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/spaceship-eq14.C: New test.
Jason Merrill [Wed, 20 Jul 2022 22:15:31 +0000 (18:15 -0400)]
c++: defaulted ctor with DMI in union [PR94823]
CWG2084 clarifies that a variant member with a non-trivial constructor does
not make the union's defaulted default constructor deleted if another
variant member has a default member initializer.
DR 2084
PR c++/94823
gcc/cp/ChangeLog:
* method.cc (walk_field_subobs): Fix DMI in union case.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/nsdmi-union7.C: New test.
Sam Feifer [Thu, 21 Jul 2022 19:49:57 +0000 (15:49 -0400)]
MAINTAINERS: Add myself to Write After Approval
ChangeLog:
* MAINTAINERS (Write After Approval): Add myself.
Martin Liska [Thu, 21 Jul 2022 14:11:23 +0000 (16:11 +0200)]
docs: remove trailing dots for 2 Fortran fns
gcc/fortran/ChangeLog:
* intrinsic.texi: Remove trailing dots for 2 Fortran fns.
Prathamesh Kulkarni [Thu, 21 Jul 2022 11:36:03 +0000 (17:06 +0530)]
Revert "forwprop: Use lhs type instead of arg0 in folding VEC_PERM_EXPR."
This reverts commit
4c3231302577445417715a7c22e879e4159376d3.
gcc/ChangeLog:
Revert:
* tree-ssa-forwprop.cc (simplify_permutation): Use lhs type
instead of TREE_TYPE (arg0) as result type in folding VEC_PERM_EXPR.
Richard Biener [Thu, 21 Jul 2022 11:20:47 +0000 (13:20 +0200)]
tree-optimization/106379 - add missing ~(a ^ b) folding for _Bool
The following makes sure to fold ~(a ^ b) to a == b for truth
values (but not vectors, we'd have to check for vector support of
equality). That turns the PR106379 testcase into a ranger one.
Note that while we arrive at ~(a ^ b) in a convoluted way from
original !a == !b one can eventually write the expression this
way directly as well.
PR tree-optimization/106379
* match.pd (~(a ^ b) -> a == b): New pattern.
* gcc.dg/pr106379-1.c: New testcase.
Richard Biener [Thu, 21 Jul 2022 08:13:46 +0000 (10:13 +0200)]
tree-optimization/106378 - DSE of LEN_STORE and MASK_STORE
The following enhances DSE to handle LEN_STORE (optimally) and
MASK_STORE (conservatively).
PR tree-optimization/106378
* tree-ssa-dse.cc (initialize_ao_ref_for_dse): Handle
LEN_STORE, add mode to initialize a may-def and handle
MASK_STORE that way.
(dse_optimize_stmt): Query may-defs. Handle internal
functions LEN_STORE and MASK_STORE similar to how
we handle memory builtins but without byte tracking.
Richard Biener [Wed, 20 Jul 2022 10:28:26 +0000 (12:28 +0200)]
Teach VN about masked/len stores
The following teaches VN to handle reads from .MASK_STORE and
.LEN_STORE. For this push_partial_def is extended first for
convenience so we don't have to handle the full def case in the
caller (possibly other paths can be simplified then). Also
the partial definition stored value can have an offset applied
so we don't have to build a fake RHS when we register the pieces
of an existing store.
PR tree-optimization/106365
* tree-ssa-sccvn.cc (pd_data::rhs_off): New field determining
the offset to start encoding of RHS from.
(vn_walk_cb_data::vn_walk_cb_data): Initialize it.
(vn_walk_cb_data::push_partial_def): Allow the first partial
definition to be fully providing the def. Offset RHS
before encoding if requested.
(vn_reference_lookup_3): Initialize def_rhs everywhere.
Add support for .MASK_STORE and .LEN_STORE (partial) definitions.
* gcc.target/i386/vec-maskstore-vn.c: New testcase.
Marc Poulhiès [Thu, 21 Jul 2022 08:53:09 +0000 (10:53 +0200)]
MAINTAINERS: Add myself as Ada front end co-maintainer
Add myself as Ada front end co-maintainer.
ChangeLog:
* MAINTAINERS: Add myself as Ada front end co-maintainer.
Richard Biener [Wed, 20 Jul 2022 13:46:17 +0000 (15:46 +0200)]
Add alias disambiguation for vectorizer load/store IFNs
The following adds support for MASK_STORE, MASK_LOAD and friends
to call_may_clobber_ref_p and ref_maybe_used_by_call_p. Since
they all use a special argument to specify TBAA they are not really
suited for fnspec handling thus the manual support.
* tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Special-case
store internal functions and IFN_MASK_LOAD, IFN_LEN_LOAD
and IFN_MASK_LOAD_LANES.
(call_may_clobber_ref_p_1): Special-case IFN_MASK_STORE,
IFN_LEN_STORE and IFN_MASK_STORE_LANES.
David Malcolm [Thu, 21 Jul 2022 01:34:17 +0000 (21:34 -0400)]
analyzer: bulletproof taint warnings against NULL m_arg
gcc/analyzer/ChangeLog:
* sm-taint.cc (tainted_array_index::emit): Bulletproof against
NULL m_arg.
(tainted_array_index::describe_final_event): Likewise.
(tainted_size::emit): Likewise.
(tainted_size::describe_final_event): Likewise.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Thu, 21 Jul 2022 01:34:03 +0000 (21:34 -0400)]
analyzer: fix ICE on untracked decl_regions [PR106374]
gcc/analyzer/ChangeLog:
PR analyzer/106374
* region.cc (decl_region::get_svalue_for_initializer): Bail out on
untracked regions.
gcc/testsuite/ChangeLog:
PR analyzer/106374
* gcc.dg/analyzer/untracked-2.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
GCC Administrator [Thu, 21 Jul 2022 00:16:34 +0000 (00:16 +0000)]
Daily bump.
Jonathan Wakely [Wed, 20 Jul 2022 15:51:44 +0000 (16:51 +0100)]
libstdc++: Fix std::common_iterator triviality [PR100823]
This fixes the remaining problem reported in the PR, that the special
members should be trivial. This can be done by constraining the
non-trivial versions and adding defaulted overloads that will be used
when the union members are trivial.
Making these members trivial alters the argument passing ABI and so
isn't suitable for backporting to release branches.
libstdc++-v3/ChangeLog:
PR libstdc++/100823
* include/bits/stl_iterator.h (common_iterator): Define
destructor, copy constructor and move constructor as trivial
when the underlying types allow.
* testsuite/24_iterators/common_iterator/100823.cc: Check
triviality of special members.
Jonathan Wakely [Wed, 20 Jul 2022 15:51:44 +0000 (16:51 +0100)]
libstdc++: Fix std::common_iterator assignment [PR100823]
This fixes the following conformance problems reported in the PR:
- Move constructor and move assignment should be defined.
- Copy assignment from a valueless object should be allowed.
Assignment is completely rewritten by this patch, as the previous
version had a number of problems. The converting assignment failed to
handle the case of assigning a new value to a valueless object, which
should work. It only accepted lvalue arguments, so wasn't usable to
implement the move assignment operator. Finally, it enforced the
precondition that the argument is not valueless, which is correct for
the converting assignment but not for the copy assignment.
A new _M_assign member is added to handle all cases of assignment
(copying from an lvalue, moving from an rvalue, and converting from a
different type). The not valueless precondition is checked in the
converting assignment before calling _M_assign, so isn't enforced for
copy and move assignment. The new function no longer uses a switch, so
handles valueless objects as the LHS or RHS of the assignment.
libstdc++-v3/ChangeLog:
PR libstdc++/100823
* include/bits/stl_iterator.h (common_iterator): Define move
constructor and move assignment operator.
(common_iterator::_M_assign): New function implementing
assignment.
(common_iterator::operator=): Use _M_assign.
(common_iterator::_S_valueless): New constant.
* testsuite/24_iterators/common_iterator/100823.cc: New test.
Jonathan Wakely [Wed, 20 Jul 2022 11:49:28 +0000 (12:49 +0100)]
libstdc++: Fix minor bugs in std::common_iterator
The noexcept-specifier for some std::common_iterator constructors was
incorrectly using an rvalue as the first argument of
std::is_nothrow_assignable_v. This gave the wrong answer for some types,
e.g. std::common_iterator<int*, S>, because an rvalue of scalar type
cannot be assigned to.
Also fix the friend declaration to use the same constraints as on the
definition of the class template. G++ fails to diagnose this error, due
to PR c++/96830.
Finally, the copy constructor was using std::move for its argument
in some cases, which should be removed.
libstdc++-v3/ChangeLog:
* include/bits/stl_iterator.h (common_iterator): Fix incorrect
uses of is_nothrow_assignable_v. Fix inconsistent constraints on
friend declaration. Do not move argument in copy constructor.
* testsuite/24_iterators/common_iterator/1.cc: Check for
noexcept constructibnle/assignable.
David Malcolm [Wed, 20 Jul 2022 21:25:35 +0000 (17:25 -0400)]
analyzer: update "tainted" state of RHS in comparisons [PR106373]
Doing so fixes various false positives from
-Wanalyzer-tainted-array-index at -O1 and above (e.g. seen on the
Linux kernel)
gcc/analyzer/ChangeLog:
PR analyzer/106373
* sm-taint.cc (taint_state_machine::on_condition): Potentially
update the state of the RHS as well as the LHS.
gcc/testsuite/ChangeLog:
PR analyzer/106373
* gcc.dg/analyzer/torture/taint-read-index-3.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Harald Anlauf [Wed, 20 Jul 2022 18:40:23 +0000 (20:40 +0200)]
Fortran: fix parsing of omp task affinity iterator clause [PR101330]
gcc/fortran/ChangeLog:
PR fortran/101330
* openmp.cc (gfc_match_iterator): Remove left-over code from
development that could lead to a crash on invalid input.
gcc/testsuite/ChangeLog:
PR fortran/101330
* gfortran.dg/gomp/affinity-clause-7.f90: New test.
Alexander Monakov [Tue, 19 Jul 2022 15:04:30 +0000 (18:04 +0300)]
Avoid registering __builtin_setjmp_receiver label twice [PR101347]
The testcase in the PR demonstrates how it is possible for one
__builtin_setjmp_receiver label to appear in
nonlocal_goto_handler_labels list twice (after the block with
__builtin_setjmp_setup referring to it was duplicated).
remove_node_from_insn_list did not account for this possibility and
removed only the first copy from the list. Add an assert verifying that
duplicates are not present.
To avoid adding a label to the list twice, move registration of the
label from __builtin_setjmp_setup handling to __builtin_setjmp_receiver.
gcc/ChangeLog:
PR rtl-optimization/101347
* builtins.cc (expand_builtin) [BUILT_IN_SETJMP_SETUP]: Move
population of nonlocal_goto_handler_labels from here ...
(expand_builtin) [BUILT_IN_SETJMP_RECEIVER]: ... to here.
* rtlanal.cc (remove_node_from_insn_list): Verify that a
duplicate is not present in the remainder of the list.
Alexander Monakov [Tue, 19 Jul 2022 15:01:37 +0000 (18:01 +0300)]
Remove unused remove_node_from_expr_list
This function remains unused since remove_node_from_insn_list was cloned
from it.
gcc/ChangeLog:
* rtl.h (remove_node_from_expr_list): Remove declaration.
* rtlanal.cc (remove_node_from_expr_list): Remove (no uses).
Richard Biener [Wed, 20 Jul 2022 09:02:03 +0000 (11:02 +0200)]
Improve SLP codegen, avoiding unnecessary TREE_ADDRESSABLE
The following adjusts vectorizer code generation to avoid splitting
out address increments for invariant addresses which causes objects
to get TREE_ADDRESSABLE when not necessary.
* tree-vect-data-refs.cc (bump_vector_ptr): Return an
invariant updated address when the input was invariant.
liuhongt [Tue, 19 Jul 2022 03:22:24 +0000 (11:22 +0800)]
Move pass_cse_sincos after vectorizer.
__builtin_cexpi can't be vectorized since there's gap between it and
vectorized sincos version(In libmvec, it passes a double and two
double pointer and returns nothing.) And it will lose some
vectorization opportunity if sin & cos are optimized to cexpi before
vectorizer.
I'm trying to add vect_recog_cexpi_pattern to split cexpi to sin and
cos, but it failed vectorizable_simd_clone_call since NULL is returned
by cgraph_node::get (fndecl). So alternatively, the patch try to move
pass_cse_sincos after vectorizer, just before pas_cse_reciprocals.
Also original pass_cse_sincos additionaly expands pow&cabs, this patch
split that part into a separate pass named pass_expand_powcabs which
remains the old pass position.
gcc/ChangeLog:
* passes.def: (Split pass_cse_sincos to pass_expand_powcabs
and pass_cse_sincos, and move pass_cse_sincos after vectorizer).
* timevar.def (TV_TREE_POWCABS): New timevar.
* tree-pass.h (make_pass_expand_powcabs): Split from pass_cse_sincos.
* tree-ssa-math-opts.cc (gimple_expand_builtin_cabs): Ditto.
(class pass_expand_powcabs): Ditto.
(pass_expand_powcabs::execute): Ditto.
(make_pass_expand_powcabs): Ditto.
(pass_cse_sincos::execute): Remove pow/cabs expand part.
(make_pass_cse_sincos): Ditto.
gcc/testsuite/ChangeLog:
* gcc.dg/pow-sqrt-synth-1.c: Adjust testcase.
liuhongt [Tue, 19 Jul 2022 09:24:52 +0000 (17:24 +0800)]
Lower complex type move to enable vectorization for complex type load&store.
2022-07-20 Richard Biener <richard.guenther@gmail.com>
Hongtao Liu <hongtao.liu@intel.com>
gcc/ChangeLog:
PR tree-optimization/106010
* tree-complex.cc (init_dont_simulate_again): Lower complex
type move.
(expand_complex_move): Also expand COMPLEX_CST for rhs.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr106010-1a.c: New test.
* gcc.target/i386/pr106010-1b.c: New test.
* gcc.target/i386/pr106010-1c.c: New test.
* gcc.target/i386/pr106010-2a.c: New test.
* gcc.target/i386/pr106010-2b.c: New test.
* gcc.target/i386/pr106010-2c.c: New test.
* gcc.target/i386/pr106010-3a.c: New test.
* gcc.target/i386/pr106010-3b.c: New test.
* gcc.target/i386/pr106010-3c.c: New test.
* gcc.target/i386/pr106010-4a.c: New test.
* gcc.target/i386/pr106010-4b.c: New test.
* gcc.target/i386/pr106010-4c.c: New test.
* gcc.target/i386/pr106010-5a.c: New test.
* gcc.target/i386/pr106010-5b.c: New test.
* gcc.target/i386/pr106010-5c.c: New test.
* gcc.target/i386/pr106010-6a.c: New test.
* gcc.target/i386/pr106010-6b.c: New test.
* gcc.target/i386/pr106010-6c.c: New test.
* gcc.target/i386/pr106010-7a.c: New test.
* gcc.target/i386/pr106010-7b.c: New test.
* gcc.target/i386/pr106010-7c.c: New test.
* gcc.target/i386/pr106010-8a.c: New test.
* gcc.target/i386/pr106010-8b.c: New test.
* gcc.target/i386/pr106010-8c.c: New test.
* gcc.target/i386/pr106010-9a.c: New test.
* gcc.target/i386/pr106010-9b.c: New test.
* gcc.target/i386/pr106010-9c.c: New test.
* gcc.target/i386/pr106010-9d.c: New test.
David Malcolm [Wed, 20 Jul 2022 00:22:18 +0000 (20:22 -0400)]
analyzer: don't track string literals in the store [PR106359]
Doing so speeds up -fanalyzer from taking over 4 hours to under a
minute on the Linux kernel's sound/soc/codecs/cs47l90.c
gcc/analyzer/ChangeLog:
PR analyzer/106359
* region.h (string_region::tracked_p): New.
* store.cc (binding_cluster::binding_cluster): Move here from
store.h. Add assertion that base_region is tracked_p.
* store.h (binding_cluster::binding_cluster): Move to store.cc.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
GCC Administrator [Wed, 20 Jul 2022 00:16:34 +0000 (00:16 +0000)]
Daily bump.
Andrew MacLeod [Mon, 18 Jul 2022 19:04:23 +0000 (15:04 -0400)]
Resolve complicated join nodes in range_from_dom.
Join nodes which carry outgoing ranges on incoming edges are uncommon,
but can still be resolved by setting the dominator range, and then
calculating incoming edges. Avoid doing so if one of the incoing edges
is not dominated by the same dominator.
* gimple-range-cache.cc (ranger_cache::range_from_dom): Check
for incoming ranges on join nodes and add to worklist.
Andrew MacLeod [Fri, 15 Jul 2022 13:35:29 +0000 (09:35 -0400)]
Remove recursion from range_from_dom.
Avoid calling range_of_dom recursively by putting all nodes to be
calculated on the worklist, and figure out which kind they are
when removed from the list.
* gimple-range-cache.cc (ranger_cache::resolve_dom): New.
(ranger_cache::range_from_dom): Put all nodes to be calculated
in the worklist and resolve after the dom walk.
* gimple-range-cache.h (resolve_dom): New prototype.
Harald Anlauf [Mon, 18 Jul 2022 20:34:53 +0000 (22:34 +0200)]
Fortran: error recovery on invalid array reference of non-array [PR103590]
gcc/fortran/ChangeLog:
PR fortran/103590
* resolve.cc (find_array_spec): Change function result to bool to
enable error recovery. Generate error message for invalid array
reference of non-array entity instead of an internal error.
(gfc_resolve_ref): Use function result from find_array_spec for
error recovery.
gcc/testsuite/ChangeLog:
PR fortran/103590
* gfortran.dg/associate_54.f90: Adjust.
* gfortran.dg/associate_59.f90: New test.
François Dumont [Sat, 9 Jul 2022 12:15:05 +0000 (14:15 +0200)]
libstdc++: Complete __gnu_debug::string Standard conformity
Add testsuite/testsuite_string.h header to help testing __gnu_debug::basic_string like
std::basic_string depending on _GLIBCXX_DEBUG.
Add using of base type methods in __gnu_debug::basic_string to make use of the method
overloads when there is no debug version.
Fix _GLIBCXX_DEBUG_PEDANTIC assertions in <debug/string>. This header has to be used directly
like __gnu_debug::string, it is not included by _GLIBCXX_DEBUG. It means that
_GLIBCXX_DEBUG_PEDANTIC is not considered to define __glibcxx_check_string and
__glibcxx_check_string_len which are then empty macros. Now those macros are defined
directly in <debug/string> and properly consider _GLIBCXX_DEBUG_PEDANTIC.
libstdc++-v3/ChangeLog:
* include/debug/debug.h [_GLIBCXX_DEBUG](__glibcxx_requires_string): Define
using _GLIBCXX_DEBUG_PEDASSERT.
[_GLIBCXX_DEBUG](__glibcxx_requires_string_len): Likewise.
* include/debug/macros.h
(__glibcxx_check_string, __glibcxx_check_string_len): Move...
* include/debug/string
(__glibcxx_check_string, __glibcxx_check_string_len): ...here. And define depending
on _GLIBCXX_DEBUG_PEDANTIC no matter if _GLIBCXX_DEBUG is defined.
Add using of std::string find, rfind, find_first_of, find_last_of, find_first_not_of
and find_last_not_of. Remove debug implementations having no debug assertion.
* testsuite/util/testsuite_string.h: New file. Provides __gnu_test::string and
__gnu_test::wtring which definition depends on _GLIBCXX_DEBUG.
* testsuite/21_strings/basic_string/debug/find1_neg.cc: New test case.
* testsuite/21_strings/basic_string/debug/find2_neg.cc: New test case.
* testsuite/21_strings/basic_string/operations/find/char/1.cc:
Include <testsuite_string.h> and use __gnu_test::string.
* testsuite/21_strings/basic_string/operations/find/char/2.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/char/3.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/char/4.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/char/5.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/char/6.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/wchar_t/1.cc:
Include <testsuite_string.h> and use __gnu_test::wstring.
* testsuite/21_strings/basic_string/operations/find/wchar_t/2.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/wchar_t/3.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/wchar_t/4.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/wchar_t/5.cc: Likewise.
* testsuite/21_strings/basic_string/operations/find/wchar_t/6.cc: Likewise.
Patrick Palka [Tue, 19 Jul 2022 18:04:13 +0000 (14:04 -0400)]
c++: shortcut bad reference binding [PR94894]
In case of l/rvalue or cv-qual mismatch during reference binding, we
try to give more helpful diagnostics by computing a bad conversion that
allows the mismatch. But in doing so, we may end up considering and
instantiating a conversion function that could induce a hard error and
in turn cause us to reject otherwise valid code. We could just give up
on producing a better diagnostic here, but ideally we'd preserve the
better diagnostics for invalid code while avoiding unnecessary template
instantiations for valid code.
To that end, this patch adapts the bad conversion shortcutting mechanism
from r12-3346-g47543e5f9d1fc5 to additionally handle this situation.
The main observation from there is that during overload resolution, if we
know we have a strictly viable candidate then we don't need to distinguish
between an unviable and non-strictly viable candidate. Thus we don't
need to distinguish between an invalid and bad conversion either, which
is what this patch exploits. Of course, we don't know whether we have a
strictly viable candidate until after the fact, so we still need to
remember when we deferred distinguishing between an invalid and bad
conversion. This patch adds a special conversion kind ck_deferred_bad
for this purpose.
PR c++/94894
PR c++/105766
PR c++/106201
gcc/cp/ChangeLog:
* call.cc (enum conversion_kind): Add ck_deferred_bad enumerator.
(has_next): Return false for it.
(reference_binding): Return a ck_deferred_bad conversion instead
of an actual bad conversion when LOOKUP_SHORTCUT_BAD_CONVS is set.
Remove now obsolete early exit for the incomplete TO case.
(implicit_conversion_1): Don't mask out LOOKUP_SHORTCUT_BAD_CONVS.
(add_function_candidate): Set LOOKUP_SHORTCUT_BAD_CONVS iff
shortcut_bad_convs.
(missing_conversion_p): Also return true for a ck_deferred_bad
conversion.
* cp-tree.h (LOOKUP_SHORTCUT_BAD_CONVS): Define.
gcc/testsuite/ChangeLog:
* g++.dg/conversion/ref8.C: New test.
* g++.dg/conversion/ref9.C: New test.
Alexander Monakov [Fri, 14 Jan 2022 18:05:12 +0000 (21:05 +0300)]
tree-cfg: check placement of returns_twice calls
When a returns_twice call has an associated abnormal edge, the edge
corresponds to the "second return" from the call. It wouldn't make sense
if any executable statements appeared between the call and the
destination of the edge (they wouldn't be re-executed upon the "second
return"), so verify that.
gcc/ChangeLog:
* tree-cfg.cc (gimple_verify_flow_info): Check placement of
returns_twice calls.
Alexander Monakov [Fri, 14 Jan 2022 17:51:12 +0000 (20:51 +0300)]
tree-cfg: do not duplicate returns_twice calls
A returns_twice call may have associated abnormal edges that correspond
to the "second return" from the call. If the call is duplicated, the
copies of those edges also need to be abnormal, but e.g. tracer does not
enforce that. Just prohibit the (unlikely to be useful) duplication.
gcc/ChangeLog:
* cfghooks.cc (duplicate_block): Expand comment.
* tree-cfg.cc (gimple_can_duplicate_bb_p): Reject blocks with
calls that may return twice.
Alexander Monakov [Fri, 14 Jan 2022 17:23:41 +0000 (20:23 +0300)]
tree-ssa-sink: do not sink to in front of setjmp
gcc/ChangeLog:
* tree-ssa-sink.cc (select_best_block): Punt if selected block
has incoming abnormal edges.
gcc/testsuite/ChangeLog:
* gcc.dg/setjmp-7.c: New test.
Jonathan Wakely [Tue, 19 Jul 2022 09:55:52 +0000 (10:55 +0100)]
c++: Enable __has_builtin for new reference binding built-ins
The new built-ins need to be detectable using __has_builtin, and the
library should use that to check for them.
This fixes an error with Clang when C++23 is enabled.
gcc/cp/ChangeLog:
* cp-objcp-common.cc (names_builtin_p): Return true for
RID_REF_CONSTRUCTS_FROM_TEMPORARY and
RID_REF_CONVERTS_FROM_TEMPORARY.
libstdc++-v3/ChangeLog:
* include/std/type_traits (__cpp_lib_reference_from_temporary)
(reference_constructs_from_temporary)
(reference_converts_from_temporary): Only define when the
built-ins are available.
Alexander Monakov [Tue, 19 Jul 2022 13:37:04 +0000 (16:37 +0300)]
.gitignore: do not ignore config.h
GCC does not support in-tree builds at the moment, so .gitignore
concealing artifacts of accidental in-tree ./configure run may cause
confusion. Un-ignore config.h, which is known to break the build.
ChangeLog:
* .gitignore: Do not ignore config.h.
Marco Falke [Tue, 19 Jul 2022 09:10:39 +0000 (10:10 +0100)]
libstdc++: Make __from_chars_alnum_to_val conversion explicit
The optimizations from commit r12-8175-ga54137c88061c7 introduced a
clang integer sanitizer error.
Fix this with an explicit static_cast, similar to the fix for PR 96766.
libstdc++-v3/ChangeLog:
* include/std/charconv (__from_chars_alnum_to_val): Replace
implicit conversion from int to unsigned char with explicit
cast.
David Malcolm [Tue, 19 Jul 2022 13:53:39 +0000 (09:53 -0400)]
analyzer: fix taint handling of switch statements [PR106321]
PR analyzer/106321 reports false positives from
-Wanalyzer-tainted-array-index on switch statements, seen e.g.
in the Linux kernel in drivers/vfio/pci/vfio_pci_core.c, where
vfio_pci_core_ioctl has:
| 744 | switch (info.index) {
| | ~~~~~~ ~~~~~~~~~~
| | | |
| | | (8) ...to here
| | (9) following ‘case 0 ... 5:’ branch...
|......
| 751 | case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
| | ~~~~
| | |
| | (10) ...to here
and then a false complaint about "use of attacker-controlled value
‘info.index’ in array lookup without upper-bounds checking", where
info.index has clearly had its bounds checked by the switch/case.
It turns out that when I rewrote switch handling for the analyzer in
r12-3101-g8ca7fa84a3af35, I removed notifications to state machines
about the constraints on cases.
This patch fixes that oversight by adding a new on_bounded_ranges vfunc
for region_model_context, called on switch statement edges, which calls
a new state_machine vfunc. It implements it for the "taint" state
machine, so that it updates the "has bounds" flags at out-edges for
switch statements, based on whether the bounds from the edge appear to
actually constrain the switch index.
gcc/analyzer/ChangeLog:
PR analyzer/106321
* constraint-manager.h (bounded_ranges::get_count): New.
(bounded_ranges::get_range): New.
* engine.cc (impl_region_model_context::on_bounded_ranges): New.
* exploded-graph.h (impl_region_model_context::on_bounded_ranges):
New decl.
* region-model.cc (region_model::apply_constraints_for_gswitch):
Potentially call ctxt->on_bounded_ranges.
* region-model.h (region_model_context::on_bounded_ranges): New
vfunc.
(noop_region_model_context::on_bounded_ranges): New.
(region_model_context_decorator::on_bounded_ranges): New.
* sm-taint.cc: Include "analyzer/constraint-manager.h".
(taint_state_machine::on_bounded_ranges): New.
* sm.h (state_machine::on_bounded_ranges): New.
gcc/testsuite/ChangeLog:
PR analyzer/106321
* gcc.dg/analyzer/torture/taint-read-index-2.c: Add test coverage
for switch statements.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Tue, 19 Jul 2022 13:53:39 +0000 (09:53 -0400)]
analyzer: log out-edge description in exploded_graph::process_node
I found this logging tweak very helpful when working on
PR analyzer/106284.
gcc/analyzer/ChangeLog:
* engine.cc (exploded_graph::process_node): Show any description
of the out-edge when logging it for consideration.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Martin Liska [Tue, 19 Jul 2022 13:40:58 +0000 (15:40 +0200)]
Remote trailing : for subheading.
gcc/ChangeLog:
* doc/extend.texi: Remove trailing :.
Prathamesh Kulkarni [Tue, 19 Jul 2022 12:13:26 +0000 (17:43 +0530)]
forwprop: Use lhs type instead of arg0 in folding VEC_PERM_EXPR.
gcc/ChangeLog:
* tree-ssa-forwprop.cc (simplify_permutation): Use lhs type
instead of TREE_TYPE (arg0) as result type in folding VEC_PERM_EXPR.
Sebastian Huber [Tue, 19 Jul 2022 12:08:32 +0000 (14:08 +0200)]
RTEMS: Remove HAVE_POLL for libstdc++
The poll() function is not always available in RTEMS.
libstdc++-v3/ChangeLog:
* configure: Regnerate.
* configure.ac (newlib, *-rtems*): Remove HAVE_POLL.
Richard Biener [Tue, 19 Jul 2022 07:57:22 +0000 (09:57 +0200)]
middle-end/106331 - fix mem attributes for string op arguments
get_memory_rtx tries hard to come up with a MEM_EXPR to record
in the memory attributes but in the last fallback fails to properly
account for an unknown offset and thus, as visible in this testcase,
incorrect alignment computed from set_mem_attributes. The following
rectifies both parts.
PR middle-end/106331
* builtins.cc (get_memory_rtx): Compute alignment from
the original address and set MEM_OFFSET to unknown when
we create a MEM_EXPR from the base object of the address.
* gfortran.dg/pr106331.f90: New testcase.
Richard Biener [Tue, 19 Jul 2022 08:02:40 +0000 (10:02 +0200)]
lto/106334 - relax assert during WPA tree merging
The dwarf2out map of tree to symbol + offset is populated too early
when streaming in trees so that when WPA tree merging decides to
recycle them the mapping prevails and if we are unlucky the same
address is used for another tree with a symbol + offset DIE to
record. The following mitigates the resulting ICE by relaxing the
assert, allowing re-use of a slot during WPA. Delaying the register
would be better but it's already somewhat hairy and uglifying this
further doesn't look too important right now.
PR lto/106334
* dwarf2out.cc (dwarf2out_register_external_die): Allow
map entry re-use during WPA.
Roger Sayle [Tue, 19 Jul 2022 07:39:43 +0000 (08:39 +0100)]
PR c/106264: Silence warnings from __builtin_modf et al.
This middle-end patch resolves PR c/106264 which is a spurious warning
regression caused by the tree-level expansion of modf, frexp and remquo
producing "expression has no-effect" when the built-in function's result
is ignored. When these built-ins were first expanded at tree-level,
fold_builtin_n would blindly set TREE_NO_WARNING for all built-ins. Now
that we're more discerning, we should precisely call suppress_warning
selectively on those COMPOUND_EXPRs that need them.
2022-07-19 Roger Sayle <roger@nextmovesoftware.com>
Richard Biener <rguenther@suse.de>
gcc/ChangeLog
PR c/106264
* builtins.cc (fold_builtin_frexp): Call suppress_warning on
COMPOUND_EXPR to silence spurious warning if result isn't used.
(fold_builtin_modf): Likewise.
(do_mpfr_remquo): Likewise.
gcc/testsuite/ChangeLog
PR c/106264
* gcc.dg/pr106264.c: New test case.
Takayuki 'January June' Suwa [Mon, 18 Jul 2022 12:43:45 +0000 (21:43 +0900)]
xtensa: Correct the relative RTX cost that corresponds to the Move Immediate "MOVI" instruction
This patch corrects the overestimation of the relative cost of
'(set (reg) (const_int N))' where N fits into the instruction itself.
In fact, such overestimation confuses the RTL loop invariant motion pass.
As a result, it brings almost no negative impact from the speed point of
view, but addtiional reg-reg move instructions and register allocation
pressure about the size.
/* example, optimized for size */
extern int foo(void);
extern int array[16];
void test_0(void) {
unsigned int i;
for (i = 0; i < sizeof(array)/sizeof(*array); ++i)
array[i] = 1024;
}
void test_1(void) {
unsigned int i;
for (i = 0; i < sizeof(array)/sizeof(*array); ++i)
array[i] = array[i] ? 1024 : 0;
}
void test_2(void) {
unsigned int i;
for (i = 0; i < sizeof(array)/sizeof(*array); ++i)
array[i] = foo() ? 0 : 1024;
}
;; before
.literal_position
.literal .LC0, array
test_0:
l32r a3, .LC0
movi.n a2, 0
movi a4, 0x400 // OK
.L2:
s32i.n a4, a3, 0
addi.n a2, a2, 1
addi.n a3, a3, 4
bnei a2, 16, .L2
ret.n
.literal_position
.literal .LC1, array
test_1:
l32r a2, .LC1
movi.n a3, 0
movi a5, 0x400 // NG
.L6:
l32i.n a4, a2, 0
beqz.n a4, .L5
mov.n a4, a5 // should be "movi a4, 0x400"
.L5:
s32i.n a4, a2, 0
addi.n a3, a3, 1
addi.n a2, a2, 4
bnei a3, 16, .L6
ret.n
.literal_position
.literal .LC2, array
test_2:
addi sp, sp, -32
s32i.n a12, sp, 24
l32r a12, .LC2
s32i.n a13, sp, 20
s32i.n a14, sp, 16
s32i.n a15, sp, 12
s32i.n a0, sp, 28
addi a13, a12, 64
movi.n a15, 0 // NG
movi a14, 0x400 // and wastes callee-saved registers (only 4)
.L11:
call0 foo
mov.n a3, a14 // should be "movi a3, 0x400"
movnez a3, a15, a2
s32i.n a3, a12, 0
addi.n a12, a12, 4
bne a12, a13, .L11
l32i.n a0, sp, 28
l32i.n a12, sp, 24
l32i.n a13, sp, 20
l32i.n a14, sp, 16
l32i.n a15, sp, 12
addi sp, sp, 32
ret.n
;; after
.literal_position
.literal .LC0, array
test_0:
l32r a3, .LC0
movi.n a2, 0
movi a4, 0x400 // OK
.L2:
s32i.n a4, a3, 0
addi.n a2, a2, 1
addi.n a3, a3, 4
bnei a2, 16, .L2
ret.n
.literal_position
.literal .LC1, array
test_1:
l32r a2, .LC1
movi.n a3, 0
.L6:
l32i.n a4, a2, 0
beqz.n a4, .L5
movi a4, 0x400 // OK
.L5:
s32i.n a4, a2, 0
addi.n a3, a3, 1
addi.n a2, a2, 4
bnei a3, 16, .L6
ret.n
.literal_position
.literal .LC2, array
test_2:
addi sp, sp, -16
s32i.n a12, sp, 8
l32r a12, .LC2
s32i.n a13, sp, 4
s32i.n a0, sp, 12
addi a13, a12, 64
.L11:
call0 foo
movi.n a3, 0 // OK
movi a4, 0x400 // and less register allocation pressure
moveqz a3, a4, a2
s32i.n a3, a12, 0
addi.n a12, a12, 4
bne a12, a13, .L11
l32i.n a0, sp, 12
l32i.n a12, sp, 8
l32i.n a13, sp, 4
addi sp, sp, 16
ret.n
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_rtx_costs):
Change the relative cost of '(set (reg) (const_int N))' where
N fits into signed 12-bit from 4 to 0 if optimizing for size.
And use the appropriate macro instead of the bare number 4.
GCC Administrator [Tue, 19 Jul 2022 00:16:32 +0000 (00:16 +0000)]
Daily bump.
François Dumont [Thu, 21 Jan 2021 18:30:47 +0000 (19:30 +0100)]
libstdc++: Enhance branching in std::inplace_merge and std::stable_sort
When we manage to allocate a buffer of the expected size we can simplify the code to
perform the expected algorithm.
libstdc++-v3/ChangeLog:
* include/bits/stl_algo.h
(__merge_adaptive): Adapt to merge only when buffer is large enough..
(__merge_adaptive_resize): New, adapt merge when buffer is too small.
(__inplace_merge): Adapt, use latter.
(__stable_sort_adaptive): Adapt to sort only when buffer is large enough.
(__stable_sort_adaptive_resize): New, adapt sort when buffer is too small.
(__stable_sort): Adapt, use latter.
Andrew MacLeod [Thu, 14 Jul 2022 16:35:55 +0000 (12:35 -0400)]
Check if transitives need to be registered.
Whenever a relation is added, register_transitive is always called.
If neither operand was in a relation before, or this is not a new
relation, then there is no need to register transitives.
PR tree-optimization/106280
* value-relation.cc (dom_oracle::register_relation): Register
transitives only when it is possible for there to be one.
(dom_oracle::set_one_relation): Return NULL if this is an
existing relation.
Maciej W. Rozycki [Mon, 18 Jul 2022 15:47:21 +0000 (16:47 +0100)]
RISC-V/doc: Add index references for `mrelax' and `mriscv-attribute'
Add missing index references for the `-mrelax' and `-mriscv-attribute'
invocation options.
gcc/
* doc/invoke.texi (RISC-V Options): Add index references for
`mrelax' and `mriscv-attribute'.
Maciej W. Rozycki [Mon, 18 Jul 2022 15:47:20 +0000 (16:47 +0100)]
RISC-V/doc: Correct the formatting of `-mstack-protector-guard-reg='
Add missing second space around the `-mstack-protector-guard-reg='
invocation option.
gcc/
* doc/invoke.texi (Option Summary): Add missing second space
around `-mstack-protector-guard-reg='.
Maciej W. Rozycki [Mon, 18 Jul 2022 15:47:20 +0000 (16:47 +0100)]
RISC-V/doc: Correct the name of `-mriscv-attribute'
Correct the name of the `-mriscv-attribute' invocation option, including
a typo in the negated form.
gcc/
* doc/invoke.texi (Option Summary): Fix `-mno-riscv-attribute'.
(RISC-V Options): Likewise, and `-mriscv-attribute'.
Claudiu Zissulescu [Mon, 18 Jul 2022 12:07:00 +0000 (15:07 +0300)]
arc: Add ARCHS release 310a tune variant.
Add mtune and mcpu options for ARCHS release 310a type CPU. The
mtune=release31a is designed to be used as an alternative to the
mcpu=hs4x_rel31 option.
ARCHS4x release 31a uses DSP instructions which are implemented a bit
different than mpy9. Hence, use safer mpy2 option.
gcc/
* config/arc/arc-arch.h (arc_tune_attr): Add
ARC_TUNE_ARCHS4X_REL31A variant.
* config/arc/arc.cc (arc_override_options): Tune options for
release 310a.
(arc_sched_issue_rate): Use correct enum.
(arc600_corereg_hazard): Textual change.
(arc_hazard): Add release 310a tunning.
* config/arc/arc.md (tune): Update and take into consideration new
tune option.
(tune_dspmpy): Likewise.
(tune_store): New attribute.
* config/arc/arc.opt (mtune): New tune option.
* config/arc/arcHS4x.md (hs4x_brcc0, hs4x_brcc1): New cpu units.
(hs4x_brcc_op): New instruction rezervation.
(hs4x_data_store_1_op): Likewise.
* config/arc/arc-cpus.def (hs4x_rel31): New cpu variant.
* config/arc/arc-tables.opt: Regenerate.
* config/arc/t-multilib: Likewise.
* doc/invoke.texi (ARC): Update mcpu and tune sections.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Richard Biener [Mon, 18 Jul 2022 11:09:57 +0000 (13:09 +0200)]
Fix builtin vs non-builtin partition merge in loop distribution
When r7-6373-g40b6bff965d004 fixed a costing issue it failed to
make the logic symmetric which means that we now fuse
normal vs. builtin when the cost model says so but we don't fuse
builtin vs. normal. The following fixes that, also allowing
the cost model to decide to fuse two builtin partitions as otherwise
an intermediate non-builtin can result in a partial merge as well.
* tree-loop-distribution.cc (loop_distribution::distribute_loop):
When computing cost-based merging do not disregard builtin
classified partitions in some cases.
* gcc.dg/tree-ssa/ldist-24.c: XFAIL.
* gcc.dg/tree-ssa/ldist-36.c: Adjust expected outcome.
Claudiu Zissulescu [Mon, 18 Jul 2022 11:54:38 +0000 (14:54 +0300)]
libgcc/arc: Update udivmodsi4 and make the lib safe for rf16
The ARC soft udivmodsi4 algorithm and as well as using umodsi3
for reduced register set configurations are wrong.
libgcc/
* config/arc/lib2funcs.c (udivmodsi4): Update AND mask.
* config/arc/lib1funcs.S (umodsi3): Don't use it for RF16
configurations.
Richard Sandiford [Mon, 18 Jul 2022 11:57:10 +0000 (12:57 +0100)]
arm: Replace arm_builtin_vectorized_function [PR106253]
This patch extends the fix for PR106253 to AArch32. As with AArch64,
we were using ACLE intrinsics to vectorise scalar built-ins, even
though the two sometimes have different ECF_* flags. (That in turn
is because the ACLE intrinsics should follow the instruction semantics
as closely as possible, whereas the scalar built-ins follow language
specs.)
The patch also removes the copysignf built-in, which only existed
for this purpose and wasn't a “real” arm_neon.h built-in.
Doing this also has the side-effect of enabling vectorisation of
rint and roundeven. Logically that should be a separate patch,
but making it one would have meant adding a new int iterator
for the original set of instructions and then removing it again
when including new functions.
I've restricted the bswap tests to little-endian because we end
up with excessive spilling on big-endian. E.g.:
sub sp, sp, #8
vstr d1, [sp]
vldr d16, [sp]
vrev16.8 d16, d16
vstr d16, [sp]
vldr d0, [sp]
add sp, sp, #8
@ sp needed
bx lr
Similarly, the copysign tests require little-endian because on
big-endian we unnecessarily load the constant from the constant pool:
vldr.32 s15, .L3
vdup.32 d0, d7[1]
vbsl d0, d2, d1
bx lr
.L3:
.word -
2147483648
gcc/
PR target/106253
* config/arm/arm-builtins.cc (arm_builtin_vectorized_function):
Delete.
* config/arm/arm-protos.h (arm_builtin_vectorized_function): Delete.
* config/arm/arm.cc (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION):
Delete.
* config/arm/arm_neon_builtins.def (copysignf): Delete.
* config/arm/iterators.md (nvrint_pattern): New attribute.
* config/arm/neon.md (<NEON_VRINT:nvrint_pattern><VCVTF:mode>2):
New pattern.
(l<NEON_VCVT:nvrint_pattern><su_optab><VCVTF:mode><v_cmp_result>2):
Likewise.
(neon_copysignf<mode>): Rename to...
(copysign<mode>3): ...this.
gcc/testsuite/
PR target/106253
* gcc.target/arm/vect_unary_1.c: New test.
* gcc.target/arm/vect_binary_1.c: Likewise.
Claudiu Zissulescu [Mon, 18 Jul 2022 11:32:41 +0000 (14:32 +0300)]
arc: Fix interrupt's epilogue.
The stack pointer adjustment in interrupt epilogue is happening after
restoring the ZOL registers which is wrong. Fixing this.
gcc/
* config/arc/arc.cc (arc_expand_epilogue): Adjust the frame
pointer first when in interrupts.
gcc/testsuite/
* gcc.target/arc/interrupt-13.c: New file.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Richard Biener [Mon, 18 Jul 2022 10:06:00 +0000 (12:06 +0200)]
Improve common reduction vs builtin code generation in loop distribution
loop distribution currently cannot handle the situation when the
last partition is a builtin but there's a common reduction in all
partitions (like the final IV value). The following lifts this
restriction by making the last non-builtin partition provide the
definitions for the loop-closed PHI nodes. Since we have heuristics
in place to avoid code generating builtins last writing a testcase
is difficult (but I ran into a case with other pending patches that
made the heuristic ineffective). What's remaining is the inability
to preserve common reductions when all partitions could be builtins
(in some cases final value replacement could come to the rescue here).
* tree-loop-distribution.cc (copy_loop_before): Add
the ability to replace the original LC PHI defs.
(generate_loops_for_partition): Pass through a flag
whether to redirect original LC PHI defs.
(generate_code_for_partition): Likewise.
(loop_distribution::distribute_loop): Compute the partition
that should provide the LC PHI defs for common reductions
and pass that down.
Richard Ball [Mon, 18 Jul 2022 10:30:04 +0000 (11:30 +0100)]
Replace manual swapping idiom with std::swap in aarch64.cc
gcc/config/aarch64/aarch64.cc has a few manual swapping idioms of the form:
x = in0, in0 = in1, in1 = x;
The preferred way is using the standard:
std::swap (in0, in1);
We should just fix these to use std::swap.
This will also allow us to eliminate the x temporary rtx.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_evpc_trn): Use std:swap.
(aarch64_evpc_uzp): Likewise.
(aarch64_evpc_zip): Likewise.
Roger Sayle [Mon, 18 Jul 2022 06:44:38 +0000 (07:44 +0100)]
PR target/106231: Optimize (any_extend:DI (ctz:SI ...)) on x86_64.
This patch resolves PR target/106231 by providing insns that recognize
(zero_extend:DI (ctz:SI ...)) and (sign_extend:DI (ctz:SI ...)). The
result of ctz:SI is always between 0 and 32 (or undefined), so
sign_extension is the same as zero_extension, and the result is already
extended in the destination register.
Things are a little complicated, because the existing implementation
of *ctzsi2 handles multiple cases, including false dependencies, which
we continue to support in this patch.
2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR target/106231
* config/i386/i386.md (*ctzsidi2_<s>ext): New insn_and_split
to recognize any_extend:DI of ctz:SI which is implicitly extended.
(*ctzsidi2_<s>ext_falsedep): New define_insn to model a DImode
extended ctz:SI that has preceding xor to break false dependency.
gcc/testsuite/ChangeLog
PR target/106231
* gcc.target/i386/pr106231-1.c: New test case.
* gcc.target/i386/pr106231-2.c: New test case.
Roger Sayle [Mon, 18 Jul 2022 06:41:36 +0000 (07:41 +0100)]
Fix issue with x86_64_const_vector_operand predicate on x86.
This patch fixes (what I believe is) a latent bug in i386.md's
x86_64_const_vector_operand define_predicate. According to the
documentation, when a predicate is called with rtx operand OP and
machine_mode operand MODE, we can't shouldn't assume that the
MODE is (or has been checked to be) GET_MODE (OP).
The failure mode is that recog can call x86_64_const_vector_operand
on an arbitrary CONST_VECTOR passing a MODE of V2QI_mode, but when
the CONST_VECTOR is in fact V1TImode, it's unsafe to directly call
ix86_convert_const_vector_to_integer, which assumes that the CONST_VECTOR
contains CONST_INTs when it actually contains CONST_WIDE_INTs. The
checks in this define_predicate need to be testing OP's mode, and
ideally confirming that this matches the passed in/specified MODE.
This bug is currently latent, but adding an innocent/unrelated
define_insn, such as "(set (reg:CCC FLAGS_REG) (const_int 0))" to
i386.md can occasionally change the order in which genrecog generates
its tests, then ICEing during bootstrap due to V1TI CONST_VECTORs.
2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/predicates.md (x86_64_const_vector_operand):
Check the operand's mode matches the specified mode argument.
Roger Sayle [Mon, 18 Jul 2022 06:36:13 +0000 (07:36 +0100)]
Add UNSPEC_MASKOP to kupck<mode> instructions in sse.md on x86.
This AVX512 specific patch to sse.md is split out from an earlier patch:
https://gcc.gnu.org/pipermail/gcc-patches/2022-June/596199.html
The new splitters proposed in that patch interfere with AVX512's
kunpckdq instruction which is defined as identical RTL,
DW:DI = (HI:SI<<32)|zero_extend(LO:SI). To distinguish these,
and avoid AVX512 mask registers accidentally being (ab)used by reload
to perform SImode scalar shifts, this patch adds the explicit
(unspec UNSPEC_MASKOP) to the unpack mask operations, which matches
what sse.md does for the other mask specific (logic) operations.
2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/sse.md (kunpckhi): Add UNSPEC_MASKOP unspec.
(kunpcksi): Likewise, add UNSPEC_MASKOP unspec.
(kunpckdi): Likewise, add UNSPEC_MASKOP unspec.
(vec_pack_trunc_qi): Update to specify the now required
UNSPEC_MASKOP unspec.
(vec_pack_trunc_<mode>): Likewise.
GCC Administrator [Mon, 18 Jul 2022 00:16:24 +0000 (00:16 +0000)]
Daily bump.