nir/opt_algebraic: Simple xor/ishr optimizations.

The first pattern here removes the xor-swap pattern.

Foz-DB GFX10_3:
Totals from 305 (0.23% of 134913) affected shaders:
CodeSize: 1589040 -> 1585164 (-0.24%)
Instrs: 284344 -> 283375 (-0.34%)
Latency: 4205148 -> 4198472 (-0.16%); split: -0.16%, +0.00%
InvThroughput: 708745 -> 708739 (-0.00%)

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16411>

nir/opt_algebraic: Fix mask in shift by constant combining.

The comment above is correct, but the code to calculate the mask was broken.

No Foz-db changes outside of noise.

Fixes: 0e6581b87dc ("nir/algebraic: Reassociate shift-by-constant of shift-by-constant")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15990>

radv/amdgpu: Use scheduled dependency for submitting to multiple queues.

This code path will be used on kernels that don't have the
"gang submit" feature in amdgpu yet.

It does each submission separately, and uses scheduled dependencies
to connect them.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16361>

radv/amdgpu: Pass correct struct type instead of repeating the cast.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16361>

radv/amdgpu: Pass new queue submit info structure to internal function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16361>

radv/amdgpu: Initialize semaphore info with a designated initializer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16361>

radv/amdgpu: Group queue submit info into a structure.

This prepares RADV for submitting to multiple queues at the same time.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16361>

ac/llvm: Remove now-superfluous intrinsics and ABI callbacks.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

aco: Remove now-superfluous intrinsics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

ac/nir: Remove now-superfluous ac_nir_lower_tess_to_const.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

radv: Lower ABI in NIR for tess/ESGS/NGG shader arguments.

Totals from 58720 (45.64% of 128653) affected shaders:
VGPRs: 2056576 -> 2056568 (-0.00%)
CodeSize: 153906488 -> 154609536 (+0.46%); split: -0.00%, +0.46%
MaxWaves: 1665056 -> 1665058 (+0.00%)
Instrs: 29242117 -> 29417265 (+0.60%); split: -0.00%, +0.60%
Latency: 134149608 -> 134238738 (+0.07%); split: -0.00%, +0.07%
InvThroughput: 20348833 -> 20349641 (+0.00%); split: -0.00%, +0.00%
VClause: 489376 -> 489385 (+0.00%)
SClause: 729383 -> 729382 (-0.00%)
Copies: 2672567 -> 2673132 (+0.02%); split: -0.00%, +0.02%
Branches: 1192117 -> 1192121 (+0.00%); split: -0.00%, +0.00%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

nir: Add upper bound for AMD shader arg intrinsics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

radv: Move radv_nggc_settings enum out of radv_cmd_buffer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

ac/nir: Add ac_nir_load_arg helper for shader arguments.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13155>

gallium: Bump PIPE_MAX_SHADER_IMAGES to 64

This is required by OpenCL

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

mesa/st: Clamp MaxImageUniforms to MAX_IMAGE_UNIFORMS

We're about to bump PIPE_MAX_SHADER_IMAGES to 64 and don't want to
overflow any state tracker arrays for GL.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

gallium/u_threaded_context: Use PIPE_MAX_SHADER_SAMPLER_VIEWS for sampler_buffers

Sampler views and samplers may not be the same limit; in fact one is 32
while the other is 128.  The sampler_buffers field is tracking sampler
views (yes, naming is confusing) so we should use the right limit.

Fixes: e9c41b321488 ("gallium/u_threaded: add buffer lists - tracking of buffers referenced by tc")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

shader_info: Bump the number of images and textures supported

OpenCL requires up to 128 read-only images and up to 64 write images.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

util/bitset: Support larger ranges in BITSET_TEST/CLEAR_RANGE

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

nir: Gather samplers_used separately from textures

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

shader_info: Make images_used a bitset

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

nir: Stop assuming shader_info::textures_used is 32-bit

This isn't a hot path.  We don't need to be manually using the
INSIDE_WORD version which will assert if we ever get a bigger texture
index.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

nir: Set image_buffers and msaa_images in lower_samplers_as_deref

This is where we set images_used so it's less likely that things will
accidentally get out-of-sync.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>

pan/mdg: Fix multiple spilt writes in the same bundle

If two instructions in a single bundle both write to a spilt
destination, then we need to reuse the fill and spill instructions,
otherwise the value will be overwritten.

This and the rest of this set of Midgard bug fixes were found from a
vertex shader in Firefox WebRender that is used when a video is
clipped, for example by setting the border-radius CSS property.

CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>

pan/mdg: Return the instruction from mir_insert_instruction_*_scheduled

We can't return a pointer to the bundle itself because it might move
about in memory.

CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>

pan/mdg: Fix disassembly of store instructions

The mask does apply for store instructions, so pass it onto
print_vec_swizzle after converting it to the right format.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>

pan/mdg: Fix mask usage when filling before a spill

Check the bytemask against 0xFFFF rather than 0xF so that the fill is
skipped for a .xyzw write rather than a .x write.

Set the mask on the store to 0xF when doing a read so that all
components are written back.

Fixes: 31d26ebf1b9 ("pan/mdg: Fill from TLS before spilling non-SSA nodes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>

pan/mdg: Use MAX2 to set min_alignment

If a value is written in a vector CSEL but then written again by other
instructions, it still needs full alignment, so set min_alignment
using MAX2 to avoid ever reducing it.

Fixes: 1798f6bfc33 ("pan/midgard: Fix masks/alignment for 64-bit loads")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>

pan/mdg: Keep min_bound at 16 when alignment requires it

Otherwise LCRA will try to divide by zero when calculating m_max.

Fixes: 553c2cf16b7 ("pan/mdg: Set RA bounds for fp16")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>

u_threaded: clear non-async debug callback correctly

The following sequence:

   glEnable(GL_DEBUG_OUTPUT_KHR);
   glEnable(GL_DEBUG_OUTPUT_SYNCHRONOUS_KHR);
   glDebugMessageCallbackKHR(my_callback, NULL);

Will cause the 2nd call to be ignored - but since the callback
function used by _mesa_update_debug_callback is always the
same (_debug_message), this means we'll keep using it, causing
"my_callback" to be called from driver-internal threads.

So instead of skipping the 2nd call, make sure we pass the
information to the driver.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5206
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16300>

ci: add ACO_DEBUG to the list of variables to pass down for testing

This parameter is used by radv-ci to perform extra validation while
running VKCTS.

This change catches more issues, which are will be addressed in !16248:
 - dEQP-VK.subgroups.ballot_broadcast.compute.subgroupbroadcast_i8vec2,Crash
 - dEQP-VK.subgroups.ballot_broadcast.compute.subgroupbroadcast_u8vec2,Crash

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Suggested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16277>

radeonsi/tests: reformat with black

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16347>

radeonsi/tests: add a heuristic to pick the baseline

When the baseline for the exact GPU tested isn't available,
try to make a reasonnable guess: look for another baseline
from a GPU in the same class.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16347>

radeonsi/tests: allow empty line and comments in csv files

This will help describe why tests are failing.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16347>

nir/divergence: handle more *_intel intrinsics

v2: fix topo/btd (Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16421>

radv: Only emit what is appropriate to the queue family for preambles.

This makes the function easier to read and follow.
Also prepares for some future changes when we'll want to
submit to multiple queues at once.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Don't use pointers to pointers when updating the preambles.

Instead, just use the pointers from the queue structure.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Rename fill_geom_tess_rings to radv_fill_shader_rings.

This function already handles more than just the geometry and tess
rings, and it will include more things in the future, such as
the task shader rings.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Don't create continue preamble when it's not needed.

Previously we would always create it, but would return NULL when
it wasn't needed. Now, don't create it when not needed.

Additionally, don't create the continue preamble when we can use
IB BOs, because then we never use a continue preamble.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Refactor cache flush code for the initial preambles.

The "initial" and "initial full flush" preambles both need a
cache flush with a slight difference. Improve the readability of
this code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Initialize BO pointers when creating preambles.

This aims to improve the readability of this function.

Initialize the BO pointers to the queue's current pointers
at the beginning instead of in the else branches later.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Simplify some boolean code in radv_get_preamble_cs.

Hopefully this will make it easier to read and understand.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Move up early exit for transfer queues in radv_get_preamble_cs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Move normal (non-empty) queue submit to a separate function.

Also move the preamble update into this function, as that is only needed
by this code path and not needed for empty submits.

With this change, the goal is to make radv_queue_submit easier to
read and understand. This prepares it for future work when we'll
add the capability to submit to multiple queues at the same time.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Move empty queue submit code path to a separate function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Move queue submit sparse bindings to a separate function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

radv: Minor formatting fix in radv_device.c file.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

v3dv: drop unsused struct

This is no longer needed since we ported to using the common sync
framework.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16417>

ac/gpu_info: fix incorrect IP versions reported by the kernel

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

ac/gpu_info: print all IP versions reported by the kernel

It's incorrect for GFX. This is what I get on Radeon 6800:

    IP GFX  10.0  queues:1
    IP COMP 10.0  queues:4
    IP SDMA  5.2  queues:2
    IP VCN_DEC  3.0  queues:1
    IP VCN_ENC  3.0  queues:1
    IP VCN_JPG  3.0  queues:1

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

ac/gpu_info: remove dead GDS query code

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

ac/gpu_info: simplify HW IP querying

Use a loop, don't check the DRM versions, and handle failures as
unsupported.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

amd: replace num_rings[type] with ip[type].num_queues

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

amd: rename RING_* enums to AMD_IP_*

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

amd: rename ring_type --> amd_ip_type and match the kernel enum values

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>

zink: use descriptor surfaces for notemplates ref updating

basically the same codepath as samplerviews now, and fixes
some issues with invalid mem access

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16167>

zink: add more image usage for null surfaces

without null descriptor features, these can be used for all sorts of things

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16167>

zink: fix null buffer/surface formats

4-component formats are needed here in order to return the correct
alpha value in invalid load scenarios

cc: mesa-stable

fixes:
spec@arb_shader_image_load_store@invalid

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16167>

lavapipe: enqueue pipeline destruction

this avoids races in llvmpipe related to modification of per-context shader
variant lists, which causes massive amounts of flakiness in ci

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16331>

zink: delete nir_lower_dynamic_bo_access

no longer used

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>

zink: implement indirect buffer indexing

this compacts all buffers in the shader into an array that can be
used in a single descriptor, thus handling the case of indirect indexing
while also turning constant indexing into indirect (with const offsets)
since there's no sane way to distinguish

a "proper" implementation of this would be to skip gl_nir_lower_buffers
and nir_lower_explicit_io altogether and retain the derefs, but that would
require a ton of legwork of other nir passes which only operate on the
explicit io intrinsics

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>

zink: flatten push descriptor template into normal template array

this simplifies some code

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>

zink: decouple descriptor templates from layouts

the same layout will in the future have multiple templates
depending on which resources are being updated

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15906>

zink: semi-handle 1D sparse texture rewrites for drivers that don't support them

nvidia can't do this, but also nothing uses it, so I've gone ahead and
done the bare minimum here to make cts pass

I think the work to do the shader rewrites should be easy, but without a test
case, I see no point in spending the time for it

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>

zink: bump number of image binds that can be batched to 50

this is big enough to batch all the cts binds into a single submit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>

zink: fix multisample conditional in sparse image query

you stare at the code for so long without truly seeing it

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>

zink: set all usage flags when querying sparse features

they're allocated through TexStorage, so they can do everything

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>

zink: pass sparse bind bo offset through for texture binds

should fix partial binding with textures

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>

zink: pass sparse backing page offset to binding function

this is the offset of the memory block being bound

cc: mesa-stable

fixes:
KHR-GL46.sparse_buffer_tests.BufferStorageTest

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16100>

zink: scale depth bias by factor of 2

this is enough to fix CTS

affects/fixes:
dEQP-GLES3.functional.polygon_offset.default_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units
dEQP-GLES3.functional.polygon_offset.fixed24_render_with_units

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16195>

glsl: Make all drivers take the GLSLOptimizeConservatively path.

Now that all consumers of GLSL use NIR, make the remaining drivers take
the path that relies on NIR to really do optimization.

nouveau steam shader-db runtime -6.69631% +/- 1.29235% (n=12).
No change on shader-db there.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16364>

radeonsi: remove tautologies when setting CU_EN

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: update av1 decoding to support vcn4

Apply changes of vcn4 on av1 decoding.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: Add support of array_mode for gfx11

Update array_mode for gfx11 in vcn decoder.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: add jpeg decode support for gfx11

Add jpeg decode support for gfx11.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

amd: add chip identification for gfx1100-1103

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: enable vcn 4.0 encode for gfx11 asic

Enable VCN 4.0 encode for supported Asics.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: add session init ib for vcn 4.0

Implement session init ib based on new interface for VCN 4.0.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: add encode context ib for vcn 4.0

Implement encode context ib based on new reconstructed picture and
interface for VCN 4.0, and modify dpb setup accordingly.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: add vcn 4.0 encode fw interface version

Add major and minor encode FW interface version for VCN 4.0.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: add vcn 4.0 encode support

Add new file "radeon_vcn_enc_4_0.c" for VCN 4.0 encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/vcn: add decode software ring support for gfx11

Add decode software ring support for gfx11.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: update codec support for gfx11

Update codec support for gfx11.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

amd: update headers to support decode software ring

Update headers to support decode software ring.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: add a workaround for CB perf counters

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi: inline si_cp_dma_prefetch in si_draw_vbo for lower overhead

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: limit CP DMA to max 32KB sizes

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: mark streamout as unimplemented for now

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: resolve MSAA using u_blitter

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: don't count the non-existent scratch_byte_offset SGPR

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: change LDS allocation granularity for PS

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: update the initialization of SGPR0/1 registers for HS and GS

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: limit MSAA color buffers to the RGBA channel order

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

ac,radeonsi/gfx11: swizzle MRT0/1 for dual source blending

If dual source blending is enabled, use export targets 21 and 22.
Also we have to swap odd/even lanes between export target 21 and 22.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there

If both mrtz and alpha-to-coverage are enabled, the alpha channel must
be exported through mrtz.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: VRS changes

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: TF_RING_SIZE changed to a per-SE size

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: don't use FLUSH_AND_INV_DB_META

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: emit SQ_NON_EVENT for tessellation at the end of IBs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>

radeonsi/gfx11: don't set non-existent CP_COHER_START_DELAY

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>