platform/kernel/u-boot.git
17 years agoppc4xx: Change Yucca config file to support ECC
Stefan Roese [Sat, 31 Mar 2007 06:48:36 +0000 (08:48 +0200)]
ppc4xx: Change Yucca config file to support ECC

With the updated 44x DDR2 driver the Yucca board now supports
ECC generation and checking.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoppc4xx: Fix "bootstrap" command for Katmai board
Stefan Roese [Sat, 31 Mar 2007 06:47:34 +0000 (08:47 +0200)]
ppc4xx: Fix "bootstrap" command for Katmai board

The board specific "bootstrap" command is now fixed and can
be used for the AMCC Katmai board to configure different
CPU/PLB/OPB frequencies.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
Stefan Roese [Sat, 31 Mar 2007 06:46:08 +0000 (08:46 +0200)]
ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)

Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMerge some AMCC make targets to keep the top-level Makefile smaller
Stefan Roese [Wed, 28 Mar 2007 13:03:16 +0000 (15:03 +0200)]
Merge some AMCC make targets to keep the top-level Makefile smaller

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoi2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined
Stefan Roese [Wed, 28 Mar 2007 12:52:12 +0000 (14:52 +0200)]
i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined

The "old" i2c commands (iprobe, imd...) are now compiled in again,
even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
config option.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMerge with /home/stefan/git/u-boot/acadia
Stefan Roese [Sat, 24 Mar 2007 14:59:23 +0000 (15:59 +0100)]
Merge with /home/stefan/git/u-boot/acadia

17 years ago[PATCH] Add 4xx GPIO functions
Stefan Roese [Sat, 24 Mar 2007 14:57:09 +0000 (15:57 +0100)]
[PATCH] Add 4xx GPIO functions

This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Small Sequoia cleanup
Stefan Roese [Sat, 24 Mar 2007 14:55:58 +0000 (15:55 +0100)]
[PATCH] Small Sequoia cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Clean up 40EZ/Acadia support
Stefan Roese [Sat, 24 Mar 2007 14:45:34 +0000 (15:45 +0100)]
[PATCH] Clean up 40EZ/Acadia support

This patch cleans up all the open issue of the preliminary
Acadia support.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoppc4xx: Fix file mode of include/configs/acadia.h
Stefan Roese [Wed, 21 Mar 2007 13:54:29 +0000 (14:54 +0100)]
ppc4xx: Fix file mode of include/configs/acadia.h

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMerge with /home/stefan/git/u-boot/acadia
Stefan Roese [Wed, 21 Mar 2007 13:38:25 +0000 (14:38 +0100)]
Merge with /home/stefan/git/u-boot/acadia

17 years ago[PATCH] Add AMCC Acadia (405EZ) eval board support
Stefan Roese [Wed, 21 Mar 2007 12:39:57 +0000 (13:39 +0100)]
[PATCH] Add AMCC Acadia (405EZ) eval board support

This patch adds support for the new AMCC Acadia eval board.

Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Add AMCC PPC405EZ support
Stefan Roese [Wed, 21 Mar 2007 12:38:59 +0000 (13:38 +0100)]
[PATCH] Add AMCC PPC405EZ support

This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.

Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board
Stefan Roese [Fri, 16 Mar 2007 20:11:42 +0000 (21:11 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board

Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] renamed environment variable 'addcon' to 'addcons' for PCI405
Matthias Fuchs [Tue, 13 Mar 2007 12:38:05 +0000 (13:38 +0100)]
[PATCH] renamed environment variable 'addcon' to 'addcons' for PCI405
        boards in terms of unification.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
17 years agoMerge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Wolfgang Denk [Thu, 8 Mar 2007 22:06:12 +0000 (23:06 +0100)]
Merge ... /home/wd/git/u-boot/custodian/u-boot-ppc4xx

17 years agoppc4xx: Fix file mode of sequoia.c
Stefan Roese [Thu, 8 Mar 2007 22:00:08 +0000 (23:00 +0100)]
ppc4xx: Fix file mode of sequoia.c

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMinor cleanup.
Wolfgang Denk [Thu, 8 Mar 2007 21:52:51 +0000 (22:52 +0100)]
Minor cleanup.

17 years agoppc4xx: Clear Sequoia/Rainier security engine reset bits
John Otken john@softadvances.com [Thu, 8 Mar 2007 15:39:48 +0000 (09:39 -0600)]
ppc4xx: Clear Sequoia/Rainier security engine reset bits

Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
17 years agoMerge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx
Wolfgang Denk [Thu, 8 Mar 2007 21:42:44 +0000 (22:42 +0100)]
Merge ... /home/wd/git/u-boot/custodian/u-boot-mpc83xx

17 years ago[PATCH] I2C: add some more SPD eeprom decoding for DDR2 modules
Matthias Fuchs [Thu, 8 Mar 2007 15:26:52 +0000 (16:26 +0100)]
[PATCH] I2C: add some more SPD eeprom decoding for DDR2 modules

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
17 years ago[PATCH] I2C: disable flat i2c commands when CONFIG_I2C_CMD_TREE is defined
Matthias Fuchs [Thu, 8 Mar 2007 15:25:47 +0000 (16:25 +0100)]
[PATCH] I2C: disable flat i2c commands when CONFIG_I2C_CMD_TREE is defined

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
17 years ago[PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUS
Matthias Fuchs [Thu, 8 Mar 2007 15:23:11 +0000 (16:23 +0100)]
[PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUS

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
17 years ago[PATCH] I2C: Add missing default CFG_SPD_BUS_NUM
Matthias Fuchs [Thu, 8 Mar 2007 15:20:32 +0000 (16:20 +0100)]
[PATCH] I2C: Add missing default CFG_SPD_BUS_NUM

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
17 years agofixed ethernet phy configuration for plu405 board
Matthias Fuchs [Wed, 7 Mar 2007 14:32:01 +0000 (15:32 +0100)]
fixed ethernet phy configuration for plu405 board

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
17 years agoMinor cleanup
Wolfgang Denk [Thu, 8 Mar 2007 20:49:27 +0000 (21:49 +0100)]
Minor cleanup

17 years agoMerge with /home/hs/jupiter/u-boot
Wolfgang Denk [Thu, 8 Mar 2007 20:45:04 +0000 (21:45 +0100)]
Merge with /home/hs/jupiter/u-boot

17 years agoMerge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Wolfgang Denk [Thu, 8 Mar 2007 10:38:58 +0000 (11:38 +0100)]
Merge ... /home/wd/git/u-boot/custodian/u-boot-ppc4xx

17 years agoMerge with /home/stefan/git/u-boot/yucca-ddr2
Stefan Roese [Thu, 8 Mar 2007 09:32:45 +0000 (10:32 +0100)]
Merge with /home/stefan/git/u-boot/yucca-ddr2

17 years ago[PATCH] Update AMCC Luan 440SP eval board support
Stefan Roese [Thu, 8 Mar 2007 09:13:16 +0000 (10:13 +0100)]
[PATCH] Update AMCC Luan 440SP eval board support

The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.

This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Update AMCC Yucca 440SPe eval board support
Stefan Roese [Thu, 8 Mar 2007 09:10:18 +0000 (10:10 +0100)]
[PATCH] Update AMCC Yucca 440SPe eval board support

The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoppc4xx: Small AMCC Katmai 440SPe update
Stefan Roese [Thu, 8 Mar 2007 09:07:18 +0000 (10:07 +0100)]
ppc4xx: Small AMCC Katmai 440SPe update

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP
Stefan Roese [Thu, 8 Mar 2007 09:06:09 +0000 (10:06 +0100)]
ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMerge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Wolfgang Denk [Wed, 7 Mar 2007 15:50:34 +0000 (16:50 +0100)]
Merge ... /home/wd/git/u-boot/custodian/u-boot-ppc4xx

17 years ago[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
Stefan Roese [Wed, 7 Mar 2007 15:43:00 +0000 (16:43 +0100)]
[PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board

Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
Stefan Roese [Wed, 7 Mar 2007 15:39:36 +0000 (16:39 +0100)]
[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's

This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoUC101: fix compiler warnings
Wolfgang Denk [Wed, 7 Mar 2007 15:33:44 +0000 (16:33 +0100)]
UC101: fix compiler warnings

17 years agoHMI1001: fix build error, cleanup compiler warnings.
Wolfgang Denk [Wed, 7 Mar 2007 15:19:46 +0000 (16:19 +0100)]
HMI1001: fix build error, cleanup compiler warnings.

17 years agoRestructure POST directory to support of other CPUs, boards, etc.
Wolfgang Denk [Tue, 6 Mar 2007 17:08:43 +0000 (18:08 +0100)]
Restructure POST directory to support of other CPUs, boards, etc.

17 years agoFix HOSTARCH handling.
Wolfgang Denk [Tue, 6 Mar 2007 17:01:47 +0000 (18:01 +0100)]
Fix HOSTARCH handling.
Patch by Mike Frysinger, Mar 05 2007

17 years ago[PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
Stefan Roese [Tue, 6 Mar 2007 06:47:04 +0000 (07:47 +0100)]
[PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup

As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.

For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agompc83xx: fix implicit declaration of function 'ft_get_prop' warnings
Kim Phillips [Wed, 28 Feb 2007 06:02:04 +0000 (00:02 -0600)]
mpc83xx: fix implicit declaration of function 'ft_get_prop' warnings

(cherry picked from c5bf13b02284c3204a723566a9bab700e5059659 commit)

17 years agompc83xx: Fix config of Arbiter, System Priority, and Clock Mode
Kumar Gala [Wed, 28 Feb 2007 05:51:42 +0000 (23:51 -0600)]
mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode

The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM

Were not being used when setting the appropriate register

Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM

To allow full config of the SCCR.

Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years agompc83xx: update [local-]mac-address properties on UEC based devices
Kim Phillips [Fri, 23 Feb 2007 02:06:57 +0000 (20:06 -0600)]
mpc83xx: update [local-]mac-address properties on UEC based devices

8360 and 832x weren't updating their [local-]mac-address
properties. This patch fixes that.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
17 years agompc83xx: write MAC address to mac-address and local-mac-address
Timur Tabi [Tue, 13 Feb 2007 16:41:42 +0000 (10:41 -0600)]
mpc83xx: write MAC address to mac-address and local-mac-address

Some device trees have a mac-address property, some have local-mac-address,
and some have both.  To support all of these device trees, this patch
updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
This function already updates local-mac-address.

Signed-off-by: Timur Tabi <timur@freescale.com>
17 years agompc83xx: add command line editing by default
Kim Phillips [Wed, 28 Feb 2007 00:41:08 +0000 (18:41 -0600)]
mpc83xx: add command line editing by default

17 years agompc83xx: Disable G1TXCLK, G2TXCLK h/w buffers
Kim Phillips [Thu, 15 Feb 2007 01:50:53 +0000 (19:50 -0600)]
mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffers

Disable G1TXCLK, G2TXCLK h/w buffers. This patch
fixes a networking timeout issue with MPC8360EA (Rev.2) PBs.

Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
17 years agompc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx
Xie Xiaobo [Wed, 14 Feb 2007 10:27:17 +0000 (18:27 +0800)]
mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx

The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
it pass DDR/DDR2 compliance tests.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
17 years agompc83xx: Add the cpu specific code for MPC8360E rev2.0 MDS
Xie Xiaobo [Wed, 14 Feb 2007 10:27:06 +0000 (18:27 +0800)]
mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDS

MPC8360E rev2.0 have new spridr,and PVR value,
The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
17 years agompc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS
Xie Xiaobo [Wed, 14 Feb 2007 10:26:44 +0000 (18:26 +0800)]
mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS

MPC8349E rev3.1 have new spridr,and PVR value,
The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM.

Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
17 years agompc83xx: Fix empty i2c reads/writes in fsl_i2c.c
Joakim Tjernlund [Wed, 31 Jan 2007 10:04:19 +0000 (11:04 +0100)]
mpc83xx: Fix empty i2c reads/writes in fsl_i2c.c

Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0)
which is used to se if an slave will ACK after receiving its address.

Correct i2c probing to use this method as the old method could upset
a slave as it wrote a data byte to it.

Add a small delay in i2c_init() to let the controller
shutdown any ongoing I2C activity.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
17 years agompc83xx: Add support for the MPC8349E-mITX-GP
Timur Tabi [Wed, 31 Jan 2007 21:54:29 +0000 (15:54 -0600)]
mpc83xx: Add support for the MPC8349E-mITX-GP

Add support for the MPC8349E-mITX-GP, a stripped-down version of the
MPC8349E-mITX.  Bonus features include support for low-boot (BMS bit in
HRCW is 0) for the ITX and a README for the ITX and the ITX-GP.

Signed-off-by: Timur Tabi <timur@freescale.com>
17 years agompc83xx: Delete sdram_init() for MPC8349E-mITX
Timur Tabi [Wed, 31 Jan 2007 21:54:20 +0000 (15:54 -0600)]
mpc83xx: Delete sdram_init() for MPC8349E-mITX

There is no SDRAM on any of the 8349 ITX variants, so function sdram_init()
never does anything.  This patch deletes it.

Signed-off-by: Timur Tabi <timur@freescale.com>
17 years agompc83xx: Fix the LAW1/3 bug
Dave Liu [Fri, 19 Jan 2007 02:43:26 +0000 (10:43 +0800)]
mpc83xx: Fix the LAW1/3 bug

The patch solves the alignment problem of the local bus access windows to
render accessible the memory bank and PHY registers of UPC 1 (starting at
0xf801 0000). What we actually did was to adjust the sizes of the bus
access windows so that the base address alignment requirement would be met.

Signed-off-by: Chereji Marian <marian.chereji@freescale.com>
Signed-off-by: Gridish Shlomi <gridish@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
17 years agompc83xx: don't hang if watchdog configured on 8360, 832x
Kim Phillips [Tue, 30 Jan 2007 22:15:31 +0000 (16:15 -0600)]
mpc83xx: don't hang if watchdog configured on 8360, 832x

don't hang if watchdog configured on 8360, 832x

The watchdog programming model is the same across all 83xx devices;
make the code reflect that.

17 years agompc83xx: protect memcpy to bad address if a local-mac-address is missing from dt
Kim Phillips [Tue, 30 Jan 2007 22:15:21 +0000 (16:15 -0600)]
mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dt

protect memcpy to bad address if a local-mac-address is missing from dt

17 years agompc83xx: make 8360 default environment fdt be 8360 (not 8349)
Kim Phillips [Tue, 30 Jan 2007 22:15:04 +0000 (16:15 -0600)]
mpc83xx: make 8360 default environment fdt be 8360 (not 8349)

make 8360 default environment fdt be 8360 (not 8349)

17 years agompc83xx: Fix alternating tx error / tx buffer not ready bug in QE UEC
Emilian Medve [Tue, 30 Jan 2007 22:14:50 +0000 (16:14 -0600)]
mpc83xx: Fix alternating tx error / tx buffer not ready bug in QE UEC

The problem is not gcc4 but the code itself. The BD_STATUS() macro can't
be used for busy-waiting since it strips the 'volatile' property from
the bd variable. gcc3 was working by pure luck.

This is a follow on patch to "Fix the UEC driver bug of QE"

17 years agompc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead
Kumar Gala [Tue, 30 Jan 2007 20:08:30 +0000 (14:08 -0600)]
mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead

The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
MPC834X class processors.  Change the protections from CONFIG_MPC8349 to
CONFIG_MPC834X so they are more generic.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years agompc83xx: add MPC832XEMDS and sbc8349 to MAKEALL
Kim Phillips [Thu, 25 Jan 2007 19:40:55 +0000 (13:40 -0600)]
mpc83xx: add MPC832XEMDS and sbc8349 to MAKEALL

17 years agompc83xx: sort Makefile targets
Kim Phillips [Wed, 24 Jan 2007 23:18:37 +0000 (17:18 -0600)]
mpc83xx: sort Makefile targets

reordered targets alphabetically

17 years agompc83xx: U-Boot support for Wind River SBC8349
Paul Gortmaker [Tue, 16 Jan 2007 16:38:14 +0000 (11:38 -0500)]
mpc83xx: U-Boot support for Wind River SBC8349

I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release,  including the DDR changes.

I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board.  Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.

Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)

Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.

Thanks,
Paul.

17 years agompc83xx: Remove a redundant semicolon in mpc8349itx.c
Sam Song [Thu, 14 Dec 2006 11:03:21 +0000 (19:03 +0800)]
mpc83xx: Remove a redundant semicolon in mpc8349itx.c

A redundant semicolon existed in mpc8349itx.c
should be removed.

Signed-off-by: Sam Song <samsongshu@yahoo.com.cn>
17 years agompc83xx: Put the version (and magic) after the HRCW.
Jerry Van Baren [Thu, 7 Dec 2006 02:23:55 +0000 (21:23 -0500)]
mpc83xx: Put the version (and magic) after the HRCW.

Put the version (and magic) after the HRCW.  This puts it in a fixed
location in flash, not at the start of flash but as close as we can get.

Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
17 years agompc83xx: Add the MPC832XEMDS board readme
Dave Liu [Thu, 7 Dec 2006 13:14:51 +0000 (21:14 +0800)]
mpc83xx: Add the MPC832XEMDS board readme

Add the MPC832XEMDS board readme

Signed-off-by: Dave Liu <daveliu@freescale.com>
17 years agompc83xx: Add support for the MPC832XEMDS board
Dave Liu [Thu, 7 Dec 2006 13:13:15 +0000 (21:13 +0800)]
mpc83xx: Add support for the MPC832XEMDS board

This patch supports DUART, ETH3/4 and PCI etc.

Signed-off-by: Dave Liu <daveliu@freescale.com>
17 years agompc83xx: streamline the 83xx immr head file
Dave Liu [Thu, 7 Dec 2006 13:11:58 +0000 (21:11 +0800)]
mpc83xx: streamline the 83xx immr head file

For better format and style, I streamlined the 83xx head files,
including immap_83xx.h and mpc83xx.h. In the old head files, 1)
duplicated macro definition appear in the both files; 2) the structure
of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
macro definition put inside the each structure. So, I cleaned up the
structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
moved the macro definition to mpc83xx.h, Just like MPC8260.

CHANGELOG

*streamline the 83xx immr head file

Signed-off-by: Dave Liu <daveliu@freescale.com>
17 years agompc83xx: Fix the UEC driver bug of QE
Dave Liu [Wed, 6 Dec 2006 03:38:17 +0000 (11:38 +0800)]
mpc83xx: Fix the UEC driver bug of QE

The patch prevents the GCC tool chain from striping useful code for
optimization. It will make UEC ethernet driver workable, Otherwise the
UEC will fail in tx when you are using gcc4.x. but the driver can work
when using gcc3.4.3.

CHANGELOG

*Prevent the GCC from striping code for optimization, Otherwise the UEC
will tx failed when you are using gcc4.x.

Signed-off-by: Dave Liu <daveliu@freescale.com>
17 years agoMerge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx/.git
Stefan Roese [Fri, 2 Mar 2007 05:58:53 +0000 (06:58 +0100)]
Merge ... git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx/.git

17 years agoMerge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-sr
Stefan Roese [Thu, 1 Mar 2007 20:16:58 +0000 (21:16 +0100)]
Merge ... git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-sr

17 years agoMerge with /home/stefan/git/u-boot/denx-merge-sr
Stefan Roese [Thu, 1 Mar 2007 20:16:02 +0000 (21:16 +0100)]
Merge with /home/stefan/git/u-boot/denx-merge-sr

17 years agoMerge with /home/sr/git/u-boot/denx
Stefan Roese [Thu, 1 Mar 2007 20:12:06 +0000 (21:12 +0100)]
Merge with /home/sr/git/u-boot/denx

17 years ago[PATCH] Update AMCC Katmai 440SPe eval board support
Stefan Roese [Thu, 1 Mar 2007 20:11:36 +0000 (21:11 +0100)]
[PATCH] Update AMCC Katmai 440SPe eval board support

This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.

Please note, that still some problems are left with some memory
configurations. See the driver for more details.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] I2C: Add missing default CFG_RTC_BUS_NUM & CFG_DTT_BUS_NUM
Stefan Roese [Thu, 1 Mar 2007 06:03:25 +0000 (07:03 +0100)]
[PATCH] I2C: Add missing default CFG_RTC_BUS_NUM & CFG_DTT_BUS_NUM

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoSC3: fix typo in default environment
Wolfgang Denk [Wed, 28 Feb 2007 00:28:53 +0000 (01:28 +0100)]
SC3: fix typo in default environment

17 years agoMCC200: Fixes for update procedure
Sergei Poselenov [Tue, 27 Feb 2007 17:15:30 +0000 (20:15 +0300)]
MCC200: Fixes for update procedure

- fix logic error in image type handling
- make sure file system images (cramfs etc.) get stored in flash
  with image header stripped so they can be mounted through MTD

17 years agoMerge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx/.git
Stefan Roese [Tue, 27 Feb 2007 20:56:06 +0000 (21:56 +0100)]
Merge ... git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx/.git

17 years agoMinor code cleanup.
Wolfgang Denk [Tue, 27 Feb 2007 13:26:04 +0000 (14:26 +0100)]
Minor code cleanup.

17 years agoMCC200 update - add LCD Progress Indicator
Sergei Poselenov [Tue, 27 Feb 2007 09:40:16 +0000 (12:40 +0300)]
MCC200 update - add LCD Progress Indicator

17 years ago[PATCH] get_dev() now unconditionally uses manual relocation
Stefan Roese [Thu, 22 Feb 2007 06:43:34 +0000 (07:43 +0100)]
[PATCH] get_dev() now unconditionally uses manual relocation

Since the relocation fix is not included yet and we're not sure how
it will be added, this patch removes code that required relocation
to be fixed for now.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Change systemace driver to select 8 & 16bit mode
Stefan Roese [Thu, 22 Feb 2007 06:40:23 +0000 (07:40 +0100)]
[PATCH] Change systemace driver to select 8 & 16bit mode

As suggested by Grant Likely this patch enables the Xilinx SystemACE
driver to select 8 or 16bit mode upon startup.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH v3] Add sync to ensure flash_write_cmd is fully finished
Haiying Wang [Wed, 21 Feb 2007 15:52:31 +0000 (16:52 +0100)]
[PATCH v3] Add sync to ensure flash_write_cmd is fully finished

Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
17 years ago[PATCH] Fix problem in systemace driver (ace_writew instead of ace_write)
Stefan Roese [Wed, 21 Feb 2007 12:44:34 +0000 (13:44 +0100)]
[PATCH] Fix problem in systemace driver (ace_writew instead of ace_write)

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMerge with /home/stefan/git/u-boot/denx-merge-sr
Stefan Roese [Wed, 21 Feb 2007 11:54:04 +0000 (12:54 +0100)]
Merge with /home/stefan/git/u-boot/denx-merge-sr

17 years agoMerge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-sr
Stefan Roese [Wed, 21 Feb 2007 11:53:28 +0000 (12:53 +0100)]
Merge ... git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-sr

17 years ago[PATCH] Fix relocation problem with "new" get_dev() function
Stefan Roese [Tue, 20 Feb 2007 12:21:57 +0000 (13:21 +0100)]
[PATCH] Fix relocation problem with "new" get_dev() function

This patch enables the "new" get_dev() function for block devices
introduced by Grant Likely to be used on systems that still suffer
from the relocation problems (manual relocation neede because of
problems with linker script).

Hopefully we can resolve this relocation issue soon for all platform
so we don't need this additional code anymore.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Update SystemACE driver for 16bit access
Stefan Roese [Tue, 20 Feb 2007 12:17:42 +0000 (13:17 +0100)]
[PATCH] Update SystemACE driver for 16bit access

This patch removes some problems when the Xilinx SystemACE driver
is used with 16bit access on an big endian platform (like the
AMCC Katmai).

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] Clean up Katmai (440SPe) linker script
Stefan Roese [Tue, 20 Feb 2007 12:15:40 +0000 (13:15 +0100)]
[PATCH] Clean up Katmai (440SPe) linker script

Signed-off-by: Stefan Roese <sr@denx.de>
17 years agoMerge with /home/stefan/git/u-boot/denx-merge-sr
Stefan Roese [Tue, 20 Feb 2007 09:58:04 +0000 (10:58 +0100)]
Merge with /home/stefan/git/u-boot/denx-merge-sr

17 years ago[PATCH] Add support for the AMCC Katmai (440SPe) eval board
Stefan Roese [Tue, 20 Feb 2007 09:57:08 +0000 (10:57 +0100)]
[PATCH] Add support for the AMCC Katmai (440SPe) eval board

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] I2C: Add support for multiple I2C busses for RTC & DTT
Stefan Roese [Tue, 20 Feb 2007 09:51:26 +0000 (10:51 +0100)]
[PATCH] I2C: Add support for multiple I2C busses for RTC & DTT

This patch switches to the desired I2C bus when the date/dtt
commands are called. This can be configured using the
CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
Stefan Roese [Tue, 20 Feb 2007 09:43:34 +0000 (10:43 +0100)]
[PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support

This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:

- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files
Stefan Roese [Tue, 20 Feb 2007 09:35:42 +0000 (10:35 +0100)]
[PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files

Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.

This is in preparation for the 440 DDR2 controller support (440SP/e).

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH] PPC4xx: Add support for multiple I2C busses
Stefan Roese [Tue, 20 Feb 2007 09:27:08 +0000 (10:27 +0100)]
[PATCH] PPC4xx: Add support for multiple I2C busses

This patch adds support for multiple I2C busses on the PPC4xx
platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
to make use of this feature.

It also merges the 405 and 440 i2c header files into one common
file 4xx_i2c.h.

Also the 4xx i2c reset procedure is reworked since I experienced
some problems with the first access on the 440SPe Katmai board.

Signed-off-by: Stefan Roese <sr@denx.de>
17 years ago[PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write buffer pointers
Grant Likely [Tue, 20 Feb 2007 08:05:45 +0000 (09:05 +0100)]
[PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write buffer pointers

Block device read/write is anonymous data; there is no need to use a
typed pointer.  void * is fine.  Also add a hook for block_read functions

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
17 years ago[PATCH 8_9] Add block_write hook to block_dev_desc_t
Grant Likely [Tue, 20 Feb 2007 08:05:38 +0000 (09:05 +0100)]
[PATCH 8_9] Add block_write hook to block_dev_desc_t

Preparation for future patches which support block device writing

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
17 years ago[PATCH 7_9] Replace ace_readw_ace_writeb functions with macros
Grant Likely [Tue, 20 Feb 2007 08:05:31 +0000 (09:05 +0100)]
[PATCH 7_9] Replace ace_readw_ace_writeb functions with macros

Register read/write does not need to be wrapped in a full function.  The
patch replaces them with macros.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
17 years ago[PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c
Grant Likely [Tue, 20 Feb 2007 08:05:23 +0000 (09:05 +0100)]
[PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c

The code in this file is not a command; it is a device driver.  Put it in
the correct place.  There are zero functional changes in this patch, it
only moves the file.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
17 years ago[PATCH 5_9] Whitespace fixup on common_cmd_ace.c (using Lindent)
Grant Likely [Tue, 20 Feb 2007 08:05:16 +0000 (09:05 +0100)]
[PATCH 5_9] Whitespace fixup on common_cmd_ace.c (using Lindent)

This patch is in preparation of additional changes to the sysace driver.
May as well take this opportunity to fixup the inconsistent whitespace since
this file is about to undergo major changes anyway.

There are zero functional changes in this patch.  It only cleans up the
the whitespace.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
17 years ago[PATCH 4_4] Remove local implementation of isprint() in ft_build.c
Grant Likely [Tue, 20 Feb 2007 08:05:07 +0000 (09:05 +0100)]
[PATCH 4_4] Remove local implementation of isprint() in ft_build.c

isprint is already defined in ctype.c

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>