Tom Rini [Tue, 18 Jan 2022 18:38:00 +0000 (13:38 -0500)]
miiphy.h: Remove CONFIG_DM_xxx guards
Function prototypes must not be guarded with ifdef tests. Doing so
prevents us from doing:
if (CONFIG_IS_ENABLED(FOO))
func();
as that results in a warning when CONFIG_FOO is not enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
Dylan Hung [Thu, 9 Dec 2021 02:12:28 +0000 (10:12 +0800)]
clk: ast2600: Revise MII interface delay
The clock delay of the RMII/RGMII interface is controlled by SCU340~35C.
These values are obtained by measurement and experiments so we simply
use macro to define them.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Dylan Hung [Thu, 9 Dec 2021 02:12:27 +0000 (10:12 +0800)]
configs: ast2600: enable DM_MDIO and MDIO driver
Enable DM_MDIO and Aspeed MDIO driver for AST2600 EVB.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Dylan Hung [Thu, 9 Dec 2021 02:12:26 +0000 (10:12 +0800)]
ARM: dts: ast2600: Add MDIO devices
There are 4 MDIO bus controllers in AST2600 SOC. Each of them can
connect to one or more PHY chips and is flexible to work with the 4 MAC
devices in AST2600. On AST2600 EVB, MDIO 0,1,2,3 connect to the PHY
chips used by MAC 0,1,2,3 respectively.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Dylan Hung [Thu, 9 Dec 2021 02:12:25 +0000 (10:12 +0800)]
net: ftgmac100: Add Aspeed AST2600 support
Add support of the MAC controller of Aspeed AST2600 SOC. The MAC
controller is the same with AST2500, except it has stand-alone MDIO
hardware block.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Dylan Hung [Thu, 9 Dec 2021 02:12:24 +0000 (10:12 +0800)]
net: ftgmac100: Add DM_MDIO support
Add support for DM_MDIO to connect to PHY. For the systems that have a
stand-alone MDIO hardware block, enable CONFIG_DM_MDIO to use driver
model for MDIO devices.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Amit Singh Tomar [Sun, 28 Nov 2021 11:32:25 +0000 (17:02 +0530)]
configs: Enable mmc support
This commits enables mmc on the Actions Cubieboard7 board.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Amit Singh Tomar [Sun, 28 Nov 2021 11:32:24 +0000 (17:02 +0530)]
mmc: actions: add MMC driver for Actions OWL S700/S900
This commit adds support for MMC controllers found on Actions OWL
SoC platform(S700/S900).
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Amit Singh Tomar [Sun, 28 Nov 2021 11:32:23 +0000 (17:02 +0530)]
ARM: dts: s700: add MMC/SD controller node
This patch adds node for mmc/sd controller found on Action Semi OWL
S700 SoC.
Since, upstream Linux binding has not been merged for S700 MMC/SD
controller, Changes are put in u-boot specific dtsi file.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Amit Singh Tomar [Thu, 2 Dec 2021 18:23:28 +0000 (23:53 +0530)]
ARM: dts: sync Actions Semi S700 DT from Linux v5.16-rc3
This Synchronizes the Actions Semi S700 SoC DT changes from
commit "g58e1100fdc59" ("Linux v5.16-rc3").
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Amit Singh Tomar [Sun, 28 Nov 2021 11:32:21 +0000 (17:02 +0530)]
clk: actions: Add SD/MMC clocks
This commit adds SD/MMC clocks, and provides .set/get_rate callbacks
for SD/MMC device present on Actions OWL S700 SoCs.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Amit Singh Tomar [Sun, 28 Nov 2021 11:32:20 +0000 (17:02 +0530)]
clk: actions: Introduce dummy get/set_rate callbacks
This commit introduces get/set_rate callbacks, these are dummy at
the moment, and can be used to get/set clock for various devices
based on the clk id.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tom Rini [Tue, 18 Jan 2022 17:31:42 +0000 (12:31 -0500)]
Merge branch '2022-01-17-assorted-updates'
- musb gadget pinctrl-single, pxa3xx nand bugfixes
- btrfs BLAKE2 hash support and another btrfs fix
- board_r cleanups
AJ Bagwell [Fri, 3 Dec 2021 15:18:53 +0000 (15:18 +0000)]
pinctrl: single: add support for pinctrl-single, pins when #pinctrl-cells = 2
Changes to the am33xx device (
33e9021a) trees have been merged in from
the upstream linux kernel which now means the device tree uses the new
pins format (as of 5.10) where the confinguration can be stores as a
separate configuration value and pin mux mode which are then OR'd
together.
This patch adds support for the new format to u-boot so that
pinctrl-cells is now respected when reading in pinctrl-single,pins
Signed-off-by: Anthony Bagwell <anthony.bagwell@hivehome.com>
Qu Wenruo [Mon, 27 Dec 2021 06:11:14 +0000 (14:11 +0800)]
fs/btrfs: fix a bug that U-boot fs btrfs implementation doesn't handle NO_HOLE feature correctly
[BUG]
When passing a btrfs with NO_HOLE feature to U-boot, and if one file
contains holes, then the hash of the file is not correct in U-boot:
# mkfs.btrfs -f test.img # Since v5.15, mkfs defaults to NO_HOLES
# mount test.img /mnt/btrfs
# xfs_io -f -c "pwrite 0 4k" -c "pwrite 8k 4k" /mnt/btrfs/file
# md5sum /mnt/btrfs/file
277f3840b275c74d01e979ea9d75ac19 /mnt/btrfs/file
# umount /mnt/btrfs
# ./u-boot
=> host bind 0 /home/adam/test.img
=> ls host 0
< > 12288 Mon Dec 27 05:35:23 2021 file
=> load host 0 0x1000000 file
12288 bytes read in 0 ms
=> md5sum 0x1000000 0x3000
md5 for
01000000 ...
01002fff ==>
855ffdbe4d0ccc5acab92e1b5330e4c1
The md5sum doesn't match at all.
[CAUSE]
In U-boot btrfs implementation, the function btrfs_read_file() has the
following iteration for file extent iteration:
/* Read the aligned part */
while (cur < aligned_end) {
ret = lookup_data_extent(root, &path, ino, cur, &next_offset);
if (ret < 0)
goto out;
if (ret > 0) {
/* No next, direct exit */
if (!next_offset) {
ret = 0;
goto out;
}
}
/* Read file extent */
But for NO_HOLES features, hole extents will not have any extent item
for it.
Thus if @cur is at a hole, lookup_data_extent() will just return >0, and
update @next_offset.
But we still believe there is some data to read for @cur for ret > 0
case, causing we read extent data from the next file extent.
This means, what we do for above NO_HOLES btrfs is:
- Read 4K data from disk to file offset [0, 4K)
So far the data is still correct
- Read 4K data from disk to file offset [4K, 8K)
We didn't skip the 4K hole, but read the data at file offset [8K, 12K)
into file offset [4K, 8K).
This causes the checksum mismatch.
[FIX]
Add extra check to skip to the next non-hole range after
lookup_data_extent().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Qu Wenruo [Mon, 27 Dec 2021 06:12:08 +0000 (14:12 +0800)]
fs/btrfs: add dependency on BLAKE2 hash
Now btrfs can utilize the newly intorudced BLAKE2 hash.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Qu Wenruo [Mon, 27 Dec 2021 06:12:07 +0000 (14:12 +0800)]
lib: add BLAKE2 hash support
The code is cross-ported from BLAKE2 reference implementation
(https://github.com/BLAKE2/BLAKE2).
With minimal change to remove unused macros/features.
Currently there is only one user inside U-boot (btrfs), and since it
only utilize BLAKE2B, all other favors are all removed.
Signed-off-by: Qu Wenruo <wqu@suse.com>
[trini: Rename ROUND to R to avoid clash with <linux/bitops.h>
Signed-off-by: Tom Rini <trini@konsulko.com>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:31 +0000 (19:13 +0200)]
common: board_r: drop ifdefs around header includes
Drop the remaining ifdefs around header includes, to fix an old TODO.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:30 +0000 (19:13 +0200)]
common: board_r: include asm-generic/gpio.h
Not all architectures define <asm/gpio.h> and even on those that do, the
header cannot be included for all boards without causing various build
failures.
Since common/board_r.c only needs gpio_hog_probe_all() declaration, include
<asm-generic/gpio.h> and drop the associated ifdef.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:29 +0000 (19:13 +0200)]
common: board_r: move init_addr_map() to init.h
asm/mmu.h include is currently guarded by CONFIG_ADDR_MAP ifdef because
the header is only present on arm and powerpc. In order to remove the
dependency on this header and the associated ifdef, move init_addr_map()
declaration to init.h, since it is only called during the common init
sequence.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:28 +0000 (19:13 +0200)]
common: board_r: drop initr_addr_map wrapper
Add a return value to init_addr_map and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:27 +0000 (19:13 +0200)]
common: board_r: drop initr_kgdb wrapper
Add a return value to kgdb_init and use it directly in the post-relocation
init sequence, rather than using a wrapper stub. Also, move the "KGDB"
print message inside kgdb_init().
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:26 +0000 (19:13 +0200)]
common: remove bedbug debugger support
Commit
98f705c9cefd ("powerpc: remove 4xx support") removed (in 2017) the
last code that made use of bedbug debugger support. Since there aren't
any boards left that define either CONFIG_CMD_BEDBUG or a real
bedbug_init(), drop this feature from u-boot.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ovidiu Panait [Sat, 1 Jan 2022 17:13:25 +0000 (19:13 +0200)]
common: spl: move armv7m-specific code to spl_perform_fixups()
Factor out armv7m fragment to spl_perform_fixups(), which is an arch/board
specific function designed for this purpose.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
qianfan Zhao [Tue, 16 Nov 2021 00:30:12 +0000 (08:30 +0800)]
drivers: musb_gadget: Save endpoint desc to usb_ep->desc
Fix fastboot flash bug.
If the downloading file size is equal to the partition size, "fastboot
flash" can't work, at least in sunxi platform, because used an
uninitalized point: ep->desc.
This patch also fixed 'data abort' bug in am335x platform.
Reproduce: fastboot flash loader1 spl/sunxi-spl.bin.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Robert Marko [Wed, 5 Jan 2022 15:01:00 +0000 (16:01 +0100)]
mtd: nand: pxa3xx: set mtd->dev
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.
So simply set the mtd->dev to the driver udevice.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Mon, 17 Jan 2022 16:24:43 +0000 (11:24 -0500)]
Merge branch '2022-01-15-TI-platform-updates'
- Let am335x_evm use the CPSW or PRUSS ethernet.
- Implement timer_get_boot_us in the omap timer driver
- gpmc bitflip, QSPI clock calculation on am437x, da8xx_gpio bugfixes
- Assorted K3 updates
Tom Rini [Mon, 17 Jan 2022 13:36:12 +0000 (08:36 -0500)]
Merge tag 'u-boot-at91-2022.04-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.04 cycle:
This small feature set includes few changes for sama7g5 and sama7g5ek:
turn blue led on at boot, changes required for the Rev4 of the board,
better sync with the Linux DT with regards to the new DT nodes.
Tom Rini [Mon, 17 Jan 2022 13:35:39 +0000 (08:35 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-pmic
- Apple M1 PMIC support
Tom Rini [Mon, 17 Jan 2022 13:35:11 +0000 (08:35 -0500)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net
- PXE label override support
- Fastboot UDP configurable port
- new phy driver: TI DP83869HM
- and few minor fixes to dsa.
Eugen Hristev [Tue, 4 Jan 2022 16:25:21 +0000 (18:25 +0200)]
configs: at91: sama7g5ek: enable CONFIG_PHANDLE_CHECK_SEQ
CONFIG_PHANDLE_CHECK_SEQ will allow different sequence number for nodes
that have the same name, but they are different.
In sama7g5ek case, there are multiple 'i2c@600' nodes which are child
nodes of different parent 'flexcom' nodes.
These are different i2c busses even if the node is the same, and have to be
differentiated.
Without this config, the sequence number 0 is reused for two i2c busses, and
this is something that we have to avoid:
Looking for 'i2c' at 4704, name i2c@600
- serial0, /ahb/apb/serial@
e1824200
- i2c0, /ahb/apb/flexcom@
e181c000/i2c@600
Found seq 0
i2c_post_bind: i2c@600, seq=0
Looking for 'i2c' at 6236, name i2c@600
- serial0, /ahb/apb/serial@
e1824200
- i2c0, /ahb/apb/flexcom@
e181c000/i2c@600
Found seq 0
i2c_post_bind: i2c@600, seq=0
After this patch:
Looking for 'i2c' at 4704, name i2c@600
- serial0, /ahb/apb/serial@
e1824200
- i2c0, /ahb/apb/flexcom@
e181c000/i2c@600
- i2c1, /ahb/apb/flexcom@
e2818000/i2c@600
Found seq 1
Before the patch:
=> i2c bus
Bus 0: i2c@600
Bus 0: i2c@600 (active 0)
52: eeprom@52, offset len 1, flags 0
53: eeprom@53, offset len 1, flags 0
=>
After the patch:
=> i2c bus
Bus 0: i2c@600
Bus 1: i2c@600 (active 1)
52: eeprom@52, offset len 1, flags 0
53: eeprom@53, offset len 1, flags 0
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 4 Jan 2022 16:23:36 +0000 (18:23 +0200)]
ARM: dts: at91: sama7g5ek: move eeproms to flexcom8
The rev4 of the board sama7g5ek has the eeproms on flexcom8 instead of
flexcom1.
Initialize flexcom8 with required pincontrol and move the eeproms accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 4 Jan 2022 16:21:54 +0000 (18:21 +0200)]
ARM: dts: at91: sama7g5: add flx8 and required nodes
Add Flexcom8 node with required referenced nodes as phandles.
Since Flexcom8 is present in Linux, take the node exactly as-is from Linux.
Some nodes are referenced in Linux as phandles, the dma and the gic.
Add them as well to the file, even if they are unused by Uboot.
This is a step towards having the U-boot DT equivalent with the DT in Linux.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Mark Kettenis [Mon, 10 Jan 2022 19:58:44 +0000 (20:58 +0100)]
power: domain: Add Apple pmgr driver
This driver supports power domains for the power management
controller found on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Mon, 10 Jan 2022 19:58:43 +0000 (20:58 +0100)]
arm: dts: apple: Add u-boot,dm-pre-reloc properties
These are necessary to make sure the power domains needed for the
serial console are availble in the pre-relocation phase.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Mon, 10 Jan 2022 19:58:42 +0000 (20:58 +0100)]
arm: dts: apple: Update Apple M1 device trees
This synchronizes the device trees with those that are in the
process of being upstreamed into Linux. This is mostly the
current state of the device trees on the asahilinux branch
with a few extra bits used by OpenBSD. This includes device
trees for machines that were still missing.
There are still some differences that will hopefully be resolved
soon.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Amjad Ouled-Ameur [Fri, 29 Oct 2021 14:08:17 +0000 (16:08 +0200)]
board: ti: am335x: Choose CPSW or PRUSS configuration based on jumper setting
The am335x-ice-v2 board's Ethernet ports can be configured
in 'MII' or 'RMII' mode to be connected to 'PRUSS' or 'CPSW'
Ethernet subsystems.
This patch sets the environment variable 'ice_mii' to
'mii' or 'rmii' accordingly. Based on that we choose the
appropriate board devicetree i.e. 'am335x-ice-v2.dtb' or
'am335x-ice-v2-prueth.dtb'.
Since there are 2 Ethernet ports with 2 modes, there can be 4
configurations but for now we consider both ports in different modes
to be an invalid configuration and prevent boot in that case.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[Amjad: use overlay instead of using new am335x-ice-v2-prueth.dtb]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Make prueth_is_mii be marked __maybe_unused]
Signed-off-by: Tom Rini <trini@konsulko.com>
David Rivshin [Thu, 18 Nov 2021 18:25:24 +0000 (13:25 -0500)]
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine
In the case of an erased (sub)page both the data and ECC are all 0xFF
bytes. This fails the normal ECC verification, as the computed ECC of
all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect
erased pages by checking that the ECC bytes are all-0xFF, but this had
two problems:
1) bitflips in the data were not corrected, so the data looked not-erased
2) bitflips in the ECC bytes were reported as uncorrectable ECC errors
The equivalent Linux driver [1] correctly handles this by counting the
number of 0-bits in the combination of data and ECC bytes. If the number
of 0-bits is less than the amount of bits correctable by the selected
ECC algorithm, then it is treated as an erased page with correctable
bitflips.
Implement similar, though simplified, logic in omap_correct_data_bch().
[1] see omap_elm_correct_data() in omap2.c
Signed-off-by: David Rivshin <drivshin@allworx.com>
Stefan Mätje [Tue, 30 Nov 2021 00:06:56 +0000 (01:06 +0100)]
Fix wrong QSPI clock calculation for AM4372
On AM4372 the SPI_GCLK input gets its clock from the PRCM module which
divides the PER_CLKOUTM2 frequency (192MHz) by a fixed factor of 4.
See AM437x Reference Manual in section 27 QSPI >> 27.2 Integration.
The QSPI_FCLK therefore needs to take this factor into account and
becomes (
192000000 / 4).
Signed-off-by: Stefan Mätje <stefan.maetje@esd.eu>
Amjad Ouled-Ameur [Mon, 6 Dec 2021 17:22:00 +0000 (18:22 +0100)]
configs: am43xx_hs_evm: Add SPL_USB_STORAGE Support
Enable CONFIG_SPL_USB_STORAGE to support UBS MSC boot support.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Christian Gmeiner [Thu, 16 Dec 2021 09:57:29 +0000 (10:57 +0100)]
omap: timer: implement timer_get_boot_us
To make the OMAP DM timer driver useful for the timing of
bootstages, we need to implement timer_get_boot_us(..).
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
chao zeng [Fri, 7 Jan 2022 03:26:24 +0000 (11:26 +0800)]
gpio: da8xx_gpio: Fix gpio name with address
The GPIO bank numbers do not appear in the device tree,
so make the gpio name based on the address
(ie gpio@42110000_25 vs 25)
Signed-off-by: chao zeng <chao.zeng@siemens.com>
Vignesh Raghavendra [Fri, 24 Dec 2021 07:25:35 +0000 (12:55 +0530)]
ARM: dts: K3-am642-r5-sk: Enable Second CPSW port in R5/A53 SPL
Enable Second Ethernet port on which ROM support Ethboot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Christian Gmeiner [Thu, 13 Jan 2022 07:40:06 +0000 (08:40 +0100)]
net: fastboot: make UDP port net: configurable
The fastboot protocol uses per default the UDP port 5554. In some cases
it might be needed to change the used port. The fastboot utility provides
a way to specifiy an other port number to use already.
fastboot -s udp:192.168.1.76:1234 boot fastboot.img
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Markus Koch [Tue, 11 Jan 2022 18:22:54 +0000 (19:22 +0100)]
net: fsl: Fix busy flag polling register
NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG/STAT
register to wait until a transaction has finished, not bit 31 in the
data register.
In the Linux kernel, this has already been fixed in commit
26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").
This patch changes the register in the fman_mdio and fsl_ls_mdio
drivers.
As the MDIO_DATA_BSY define is no longer in use, this patch also removes
its definition from the fsl_memac header.
Signed-off-by: Markus Koch <markus@notsyncing.net>
Reviewed-by: Camelia Groza <camelia.groza@nxp.com>
Marek Vasut [Sat, 1 Jan 2022 19:12:23 +0000 (20:12 +0100)]
net: eth-phy: Demote missing phy-handle log message to debug
Reduce the missing phy-handle log message to debug message. It is
possible for ethernet DT node to have no phy-handle e.g. in case
of a fixed-link connection. Furthermore, drop the FEC: prefix,
which is a copy-paste error and rather print the ethernet device
name.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Dominic Rath [Wed, 22 Dec 2021 07:57:46 +0000 (08:57 +0100)]
net: phy: add TI DP83869HM ethernet driver
This driver is based on an older downstream TI kernel, with
changes and cleanups to work with mainline device-tree bindings.
Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Sat, 4 Dec 2021 23:00:35 +0000 (01:00 +0200)]
net: dsa: sja1105: fix device id detection
The sja1105_check_device_id() function contains logic to work without
changing the device tree on reworked boards, one of which I have (the
NXP LS1021A-TSN normally has a SJA1105T, but I have a version with a
resoldered SJA1105Q which is pin compatible). This logic is taken from
the Linux driver.
However this logic gets shortcircuited in U-Boot by an earlier check for
the exact device ID specified in the device tree. So the reworked board
does not probe the SJA1105Q switch. Remove this duplicated logic and let
the automatic device ID detection do its job.
Fixes:
f24b666b2204 ("net: dsa: add driver for NXP SJA1105 L2 switch")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Sat, 4 Dec 2021 23:00:34 +0000 (01:00 +0200)]
net: dsa: fix phydev->speed being uninitialized for the CPU port fixed PHY
If the DSA API is going to allow drivers to do things such as:
- phy_config in dsa_ops :: port_probe
- phy_startup in dsa_ops :: port_enable
then it would actually be good if the ->port_probe() method would
actually be called in all cases before the ->port_enable() is.
Currently this is true for user ports, but not true for the CPU port,
because the CPU port does not have a udevice registered for it (this is
all part of DSA's design). So the current issue is that after
phy_startup has finished for the CPU port, its phydev->speed is an
uninitialized value, because phy_config() was never called for the
priv->cpu_port_fixed_phy, and it is precisely phy_config() who copies
the speed into the phydev in the case of the fixed PHY driver.
So we need to simulate a probing event for the CPU port by manually
calling the driver's ->port_probe() method for the CPU port.
Fixes:
8a2982574854 ("net: dsa: introduce a .port_probe() method in struct dsa_ops")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Amjad Ouled-Ameur [Sat, 13 Nov 2021 13:09:20 +0000 (14:09 +0100)]
cmd: pxe_utils: sysboot: add label override support
This will allow consumers to choose a pxe label at runtime instead of
having to prompt the user. One good use-case for this, is choosing
whether or not to apply a dtbo depending on the hardware configuration.
e.g: for TI's AM335x EVM, it would be convenient to apply a particular
dtbo only when the J9 jumper is on PRUSS mode. To achieve this, the
pxe menu should have 2 labels, one with the dtbo and the other without,
then the "pxe_label_override" env variable should point to the label with
the dtbo at runtime only when the jumper is on PRUSS mode.
This change can be used for different use-cases and bring more
flexibilty to consumers who use sysboot/pxe_utils.
if "pxe_label_override" is set but does not exist in the pxe menu,
the code should fallback to the default label if given, and no failure
is returned but rather a warning message.
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Artem Lapkin <email2tema@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vignesh Raghavendra [Fri, 24 Dec 2021 07:25:33 +0000 (12:55 +0530)]
mach-k3: am64_spl: Alias Ethernet RGMII boot to CPGMAC
This is required to enables spl_net boot on AM64x
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Fri, 24 Dec 2021 07:25:32 +0000 (12:55 +0530)]
mach-k3: am642_init: Probe AM65 CPSW NUSS for R5/A53 SPL
In order to support Ethernet boot on AM64x, probe AM65 CPSW NUSS.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Fri, 24 Dec 2021 07:25:31 +0000 (12:55 +0530)]
board: ti: am64x: Init DRAM size in R5/A53 SPL
Call dram_init_banksize() from spl_board_init() otherwise TFTP download
fails due to lmb_get_free_size() not able to find unreserved region due
to lack of DRAM size info. Required to support Ethernet boot on AM64x.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Fri, 24 Dec 2021 07:25:30 +0000 (12:55 +0530)]
net: ti: am65-cpsw: Add support for multi port independent MAC mode
On certain TI SoC, like AM64x there is a CPSW3G which supports 2
external independent MAC ports for single CPSW instance.
It is not possible for Ethernet driver to register more than one port
for given instance.
This patch modifies top level CPSW NUSS as UCLASS_MISC and binds
UCLASS_ETH to individual ports so as to support bring up more than one
Ethernet interface in U-Boot.
Note that there is no isolation in the since, CPSW NUSS is in promisc
mode and forwards all packets to host.
Since top level driver is now UCLASS_MISC, board files would need to
instantiate this driver explicitly.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Fri, 24 Dec 2021 07:25:29 +0000 (12:55 +0530)]
mach-k3: common: Instantiate AM65 CPSW NUSS wrapper
Probe toplevel AM65 CPSW NUSS driver from misc_init_r() when driver
is enabled. Since driver is modeled as UCLASS_MISC, we need to
explicitly probe the driver. Use common misc_init_r() that entire
K3 family of SoCs.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 23 Dec 2021 13:57:30 +0000 (19:27 +0530)]
dma: ti: k3-udma: Fix rflow reservation for PKTDMA
Driver has a bug in that it uses rflow_in_use bitmap when setting up free rflow range
from TISCI but use rflow_map for reservation in __udma_reserve_rflow()
Fix this by dropping rflow_in_use bitmap array and use rflow_map for
PKTDMA. BCDMA does not need rflow_in_use either.
This fixes CPSW3g not able to get DMA channels at R5 SPL on AM64x
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 23 Dec 2021 13:56:03 +0000 (19:26 +0530)]
ARM: mach-k3: sysfw-loader: Copy sysfw.itb to OCRAM in OSPI/SPI bootmode
In case of xSPI bootmode OSPI flash is in DDR mode and needs to be accessed
in multiple of 16bit accesses Hence we cannot parse sysfw.itb FIT image
directly on OSPI flash via MMIO window. So, copy the image to internal
on-chip RAM before parsing the image.
Moreover, board cfg data maybe modified by ROM/TIFS in case of HS platform
and thus cannot reside in OSPI/xSPI and needs to be copied over to
internal OCRAM.
This unblocks OSPI/xSPI boot on HS platforms
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Dave Gerlach <d-gerlach@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Michael Liebert [Wed, 15 Dec 2021 15:14:28 +0000 (16:14 +0100)]
arm: mach-k3: am642_init: Unlock MCU PADCFG regs
Currently only the PADCFG registers of the main domain are unlocked.
Also unlock PADCFG registers of MCU domain, so MCU pin muxing can be configured by u-boot or Linux.
Signed-off-by: Michael Liebert <liebert@ibv-augsburg.de>
Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
Tom Rini [Sat, 15 Jan 2022 12:39:09 +0000 (07:39 -0500)]
Merge tag 'efi-2022-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc1
Documentation:
* Fix building HTML documentation of readthedocs.io
* Add ARM Juno board documentation
* Build requirements for Alpine Linux
* Include DM headers in API documentation
UEFI:
* Fix section alignment of EFI binaries
* Fix header length of RISC-V EFI binaries allowing to run them on EDK II
* Remove kaslr-seed from device tree if the EFI_RNG_PROTOCOL is provided
Other:
* Let 'part list' show all 128 GPT partitions
Tom Rini [Sat, 15 Jan 2022 12:34:46 +0000 (07:34 -0500)]
Merge branch '2022-01-14-assorted-fixes'
- A number of fixes in various subsystems. This includes having the phy
uclass track power-on and init counts as this should resolve some
tricky functional problems on a number of platforms.
Simon Glass [Tue, 4 Jan 2022 10:51:18 +0000 (03:51 -0700)]
efi: Tidy up some comments in efi header
Document the return value in efi_init(). Fix up @sizep in efi_info_get().
Use Return: instead of @return
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Simon Glass [Tue, 4 Jan 2022 10:51:17 +0000 (03:51 -0700)]
efi: Build the 64-bit app properly
Now that the linker crash is resolved, build the 64-bit EFI app, including
all the required code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 4 Jan 2022 10:51:16 +0000 (03:51 -0700)]
x86: efi: Set the correct link flags for the 64-bit EFI app
At present some 32-bit settings are used with the 64-bit app. Fix this by
separating out the two cases.
Be careful not to break the 64-bit payload, which needs to build a 64-bit
EFI stub with a 32-bit U-Boot.
Signed-off-by: Christian Melki <christian.melki@t2data.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 4 Jan 2022 10:51:15 +0000 (03:51 -0700)]
x86: efi: Don't use the 64-bit link script for the EFI app
That script is not intended for use with EFI, so update the logic to avoid
using it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christian Melki <christian.melki@t2data.com>
Simon Glass [Tue, 4 Jan 2022 10:51:14 +0000 (03:51 -0700)]
x86: efi: Round out the link script for 64-bit EFI
Make sure the linker lists are in the right place and drop the eh_frame
section, which is not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 4 Jan 2022 10:51:13 +0000 (03:51 -0700)]
x86: efi: Tweak the code used for the 64-bit EFI app
Add an empty CPU init function to avoid fiddling with low-level CPU
features in the app. Set up the C runtime correctly for 64-bit use
and avoid clearing BSS, since this is done by EFI when U-Boot is loaded.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 4 Jan 2022 10:51:12 +0000 (03:51 -0700)]
efi: Support the efi command in the app
At present the 'efi' command only works in the EFI payload. Update it to
work in the app too, so the memory map can be examined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Simon Glass [Tue, 4 Jan 2022 10:51:11 +0000 (03:51 -0700)]
x86: efi: Update efi_get_next_mem_desc() to avoid needing a map
At present this function requires a pointer to struct efi_entry_memmap
but the only field used in there is the desc_size. We want to be able
to use it from the app, so update it to use desc_size directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 4 Jan 2022 10:51:10 +0000 (03:51 -0700)]
efi: Move exit_boot_services into a function
At present this code is inline in the app and stub. But they do the same
thing. The difference is that the stub does it immediately and the app
doesn't want to do it until the end (when it boots a kernel) or not at
all, if returning to UEFI.
Move it into a function so it can be called as needed.
Add a comment showing how to store the memory map so that it can be
accessed within the app if needed, for debugging purposes only. The map
can change without notice.
Signed-off-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 15 Jan 2022 01:20:02 +0000 (02:20 +0100)]
MAINTAINERS: remove Alexander Graf from EFI PAYLOAD
The last review by Alex was in 2019.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sat, 15 Jan 2022 01:11:22 +0000 (02:11 +0100)]
efidebug: avoid 'dfu_alt_info not defined' message
If variable dfu_alt_info is not defined duplicate messages are displayed.
=> efidebug boot dump
Scanning disk mmc2.blk...
Scanning disk mmc1.blk...
Scanning disk mmc0.blk...
Found 3 disks
No EFI system partition
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
"dfu_alt_info" env variable not defined!
Probably dfu_alt_info not defined
Remove the 'Probably dfu_alt_info not defined' message.
Instead write a warning if the variable contains no entities.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Ilias Apalodimas [Mon, 3 Jan 2022 12:07:37 +0000 (14:07 +0200)]
efi_loader: Get rid of kaslr-seed if EFI_RNG_PROTOCOL is installed
U-Boot, in some occasions, injects a 'kaslr-seed' property on the /chosen
node. That would be problematic in case we want to measure the DTB we
install in the configuration table, since it would change across reboots.
The Linux kernel EFI-stub completely ignores it and only relies on
EFI_RNG_PROTOCOL for it's own randomness needs (i.e the randomization
of the physical placement of the kernel). In fact it (blindly) overwrites
the existing seed if the protocol is installed. However it still uses it
for randomizing it's virtual placement.
So let's get rid of it in the presence of the RNG protocol.
It's worth noting that TPMs also provide an RNG. So if we tweak our
EFI_RNG_PROTOCOL slightly and install the protocol when a TPM device
is present the 'kaslr-seed' property will always be removed, allowing
us to reliably measure our DTB.
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Heinrich Schuchardt [Tue, 11 Jan 2022 15:03:38 +0000 (16:03 +0100)]
cmd: part: list all 128 GPT partitions
A GPT partition table typically has 128 entries. If a partition table
contains a partition 128 'part list' should be able to list it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Tue, 11 Jan 2022 14:43:05 +0000 (15:43 +0100)]
disk: gpt: print all partitions
For GPT partition tables the 'part list' command stops at the first invalid
partition number. But Ubuntu has images with partitions number
1, 12, 13, 14, 15
In this case only partition 1 was listed by 'part list'.
Fixes:
38a3021edc54 ("disk: part_efi: remove indent level from loop")
Reported-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Heinrich Schuchardt [Fri, 14 Jan 2022 20:40:15 +0000 (21:40 +0100)]
efi_loader: fix SectionAlignment, FileAlignment
The alignment of sections in the EFI binaries generated by U-Boot is
incorrect.
According to the PE-COFF specification [1] the minimum value for
FileAlignment is 512. If the value of SectionAlignment is
less then the page size, it must equal FileAlignment.
Let's set both values to 512 for the ARM and RISC-V architectures.
[1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sun, 9 Jan 2022 17:16:11 +0000 (18:16 +0100)]
riscv: revert Complete efi header for RV32/64
EDK II refuses to load the EFI binaries created by U-Boot.
The reason is an incorrect PE-COFF header. The number of
data directories does not match NumberOfRvaAndSizes.
This leads to a failed consistency check in
PeCoffLoaderGetPeHeader():
SizeOfOptionalHeader - HeaderWithoutDataDir) !=
NumberOfRvaAndSizes * sizeof(DATA_DIRECTORY))
Fixes:
9afaeec6ef8b ("riscv: Complete efi header for RV32/64")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:55:41 +0000 (10:55 +0100)]
doc: add include/dm/fdtaddr.h to the HTML documentation
Correct Sphinx style comments in include/dm/fdtaddr.h
and add the devfdt API to the HTML documentation;
these functions are NOT compatible with live tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:49 +0000 (10:53 +0100)]
doc: add include/dm/of*.h to the HTML documentation
Correct Sphinx style comments in include/dm/ofnode.h
and add the device tree node API to the HTML documentation;
the ofnode functions are compatible with Live tree or with flat
device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:48 +0000 (10:53 +0100)]
doc: add include/dm/read.h to the HTML documentation
Correct Sphinx style comments in include/dm/read.h
and add the device read from device tree API to the HTML
documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:47 +0000 (10:53 +0100)]
doc: add include/dm/devres.h to the HTML documentation
Correct Sphinx style comments in include/dm/devres.h
and add the driver model device resource API, devres_*(),
to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:46 +0000 (10:53 +0100)]
doc: add include/dm/device.h to the HTML documentation
Correct Sphinx style comments in include/dm/device.h
and add the driver model device API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:45 +0000 (10:53 +0100)]
doc: add include/dm/platdata.h to the HTML documentation
Correct Sphinx style comments in include/dm/platdata.h
and add the associated API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:44 +0000 (10:53 +0100)]
doc: add include/dm/lists.h to the HTML documentation
Correct Sphinx style comments in include/dm/lists.h
and add the list API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:43 +0000 (10:53 +0100)]
doc: add include/dm/root.h to the HTML documentation
Correct Sphinx style comments in include/dm/devres.h
and add the associated driver model API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Patrick Delaunay [Wed, 12 Jan 2022 09:53:42 +0000 (10:53 +0100)]
doc: add include/dm/uclass.h to the HTML documentation
Correct Sphinx style comments in include/dm/uclass.h
and add the driver model UCLASS API to the HTML documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Wed, 12 Jan 2022 01:35:00 +0000 (02:35 +0100)]
.readthedocs.yml: update the requirements
Fix an error:
This project needs at least Sphinx v2.4.4.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Tue, 11 Jan 2022 00:37:01 +0000 (01:37 +0100)]
doc: Building on Alpine Linux
Describe the required packages for building U-Boot on Alpine Linux
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Andre Przywara [Mon, 20 Dec 2021 18:12:04 +0000 (18:12 +0000)]
doc: add Arm Juno board documentation
The Juno Arm development board is an open, vendor-neutral, Armv8-A
development platform.
Add documentation that briefly outlines the hardware, and describes
building and installation of U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugen Hristev [Tue, 4 Jan 2022 16:20:19 +0000 (18:20 +0200)]
lib: Kconfig: fix PHANDLE_CHECK_SEQ position outside of menu
CONFIG_PHANDLE_CHECK_SEQ is outside of the menu 'Library routines'
thus it's invisible in menuconfig and cannot be selected.
Fix this by moving the 'endmenu' after the PHANDLE_CHECK_SEQ definition
Fixes:
c589132a1d ("fdt: Use phandle to distinguish DT nodes with same name")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Peter Robinson [Sun, 2 Jan 2022 11:38:35 +0000 (11:38 +0000)]
env: fat: Add new lines at the end of print statements
Add some new line feeds at the end of print messages to make things
easier to read on the console. The other env options do this so
this is just an omission for FAT env.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Alper Nebi Yasak [Thu, 30 Dec 2021 19:36:51 +0000 (22:36 +0300)]
phy: Track power-on and init counts in uclass
On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share
the same PHY device instance. While these controllers are being stopped
they both attempt to power-off and deinitialize it, but trying to
power-off the deinitialized PHY device results in a hang. This usually
happens just before booting an OS, and can be explicitly triggered by
running "usb start; usb stop" in the U-Boot shell.
Implement a uclass-wide counting mechanism for PHY initialization and
power state change requests, so that we don't power-off/deinitialize a
PHY instance until all of its users want it done. The Allwinner A10 USB
PHY driver does this counting in-driver, remove those parts in favour of
this in-uclass implementation.
The sandbox PHY operations test needs some changes since the uclass will
no longer call into the drivers for actions matching its tracked state
(e.g. powering-off a powered-off PHY). Update that test, and add a new
one which simulates multiple users of a single PHY.
The major complication here is that PHY handles aren't deduplicated per
instance, so the obvious idea of putting the counts in the PHY handles
don't immediately work. It seems possible to bind a child udevice per
PHY instance to the PHY provider and deduplicate the handles in each
child's uclass-private areas, like in the CLK framework. An alternative
approach could be to use those bound child udevices themselves as the
PHY handles. Instead, to avoid the architectural changes those would
require, this patch solves things by dynamically allocating a list of
structs (one per instance) in the provider's uclass-private area.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com> - Rock960
Piotr Kubik [Wed, 29 Dec 2021 13:30:04 +0000 (14:30 +0100)]
ARM: qemu-arm: Fix build fail with boot devices disabled
BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
command is enabled otherwise the build will fail.
Signed-off-by: Piotr Kubik <piotr_kubik@vp.pl>
Mark Kettenis [Tue, 21 Dec 2021 16:31:50 +0000 (17:31 +0100)]
armv8: apple: Disable PSCI reset
Apple's ARMv8 cores don't implement EL3 and therefore don't
provide a PSCI implementation. So don't attempt to use
PSCI to reset on machines using Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Joel Peshkin [Tue, 21 Dec 2021 04:15:47 +0000 (20:15 -0800)]
BRCMNAND: Fix reporting of uncorrectable errors on subpages during page read
Previously, a subpage with an uncorrectable error followed by a subpage
with a correctable error would return an erroneous correctable status.
Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Samuel Dionne-Riel [Mon, 20 Dec 2021 23:23:45 +0000 (18:23 -0500)]
cmd: adc: Report return value on error
Reporting the return value should always be done on error conditions,
this way the developer can start debugging issues with more knowledge
in-hand.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Samuel Dionne-Riel [Mon, 20 Dec 2021 23:19:16 +0000 (18:19 -0500)]
lib: export vsscanf
The function was missing from exports, even though it loooks like the
intent of the implementation in sscanf.c was to have it exported.
Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Hou Zhiqiang [Wed, 15 Dec 2021 06:23:52 +0000 (14:23 +0800)]
checkpatch: report ERROR only on disabling of fdt and initrd relocation
Let the check pass when patches have these patterns in their context.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Pali Rohár [Thu, 9 Dec 2021 10:06:39 +0000 (11:06 +0100)]
nvme: Do not allocate 8kB buffer on stack
Calling 'nvme scan' followed by 'nvme detail' crashes U-Boot on Turris
Omnia with the following error:
undefined instruction
pc : [<
0a000000>] lr : [<
7ff80bfc>]
reloc pc : [<
8a8c0000>] lr : [<
00840bfc>]
sp :
7fb2b908 ip :
0000002a fp :
02000000
r10:
04000000 r9 :
7fb2fed0 r8 :
e1000000
r7 :
0c000000 r6 :
03000000 r5 :
06000000 r4 :
01000000
r3 :
7fb30928 r2 :
7fb30928 r1 :
00000000 r0 :
00000000
Flags: nZCv IRQs off FIQs off Mode SVC_32
Code:
0f0fb4f0 0f0fb4f0 0f0fb4f0 0f0fb4f0 (
f0f04b0f)
Resetting CPU ...
This happens when nvme_print_info() tries to return to the caller. It
looks like this error is caused by trying to allocate 8 KiB of memory
on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER().
Use malloc_cache_aligned() to allocate this memory dynamically instead.
This fixes 'nvme detail' on Turris Omnia.
Note that similar change was applied to file drivers/nvme/nvme.c in past by
commit
2f83481dff9c ("nvme: use page-aligned buffer for identify command").
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Patrick Delaunay [Tue, 30 Nov 2021 14:33:53 +0000 (15:33 +0100)]
test: test_lsblk: Mark as sandbox specific
This test checks for output specific to the sandbox blk device
"sandbox_host_blk", mark it as sandbox specific.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Maciej W. Rozycki [Sat, 20 Nov 2021 23:03:30 +0000 (23:03 +0000)]
pci: Work around PCIe link training failures
Attempt to handle cases with a downstream port of a PCIe switch where
link training never completes and the link continues switching between
speeds indefinitely with the data link layer never reaching the active
state.
It has been observed with a downstream port of the ASMedia ASM2824 Gen 3
switch wired to the upstream port of the Pericom PI7C9X2G304 Gen 2
switch, using a Delock Riser Card PCI Express x1 > 2 x PCIe x1 device,
P/N 41433, wired to a SiFive HiFive Unmatched board. In this setup the
switches are supposed to negotiate the link speed of preferably 5.0GT/s,
falling back to 2.5GT/s.
However the link continues oscillating between the two speeds, at the
rate of 34-35 times per second, with link training reported repeatedly
active ~84% of the time, e.g.:
02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
Bus: primary=02, secondary=05, subordinate=05, sec-latency=0
[...]
Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
LnkSta: Speed 5GT/s (downgraded), Width x1 (ok)
TrErr- Train+ SlotClk+ DLActive- BWMgmt+ ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
Forcibly limiting the target link speed to 2.5GT/s with the upstream
ASM2824 device makes the two switches communicate correctly however:
02:03.0 PCI bridge [0604]: ASMedia Technology Inc. ASM2824 PCIe Gen3 Packet Switch [1b21:2824] (rev 01) (prog-if 00 [Normal decode])
[...]
Bus: primary=02, secondary=05, subordinate=09, sec-latency=0
[...]
Capabilities: [80] Express (v2) Downstream Port (Slot+), MSI 00
[...]
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis+, Selectable De-emphasis: -3.5dB
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
and then:
05:00.0 PCI bridge [0604]: Pericom Semiconductor PI7C9X2G304 EL/SL PCIe2 3-Port/4-Lane Packet Switch [12d8:2304] (rev 05) (prog-if 00 [Normal decode])
[...]
Bus: primary=05, secondary=06, subordinate=09, sec-latency=0
[...]
Capabilities: [c0] Express (v2) Upstream Port, MSI 00
[...]
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (downgraded)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
[...]
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
[...]
Make use of this observation then and attempt to detect the inability to
negotiate the link speed automatically, and then handle it by hand. Use
the Data Link Layer Link Active status flag as the primary indicator of
successful link speed negotiation, but given that the flag is optional
by hardware to implement (the ASM2824 does have it though), resort to
checking for the mandatory Link Bandwidth Management Status flag showing
that the link speed or width has been changed in an attempt to correct
unreliable link operation (the ASM2824 does set it too).
If these checks indicate that link may not operate correctly, then poll
the Data Link Layer Link Active status flag along with the Link Training
flag for the duration of 200ms to see if the link has stabilised, that
is either that the Data Link Layer Link Active status flag has been set
or that Link Training has been inactive during at least the second half
of the interval.
If that has indicated failure, restrict the target speed to 2.5GT/s,
request a link retrain and check again if the link has stabilised. If
that does not work either, then restore the original speed setting and
claim defeat, otherwise we are done.
NB interestingly enough with the ASM2824 vs PI7C9X2G304 configuration
referred above asking the ASM2824 to retrain with a higher target link
speed once the 2.5GT/s speed has been negotiated makes the two devices
successfully negotiate 5.0GT/s. Lifting the 2.5GT/s speed restriction
would however prevent our workaround from working with an OS that issues
a reset and that is unaware of the problem. This is because the devices
would then try to negotiate a higher link speed from scratch and fail,
while the sticky property of the Target Link Speed setting will keep the
2.5GT/s speed restriction across a reset.
Keep the 2.5GT/s speed restriction then, conservatively, if functional
once applied.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Reviewed-by: Stefan Roese <sr@denx.de>