Xiang, Haihao [Fri, 6 Apr 2012 03:25:00 +0000 (11:25 +0800)]
Update LUT_MV table
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 6 Apr 2012 03:23:01 +0000 (11:23 +0800)]
Expand 8 MVs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 6 Apr 2012 00:45:32 +0000 (08:45 +0800)]
Correct the register region in VME kernel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 5 Apr 2012 08:40:13 +0000 (16:40 +0800)]
Support sub-macroblocks for Inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 5 Apr 2012 08:38:51 +0000 (16:38 +0800)]
Use the output from VME to format MFC_AVC_PAK_OBJEC command for Inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 5 Apr 2012 07:51:25 +0000 (15:51 +0800)]
Output more information in VME output buffer for Inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 5 Apr 2012 07:49:42 +0000 (15:49 +0800)]
Expand the VME output buffer for Inter frame
Prepare for 32 MVs(128 bytes) and other information(32 bytes) from VME. In addition, use
macros instead of magic numbers
Signed-off-by :Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Mon, 12 Mar 2012 14:30:13 +0000 (15:30 +0100)]
render: fix rendering of interlaced surfaces.
Handle bob-deinterlacing flags passed to vaPutSurface().
i.e. VA_TOP_FIELD|VA_BOTTOM_FIELD.
Avoid advanced deinterlacing kernels as they allocate extra temporary
surfaces, which are useless for such simple tasks. i.e. display either
field of an interlaced surface.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Wed, 4 Apr 2012 08:52:27 +0000 (10:52 +0200)]
vpp: drop "flags" field in pipeline caps.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Sun, 1 Apr 2012 02:21:19 +0000 (10:21 +0800)]
Update LUT_MbMode for set 0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Sun, 1 Apr 2012 02:18:10 +0000 (10:18 +0800)]
Only disable INTRA_8x8 if transform_8x8_mode_flag isn't set
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Thu, 29 Mar 2012 12:13:47 +0000 (14:13 +0200)]
mpeg2: propagate reference surfaces to other slots.
Fill in remaining reference surfaces as recommanded in HW specs.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 15 Mar 2012 13:41:47 +0000 (14:41 +0100)]
mpeg2: fix construction of reference frames list (SNB, IVB).
Fix construction of reference frames list for interlaced streams.
In this case, the array is indexed by frame store ID >> 1 where
bit 0 of frame store ID represents top (0) or bottom (1) field.
Besides, current render target can also be used as a reference
while decoding the second field.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit
14f70559b516030d141cce09db54cf49d11df9b2)
Gwenole Beauchesne [Thu, 15 Mar 2012 13:41:47 +0000 (14:41 +0100)]
mpeg2: fix reference surfaces construction (IVB).
Avoid an assert() since we were assigning a reference surface even
if it did not have any backing store.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit
18212d42c5dfee047094ae67914c2b2b630ad99e)
Gwenole Beauchesne [Mon, 27 Feb 2012 12:57:09 +0000 (13:57 +0100)]
mpeg2: fix TFF calculation (SNB).
Gen6 has specific requirements for the TFF flag, and thus has different
semantics than Gen7 (IVB). In particular, HW uses picture_structure and
TFF flag to determine the correct field to render.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit
01c37fad8c991714026d6a995e9e35cc7865933e)
Gwenole Beauchesne [Mon, 12 Mar 2012 15:40:59 +0000 (16:40 +0100)]
mpeg2: fix incorrect slice_vertical_position from codec layers.
Correctly emit slice_vertical_position, as per the definition from
the bitstream, to the HW decoder (MFD_MPEG2_BSD_OBJECT).
Add workaround for players that have not fixed their usage of
slice_vertical_position. That field shall represent the slice vertical
position as it comes from the bitstream.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit
298dc939835e3080c9330b4e52e8dfac25bf3060)
Conflicts:
NEWS
Gwenole Beauchesne [Sun, 18 Mar 2012 07:59:46 +0000 (08:59 +0100)]
Add WARN_ONCE() helper macro.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit
2447c981a84cd9dc1eddf8e4258cef555503024f)
Zhou Chang [Wed, 28 Mar 2012 06:37:50 +0000 (14:37 +0800)]
Fixed CBR mode missed issue in SNB.
Xiang, Haihao [Mon, 26 Mar 2012 07:11:15 +0000 (15:11 +0800)]
Avoid scaling if the source & destination region have the same size
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 27 Mar 2012 06:55:23 +0000 (14:55 +0800)]
Check the max resolution supported by hardware when create VA context
It will avoid GPU hang when try to play unsupported large resolution
videos.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
546fdcfa2f4dd162fdd19187255a57272d4f1745)
Conflicts:
src/i965_drv_video.c
src/i965_drv_video.h
Xiang, Haihao [Tue, 27 Mar 2012 06:48:36 +0000 (14:48 +0800)]
Allocate internal buffers with right size for SNB & IVB
The size is scalable with frame width or height
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
a97985da277cd48302cfcb0374604874fc77ef7d)
Xiang, Haihao [Mon, 26 Mar 2012 06:12:27 +0000 (14:12 +0800)]
Avoid moving objects in a heap to a new address when expanding this heap
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
ef5efefaec8b3a4eafde2347b98a973f73745421)
Xiang, Haihao [Thu, 22 Mar 2012 01:31:05 +0000 (09:31 +0800)]
Use AVS kernel to implement normal scaling on Sandybridge
Set parameter nlas to 0 to disable NLAS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
0b38176cda6047b05cf0eacd913f57ce501f4fdf)
Xiang, Haihao [Tue, 20 Mar 2012 01:47:26 +0000 (09:47 +0800)]
Remove weave method
The surface has been weaved for field coded picture.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 20 Mar 2012 01:09:46 +0000 (09:09 +0800)]
Fix the mapping of filter
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Mar 2012 05:29:02 +0000 (13:29 +0800)]
Fix compiler error after merge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Mar 2012 05:28:01 +0000 (13:28 +0800)]
Merge branch 'vaapi-ext' into staging-work
Conflicts:
src/gen6_mfc.c
Xiang, Haihao [Fri, 16 Mar 2012 05:00:02 +0000 (13:00 +0800)]
Fix VME output offset issue
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Mar 2012 01:26:03 +0000 (09:26 +0800)]
Always append MI_BATCH_BUFFER_END at the end of a batchbuffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Mar 2012 00:48:06 +0000 (08:48 +0800)]
More space for the header of picture & slice in the MFC batchbuffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 15 Mar 2012 06:46:32 +0000 (14:46 +0800)]
MFC: optimize the MFC batchbuffer shader
Xiang, Haihao [Thu, 15 Mar 2012 06:05:48 +0000 (14:05 +0800)]
VME: dual start and adaptive search
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 15 Mar 2012 01:46:37 +0000 (09:46 +0800)]
VME: Handle multiple macroblocks in a single thread
In addition, merge include files for GEN6 & GEN7
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 13 Mar 2012 00:47:44 +0000 (08:47 +0800)]
Merge branch 'vaapi-ext' into staging-work
Conflicts:
src/gen6_mfc.c
src/gen6_vme.c
src/gen7_mfc.c
src/gen7_mfc.h
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 9 Mar 2012 00:35:32 +0000 (08:35 +0800)]
Setup pipeline to create MFC batchbuffer on Sandybridge
Also clean up the source
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 8 Mar 2012 05:00:35 +0000 (13:00 +0800)]
Setup pipeline to create MFC batchbuffer on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 8 Mar 2012 04:58:37 +0000 (12:58 +0800)]
New shader for MFC batchbuffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 2 Mar 2012 07:40:51 +0000 (15:40 +0800)]
Add two helper functions for batchbuffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
teaonly [Fri, 2 Mar 2012 06:49:44 +0000 (14:49 +0800)]
Synced gen7 with gen6 for HRD.
teaonly [Fri, 2 Mar 2012 06:41:44 +0000 (14:41 +0800)]
Synced gen7 with gen6 for HRD.
Xiang, Haihao [Thu, 1 Mar 2012 05:17:54 +0000 (13:17 +0800)]
Fix the issue of vaGetImage()/vaPutImage() in multi-threads
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
0b60832061988c68e6a531e6852f02f6308d349c)
Xiang, Haihao [Thu, 1 Mar 2012 04:57:21 +0000 (12:57 +0800)]
Fix map/unmap mismatches
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
918f26fc0c5c38fb8c1002dd48c857897931c5d5)
Xiang, Haihao [Wed, 29 Feb 2012 07:59:46 +0000 (15:59 +0800)]
Fixed VME result offset issue for IVB.
Signe-off-by: Zhou Chang <chang.zhou@intel.com>
Signe-off-by: Xiang, Haihao <haihao.xiang@intel.com
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
18ffbe2b8adcafa62635efa84673d0f09f8278e2)
Xiang, Haihao [Wed, 29 Feb 2012 07:45:07 +0000 (15:45 +0800)]
Preprocess VME shader first
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
65f644f71422f38064677f2fed6e11ac04037936)
Zhou,Chang [Wed, 29 Feb 2012 05:54:52 +0000 (13:54 +0800)]
Fixed multipul slices issue, change end of coded buffer judge.
(cherry picked from commit
5da90f4cc14e24d6b0f2e1c69505b8bfa939b4cd)
Xiang, Haihao [Tue, 28 Feb 2012 03:19:10 +0000 (11:19 +0800)]
Fix memory leak
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
814424d03c88cd7aff57e886587a131f6bf8197f)
Xiang, Haihao [Thu, 1 Mar 2012 05:17:54 +0000 (13:17 +0800)]
Fix the issue of vaGetImage()/vaPutImage() in multi-threads
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 1 Mar 2012 04:57:21 +0000 (12:57 +0800)]
Fix map/unmap mismatches
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou,Chang [Wed, 29 Feb 2012 05:57:42 +0000 (13:57 +0800)]
Synced IVB with SNB, added HRD and multipul slices support.
Xiang, Haihao [Wed, 29 Feb 2012 07:59:46 +0000 (15:59 +0800)]
Fixed VME result offset issue for IVB.
Signe-off-by: Zhou Chang <chang.zhou@intel.com>
Signe-off-by: Xiang, Haihao <haihao.xiang@intel.com
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 29 Feb 2012 07:45:07 +0000 (15:45 +0800)]
Preprocess VME shader first
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou,Chang [Wed, 29 Feb 2012 05:54:52 +0000 (13:54 +0800)]
Fixed multipul slices issue, change end of coded buffer judge.
Xiang, Haihao [Wed, 29 Feb 2012 02:15:47 +0000 (10:15 +0800)]
Cleanup VME
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 28 Feb 2012 03:19:10 +0000 (11:19 +0800)]
Fix memory leak
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 27 Feb 2012 06:54:06 +0000 (14:54 +0800)]
Use the right slice parameters for multi-slice encoding
Previously it always fills SLICE_STATE with the first slice
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
73f11b0f369f74ea1fdccfd1a0818364cd196949)
Conflicts:
src/gen6_mfc.c
Xiang, Haihao [Mon, 27 Feb 2012 06:54:06 +0000 (14:54 +0800)]
Use the right slice parameters for multi-slice encoding
Previously it always fills SLICE_STATE with the first slice
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 23 Feb 2012 06:35:01 +0000 (14:35 +0800)]
Reissue all states before executing VME
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 23 Feb 2012 06:35:01 +0000 (14:35 +0800)]
Reissue all states before executing VME
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Feb 2012 04:56:08 +0000 (12:56 +0800)]
Also support Main & High profile on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Feb 2012 02:43:58 +0000 (10:43 +0800)]
Set input/output color list
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Feb 2012 01:06:59 +0000 (09:06 +0800)]
Support Main & High profile
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Feb 2012 01:06:11 +0000 (09:06 +0800)]
Store VAEncPackedHeaderParameterBuffer as other parameter buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 21 Feb 2012 08:04:40 +0000 (16:04 +0800)]
Add support for the new version of vaCreateSurfaces()
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 21 Feb 2012 07:07:09 +0000 (15:07 +0800)]
Add support for vaGetSurfaceAttributes()
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Feb 2012 08:27:17 +0000 (16:27 +0800)]
Remove VAProcFilterParameterBufferType from vaRenderPicture()
Now VAProcPipelineParameterBuffer::filters holds all Video filter parameter
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Feb 2012 07:55:22 +0000 (15:55 +0800)]
Add support for VAEncMiscParameterBuffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Feb 2012 07:08:59 +0000 (15:08 +0800)]
Use the bitrate control mode set in the current configuration
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Feb 2012 02:33:28 +0000 (10:33 +0800)]
Fix the interface for internal context initialization
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Feb 2012 06:01:18 +0000 (14:01 +0800)]
Fix i965_update_attribute
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Feb 2012 05:51:35 +0000 (13:51 +0800)]
Fix the supported bit rate control mode
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Feb 2012 05:42:34 +0000 (13:42 +0800)]
Switch to the new interface in staging branch.
Only fix compile error in this commit
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Feb 2012 02:23:29 +0000 (10:23 +0800)]
Merge branch 'master' into staging
Conflicts:
src/i965_drv_video.c
Gwenole Beauchesne [Tue, 14 Feb 2012 09:56:20 +0000 (10:56 +0100)]
h264: always submit MFX_QM_STATE for flat scaling lists (IVB).
If codec layer does not provide a VAIQMatrixBufferH264, this means
flat scaling lists shall be used. The MFX_QM_STATE command still has
to be submitted since IVB+ does not have a means to use HW generated
scaling lists.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 14 Feb 2012 13:18:41 +0000 (14:18 +0100)]
jpeg: fix memory leak of huffman tables.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 14 Feb 2012 13:16:31 +0000 (14:16 +0100)]
Fix build with older VA-API (libva).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Tue, 14 Feb 2012 05:56:05 +0000 (13:56 +0800)]
Merge branch 'master' into vaapi-ext
Conflicts:
src/gen6_mfc.c
src/gen7_mfd.c
src/gen7_mfd.h
src/i965_drv_video.c
src/i965_drv_video.h
src/i965_encoder.c
src/i965_post_processing.c
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 14 Feb 2012 01:14:17 +0000 (09:14 +0800)]
Use the same the binding table index on Sandybridge & Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 14 Feb 2012 01:41:16 +0000 (09:41 +0800)]
Create batchbuffer for VME via GPU shader on Sandybridge
It is the same of commits a4ff1bd and a4ff1bd
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 13 Feb 2012 01:09:04 +0000 (09:09 +0800)]
Fill VME batchbuffer by GPU instead of CPU
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 14 Feb 2012 01:28:57 +0000 (09:28 +0800)]
A new shader to create VME batchbuffer on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 7 Feb 2012 07:43:43 +0000 (15:43 +0800)]
Clean up
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 10 Feb 2012 06:08:23 +0000 (14:08 +0800)]
Fix the address of the surface state for vme output buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 10 Feb 2012 06:07:33 +0000 (14:07 +0800)]
Fix surface state size
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 7 Feb 2012 01:27:05 +0000 (09:27 +0800)]
Fix compile error after cherry-pick
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 6 Feb 2012 06:39:08 +0000 (14:39 +0800)]
A workaround for JPEG decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 08:28:37 +0000 (16:28 +0800)]
Fix y offset for Cb/Cr
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:17:13 +0000 (09:17 +0800)]
JPEG component id macros are removed, so don't use them in driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:01:59 +0000 (09:01 +0800)]
Fix frame height/width for YUV400/YUV444/YUV422V_2Y JPEG image
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:00:48 +0000 (09:00 +0800)]
Map JPEG component id to Y, Cb, Cr
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 00:59:09 +0000 (08:59 +0800)]
Render YUV400 image on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 7 Feb 2012 01:19:03 +0000 (09:19 +0800)]
Fix graphics memory allocation for VA surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 12 Jan 2012 05:30:34 +0000 (13:30 +0800)]
use the revised JPEG decoding interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Hai Lan [Wed, 21 Dec 2011 22:03:44 +0000 (06:03 +0800)]
Fix the bug for IVB jpeg decoding
When call i965_BeginPicture for JPEG decoding, Assertion `0' failed.
Signed-off-by: Hai Lan <hai.lan@intel.com>
Xiang, Haihao [Mon, 24 Oct 2011 05:28:42 +0000 (13:28 +0800)]
use the new JPEG decoding interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 7 Sep 2011 08:18:19 +0000 (16:18 +0800)]
i965_drv_video: support JPEG decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 06:15:14 +0000 (14:15 +0800)]
i965_drv_video: Postpone releasing internal buffer.
Also fix memory leak in driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 02:09:15 +0000 (10:09 +0800)]
i965_drv_video: Simplify render buffer function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Mon, 6 Feb 2012 15:50:38 +0000 (23:50 +0800)]
Added HRD support for Gen6.
Zhou Chang [Mon, 6 Feb 2012 15:49:44 +0000 (23:49 +0800)]
Initail HRD control framwork.
Zhou Chang [Mon, 6 Feb 2012 13:29:23 +0000 (21:29 +0800)]
Added SEI header help functions.