radeonsi: add a tweak for PS wave CU utilization for gfx10.3

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>

radeonsi: break a binning batch on a new PS if bins can use multiple state sets

ported from PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>

radeonsi: move binning parameters into si_screen

it will be used in the next commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>

radeonsi: set KEEP_TOGETHER_ENABLE if needed

ported from PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>

pan/bi: Remove old register mode definitions

Now replaced by canonical equivalents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Use canonical register packing

This better matches the hardware behaviour and will allow us to
implement write masks down the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Rename port -> slot

To match the canonical naming convention.

$ sed -i -e 's/\([_ \.>"!]\)[pP]ort\([ ,'"'"'_0123s\(\[]\)/\1slot\2/g' *.c *.h

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Decode all 32-bit register modes

There's actually more than 16 of them, disambiguated by `r2 == r3` and
`first?` as conditions for another "fun" encoding. The extra space
allows for writing half-registers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Pass 'first' through disassembler

Required to decode the registers of the first instruction of a clause
correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Add bifrost_reg_mode enum

This generalizes the previous control field, adding in the full set of
enums required for 16-bit writemasks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Disassemble PC-relative addresses

Apply whatever modifier we computed and symbolically work out the
behaviour of the hardware. This involves some pretty gnarly primitives
(e.g. 28-bit sign extensions) but seems to works ok.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Decode M values in disasm

This is rather complicated and mostly unused in real world code but
correct handling is required to disassemble branchy code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Track M values of disassembled constants

We'll want to route these values from the clause itself to the source
dump in order to disassemble modified embedded constants.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Inline dump_instr

Tuple dumping is trivial now that we autogenerate most of it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Annotate disassemble with format names

It's hard enough to keep this all straight as it is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

pan/bi: Annotate stop bit (canonically "Z-bit")

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>

radv: add a tweak for PS wave CU utilization for gfx10.3

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>

radv: set KEEP_TOGETHER_ENABLE if necessary on GFX10+

Ported from RadeonSI and PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>

radeonsi: don't use nir_opt_access

st/mesa already calls this and nir_opt_access should be run with
deref-based SSBO access.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6778>

st/nir: call nir_opt_access before gl_nir_lower_buffers

This pass should be run with deref-based SSBO access.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6778>

radv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>

radv: Simplify radv_is_hw_resolve_pipeline.

We have the bounds so all the format checking is not needed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>

radv: Disable NGG on APUs.

Syncing from Radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6828>

lima: add natively supported vertex buffer formats

Add natively supported vertex buffer formats. If formats are not listed
here as natively supported, mesa triggers a buffer format translation
routine per draw call which can be expensive.
This helps improve performance in some applications.
The 32-bit integer formats were found by trial and error with a script
and checked in particular with piglit test gl-2.0-vertexattribpointer.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6714>

radv: advertise VK_KHR_copy_commands2

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add support for CmdResolveImage2KHR()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: cleanup selecting the hardware resolve path

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add support for CmdCopyImageToBuffer2KHR()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add support for CmdCopyImage2KHR()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add support for CmdCopyBufferToImage2KHR()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add support for CmdCopyBuffer2KHR()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add support for CmdBlitImage2KHR()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: add VK_KHR_copy_commands2 but leave it disabled

To declare new prototypes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>

radv: bump the advertised patch version to 145

We have been keeping up with the spec updates. Same as ANV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6818>

radv: remove useless assignment of MAX_API_VERSION

It's overwritten few lines below.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6818>

gallium/util: add blitter-support for stencil-fallback

This wires up the shader in the previous commit so we can blit without
having to reimplement the blitter in the D3D12 driver.

This isn't optimal, but it's reasonable enough, and this behavior is
rare.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6681>

gallium/util: add shader for stencil-blits

This shader is useful to replicate single bit from a stencil buffer even
when there's no support for PIPE_CAP_SHADER_STENCIL_EXPORT.

This is useful for the D3D12 driver, where the graphics pipeline is the
only way of writing to MSAA stencil-buffers, and not all drivers support
exporting the stencil-value from the shader.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6681>

nir_lower_system_values: Fix load_global_invocation_id to use base_work_group_id even with no base_global id

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6668>

android: Disable trying to read/write to the disk cache.

We need the disk cache enabled in Android to get EGL_ANDROID_blob_cache's
callbacks called, but we don't actually want to store anything on disk.
Fixes "Failed to create //.cache for shader cache (Read-only file
system)---disabling." spam on init.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6762>

mesa: Make the android_stub be a set of non-installed shared libraries.

Previously, we included the stubs in our driver binaries, so they didn't
call the actual system libraries for these functions.  This was enough to
build-test the Android code in CI without even the NDK.

To make NDK-built Mesa drivers useful, we need to link against these
system libraries that aren't present in the NDK.  Split the symbols to
separate non-installed shared libraries and link against those, so that
when you drop the resulting .so in your /vendor/lib64/hw/, it just works
out.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6805>

amd: add VanGogh support

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>

amd: add Dimgrey Cavefish support

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>

radeonsi: remove KILL_PS_INF_INTERP/CLAMP_DIV_BY_ZERO, use screen::options

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>

radeonsi: move debug options from si_disk_cache_create to si_get_ir_cache_key

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>

radeonsi: set TRUNC_COORD=0 for Total War: WARHAMMER to fix it

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3233

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>

ci: Use ignore_scheduled_pipelines anchor in .radeonsi-rules

Without this, scheduled pipelines erroneously tried to create jobs using
this template, which can't work, because their dependency jobs don't
exist in scheduled pipelines. Unfortunately, this resulted in scheduled
pipelines not running silently, without any direct feedback about what's
wrong (see https://gitlab.com/gitlab-org/gitlab/-/issues/25490).

Fixes: 6c8b921572a5 "ci: Build kernels and rootfs for x86 devices"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6802>

tu: Expose shaderStorageImage*WithoutFormat

We don't use the format anymore in the backend, except determining the
number of components, and we fallback to 4 there if it's not specified.
So we should be safe to enable this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>

ir3: Don't use the format to get the image type

Use the sampler type instead, which was recently plumbed through core
NIR, for load/store and the right type for atomics. This removes the
last hard dependency on the image format.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>

tu: Expose shaderImageGatherExtended

This just allows textureGather() to have offsets, which we already
supported in ir3.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>

tu: Expose shaderStorageImageExtendedFormats

We already supported all the formats on the list, so it's trivial to
enable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>

r600/sfn: Be a bit more verbose when logging skipped FS outputs

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: Acquire the number of FS outputs and the write_all info early

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: Take dual source blending output indices into account

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: Handle number of color outputs taking dual source blending into account

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: Keep info about dual-source blend in FS

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: Sort the outputs of the FS according to data index

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600: Add flag for dual-source blending to shader key

Otherwise the number of outputs and the output data index can't be
interpreted correctly.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: remove a useless if-condition

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: run late algebraic optimizations

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

r600/sfn: use cnde instead of cnde_int

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>

etnaviv: fix comment for source of etna_mesa_debug

The file and the environment variables have different names than
described in the comment. Fix the comment to avoid confusion.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6661>

nir: Rename get_buffer_size to get_ssbo_size

This makes it explicit that this intrinsic is only for SSBOs.  For the
v3dv driver, we'll be adding a get_ubo_size intrinsic and we want to be
able to distinguish between the two.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6812>

aco: stop multiplying driver_location by 4

This didn't really serve any purpose, doesn't match how FS inputs are
currently done, and prevented us from using
nir_io_add_const_offset_to_base in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>

aco: remove dead indirect fs input loading

It's asserted that the visit_load_input code isn't reached. It also didn't
handle divergent indexing and this situation should have been lowered
anyway.

I think this used to be needed to pass a dEQP-VK.glsl.indexing.* test, but
it doesn't seem needed anymore.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>

aco: use nir's constant source helpers more

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>

aco: use nir_get_io_offset_src() in visit_load_input()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>

aco: use io semantics to get an intrinsic's slot

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>

aco: Use NIR IO semantics for tess factor IO locations.

Previously we relied on looping over the NIR output variables
to remember the driver location of the tess factors, now use
the new NIR IO semantics instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>

anv: implement VK_KHR_copy_commands2

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6801>

vulkan: bump headers/registry to 1.2.154

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6801>

nir/lower_samplers: Clamp out-of-bounds access to array of samplers

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds reads return undefined values, which
 include values from other variables of the active program or zero."

Robustness extensions suggest to return zero on out-of-bounds
accesses, however it's not applicable to the arrays of samplers,
so just clamp the index.

Otherwise instr->sampler_index or instr->texture_index would be out
of bounds, and they are used as an index to arrays of driver state.

E.g. this fixes such dereference:
 if (options->lower_tex_packing[tex->sampler_index] !=
in nir_lower_tex.c

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>

nir/large_constants: Eliminate out-of-bounds writes to large constants

Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds writes may be discarded or overwrite
 other variables of the active program."

Fixes: 1235850522cd5e7b07701f7065996430ca1514b6
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>

nir/lower_io: Eliminate oob writes and return zero for oob reads

Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

 "In the subsections described above for array, vector, matrix and
  structure accesses, any out-of-bounds access produced undefined
  behavior....
  Out-of-bounds writes may be discarded or overwrite
  other variables of the active program.
  Out-of-bounds reads return undefined values, which
  include values from other variables of the active program or zero."

GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
for reads.

Otherwise get_io_offset would return out-of-bound offset which may
result in out-of-bound loading/storing of inputs/outputs,
that could cause issues in drivers down the line.

E.g. this fixes such dereference:
 int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]];
in brw_nir.c

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>

radeon: rename RADEON_TRANSFER_* -> RADEON_MAP_*

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>

gallium: rename transfer flags -> map flags in comments

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>

gallium: rename pipe_transfer_usage -> pipe_map_flags

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>

gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_*

Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>

radeonsi: add 16-bit ALU vectorization

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

radeonsi: don't scalarize 16-bit vec2 ALU opcodes

prerequisite for enabling vectorization, so that we don't scalarize
and vectorize at the same time, causing an infinite loop.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

radeonsi: vectorize IO for better ALU vectorization

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

radeonsi: implement 16-bit FS color outputs

This removes type conversions from 16 bits to 32 bits in the main function
and then back to 16 bits in the epilog.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

radeonsi: set flags for FP16 in shaders

v2: remove the enablement code

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

radeonsi: don't lower pack for better 16-bit vectorization

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

ac/nir: implement nir_op_[un]pack_[64/32]_*

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>

glsl: Initialize ir_constant member const_elements in all constructors.

Fix defects reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member const_elements is not
initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6770>

pan/bi: Fix typo.

Fix defect reported by Coverity Scan.

Same on both sides (CONSTANT_EXPRESSION_RESULT)
pointless_expression: The expression src0_u8 || src0_u8 does not
accomplish anything because it evaluates to either of its
identical operands, src0_u8.

Fixes: 2ff53879f214 ("pan/bi: Use new packing")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6780>

st/mesa: Deal with empty textures/buffers in semaphore wait/signal.

The actual texture might not have been created yet.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3257
CC: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6788>

turnip/kgsl: Associate fences with submits.

This fixes all the I was seeing in the multiview tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>

turnip: Add kgsl backend

Lacking a bit around fences and wsi integration, but there's enough
here to actually drive the GPU.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>

intel/compiler: fixup Gen12 workaround for array sizes

We didn't handle the case of NULL images/textures for which we should
return 0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 397ff2976ba281 ("intel: Implement Gen12 workaround for array textures of size 1")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3522
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6729>

wsi/x11: Create a present queue for VK_PRESENT_MODE_FIFO_RELAXED_KHR

This activates the target_msc computation that we'd otherwise be using
if we were just FIFO; otherwise we'd always set target_msc = 0 and it'd
act like IMMEDIATE.

Fixes: 77d25627933 "wsi/x11: Hook up VK_PRESENT_MODE_FIFO_RELAXED_KHR"
Fixes: mesa/mesa#3512
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6804>

gallium/auxiliary/vl: Include src region in scale_y calculation

Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3521
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6736>

frontends/va: Enabled packed headers for H.264 encoder

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>

radeon: Pass HEVC encode crop parameters to the encoder

Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2351
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>

gallium: Parse packed HEVC SPS encode header for crop parameters

The crop / conformance window parameters are set by ffmpeg but they only
seem to be made available in packed headers. This commit copies the H265
header parsing code from st/omx (planning in the future to move this
code to a common place to be shared by the different state trackers) in
order to grab the crop parameters

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>

r600/sfn: Fix typo in comment

Thanks Stanislav Jakúbek for ponting it out.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>

r600/sfn: Fix component count for fdph

The second parameter has four components, and this is the one that would
be copied when splitting constants.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>

r600/sfn: make number of source components a local variable

There is no need to keep that value as a member and it irritates
Coverity.

Fixes: 688680decce9
  r600/nir: fetch sources and split uniforms before emittting alu instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>

gallium/auxiliary/vl: Odd Dimensions are failing

Issue: While running the tast for odd resolutions there are green lines
observed in the dumped image. The resolution is 321x241, the extra 1 pixel
data is missing in the image. The reason for this is in the post
processing when we adjust the size of height and width we are
dividing it by 2.

Fix: To resolve this issue we first need to align it to 2 and then divide
by 2 to get the required values. Once we do this we will have proper data
in the dumped image and missing pixel data will be available.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6795>

radv: do not lower UBO/SSBO access to offsets

Use nir_lower_explicit_io instead of lowering to offsets. Extra
(useless) additions are removed by lowering load_vulkan_descriptor
to vec2(src.x, 0).

fossils-db (Navi):
Totals from 18236 (13.21% of 138013) affected shaders:
SGPRs: 1172766 -> 1168278 (-0.38%); split: -0.89%, +0.50%
VGPRs: 940156 -> 952232 (+1.28%); split: -0.08%, +1.37%
SpillSGPRs: 30286 -> 31109 (+2.72%); split: -0.78%, +3.50%
SpillVGPRs: 1893 -> 1909 (+0.85%)
CodeSize: 87910396 -> 88113592 (+0.23%); split: -0.35%, +0.58%
Scratch: 819200 -> 823296 (+0.50%)
MaxWaves: 205535 -> 202102 (-1.67%); split: +0.05%, -1.72%
Instrs: 17052527 -> 17113484 (+0.36%); split: -0.32%, +0.67%
Cycles: 670794876 -> 669084540 (-0.25%); split: -0.38%, +0.13%
VMEM: 5274728 -> 5388556 (+2.16%); split: +3.10%, -0.94%
SMEM: 1196146 -> 1165850 (-2.53%); split: +2.06%, -4.60%
VClause: 381463 -> 399217 (+4.65%); split: -1.08%, +5.73%
SClause: 666216 -> 631135 (-5.27%); split: -5.44%, +0.18%
Copies: 1292720 -> 1289318 (-0.26%); split: -1.28%, +1.01%
Branches: 467336 -> 473028 (+1.22%); split: -0.67%, +1.89%
PreSGPRs: 766459 -> 772175 (+0.75%); split: -0.53%, +1.28%
PreVGPRs: 819746 -> 825327 (+0.68%); split: -0.05%, +0.73%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>