platform/kernel/u-boot.git
18 months agoboard: starfive: add StarFive VisionFive v2 board support
Yanhong Wang [Wed, 29 Mar 2023 03:42:17 +0000 (11:42 +0800)]
board: starfive: add StarFive VisionFive v2 board support

Add board support for StarFive VisionFive v2.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agoram: starfive: add ddr driver
Yanhong Wang [Wed, 29 Mar 2023 03:42:16 +0000 (11:42 +0800)]
ram: starfive: add ddr driver

Add driver for StarFive JH7110 to support ddr initialization in SPL.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agopinctrl: starfive: Add StarFive JH7110 driver
Kuan Lim Lee [Wed, 29 Mar 2023 03:42:15 +0000 (11:42 +0800)]
pinctrl: starfive: Add StarFive JH7110 driver

Add pinctrl driver for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agodt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Jianlong Huang [Wed, 29 Mar 2023 03:42:14 +0000 (11:42 +0800)]
dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions

Add pinctrl definitions for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agoclk: starfive: Add StarFive JH7110 clock driver
Yanhong Wang [Wed, 29 Mar 2023 03:42:13 +0000 (11:42 +0800)]
clk: starfive: Add StarFive JH7110 clock driver

Add a DM clock driver for StarFive JH7110 SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agodt-bindings: clock: Add StarFive JH7110 clock definitions
Yanhong Wang [Wed, 29 Mar 2023 03:42:12 +0000 (11:42 +0800)]
dt-bindings: clock: Add StarFive JH7110 clock definitions

Add all clock outputs for the StarFive JH7110 clock generator.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agoreset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC
Yanhong Wang [Wed, 29 Mar 2023 03:42:11 +0000 (11:42 +0800)]
reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC

Add a DM reset driver for StarFive JH7110 SoC.

Note that the register base address of reset controller is the
same with the clock controller. Therefore, there is no device
tree node alone for reset driver.It binds device node in
the clock driver

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agodt-bindings: reset: Add StarFive JH7110 reset definitions
Yanhong Wang [Wed, 29 Mar 2023 03:42:10 +0000 (11:42 +0800)]
dt-bindings: reset: Add StarFive JH7110 reset definitions

Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and
always-on(AON) reset controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agocache: starfive: Add StarFive JH7110 support
Yanhong Wang [Wed, 29 Mar 2023 03:42:09 +0000 (11:42 +0800)]
cache: starfive: Add StarFive JH7110 support

This adds support for the StarFive JH7110 SoC which also
feature this SiFive cache controller.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agoriscv: cpu: jh7110: Add support for jh7110 SoC
Yanhong Wang [Wed, 29 Mar 2023 03:42:08 +0000 (11:42 +0800)]
riscv: cpu: jh7110: Add support for jh7110 SoC

Add StarFive JH7110 SoC to support RISC-V arch.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
18 months agoMerge tag 'u-boot-nand-20230417' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Mon, 17 Apr 2023 14:47:33 +0000 (10:47 -0400)]
Merge tag 'u-boot-nand-20230417' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash

Pull request for u-boot-nand-20230417

The first two patches are by Frieder Schrempf who joins as a reviewer for
the SPI NAND framework and drivers.

The following 2 patches are by Linus Walleij and are taken by the series
"Add Broadcom Northstar basic support".

Bin Meng makes static a list for octeontx.

Francesco Dolcini specifies MTD partitions on command line for
colibri-{imx6ull,imx7}.

18 months agoMerge branch 'master_sh/gen4/rswitch' of https://source.denx.de/u-boot/custodians...
Tom Rini [Sun, 16 Apr 2023 23:00:48 +0000 (19:00 -0400)]
Merge branch 'master_sh/gen4/rswitch' of https://source.denx.de/u-boot/custodians/u-boot-sh

18 months agoMerge branch 'master_sh/gen4/mmcfix' of https://source.denx.de/u-boot/custodians...
Tom Rini [Sun, 16 Apr 2023 23:00:25 +0000 (19:00 -0400)]
Merge branch 'master_sh/gen4/mmcfix' of https://source.denx.de/u-boot/custodians/u-boot-sh

18 months agoMerge branch 'master' of git://git.denx.de/u-boot-coldfire
Tom Rini [Sun, 16 Apr 2023 22:59:40 +0000 (18:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-coldfire

18 months agoARM: renesas: Enable rswitch, serdes and PHY driver on R8A779F0 S4 Spider
Marek Vasut [Mon, 20 Mar 2023 20:05:47 +0000 (21:05 +0100)]
ARM: renesas: Enable rswitch, serdes and PHY driver on R8A779F0 S4 Spider

Enable Renesas RSwitch driver, matching SERDES PHY driver and Marvell
10G ethernet PHY driver in R8A779F0 S4 Spider board configuration to
make ethernet available via the RSwitch ports.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agoconfigs: m68k: Use default shell prompt
Marek Vasut [Thu, 23 Mar 2023 00:21:28 +0000 (01:21 +0100)]
configs: m68k: Use default shell prompt

The current shell prompt '->' interferes with CI matching on 'bdinfo'
output. When CI test.py attempts to locate memory information in the
'bdinfo' output, it matches on '->' prefix which is identical to the
shell prefix. Switch the prompt to default '=>' one to avoid this
interference.

Suggested-by: Tom Rini <trini@konsulko.com> # found the CI oddity
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agonet: rswitch: Add Renesas Ethernet Switch
Phong Hoang [Mon, 20 Mar 2023 20:05:04 +0000 (21:05 +0100)]
net: rswitch: Add Renesas Ethernet Switch

This patch adds Ethernet Switch support that found on R-Car S4
(r8a779f0) SoC. This is extracted from multiple patches from
downstream BSP, with additional rework of the network device
registration.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Marek: Rework the driver to support all ports via subdrivers.
        Split the driver up, add generic PHY framework support.
Generic code clean ups.]
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
18 months agophy: renesas: Add Renesas Ethernet SERDES driver for R-Car S4-8
Marek Vasut [Sun, 19 Mar 2023 17:09:43 +0000 (18:09 +0100)]
phy: renesas: Add Renesas Ethernet SERDES driver for R-Car S4-8

Add Renesas Ethernet SERDES driver for R-Car S4-8 (r8a779f0).
The datasheet describes initialization procedure without any information
about registers' name/bits. So, this is all black magic to initialize
the hardware. Especially, all channels should be initialized at once.

This driver is imported and adjusted from Linux 6.3-rc1 commit:
50133cd3e8dd1 ("phy: renesas: r8a779f0-eth-serdes: Remove retry code in .init()")

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agommc: tmio: Use IS_ENABLED() to check for CONFIG_ option
Marek Vasut [Sat, 8 Apr 2023 17:35:37 +0000 (19:35 +0200)]
mmc: tmio: Use IS_ENABLED() to check for CONFIG_ option

Use IS_ENABLED() instead of CONFIG_IS_ENABLED() to check for CONFIG_
option which is identical across all of U-Boot and xPL builds.

Fixes: 2769ddc99fd ("mmc: tmio: Replace ifdeffery with IS_ENABLED/CONFIG_IS_ENABLED macros")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agocolibri-imx6ull: specify MTD partitions on command line
Francesco Dolcini [Mon, 6 Feb 2023 22:48:38 +0000 (23:48 +0100)]
colibri-imx6ull: specify MTD partitions on command line

Disable fdt_fixup_mtdparts() and pass MTD partition on the command
line. Dynamically editing the fdt with a static partitions configuration
is not required and there is no advantages compared to using the command
line. This change should prevent boot failures as the one in [0].

Cc: Marek Vasut <marex@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/all/Y4dgBTGNWpM6SQXI@francesco-nb.int.toradex.com/
Link: https://lore.kernel.org/all/20230105123334.7f90c289@xps-13/
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/all/20230206224838.75963-4-francesco@dolcini.it/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agocolibri-imx7: specify MTD partitions on command line
Francesco Dolcini [Mon, 6 Feb 2023 22:48:37 +0000 (23:48 +0100)]
colibri-imx7: specify MTD partitions on command line

Disable fdt_fixup_mtdparts() and pass MTD partition on the command
line. Dynamically editing the fdt with a static partitions configuration
is not required and there is no advantages compared to using the command
line. This change should prevent boot failures as the one in [0].

Cc: Marek Vasut <marex@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/all/Y4dgBTGNWpM6SQXI@francesco-nb.int.toradex.com/
Link: https://lore.kernel.org/all/20230105123334.7f90c289@xps-13/
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/all/20230206224838.75963-3-francesco@dolcini.it/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agonand: raw: octeontx: Make list static
Bin Meng [Wed, 5 Apr 2023 14:38:37 +0000 (22:38 +0800)]
nand: raw: octeontx: Make list static

octeontx_bch_devices and octeontx_pci_nand_deferred_devices are only
referenced in the files where they are defined. Make them static.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230405143837.785082-1-bmeng@tinylab.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agonand: brcmnand: add iproc support
Linus Walleij [Wed, 8 Mar 2023 21:42:31 +0000 (22:42 +0100)]
nand: brcmnand: add iproc support

Add support for the iproc Broadcom NAND controller,
used in Northstar SoCs for example. Based on the Linux
driver.

Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/all/20230308214231.378013-1-linus.walleij@linaro.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agomtd: rawnand: nand_base: Handle algorithm selection
Linus Walleij [Wed, 8 Mar 2023 21:28:51 +0000 (22:28 +0100)]
mtd: rawnand: nand_base: Handle algorithm selection

For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the
D-Link DIR-885L and DIR-890L routers, we need to explicitly
select the ECC like this in the device tree:

  nand-ecc-algo = "bch";
  nand-ecc-strength = <1>;
  nand-ecc-step-size = <512>;

This is handled by the Linux kernel but U-Boot core does
not respect this. Fix it up by parsing the algorithm and
preserve the behaviour using this property to select
software BCH as far as possible.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/all/20230308212851.370939-1-linus.walleij@linaro.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agoMAINTAINERS: Rename NAND FLASH to RAW NAND
Frieder Schrempf [Mon, 13 Feb 2023 09:46:25 +0000 (10:46 +0100)]
MAINTAINERS: Rename NAND FLASH to RAW NAND

As there are other types of NAND flashes like SPI NAND, let's be
more specific.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Link: https://lore.kernel.org/all/20230213094626.50957-2-frieder@fris.de/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agoMAINTAINERS: Add entry for SPI NAND framework and drivers
Frieder Schrempf [Mon, 13 Feb 2023 09:46:24 +0000 (10:46 +0100)]
MAINTAINERS: Add entry for SPI NAND framework and drivers

In [1] Michael agreed on taking patches for SPI NAND through the RAW
NAND tree. Add a dedicated entry to the MAINTAINERS file which adds
Michael and Dario as maintainers and myself as reviewer.

[1] https://lists.denx.de/pipermail/u-boot/2023-February/508571.html

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Cc: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/all/20230213094626.50957-1-frieder@fris.de/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
18 months agotravis-ci: Add m68k M5208EVBE machine
Marek Vasut [Mon, 20 Mar 2023 19:46:47 +0000 (20:46 +0100)]
travis-ci: Add m68k M5208EVBE machine

Add m68k M5208EVBE machine configured to test U-Boot m68k support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
18 months agoCI: Add m68k target
Marek Vasut [Thu, 23 Mar 2023 00:22:41 +0000 (01:22 +0100)]
CI: Add m68k target

Add M5208EVBE board to CI. This does not use default config due to
limitations of QEMU emulation, instead the timer is switched from
DMA timer to PIT timer and RAMBAR accesses are inhibited.

Local QEMU launch command is as follows:
$ qemu-system-m68k -nographic -machine mcf5208evb -cpu m5208 -bios u-boot.bin

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agoarch: m68k: Add QEMU specific RAMBAR workaround
Marek Vasut [Thu, 23 Mar 2023 00:20:41 +0000 (01:20 +0100)]
arch: m68k: Add QEMU specific RAMBAR workaround

The QEMU emulation of m68k does not support RAMBAR accesses,
add Kconfig option which inhibits those accesses, so that
U-Boot can be started in m68k QEMU for CI testing purpopses
until QEMU emulation improves.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agoarch: m68k: Introduce trivial PIT based timer
Marek Vasut [Thu, 23 Mar 2023 00:20:40 +0000 (01:20 +0100)]
arch: m68k: Introduce trivial PIT based timer

The QEMU emulation of m68k does not support DMA timer, the only
timer that is supported is the PIT timer. Implement trivial PIT
timer support for m68k.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agoarch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR
Marek Vasut [Thu, 23 Mar 2023 00:20:39 +0000 (01:20 +0100)]
arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR

There is an existing CONFIG_MCFTMR Kconfig symbol,
use it and drop all other instances of CFG_MCFTMR.
This duality is likely a result of bogus conversion
to Kconfig.

Fixes: 7ff7b46e6ce ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
18 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Fri, 14 Apr 2023 14:50:55 +0000 (10:50 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell

- mvebu: Boot support for 4K Native disks (Pali)
- a38x: Perform DDR training sequence again for 2nd boot (Tony)

18 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Fri, 14 Apr 2023 14:50:04 +0000 (10:50 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

The biggest change is some refactoring of the H616 DRAM driver, which
allows better fine-tuning for each board, and is the base for pending
LPDDR3 and LPDDR4 support, needed by new boards.  The sun8i-emac
Ethernet driver sees some refactoring that enables it for the Allwinner
D1 EMAC IP. The sunxi HDMI driver is now using more DT properties. Also
the early SPL code now supports some odd H616 SoC variant.

There are some more patches pending, that require the final review
touches and some testing, I will send a separate PR for them later.

The gitlab CI completed successfully, and I boot tested a few boards
with different SoCs, via FEL and SD card, into Linux.

18 months agoddr: marvell: a38x: Perform DDR training sequence again for 2nd boot
Tony Dinh [Mon, 3 Apr 2023 04:42:33 +0000 (21:42 -0700)]
ddr: marvell: a38x: Perform DDR training sequence again for 2nd boot

- DDR Training sequence happens very fast. The speedup in boot time is
negligible by skipping the training sequence during 2nd boot or after.
So remove the check and skip.
- This change improves the robustness of DDR training. If u-boot crashed
during DDR training, the training could be left in a limbo state, where
the BootROM has recorded that it is already in a 2nd boot. The training
must be repeated in this scenario to get out of this limbo state, but due
to the check it cannot be performed.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
18 months agoarm: mvebu: spl: Allow to build SATA kwbimage for 4K Native disks
Pali Rohár [Wed, 29 Mar 2023 19:25:58 +0000 (21:25 +0200)]
arm: mvebu: spl: Allow to build SATA kwbimage for 4K Native disks

Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block
size of SATA disk. This information is used during building of SATA
kwbimage and must be correctly set, otherwise BootROM does not load SPL.

For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
18 months agotools: kwboot: Add support for parsing SATA images with non-512 block size
Pali Rohár [Wed, 29 Mar 2023 19:25:57 +0000 (21:25 +0200)]
tools: kwboot: Add support for parsing SATA images with non-512 block size

Currently kwboot expected that sector size for SATA image is always 512
bytes. If SATA image cannot be parsed with sector size of 512 bytes, try
larger sector sizes which are power of two and up to the 32 kB. Maximal
theoretical value is 32 kB because ATA IDENTIFY command returns sector size
as 16-bit number.

Signed-off-by: Pali Rohár <pali@kernel.org>
18 months agotools: kwbimage: Add support for SATA images with non-512 byte block size
Pali Rohár [Wed, 29 Mar 2023 19:25:56 +0000 (21:25 +0200)]
tools: kwbimage: Add support for SATA images with non-512 byte block size

SATA kwbimage contains offsets in block size unit, not in bytes.

Until now kwbimage expected that SATA disk always have block size of 512
bytes. But there are 4K Native SATA disks with block size of 4096 bytes.

New SATA_BLKSZ command allows to specify different block size than 512
bytes and therefore allows to generate kwbimage for disks with different
block sizes.

This change add support for generating SATA images with different block
size. Also it add support for verifying and dumping such images.

Because block size itself is not stored in SATA kwbimage, image
verification is done by checking every possible block size (it is any
power of two value between 512 and 32 kB).

Signed-off-by: Pali Rohár <pali@kernel.org>
18 months agotools: kwbimage: Simplify align code
Pali Rohár [Wed, 29 Mar 2023 19:25:55 +0000 (21:25 +0200)]
tools: kwbimage: Simplify align code

Replace repeated code patterns by generic code.

Signed-off-by: Pali Rohár <pali@kernel.org>
18 months agotools: imagetool: Extend print_header() by params argument
Pali Rohár [Wed, 29 Mar 2023 19:25:54 +0000 (21:25 +0200)]
tools: imagetool: Extend print_header() by params argument

This allows image type print_header() callback to access struct
image_tool_params *params.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agocmd: mvebu/bubt: a38x: Do not hardcode SATA block size to 512
Pali Rohár [Tue, 11 Apr 2023 18:35:51 +0000 (20:35 +0200)]
cmd: mvebu/bubt: a38x: Do not hardcode SATA block size to 512

Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk. In case of error, fallback
back to 512 bytes.

Signed-off-by: Pali Rohár <pali@kernel.org>
18 months agoarm: mvebu: spl: Do not hardcode SATA block size to 512
Pali Rohár [Wed, 29 Mar 2023 19:25:52 +0000 (21:25 +0200)]
arm: mvebu: spl: Do not hardcode SATA block size to 512

Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk.

Signed-off-by: Pali Rohár <pali@kernel.org>
18 months agosunxi: A64: drop boot0 header reservation
Andre Przywara [Thu, 8 Dec 2022 20:38:54 +0000 (20:38 +0000)]
sunxi: A64: drop boot0 header reservation

In the early days of the Allwinner A64 U-Boot support, we relied on a
vendor provided "boot0" binary to perform the DRAM initialisation. This
replaced the SPL, and required to equip the U-Boot (proper) binary with
a vendor specific header to be recognised as a valid boot0 payload.
Fortunately these days are long gone (we gained SPL and DRAM support in
early 2017!), and we never needed to use that hack on any later 64-bit
Allwinner SoC.

Since this is highly obsolete by now, remove that option from the
defconfigs of all A64 boards. We leave the code still in here for now,
since some people expressed their interest in this.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
18 months agosunxi: arm64: boot0.h: runtime check for RVBAR address
Andre Przywara [Wed, 5 Apr 2023 20:30:11 +0000 (21:30 +0100)]
sunxi: arm64: boot0.h: runtime check for RVBAR address

Some SoCs of the H616 family use a die variant, that puts some CPU power
and reset control registers at a different address. There are examples
of two instances of the same board, using different die revisions of the
otherwise same H313 SoC. We need to write to a register in that block
*very* early in the SPL boot, to switch the core to AArch64.

Since the devices are otherwise indistinguishable, let the SPL code read
that die variant and use the respective RVBAR address based on that.
That is a bit tricky, since we need to do that in hand-coded AArch32
machine language, shared by all 64-bit SoCs. To avoid build dependencies
in this mess, we always provide two addresses to choose from, and just
give identical values for all other SoCs. This allows the same code to
run on all 64-bit SoCs, and controls this switch behaviour purely from
Kconfig.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
18 months agosunxi: boot0.h: allow RVBAR MMIO address customisation
Andre Przywara [Thu, 8 Dec 2022 20:33:57 +0000 (20:33 +0000)]
sunxi: boot0.h: allow RVBAR MMIO address customisation

To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
to program the 64-bit start code address into an MMIO mapped register
that shadows the architectural RVBAR register.
This address is SoC specific, with just two versions out there so far.
Now a third address emerged, on a *variant* of an existing SoC (H616).

Change the boot0.h start code to make this address a Kconfig
selectable option, to allow easier maintenance.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
18 months agosunxi: Add TPR2 parameter for H616 DRAM driver
Jernej Skrabec [Mon, 10 Apr 2023 08:21:19 +0000 (10:21 +0200)]
sunxi: Add TPR2 parameter for H616 DRAM driver

It turns out that some H616 and related SoCs (like H313) need TPR2
parameter for proper working. Add it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Parameterize some of H616 DDR3 timings
Jernej Skrabec [Mon, 10 Apr 2023 08:21:18 +0000 (10:21 +0200)]
sunxi: Parameterize some of H616 DDR3 timings

Currently twr2rd, trd2wr and twtp are constants, but according to
vendor driver they are calculated from other values. Do that here too,
in preparation for later introduction of new parameter.

While at it, introduce constant for t_wr_lat, which was incorrectly
calculated from tcl before.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Parameterize "unknown feature" in H616 DRAM driver
Jernej Skrabec [Mon, 10 Apr 2023 08:21:17 +0000 (10:21 +0200)]
sunxi: Parameterize "unknown feature" in H616 DRAM driver

Part of the code, previously known as "unknown feature", also doesn't
have constant values. They are derived from TPR0 parameter in vendor
DRAM code.

Let's move that code to separate function and introduce TPR0 parameter
here too, to ease adding new boards.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Parameterize bit delay code in H616 DRAM driver
Jernej Skrabec [Mon, 10 Apr 2023 08:21:16 +0000 (10:21 +0200)]
sunxi: Parameterize bit delay code in H616 DRAM driver

These values are highly board specific and thus make sense to add
parameter for them. To ease adding support for new boards, let's make
them same as in vendor DRAM settings.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Make bit delay function in H616 DRAM code void
Jernej Skrabec [Mon, 10 Apr 2023 08:21:15 +0000 (10:21 +0200)]
sunxi: Make bit delay function in H616 DRAM code void

Mentioned function result is always true and result isn't checked
anyway. Let's make it void.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Always configure ODT on H616 DRAM
Jernej Skrabec [Mon, 10 Apr 2023 08:21:14 +0000 (10:21 +0200)]
sunxi: Always configure ODT on H616 DRAM

Vendor H616 DRAM code always configure part which we call ODT
configuration. Let's reflect that here too.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Convert H616 DRAM options to single setting
Jernej Skrabec [Mon, 10 Apr 2023 08:21:13 +0000 (10:21 +0200)]
sunxi: Convert H616 DRAM options to single setting

Vendor DRAM settings use TPR10 parameter to enable various features.
There are many mores features that just those that are currently
mentioned. Since new will be added later and most are not known, let's
reuse value from vendor DRAM driver as-is. This will also help adding
support for new boards.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: parameterize H616 DRAM ODT values
Jernej Skrabec [Mon, 10 Apr 2023 08:21:12 +0000 (10:21 +0200)]
sunxi: parameterize H616 DRAM ODT values

While ODT values for same memory type are similar, they are not
necessary the same. Let's parameterize them and make parameter same as
in vendor DRAM settings. That way it will be easy to introduce new board
support.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: cosmetic: Fix H616 DRAM driver code style
Jernej Skrabec [Mon, 10 Apr 2023 08:21:11 +0000 (10:21 +0200)]
sunxi: cosmetic: Fix H616 DRAM driver code style

Fix code style for pointer declaration. This is just cosmetic change to
avoid checkpatch errors in later commits.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agosunxi: Fix write to H616 DRAM CR register
Jernej Skrabec [Mon, 10 Apr 2023 08:21:10 +0000 (10:21 +0200)]
sunxi: Fix write to H616 DRAM CR register

Vendor DRAM code actually writes to whole CR register and not just sets
bit 31 in mctl_ctrl_init().

Just to be safe, do that here too.

Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agoARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator
Samuel Holland [Sun, 22 Jan 2023 23:50:19 +0000 (17:50 -0600)]
ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator

This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.

Update the device tree here because it does not exist in Linux.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agonet: sun8i-emac: Remove the SoC variant ID
Samuel Holland [Sun, 22 Jan 2023 22:51:06 +0000 (16:51 -0600)]
net: sun8i-emac: Remove the SoC variant ID

Now that all differences in functionality are covered by individual
flags, remove the enumeration of SoC variants.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agonet: sun8i-emac: Use common syscon setup for R40
Samuel Holland [Sun, 22 Jan 2023 22:51:05 +0000 (16:51 -0600)]
net: sun8i-emac: Use common syscon setup for R40

While R40 puts the EMAC syscon register at a different address from
other variants, the relevant portion of the register's layout is the
same. Factor out the register offset so the same code can be shared
by all variants. This matches what the Linux driver does.

This change provides two benefits beyond the simplification:
 - R40 boards now respect the RX delays from the devicetree
 - This resolves a warning on architectures where readl/writel
   expect the address to have a pointer type, not phys_addr_t.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agonet: sun8i-emac: Add a flag for the internal PHY switch
Samuel Holland [Sun, 22 Jan 2023 22:51:04 +0000 (16:51 -0600)]
net: sun8i-emac: Add a flag for the internal PHY switch

Describe this feature instead of using the SoC ID.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agonet: sun8i-emac: Add a flag for RMII support
Samuel Holland [Sun, 22 Jan 2023 22:51:03 +0000 (16:51 -0600)]
net: sun8i-emac: Add a flag for RMII support

Describe this feature instead of using the SoC ID.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agonet: sun8i-emac: Add a structure for variant data
Samuel Holland [Sun, 22 Jan 2023 22:51:02 +0000 (16:51 -0600)]
net: sun8i-emac: Add a structure for variant data

Currently, EMAC variants are distinguished by their identity, but this
gets unwieldy as more overlapping variants are added. Add a structure so
we can describe the individual feature differences between the variants.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
18 months agovideo: sunxi: dw-hdmi: Use DM for HVCC regulator
Samuel Holland [Mon, 28 Nov 2022 07:02:28 +0000 (01:02 -0600)]
video: sunxi: dw-hdmi: Use DM for HVCC regulator

The HDMI PHY depends on the HVCC supply being enabled. So far we have
relied on it being enabled by an earlier firmware stage (SPL or TF-A).
Attempt to enable the regulator here, so we can remove that dependency.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
18 months agovideo: sunxi: dw-hdmi: Use DM for clock gates and resets
Samuel Holland [Mon, 28 Nov 2022 07:02:27 +0000 (01:02 -0600)]
video: sunxi: dw-hdmi: Use DM for clock gates and resets

This abstracts away the CCU register layout, which is necessary for
supporting new SoCs like H6 with a reorganized CCU. One of the resets is
referenced from the PHY node instead of the controller node, so it will
have to wait until the PHY code is factored out to a separate driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
18 months agoMerge tag 'for-v2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-i2c
Tom Rini [Tue, 11 Apr 2023 13:29:28 +0000 (09:29 -0400)]
Merge tag 'for-v2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-i2c

i2c updates for v2023-07-rc1

- designware_i2c: remove apparently redundant read of 'i2c, speeds' DT property
  from Rasmus Villemoes

- fix: correct I2C deblock logic from Haibo Chen

- imx_lpi2c: Fix misuse the IS_ENABLED for DM clock from Ye Li

- m68k: convert to DM from Angelo Dureghello

18 months agom68k: upgrading all boards to dm i2c
Angelo Dureghello [Tue, 4 Apr 2023 22:59:28 +0000 (00:59 +0200)]
m68k: upgrading all boards to dm i2c

Upgrading all board configs where i2c is involved to DM i2c.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agom68k: dts: add i2c nodes
Angelo Dureghello [Tue, 4 Apr 2023 22:59:27 +0000 (00:59 +0200)]
m68k: dts: add i2c nodes

Add all the i2c nodes for each family, and add specific i2c
overwrites in the related board-specific dts.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agoi2c: fsl_i2c: fix m68k transferts
Angelo Dureghello [Tue, 4 Apr 2023 22:59:26 +0000 (00:59 +0200)]
i2c: fsl_i2c: fix m68k transferts

This driver is actually used for powerpc and m68k/ColdFire.

On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6,
interrupt enabled) is not set appropriately before each transfert.
As a result, the transfert hangs forever waiting for IIEN.
This patch set IIEN before each transfert, while considering this fix
as not harming powerpc arch.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agom68k: mcf5441x: fix CONFIG_SYS_FSL_I2C definition
Angelo Dureghello [Tue, 4 Apr 2023 22:59:25 +0000 (00:59 +0200)]
m68k: mcf5441x: fix CONFIG_SYS_FSL_I2C definition

Fix CONFIG_SYS_FSL_I2C to correct name CONFIG_SYS_I2C_FSL.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agoboard: stmark2: add i2c0 pinmux pad configuration
Angelo Dureghello [Tue, 4 Apr 2023 22:59:24 +0000 (00:59 +0200)]
board: stmark2: add i2c0 pinmux pad configuration

Add CFG option to enable proper pinmux pad setting for i2c0.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agom68k: move CONFIG_SYS_I2C to CFG_ namespace
Angelo Dureghello [Tue, 4 Apr 2023 22:59:23 +0000 (00:59 +0200)]
m68k: move CONFIG_SYS_I2C to CFG_ namespace

Move CONFIG_SYS_I2C_X to CFG_ namespace.
This is a preliminary step to move to dm i2c.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
18 months agoi2c: imx_lpi2c: Fix misuse the IS_ENABLED for DM clock
Ye Li [Thu, 6 Apr 2023 10:26:35 +0000 (18:26 +0800)]
i2c: imx_lpi2c: Fix misuse the IS_ENABLED for DM clock

The IS_ENABLED, which does not consider SPL build, should be replaced
by CONFIG_IS_ENABLED.
For the case that we only enable DM CLK for u-boot but not in SPL, the
IS_ENABLED(CONFIG_CLK) still returns true, then cause clock failure.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
18 months agoi2c: correct I2C deblock logic
Haibo Chen [Mon, 27 Mar 2023 11:21:43 +0000 (19:21 +0800)]
i2c: correct I2C deblock logic

Current code use dm_gpio_get_value() to get SDA and SCL value, and the
value depends on whether DTS file config the GPIO_ACTIVE_LOW. In ususal
case for i2c GPIO, DTS need to set GPIO_ACTIVE_LOW for SCL/SDA pins. So
here the logic is not correct.

And we must not use GPIOD_ACTIVE_LOW in client code include the
dm_gpio_set_dir_flags(), it is DTS's responsibility for this flag. So
remove GPIOD_ACTIVE_LOW here.

Fixes: aa54192d4a87 ("dm: i2c: implement gpio-based I2C deblock")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Alexander Kochetkov <al.kochet@gmail.com <mailto:al.kochet@gmail.com>>
18 months agoi2c: designware_i2c: remove apparently redundant read of 'i2c, speeds' DT property
Rasmus Villemoes [Fri, 24 Mar 2023 08:09:22 +0000 (09:09 +0100)]
i2c: designware_i2c: remove apparently redundant read of 'i2c, speeds' DT property

This code first figures out if there is an i2c,speeds property, if so
its size in u32s, and then reads the value into the local speeds[]
array. Both 'size' and 'speeds' are completely unused thereafter.

It's not at all clear what this is supposed to do. Of course, it could
be seen as a sanity check that the DT node does have an i2c,speeds
property with an appropriate number of elements, but for that one
wouldn't actually need to read it into speeds[]. Also, I can't find
anywhere else in the U-Boot code which makes use of values from that
property (this is is the only C code referencing "i2c,speeds"), so it
seems pointless to insist that it's there.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
18 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Mon, 10 Apr 2023 12:32:11 +0000 (08:32 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-mmc

18 months agocmd: mmc: Return CMD_RET_* from commands
Pali Rohár [Wed, 22 Mar 2023 20:06:53 +0000 (21:06 +0100)]
cmd: mmc: Return CMD_RET_* from commands

Numeric return values may cause strange errors line:
exit not allowed from main input shell.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agommc: Use EXT_CSD_EXTRACT_BOOT_PART() macro for extracting boot part
Pali Rohár [Sat, 11 Mar 2023 10:44:27 +0000 (11:44 +0100)]
mmc: Use EXT_CSD_EXTRACT_BOOT_PART() macro for extracting boot part

Mask macro PART_ACCESS_MASK filter out access bits of emmc register and
macro EXT_CSD_EXTRACT_BOOT_PART() extracts boot part bits of emmc register.
So use EXT_CSD_EXTRACT_BOOT_PART() when extracting boot partition.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agommc: mv_sdhci: Depend on DM_MMC
Stefan Roese [Fri, 10 Feb 2023 12:23:52 +0000 (13:23 +0100)]
mmc: mv_sdhci: Depend on DM_MMC

All build targets using this driver already use DM_MMC. So let's depend
this driver on this Kconfig symbol and remove the non-DM driver part.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
18 months agommc: mv_sdhci: Remove CONFIG_MMC_SDHCI_IO_ACCESSORS support
Stefan Roese [Fri, 10 Feb 2023 12:23:51 +0000 (13:23 +0100)]
mmc: mv_sdhci: Remove CONFIG_MMC_SDHCI_IO_ACCESSORS support

CONFIG_MMC_SDHCI_IO_ACCESSORS is not supported and/or used by this
driver so let's remove these unused parts completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
18 months agommc: mv_sdhci: Simplify call to sdhci_mvebu_mbus_config()
Stefan Roese [Fri, 10 Feb 2023 12:23:50 +0000 (13:23 +0100)]
mmc: mv_sdhci: Simplify call to sdhci_mvebu_mbus_config()

This driver already depends on CONFIG_ARCH_MVEBU, so there is no need
to have some checks for this Kconfig symbol in the driver itself. Let's
remove these superfluous checks.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
18 months agotest: dm: mmc: Check block erasing boundaries
Loic Poulain [Thu, 26 Jan 2023 09:24:19 +0000 (10:24 +0100)]
test: dm: mmc: Check block erasing boundaries

Verify that erasing blocks does not impact adjacent ones.
- Write four blocks [0 1 2 3]
- Erase two blocks [ 1 2 ]
- Verify [0 1 2 3 ]

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
18 months agommc: erase: Use TRIM erase when available
Loic Poulain [Thu, 26 Jan 2023 09:24:18 +0000 (10:24 +0100)]
mmc: erase: Use TRIM erase when available

The default erase command applies on erase group unit, and
simply round down to erase group size. When the start block
is not aligned to erase group size (e.g. erasing partition)
it causes unwanted erasing of the previous blocks, part of
the same erase group (e.g. owned by other logical partition,
or by the partition table itself).

To prevent this issue, a simple solution is to use TRIM as
argument of the Erase command, which is usually supported
with eMMC > 4.0, and allow to apply erase operation to write
blocks instead of erase group

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agommc: Check support for TRIM operations
Loic Poulain [Thu, 26 Jan 2023 09:24:17 +0000 (10:24 +0100)]
mmc: Check support for TRIM operations

When secure/insecure TRIM operations are supported.
When used as erase command argument it applies the
erase operation to write blocks instead of erase
groups.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
18 months agoMerge tag 'efi-2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 9 Apr 2023 15:08:39 +0000 (11:08 -0400)]
Merge tag 'efi-2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-07-rc1

Documentation:

* man-page for coninfo command
* documentation style
* switch settings for boot modes on AM62 SK

UEFI:

* avoid using deprecated HandleProtocol()
* set static attribute for non-exported functions and variables

18 months agoMerge branch 'master_regulator/fixes' of https://source.denx.de/u-boot/custodians...
Tom Rini [Sat, 8 Apr 2023 18:19:08 +0000 (14:19 -0400)]
Merge branch 'master_regulator/fixes' of https://source.denx.de/u-boot/custodians/u-boot-sh

- Fix usage of CONFIG_IS_ENABLED and DM_REGULATOR

18 months agoMerge tag 'video-20230407' of https://source.denx.de/u-boot/custodians/u-boot-video
Tom Rini [Sat, 8 Apr 2023 15:20:47 +0000 (11:20 -0400)]
Merge tag 'video-20230407' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix building sandbox without SDL
 - improve tegra DC driver to work with panel ops and implement
   native 180 degree panel rotation support
 - add T30 support to tegra DC driver
 - add DSI driver (based on mainline Linux one with minor
   adjustments, only T30 tested)
 - add get_display_timing ops to simple panel driver
 - extend simple panel driver to use it for MIPI DSI panels
   which do not require additional DSI commands for setup

18 months agocmd: consider multiplexing in coninfo
Heinrich Schuchardt [Sat, 1 Apr 2023 10:20:34 +0000 (12:20 +0200)]
cmd: consider multiplexing in coninfo

If console multiplexing in enabled (CONFIG_CONSOLE_MUX=y), the output of
the coninfo command should show the file association (stdin, stderr,
stdout) for all devices not only the default ones.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agoefi: loader: Make efi_runtime_mmio static
Bin Meng [Wed, 5 Apr 2023 12:15:19 +0000 (20:15 +0800)]
efi: loader: Make efi_runtime_mmio static

efi_runtime_mmio is only referenced in efi_boottime.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
18 months agoefi: loader: Make efi_mem static
Bin Meng [Wed, 5 Apr 2023 12:15:18 +0000 (20:15 +0800)]
efi: loader: Make efi_mem static

efi_mem is only referenced in efi_memory.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
18 months agoefi: loader: Make efi_event_queue and efi_register_notify_events static
Bin Meng [Wed, 5 Apr 2023 12:15:17 +0000 (20:15 +0800)]
efi: loader: Make efi_event_queue and efi_register_notify_events static

efi_event_queue and efi_register_notify_events are only referenced
in efi_boottime.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
18 months agoefi: selftest: Make load_file() and load_file2() static
Bin Meng [Wed, 5 Apr 2023 12:15:16 +0000 (20:15 +0800)]
efi: selftest: Make load_file() and load_file2() static

load_file() and load_file2() are only referenced in
efi_selftest_load_file.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
18 months agoefi: selftest: Make record static
Bin Meng [Wed, 5 Apr 2023 12:15:15 +0000 (20:15 +0800)]
efi: selftest: Make record static

record is only referenced in efi_selftest_exitbootservices.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
18 months agoefi_loader: avoid using HandleProtocol in initrddump.efi
Heinrich Schuchardt [Tue, 4 Apr 2023 05:23:53 +0000 (07:23 +0200)]
efi_loader: avoid using HandleProtocol in initrddump.efi

HandleProtocol() is deprecated and leaves an OpenedProtocolInformation
behind. Use OpenProtocol(GET_PROTOCOL) instead.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
18 months agoefi_loader: avoid using HandleProtocol in helloworld.efi
Heinrich Schuchardt [Tue, 4 Apr 2023 05:17:48 +0000 (07:17 +0200)]
efi_loader: avoid using HandleProtocol in helloworld.efi

HandleProtocol() is deprecated and leaves an OpenedProtocolInformation
behind. Use OpenProtocol(GET_PROTOCOL) instead.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
18 months agodoc: coninfo man-page
Heinrich Schuchardt [Sat, 1 Apr 2023 10:33:49 +0000 (12:33 +0200)]
doc: coninfo man-page

Provide a man-page for the coninfo command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
18 months agodoc: mention usage of .readthedocs.yml
Heinrich Schuchardt [Fri, 7 Apr 2023 09:17:23 +0000 (11:17 +0200)]
doc: mention usage of .readthedocs.yml

Mention that HTML pages are published at https://u-boot.readthedocs.io/
and that the file .readthedocs.yml controls the build process.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agodoc: ti: Add switch setting for boot modes on AM62 SK
Judith Mendez [Fri, 31 Mar 2023 20:36:15 +0000 (15:36 -0500)]
doc: ti: Add switch setting for boot modes on AM62 SK

List some common boot modes and their corresponding switch
settings for AM62 SK.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
18 months agodoc: describe our documentation style
Heinrich Schuchardt [Fri, 7 Apr 2023 09:28:00 +0000 (11:28 +0200)]
doc: describe our documentation style

Provide a reference document for the U-Boot documentation style.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agovideo: tl070wsh30: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
Marek Vasut [Tue, 28 Feb 2023 01:55:23 +0000 (02:55 +0100)]
video: tl070wsh30: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR

The DM_REGULATOR symbol has SPL counterpart in:
  drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agovideo: simple-panel: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
Marek Vasut [Tue, 28 Feb 2023 01:55:22 +0000 (02:55 +0100)]
video: simple-panel: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR

The DM_REGULATOR symbol has SPL counterpart in:
  drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agovideo: rm68200: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
Marek Vasut [Tue, 28 Feb 2023 01:55:21 +0000 (02:55 +0100)]
video: rm68200: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR

The DM_REGULATOR symbol has SPL counterpart in:
  drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
18 months agovideo: otm8009a: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
Marek Vasut [Tue, 28 Feb 2023 01:55:20 +0000 (02:55 +0100)]
video: otm8009a: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR

The DM_REGULATOR symbol has SPL counterpart in:
  drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>