[Patch 16/17 libgcc ARM] Half to double precision conversions

gcc/

* config/arm/arm.c (arm_convert_to_type): Delete.
(TARGET_CONVERT_TO_TYPE): Delete.
(arm_init_libfuncs): Enable trunc_optab from DFmode to HFmode.
(arm_libcall_uses_aapcs_base): Add trunc_optab from DF- to HFmode.
* config/arm/arm.h (TARGET_FP16_TO_DOUBLE): New.
* config/arm/arm.md (truncdfhf2): Only convert through SFmode if we
are in fast math mode, and have no single step hardware instruction.
(extendhfdf2): Only expand through SFmode if we don't have a
single-step hardware instruction.
* config/arm/vfp.md (*truncdfhf2): New.
(extendhfdf2): Likewise.

gcc/testsuite/

* gcc.target/arm/fp16-rounding-alt-1.c (ROUNDED): Change expected
result.
* gcc.target/arm/fp16-rounding-ieee-1.c (ROUNDED): Change expected
result.

From-SVN: r242783

[Patch 15/17 libgcc ARM] Add double to half conversions.

libgcc/

* config/arm/fp16.c (binary64): New.
(__gnu_d2h_internal): New.
(__gnu_d2h_ieee): New.
(__gnu_d2h_alternative): New.

Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242782

[Patch 14/17] [libgcc, ARM] Generalise float-to-half conversion function.

libgcc/

* config/arm/fp16.c (struct format): New.
(binary32): New.
(__gnu_float2h_internal): New.  Body moved from
__gnu_f2h_internal and generalize.
(_gnu_f2h_internal): Move body to function __gnu_float2h_internal.
Call it with binary32.

Co-Authored-By: Matthew Wahab <matthew.wahab@arm.com>
From-SVN: r242781

[Patch testsuite patch 10/17] Add options for floatN when checking effective target for support

gcc/testsuite/

* lib/target-supports.exp (check_effective_target_float16): Add
options for _Float16.
(check_effective_target_float32): Add options for _Float32.
(check_effective_target_float64): Add options for _Float64.
(check_effective_target_float128): Add options for _Float128.
(check_effective_target_float32x): Add options for _Float32x.
(check_effective_target_float64x): Add options for _Float64x.
(check_effective_target_float128x): Add options for _Float128x.

From-SVN: r242780

[Patch libgcc 9/17] Update soft-fp from glibc

libgcc/

* soft-fp/extendhftf2.c: New.
* soft-fp/fixhfti.c: Likewise.
* soft-fp/fixunshfti.c: Likewise.
* soft-fp/floattihf.c: Likewise.
* soft-fp/floatuntihf.c: Likewise.
* soft-fp/half.h: Likewise.
* soft-fp/trunctfhf2.c: Likewise.

From-SVN: r242779

[Patch 8/17] Make _Float16 available if HFmode is available

gcc/

* targhooks.c (default_floatn_mode): Enable _Float16 if a target
provides HFmode.

From-SVN: r242778

[Patch 7/17] Delete TARGET_FLT_EVAL_METHOD and poison it.

gcc/

* config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Delete.
* config/m68k/m68k.h (TARGET_FLT_EVAL_METHOD): Delete.
* config/i386/i386.h (TARGET_FLT_EVAL_METHOD): Delete.
* defaults.h (TARGET_FLT_EVAL_METHOD): Delete.
* doc/tm.texi.in (TARGET_FLT_EVAL_METHOD): Delete.
* doc/tm.texi: Regenerate.
* system.h (TARGET_FLT_EVAL_METHOD): Poison.

From-SVN: r242777

[Patch 6/17] Migrate excess precision logic to use TARGET_EXCESS_PRECISION

gcc/

* toplev.c (init_excess_precision): Delete most logic.
* tree.c (excess_precision_type): Rewrite to use
TARGET_EXCESS_PRECISION.
* doc/invoke.texi (-fexcess-precision): Document behaviour in a
more generic fashion.
* ginclude/float.h: Wrap definition of FLT_EVAL_METHOD in
__STDC_WANT_IEC_60559_TYPES_EXT__.

gcc/c-family/

* c-common.c (excess_precision_mode_join): New.
(c_ts18661_flt_eval_method): New.
(c_c11_flt_eval_method): Likewise.
(c_flt_eval_method): Likewise.
* c-common.h (excess_precision_mode_join): New.
(c_flt_eval_method): Likewise.
* c-cppbuiltin.c (c_cpp_flt_eval_method_iec_559): New.
(cpp_iec_559_value): Call it.
(c_cpp_builtins): Modify logic for __LIBGCC_*_EXCESS_PRECISION__,
call c_flt_eval_method to set __FLT_EVAL_METHOD__ and
__FLT_EVAL_METHOD_TS_18661_3__.

gcc/testsuite/

* gcc.dg/fpermitted-flt-eval-methods_3.c: New.
* gcc.dg/fpermitted-flt-eval-methods_4.c: Likewise.

From-SVN: r242776

[Patch 5/17] Add -fpermitted-flt-eval-methods=[c11|ts-18661-3]

gcc/c-family/

* c-opts.c (c_common_post_options): Add logic to handle the default
case for -fpermitted-flt-eval-methods.

gcc/

* common.opt (fpermitted-flt-eval-methods): New.
* doc/invoke.texi (-fpermitted-flt-eval-methods): Document it.
* flag_types.h (permitted_flt_eval_methods): New.

gcc/testsuite/

* gcc.dg/fpermitted-flt-eval-methods_1.c: New.
* gcc.dg/fpermitted-flt-eval-methods_2.c: New.

From-SVN: r242775

[Patch 4/17] Implement TARGET_C_EXCESS_PRECISION for m68k

gcc/

* config/m68k/m68k.c (m68k_excess_precision): New.
(TARGET_C_EXCESS_PRECISION): Define.

From-SVN: r242774

[Patch 3/17] Implement TARGET_C_EXCESS_PRECISION for s390

* config/s390/s390.c (s390_excess_precision): New.
(TARGET_C_EXCESS_PRECISION): Define.

From-SVN: r242773

[Patch 2/17] Implement TARGET_C_EXCESS_PRECISION for i386

gcc/
* config/i386/i386.c (ix86_excess_precision): New.
(TARGET_C_EXCESS_PRECISION): Define.

From-SVN: r242772

[Patch 1/17] Add a new target hook for describing excess precision intentions

gcc/

* target.def (excess_precision): New hook.
* target.h (flt_eval_method): New.
(excess_precision_type): Likewise.
* targhooks.c (default_excess_precision): New.
* targhooks.h (default_excess_precision): New.
* doc/tm.texi.in (TARGET_C_EXCESS_PRECISION): New.
* doc/tm.texi: Regenerate.

From-SVN: r242771

PR middle-end/78461 - [7 Regression] ICE: in operator+=

gcc/testsuite/ChangeLog:

PR middle-end/78461
* gcc.dg/tree-ssa/builtin-sprintf-4.c: New test.
* gcc.dg/tree-ssa/builtin-sprintf-warn-2.c: Adjust warning text.

gcc/ChangeLog:

PR middle-end/78461
* gimple-ssa-sprintf.c (format_string): Correct the maxima and
set the minimum number of bytes for an unknown string to zero.

From-SVN: r242769

re PR c++/71450 (ICE on invalid C++11 code on x86_64-linux-gnu: in tree check: expected record_type or union_type or qual_union_type, have template_type_parm in lookup_base, at cp/search.c:203)

PR c++/71450
* pt.c (tsubst_copy): Return error_mark_node when mark_used
fails, even when complain & tf_error.

* g++.dg/cpp0x/pr71450-1.C: New test.
* g++.dg/cpp0x/pr71450-2.C: New test.

From-SVN: r242767

re PR c++/77739 (internal compiler error: in create_tmp_var, at gimple-expr.c:524)

PR c++/77739
* cp-gimplify.c (cp_gimplify_tree) <case VEC_INIT_EXPR>: Pass
false as handle_invisiref_parm_p to cp_genericize_tree.
(struct cp_genericize_data): Add handle_invisiref_parm_p field.
(cp_genericize_r): Don't wrap is_invisiref_parm into references
if !wtd->handle_invisiref_parm_p.
(cp_genericize_tree): Add handle_invisiref_parm_p argument,
set wtd.handle_invisiref_parm_p to it.
(cp_genericize): Pass true as handle_invisiref_parm_p to
cp_genericize_tree.  Formatting fix.

* g++.dg/cpp1y/pr77739.C: New test.

From-SVN: r242766

Fix PR number in ChangeLog

From-SVN: r242765

backport: hsa-builtins.def: New file.

Merge from HSA branch to trunk

2016-11-23  Martin Jambor  <mjambor@suse.cz>
    Martin Liska  <mliska@suse.cz>

gcc/
* hsa-builtins.def: New file.
* Makefile.in (BUILTINS_DEF): Add hsa-builtins.def dependency.
* builtins.def: Include hsa-builtins.def.
(DEF_HSA_BUILTIN): New macro.
* dumpfile.h (OPTGROUP_OPENMP): Define.
* dumpfile.c (optgroup_options): Added OPTGROUP_OPENMP.
* gimple.h (gf_mask): Added elements GF_OMP_FOR_GRID_INTRA_GROUP and
GF_OMP_FOR_GRID_GROUP_ITER.
(gimple_omp_for_grid_phony): Added checking assert.
(gimple_omp_for_set_grid_phony): Likewise.
(gimple_omp_for_grid_intra_group): New function.
(gimple_omp_for_set_grid_intra_group): Likewise.
(gimple_omp_for_grid_group_iter): Likewise.
(gimple_omp_for_set_grid_group_iter): Likewise.
* omp-low.c (check_omp_nesting_restrictions): Allow GRID loop where
previosuly only distribute loop was permitted.
(lower_lastprivate_clauses): Allow non tcc_comparison predicates.
(grid_get_kernel_launch_attributes): Support multiple HSA grid
dimensions.
(grid_expand_omp_for_loop): Likewise and also support standalone
distribute constructs.  New parameter INTRA_GROUP, updated both users.
(grid_expand_target_grid_body): Support standalone distribute
constructs.
(pass_data_expand_omp): Changed optinfo_flags to OPTGROUP_OPENMP.
(pass_data_expand_omp_ssa): Likewise.
(pass_data_omp_device_lower): Likewsie.
(pass_data_lower_omp): Likewise.
(pass_data_diagnose_omp_blocks): Likewise.
(pass_data_oacc_device_lower): Likewise.
(pass_data_omp_target_link): Likewise.
(grid_lastprivate_predicate): New function.
(lower_omp_for_lastprivate): Call grid_lastprivate_predicate for
gridified loops.
(lower_omp_for): Support standalone distribute constructs.
(grid_prop): New type.
(grid_safe_assignment_p): Check for assignments to group_sizes, new
parameter GRID.
(grid_seq_only_contains_local_assignments): New parameter GRID, pass
it to callee.
(grid_find_single_omp_among_assignments_1): Likewise, improve missed
optimization info messages.
(grid_find_single_omp_among_assignments): Likewise.
(grid_find_ungridifiable_statement): Do not bail out for SIMDs.
(grid_parallel_clauses_gridifiable): New function.
(grid_inner_loop_gridifiable_p): Likewise.
(grid_dist_follows_simple_pattern): Likewise.
(grid_gfor_follows_tiling_pattern): Likewise.
(grid_call_permissible_in_distribute_p): Likewise.
(grid_handle_call_in_distribute): Likewise.
(grid_dist_follows_tiling_pattern): Likewise.
(grid_target_follows_gridifiable_pattern): Support standalone distribute
constructs.
(grid_var_segment): New enum.
(grid_mark_variable_segment): New function.
(grid_copy_leading_local_assignments): Call grid_mark_variable_segment
if a new argument says so.
(grid_process_grid_body): New function.
(grid_eliminate_combined_simd_part): Likewise.
(grid_mark_tiling_loops): Likewise.
(grid_mark_tiling_parallels_and_loops): Likewise.
(grid_process_kernel_body_copy): Support standalone distribute
constructs.
(grid_attempt_target_gridification): New grid variable holding overall
gridification state.  Support standalone distribute constructs and
collapse clauses.
* doc/optinfo.texi (Optimization groups): Document OPTGROUP_OPENMP.
* hsa.h (hsa_bb): Add method method append_phi.
(hsa_insn_br): Renamed to hsa_insn_cbr, renamed all
occurences in all files too.
(hsa_insn_br): New class, now the ancestor of hsa_incn_cbr.
(is_a_helper <hsa_insn_br *>::test): New function.
(is_a_helper <hsa_insn_cbr *>::test): Adjust to only cover conditional
branch instructions.
(hsa_insn_signal): Make a direct descendant of
hsa_insn_basic.  Add memorder constructor parameter and
m_memory_order and m_signalop member variables.
(hsa_insn_queue): Changed constructor parameters to common form.
Added m_segment and m_memory_order member variables.
(hsa_summary_t): Add private member function
process_gpu_implementation_attributes.
(hsa_function_summary): Rename m_binded_function to
m_bound_function.
(hsa_insn_basic_p): Remove typedef.
(hsa_op_with_type): Change hsa_insn_basic_p into plain pointers.
(hsa_op_reg_p): Remove typedef.
(hsa_function_representation): Change hsa_op_reg_p into plain
pointers.
(hsa_insn_phi): Removed new and delete operators.
(hsa_insn_br): Likewise.
(hsa_insn_cbr): Likewise.
(hsa_insn_sbr): Likewise.
(hsa_insn_cmp): Likewise.
(hsa_insn_mem): Likewise.
(hsa_insn_atomic): Likewise.
(hsa_insn_signal): Likewise.
(hsa_insn_seg): Likewise.
(hsa_insn_call): Likewise.
(hsa_insn_arg_block): Likewise.
(hsa_insn_comment): Likewise.
(hsa_insn_srctype): Likewise.
(hsa_insn_packed): Likewise.
(hsa_insn_cvt): Likewise.
(hsa_insn_alloca): Likewise.
* hsa.c (hsa_destroy_insn): Also handle instances of hsa_insn_br.
(process_gpu_implementation_attributes): New function.
(link_functions): Move some functionality into it.  Adjust after
renaming m_binded_functions to m_bound_functions.
(hsa_insn_basic::op_output_p): Add BRIG_OPCODE_DEBUGTRAP
to the list of instructions with no output registers.
(get_in_type): Return this if it is a register of
matching size.
(hsa_get_declaration_name): Moved to...
        * hsa-gen.c (hsa_get_declaration_name): ...here.  Allocate
temporary string on an obstack instead from ggc.
(query_hsa_grid): Renamed to query_hsa_grid_dim, reimplemented, cut
down to two overloads.
(hsa_allocp_operand_address): Removed.
(hsa_allocp_operand_immed): Likewise.
(hsa_allocp_operand_reg): Likewise.
(hsa_allocp_operand_code_list): Likewise.
(hsa_allocp_operand_operand_list): Likewise.
(hsa_allocp_inst_basic): Likewise.
(hsa_allocp_inst_phi): Likewise.
(hsa_allocp_inst_mem): Likewise.
(hsa_allocp_inst_atomic): Likewise.
(hsa_allocp_inst_signal): Likewise.
(hsa_allocp_inst_seg): Likewise.
(hsa_allocp_inst_cmp): Likewise.
(hsa_allocp_inst_br): Likewise.
(hsa_allocp_inst_sbr): Likewise.
(hsa_allocp_inst_call): Likewise.
(hsa_allocp_inst_arg_block): Likewise.
(hsa_allocp_inst_comment): Likewise.
(hsa_allocp_inst_queue): Likewise.
(hsa_allocp_inst_srctype): Likewise.
(hsa_allocp_inst_packed): Likewise.
(hsa_allocp_inst_cvt): Likewise.
(hsa_allocp_inst_alloca): Likewise.
(hsa_allocp_bb): Likewise.
(hsa_obstack): New.
(hsa_init_data_for_cfun): Initialize obstack.
(hsa_deinit_data_for_cfun): Release memory of the obstack.
(hsa_op_immed::operator new): Use obstack instead of object_allocator.
(hsa_op_reg::operator new): Likewise.
(hsa_op_address::operator new): Likewise.
(hsa_op_code_list::operator new): Likewise.
(hsa_op_operand_list::operator new): Likewise.
(hsa_insn_basic::operator new): Likewise.
(hsa_insn_phi::operator new): Likewise.
(hsa_insn_br::operator new): Likewise.
(hsa_insn_sbr::operator new): Likewise.
(hsa_insn_cmp::operator new): Likewise.
(hsa_insn_mem::operator new): Likewise.
(hsa_insn_atomic::operator new): Likewise.
(hsa_insn_signal::operator new): Likewise.
(hsa_insn_seg::operator new): Likewise.
(hsa_insn_call::operator new): Likewise.
(hsa_insn_arg_block::operator new): Likewise.
(hsa_insn_comment::operator new): Likewise.
(hsa_insn_srctype::operator new): Likewise.
(hsa_insn_packed::operator new): Likewise.
(hsa_insn_cvt::operator new): Likewise.
(hsa_insn_alloca::operator new): Likewise.
(hsa_init_new_bb): Likewise.
(hsa_bb::append_phi): New function.
(gen_hsa_phi_from_gimple_phi): Use it.
(get_symbol_for_decl): Fix dinstinguishing between
global and local functions.  Put local variables into a segment
according to their attribute or static flag, if there is one.
(hsa_insn_br::hsa_insn_br): New.
(hsa_insn_br::operator new): Likewise.
(hsa_insn_cbr::hsa_insn_cbr): Set width via ancestor constructor.
(query_hsa_grid_nodim): New function.
(multiply_grid_dim_characteristics): Likewise.
(gen_get_num_threads): Likewise.
(gen_get_num_teams): Reimplemented.
(gen_get_team_num): Likewise.
(gen_hsa_insns_for_known_library_call): Updated calls to the above
helper functions.
(get_memory_order_name): Removed.
(get_memory_order): Likewise.
(hsa_memorder_from_tree): New function.
(gen_hsa_ternary_atomic_for_builtin): Renamed to
gen_hsa_atomic_for_builtin, can also create signals.
(gen_hsa_insns_for_call): Handle many new builtins.  Adjust to use
hsa_memory_order_from_tree and gen_hsa_atomic_for_builtin.
(hsa_insn_atomic): Fix function comment.
(hsa_insn_signal::hsa_insn_signal): Fix comment.  Update call to
ancestor constructor and initialization of new member variables.
(hsa_insn_queue::hsa_insn_queue): Added initialization of new
member variables.
(hsa_get_host_function): Handle functions with no bound CPU
implementation.  Fix binded to bound.
(get_brig_function_name): Likewise.
(HSA_SORRY_ATV): Remove semicolon after macro.
(HSA_SORRY_AT): Likewise.
(omp_simple_builtin::generate): Add missing semicolons.
(hsa_insn_phi::operator new): Removed.
(hsa_insn_br::operator new): Likewise.
(hsa_insn_cbr::operator new): Likewise.
(hsa_insn_sbr::operator new): Likewise.
(hsa_insn_cmp::operator new): Likewise.
(hsa_insn_mem::operator new): Likewise.
(hsa_insn_atomic::operator new): Likewise.
(hsa_insn_signal::operator new): Likewise.
(hsa_insn_seg::operator new): Likewise.
(hsa_insn_call::operator new): Likewise.
(hsa_insn_arg_block::operator new): Likewise.
(hsa_insn_comment::operator new): Likewise.
(hsa_insn_srctype::operator new): Likewise.
(hsa_insn_packed::operator new): Likewise.
(hsa_insn_cvt::operator new): Likewise.
(hsa_insn_alloca::operator new): Likewise.
(get_symbol_for_decl): Accept CONST_DECLs, put them to
readonly segment.
(gen_hsa_addr): Also process CONST_DECLs.
(gen_hsa_addr_insns): Process CONST_DECLs by creating private
copies.
(gen_hsa_unary_operation): Make sure the function does
not use bittype source type for firstbit and lastbit operations.
(gen_hsa_popcount_to_dest): Make sure the function uses a bittype
source type.
* hsa-brig.c (emit_insn_operands): Cope with zero operands in an
instruction.
(emit_branch_insn): Renamed to emit_cond_branch_insn.
Emit the width stored in the class.
(emit_generic_branch_insn): New function.
(emit_insn): Call emit_generic_branch_insn.
(emit_signal_insn): Remove obsolete comment.  Update
member variable name, pick a type according to profile.
(emit_alloca_insn): Remove obsolete comment.
(emit_atomic_insn): Likewise.
(emit_queue_insn): Get segment and memory order from the IR object.
(hsa_brig_section): Make allocate_new_chunk, chunks
and cur_chunk provate, add a default NULL parameter to add method.
(hsa_brig_section::add): Added a new parameter, store pointer to
output data there if it is non-NULL.
(emit_function_directives): Use this new parameter instead of
calculating the pointer itself, fix function comment.
(hsa_brig_emit_function): Add forgotten endian conversion.
(hsa_output_kernels): Remove unnecessary building of
kernel_dependencies_vector_type.
(emit_immediate_operand): Declare.
(emit_directive_variable): Also emit initializers of CONST_DECLs.
(gen_hsa_insn_for_internal_fn_call): Also handle IFN_RSQRT.
(verify_function_arguments): Properly detect variadic
arguments.
* hsa-dump.c (hsa_width_specifier_name): New function.
(dump_hsa_insn_1): Dump generic branch instructions, update signal
member variable name.  Special dumping for queue objects.
* ipa-hsa.c (process_hsa_functions): Adjust after renaming
m_binded_functions to m_bound_functions.  Copy externally visible flag
to the node.
(ipa_hsa_write_summary): Likewise.
(ipa_hsa_read_section): Likewise.

gcc/fortran/
        * f95-lang.c (DEF_HSA_BUILTIN): New macro.

gcc/testsuite/
* c-c++-common/gomp/gridify-1.c: Update scan string.
* gfortran.dg/gomp/gridify-1.f90: Likewise.
* c-c++-common/gomp/gridify-2.c: New test.
* c-c++-common/gomp/gridify-3.c: Likewise.

libgomp/
* testsuite/libgomp.hsa.c/bits-insns.c: New test.
* testsuite/libgomp.hsa.c/tiling-1.c: Likewise.
* testsuite/libgomp.hsa.c/tiling-2.c: Likewise.

Co-Authored-By: Martin Liska <mliska@suse.cz>
From-SVN: r242761

PR78494 add missing returns to propagate_const

2016-11-23  Felix Morgner  <felix.morgner@gmail.com>
    Jonathan Wakely  <jwakely@redhat.com>

PR libstdc++/78494
* include/experimental/propagate_const (propagate_const::operator=):
Add missing return statements.
* testsuite/experimental/propagate_const/assignment/move_neg.cc:
Adjust dg-error line numbers.
* testsuite/experimental/propagate_const/requirements2.cc: Likewise.

Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r242760

re PR tree-optimization/78396 (gcc.dg/vect/bb-slp-cond-1.c FAILs after fix for PR77848)

2016-11-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78396
* tree-vectorizer.c (vectorize_loops): If an innermost loop didn't
vectorize try vectorizing an if-converted body using BB vectorization.

* gcc.dg/vect/bb-slp-cond-1.c: Adjust.

From-SVN: r242759

Rework subreg_get_info

This isn't intended to change the behaviour, just rewrite the
existing logic in a different (and hopefully clearer) way.
The new form -- particularly the part based on the "block"
concept -- is easier to convert to polynomial sizes.

gcc/
2016-11-15  Richard Sandiford  <richard.sandiford@arm.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

* rtlanal.c (subreg_get_info): Use more local variables.
Remark that for HARD_REGNO_NREGS_HAS_PADDING, each scalar unit
occupies at least one register.  Assume that full hard registers
have consistent endianness.  Share previously-duplicated if block.
Rework the main handling so that it operates on independently-
addressable YMODE-sized blocks.  Use subreg_size_lowpart_offset
to check lowpart offsets, without trying to find an equivalent
integer mode first.  Handle WORDS_BIG_ENDIAN != REG_WORDS_BIG_ENDIAN
as a final register-endianness correction.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242758

combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
It all has the same root cause: that patch makes combine convert every
lowpart subreg of a logical shift right to a zero_extract.  This cannot
work at all if it is not a constant shift, and it has to be a bit more
careful exactly which bits it extracts.

PR target/77881
PR bootstrap/78390
PR target/78438
PR bootstrap/78477
* combine.c (make_compound_operation_int): Do not convert a subreg of
a non-constant logical shift right to a zero_extract.  Handle the case
where some zero bits have been shifted into the range covered by that
subreg.

From-SVN: r242757

Add more subreg offset helpers

Provide versions of subreg_lowpart_offset and subreg_highpart_offset
that work on mode sizes rather than modes.  Also provide a routine
that converts an lsb position to a subreg offset.

The intent (in combination with later patches) is to move the
handling of the BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN case into
just two places, so that for other combinations we don't have
to split offsets into words and subwords.

gcc/
2016-11-15  Richard Sandiford  <richard.sandiford@arm.com>
    Alan Hayward  <alan.hayward@arm.com>
    David Sherwood  <david.sherwood@arm.com>

* rtl.h (subreg_size_offset_from_lsb): Declare.
(subreg_offset_from_lsb): New function.
(subreg_size_lowpart_offset): Declare.
(subreg_lowpart_offset): Turn into an inline function.
(subreg_size_highpart_offset): Declare.
(subreg_highpart_offset): Turn into an inline function.
* emit-rtl.c (subreg_size_lowpart_offset): New function.
(subreg_size_highpart_offset): Likewise
* rtlanal.c (subreg_size_offset_from_lsb): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242755

re PR tree-optimization/78482 (wrong code at -O3 in both 32-bit and 64-bit modes on x86_64-linux-gnu)

2016-11-23  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78482
* tree-cfgcleanup.c: Include tree-ssa-loop-niter.h.
(remove_forwarder_block_with_phi): When merging with a loop
header creates a new latch reset number of iteration information
of the loop.

* gcc.dg/torture/pr78482.c: New testcase.

From-SVN: r242754

sparc.md (*ashrsi3_extend): Rename to...

* config/sparc/sparc.md (*ashrsi3_extend): Rename to...
(*ashrsi3_extend0): ...this.  Accept constant integers.
(*ashrsi3_extend2): Rename to...
(*ashrsi3_extend1): ...this.
(*ashrsi3_extend2): New pattern.
(*lshrsi3_extend1): Accept constant integers.
(*lshrsi3_extend2): Fix condition on operand 2.

From-SVN: r242753

i386.c: Initialize function pointer to NULL to prevent

* config/i386/i386.c: Initialize function pointer to NULL.

From-SVN: r242752

fold-const.c (fold_cond_expr_with_comparison): Move simplification for A == C1 ? A : C2 to below.

* fold-const.c (fold_cond_expr_with_comparison): Move simplification
for A == C1 ? A : C2 to below.
* match.pd: Move from above to here:
(cond (eq (convert1? x) c1) (convert2? x) c2)
  -> (cond (eq x c1) c1 c2).

From-SVN: r242751

fold-const.c (fold_cond_expr_with_comparison): Move simplification for A cmp C1 ? A : C2 to below, also simplify remaining code.

* fold-const.c (fold_cond_expr_with_comparison): Move simplification
for A cmp C1 ? A : C2 to below, also simplify remaining code.
* match.pd: Move and extend simplification from above to here:
(cond (cmp (convert1? x) c1) (convert2? x) c2) -> (minmax (x c)).
* tree-if-conv.c (ifcvt_follow_ssa_use_edges): New func.
(predicate_scalar_phi): Call fold_stmt using the new valueize func.

gcc/testsuite
* gcc.dg/fold-cond_expr-1.c: New test.
* gcc.dg/fold-condcmpconv-1.c: New test.
* gcc.dg/fold-condcmpconv-2.c: New test.

From-SVN: r242750

Remove build dependence on HSA run-time

2016-11-23  Martin Liska  <mliska@suse.cz>
            Martin Jambor  <mjambor@suse.cz>

gcc/
* doc/install.texi: Remove entry about --with-hsa-kmt-lib.

libgomp/
* plugin/hsa.h: New file.
* plugin/hsa_ext_finalize.h: New file.
* plugin/configfrag.ac: Remove hsa-kmt-lib test.  Added checks for
header file unistd.h, and functions secure_getenv, __secure_getenv,
getuid, geteuid, getgid and getegid.
* plugin/Makefrag.am (libgomp_plugin_hsa_la_CPPFLAGS): Added
-D_GNU_SOURCE.
* plugin/plugin-hsa.c: Include config.h, inttypes.h and stdbool.h.
Handle various cases of secure_getenv presence, add an implementation
when we can test effective UID and GID.
(struct hsa_runtime_fn_info): New structure.
(hsa_runtime_fn_info hsa_fns): New variable.
(hsa_runtime_lib): Likewise.
(support_cpu_devices): Likewise.
(init_enviroment_variables): Load newly introduced ENV
variables.
(hsa_warn): Call hsa run-time functions via hsa_fns structure.
(hsa_fatal): Likewise.
(DLSYM_FN): New macro.
(init_hsa_runtime_functions): New function.
(suitable_hsa_agent_p): Call hsa run-time functions via hsa_fns
structure.  Depending on environment, also allow CPU devices.
(init_hsa_context): Call hsa run-time functions via hsa_fns structure.
(get_kernarg_memory_region): Likewise.
(GOMP_OFFLOAD_init_device): Likewise.
(destroy_hsa_program): Likewise.
(init_basic_kernel_info): New function.
(GOMP_OFFLOAD_load_image): Use it.
(create_and_finalize_hsa_program): Call hsa run-time functions via
hsa_fns structure.
(create_single_kernel_dispatch): Likewise.
(release_kernel_dispatch): Likewise.
(init_single_kernel): Likewise.
(parse_target_attributes): Allow up multiple HSA grid dimensions.
(get_group_size): New function.
(run_kernel): Likewise.
(GOMP_OFFLOAD_run): Outline most functionality to run_kernel.
(GOMP_OFFLOAD_fini_device): Call hsa run-time functions via hsa_fns
structure.
* testsuite/lib/libgomp.exp: Remove hsa_kmt_lib support.
* testsuite/libgomp-test-support.exp.in: Likewise.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* config.h.in: Likewise.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.

Co-Authored-By: Martin Jambor <mjambor@suse.cz>
From-SVN: r242749

re PR target/78213 (-fself-test fails on aarch64)

PR target/78213
* opts.c (finish_options): Set -fsyntax-only if running self
tests.

From-SVN: r242748

re PR middle-end/71762 (~X & Y to X < Y doesn't work for uninitialized values)

2016-11-23  Richard Biener  <rguenther@suse.de>

PR middle-end/71762
* match.pd ((~X & Y) -> X < Y, (X & ~Y) -> Y < X,
(~X | Y) -> X <= Y, (X | ~Y) -> Y <= X): Remove.

* gcc.dg/torture/pr71762-1.c: New testcase.
* gcc.dg/torture/pr71762-2.c: Likewise.
* gcc.dg/torture/pr71762-3.c: Likewise.
* gcc.dg/tree-ssa/forwprop-28.c: XFAIL.

From-SVN: r242747

re PR lto/78472 (warning: type of 's' does not match original declaration from zero length bitfield in C vs C++)

2016-11-23  Richard Biener  <rguenther@suse.de>

PR lto/78472
* tree.c (gimple_canonical_types_compatible_p): Ignore zero-sized
fields.

lto/
* lto.c (hash_canonical_type): Ignore zero-sized fields.

* g++.dg/lto/pr78472_0.c: New testcase.
* g++.dg/lto/pr78472_1.C: Likewise.

From-SVN: r242746

re PR tree-optimization/78154 (memcpy et al can be assumed to return non-null)

2016-11-23  Richard Biener  <rguenther@suse.de>
    Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.rog>

PR tree-optimization/78154
* tree-vrp.c (gimple_stmt_nonzero_warnv_p): Return true if function
returns it's argument and the argument is nonnull.
* builtin-attrs.def: Define ATTR_RETURNS_NONNULL,
ATT_RETNONNULL_NOTHROW_LEAF.
* builtins.def (BUILT_IN_MEMPCPY): Change attribute to
ATTR_RETNONNULL_NOTHROW_LEAF.
(BUILT_IN_STPCPY): Likewise.
(BUILT_IN_STPNCPY): Likewise.
(BUILT_IN_MEMPCPY_CHK): Likewise.
(BUILT_IN_STPCPY_CHK): Likewise.
(BUILT_IN_STPNCPY_CHK): Likewise.
(BUILT_IN_STRCAT): Change attribute to ATTR_RET1_NOTHROW_NONNULL_LEAF.
(BUILT_IN_STRNCAT): Likewise.
(BUILT_IN_STRNCPY): Likewise.
(BUILT_IN_MEMSET_CHK): Likewise.
(BUILT_IN_STRCAT_CHK): Likewise.
(BUILT_IN_STRCPY_CHK): Likewise.
(BUILT_IN_STRNCAT_CHK): Likewise.
(BUILT_IN_STRNCPY_CHK): Likewise.

testsuite/
* gcc.dg/tree-ssa/pr78154.c: New test.

Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
From-SVN: r242745

fold-const.c (tree_expr_nonzero_p): Make non-static.

2016-11-23  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

gcc
* fold-const.c (tree_expr_nonzero_p) : Make non-static.
* fold-const.h (tree_expr_nonzero_p) : Declare.
* match.pd (cmp (mult:c @0 @1) (mult:c @2 @1) : New Pattern.

gcc/testsuite
* gcc.dg/pr31096.c: New testcase.
* gcc.dg/pr31096-1.c: New testcase.

From-SVN: r242744

system.h (HAVE_DESIGNATED_INITIALIZERS, [...]): Do not use "defined" in macros.

gcc:
2016-11-23  Paolo Bonzini  <bonzini@gnu.org>

* system.h (HAVE_DESIGNATED_INITIALIZERS,
HAVE_DESIGNATED_UNION_INITIALIZERS): Do not use
"defined" in macros.
* doc/cpp.texi (Defined): Mention -Wexpansion-to-defined.
* doc/cppopts.texi (Invocation): Document -Wexpansion-to-defined.
* doc/invoke.texi (Warning Options): Document -Wexpansion-to-defined.

gcc/c-family:
2016-11-23  Paolo Bonzini  <bonzini@gnu.org>

* c.opt (Wexpansion-to-defined): New.

gcc/testsuite:
2016-11-23  Paolo Bonzini  <bonzini@gnu.org>

* gcc.dg/cpp/defined.c: Mark newly introduced warnings and
adjust for warning->pedwarn change.
* gcc.dg/cpp/defined-syshdr.c,
gcc.dg/cpp/defined-Wexpansion-to-defined.c,
gcc.dg/cpp/defined-Wextra-Wno-expansion-to-defined.c,
gcc.dg/cpp/defined-Wextra.c,
gcc.dg/cpp/defined-Wno-expansion-to-defined.c: New testcases.

libcpp:
2016-11-23  Paolo Bonzini  <bonzini@gnu.org>

* include/cpplib.h (struct cpp_options): Add new member
warn_expansion_to_defined.
(CPP_W_EXPANSION_TO_DEFINED): New enum member.
* expr.c (parse_defined): Warn for all uses of "defined"
in macros, and tie warning to CPP_W_EXPANSION_TO_DEFINED.
Make it a pedwarning instead of a warning.
* system.h (HAVE_DESIGNATED_INITIALIZERS): Do not use
"defined" in macros.

From-SVN: r242743

Fix bogus failure of uninit-19.c for avr

The test fails for avr because fn1 does not get inlined into fn2. Inlining
occurs for x86_64 because fn1's computed size equals call_stmt_size. For the
avr, 32 bit memory moves are more expensive, and b[3] = p10[a] results in
a bigger size for fn1, preventing the inlining.

Add -finline-small-functions to force early inliner to inline fn1.

gcc/testsuite/
2016-11-23  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

* gcc.dg/uninit-19.c: Add -finline-small-functions for avr.

From-SVN: r242742

re PR target/60300 ([avr] Suboptimal stack pointer manipulation for frame setup)

gcc/
PR target/60300
* config/avr/constraints.md (Csp): Widen range to [-11..6].
* config/avr/avr.c (avr_prologue_setup_frame): Limit number
of RCALLs in prologue to 3.

From-SVN: r242741

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* c-pragma.c (handle_pragma_target): Don't replace
current_target_pragma, but chainon the new args to the current one.

* gcc.target/i386/pr78451.c: New test.
* gcc.target/i386/pr69255-1.c: Use #pragma GCC push_options
and #pragma GCC pop_options around the first #pragma GCC target.
* gcc.target/i386/pr69255-2.c: Likewise.
* gcc.target/i386/pr69255-3.c: Likewise.

From-SVN: r242740

2016-11-22  Michael Collison  <michael.collison@arm.com>

* config/aarch64/aarch64-protos.h
(aarch64_and_split_imm1, aarch64_and_split_imm2)
(aarch64_and_bitmask_imm): New prototypes
* config/aarch64/aarch64.c (aarch64_and_split_imm1):
New overloaded function to create bit mask covering the
lowest to highest bits set.
(aarch64_and_split_imm2): New overloaded functions to create bit
mask of zeros between first and last bit set.
(aarch64_and_bitmask_imm): New function to determine if a integer
is a valid two instruction "and" operation.
* config/aarch64/aarch64.md:(and<mode>3): New define_insn and _split
allowing wider range of constants with "and" operations.
* (ior<mode>3, xor<mode>3): Use new LOGICAL2 iterator to prevent
"and" operator from matching restricted constant range used for
ior and xor operators.
* config/aarch64/constraints.md (UsO constraint): New SImode constraint
for constants in "and" operantions.
(UsP constraint): New DImode constraint for constants in "and" operations.
* config/aarch64/iterators.md (lconst2): New mode iterator.
(LOGICAL2): New code iterator.
* config/aarch64/predicates.md (aarch64_logical_and_immediate): New
predicate
(aarch64_logical_and_operand): New predicate allowing extended constants
for "and" operations.
* testsuite/gcc.target/aarch64/and_const.c: New test to verify
additional constants are recognized and fewer instructions generated.
* testsuite/gcc.target/aarch64/and_const2.c: New test to verify
additional constants are recognized and fewer instructions generated.

From-SVN: r242739

godump-1.c: Update expected output for recent changes.

* gcc.misc-tests/godump-1.c: Update expected output for recent
changes.

From-SVN: r242738

TILEPro/TILE-Gx: add trap patterns

* config/tilegx/tilegx.md (trap): New pattern.
* config/tilepro/tilepro.md (trap): Likewise.

From-SVN: r242735

TILE-Gx...

TILE-Gx: fixes the zero_extract/sign_extract patterns so that they
properly handle the case when pos + size > number of bits in a word.

* config/tilegx/tilegx.md (*zero_extract): Use
  define_insn_and_split instead of define_insn; Handle pos +
  size > 64.
  (*sign_extract): Likewise.

From-SVN: r242734

re PR tree-optimization/78455 (ICE in operator[], at vec.h:732)

PR tree-optimization/78455
* tree-ssa-uninit.c (can_chain_union_be_invalidated_p): Fix typo.

* gcc.dg/uninit-23.c: New.

From-SVN: r242733

Daily bump.

From-SVN: r242732

re PR fortran/78479 (ICE in gfc_apply_init, at fortran/expr.c:4135)

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78479
* gfortran.dg/char_component_initializer_3.f90: Add PR number in a
comment.

From-SVN: r242729

re PR go/78431 (ICE in go_append_padding, at godump.c:636)

PR go/78431
PR go/78432
* godump.c (go_format_type): Always pass alignment as 1 when
calling go_append_padding at end of struct/union.

From-SVN: r242728

compiler: relocate ID encoding utilities to gofrontend

    Relocate the code that encodes/sanitizes identifiers to make them
    assembler-friendly, moving it from the back end to the front end; the
    decisions about when to encode an identifier and the calls to the
    encoding helpers now take place entirely in gofrontend.

    Reviewed-on: https://go-review.googlesource.com/33424

* go-gcc.cc (char_needs_encoding): Remove.
(needs_encoding, fetch_utf8_char, encode_id): Remove.
(Gcc_backend::global_variable): Add asm_name parameter.  Don't
compute asm_name here.
(Gcc_backend::implicit_variable): Likewise.
(Gcc_backend::implicit_variable_reference): Likewise.
(Gcc_backend::immutable_struct): Likewise.
(Gcc_backend::immutable_struct_reference): Likewise.
* Make-lang.in (GO_OBJS): Add go/go-encode-id.o.

From-SVN: r242726

re PR fortran/78479 (ICE in gfc_apply_init, at fortran/expr.c:4135)

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78479
* expr.c (gfc_apply_init):  Allocate a charlen if needed.

2016-11-22  Steven G. Kargl  <kargl@gcc.gnu.org>

PR fortran/78479
* gfortran.dg/char_component_initializer_3.f90: New test.

From-SVN: r242725

re PR go/77910 (go: open zversion.go: no such file or directory)

PR go/77910
    cmd/go: don't check standard packages when using gccgo

    This copies https://golang.org/cl/33295 to libgo.

    This fixes GCC PR 77910.

    Reviewed-on: https://go-review.googlesource.com/33471

From-SVN: r242724

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* config/i386/avx512bwintrin.h (_mm512_setzero_qi,
_mm512_setzero_hi): Removed.
(_mm512_maskz_mov_epi16, _mm512_maskz_loadu_epi16,
_mm512_maskz_mov_epi8, _mm512_maskz_loadu_epi8,
_mm512_maskz_broadcastb_epi8, _mm512_maskz_set1_epi8,
_mm512_maskz_broadcastw_epi16, _mm512_maskz_set1_epi16,
_mm512_mulhrs_epi16, _mm512_maskz_mulhrs_epi16, _mm512_mulhi_epi16,
_mm512_maskz_mulhi_epi16, _mm512_mulhi_epu16,
_mm512_maskz_mulhi_epu16, _mm512_maskz_mullo_epi16,
_mm512_cvtepi8_epi16, _mm512_maskz_cvtepi8_epi16, _mm512_cvtepu8_epi16,
_mm512_maskz_cvtepu8_epi16, _mm512_permutexvar_epi16,
_mm512_maskz_permutexvar_epi16, _mm512_avg_epu8, _mm512_maskz_avg_epu8,
_mm512_maskz_add_epi8, _mm512_maskz_sub_epi8, _mm512_avg_epu16,
_mm512_maskz_avg_epu16, _mm512_subs_epi8, _mm512_maskz_subs_epi8,
_mm512_subs_epu8, _mm512_maskz_subs_epu8, _mm512_adds_epi8,
_mm512_maskz_adds_epi8, _mm512_adds_epu8, _mm512_maskz_adds_epu8,
_mm512_maskz_sub_epi16, _mm512_subs_epi16, _mm512_maskz_subs_epi16,
_mm512_subs_epu16, _mm512_maskz_subs_epu16, _mm512_maskz_add_epi16,
_mm512_adds_epi16, _mm512_maskz_adds_epi16, _mm512_adds_epu16,
_mm512_maskz_adds_epu16, _mm512_srl_epi16, _mm512_maskz_srl_epi16,
_mm512_packs_epi16, _mm512_sll_epi16, _mm512_maskz_sll_epi16,
_mm512_maddubs_epi16, _mm512_maskz_maddubs_epi16, _mm512_unpackhi_epi8,
_mm512_maskz_unpackhi_epi8, _mm512_unpackhi_epi16,
_mm512_maskz_unpackhi_epi16, _mm512_unpacklo_epi8,
_mm512_maskz_unpacklo_epi8, _mm512_unpacklo_epi16,
_mm512_maskz_unpacklo_epi16, _mm512_shuffle_epi8,
_mm512_maskz_shuffle_epi8, _mm512_min_epu16, _mm512_maskz_min_epu16,
_mm512_min_epi16, _mm512_maskz_min_epi16, _mm512_max_epu8,
_mm512_maskz_max_epu8, _mm512_max_epi8, _mm512_maskz_max_epi8,
_mm512_min_epu8, _mm512_maskz_min_epu8, _mm512_min_epi8,
_mm512_maskz_min_epi8, _mm512_max_epi16, _mm512_maskz_max_epi16,
_mm512_max_epu16, _mm512_maskz_max_epu16, _mm512_sra_epi16,
_mm512_maskz_sra_epi16, _mm512_srav_epi16, _mm512_maskz_srav_epi16,
_mm512_srlv_epi16, _mm512_maskz_srlv_epi16, _mm512_sllv_epi16,
_mm512_maskz_sllv_epi16, _mm512_maskz_packs_epi16, _mm512_packus_epi16,
_mm512_maskz_packus_epi16, _mm512_abs_epi8, _mm512_maskz_abs_epi8,
_mm512_abs_epi16, _mm512_maskz_abs_epi16, _mm512_dbsad_epu8,
_mm512_maskz_dbsad_epu8, _mm512_srli_epi16, _mm512_maskz_srli_epi16,
_mm512_slli_epi16, _mm512_maskz_slli_epi16, _mm512_shufflehi_epi16,
_mm512_maskz_shufflehi_epi16, _mm512_shufflelo_epi16,
_mm512_maskz_shufflelo_epi16, _mm512_srai_epi16,
_mm512_maskz_srai_epi16, _mm512_packs_epi32,
_mm512_maskz_packs_epi32, _mm512_packus_epi32,
_mm512_maskz_packus_epi32): Use _mm512_setzero_si512 instead of
_mm512_setzero_qi or _mm512_setzero_hi.
(_mm512_maskz_alignr_epi8, _mm512_dbsad_epu8,
_mm512_maskz_dbsad_epu8): Formatting fixes.
(_mm512_srli_epi16, _mm512_maskz_srli_epi16, _mm512_slli_epi16,
_mm512_maskz_slli_epi16, _mm512_shufflehi_epi16,
_mm512_maskz_shufflehi_epi16, _mm512_shufflelo_epi16,
_mm512_maskz_shufflelo_epi16, _mm512_srai_epi16,
_mm512_maskz_srai_epi16): Use _mm512_setzero_si512 instead of
_mm512_setzero_qi or _mm512_setzero_hi.

From-SVN: r242723

array-notation-common.c (cilkplus_extract_an_trplets): Fix indentation and formatting.

* array-notation-common.c (cilkplus_extract_an_trplets): Fix
indentation and formatting.

From-SVN: r242721

gcc-ar.c (main): Fix indentation.

gcc/
* gcc-ar.c (main): Fix indentation.
* gcov-io.c (gcov_write_summary): Remove extraneous {...}
* ggc-page.c (move_ptes_to_front): Fix formatting.
* hsa-dump.c (dump_has_cfun): Fix indentation.
* sel-sched-ir.h: Remove trailing blank lines.

gcc/c-family/
* array-notation-common.c (cilkplus_extrat_an_triplets): Fix
indentation.

From-SVN: r242719

runtime: rewrite panic/defer code from C to Go

    The actual stack unwind code is still in C, but the rest of the code,
    notably all the memory allocation, is now in Go.  The names are changed
    to the names used in the Go 1.7 runtime, but the code is necessarily
    somewhat different.

    The __go_makefunc_can_recover function is dropped, as the uses of it
    were removed in https://golang.org/cl/198770044.

    Reviewed-on: https://go-review.googlesource.com/33414

From-SVN: r242715

OpenMP loop cloning for SIMT execution

2016-11-22  Jakub Jelinek  <jakub@redhat.com>
            Alexander Monakov  <amonakov@ispras.ru>

* internal-fn.c (expand_GOMP_USE_SIMT): New function.
* tree.c (omp_clause_num_ops): OMP_CLAUSE__SIMT_ has 0 operands.
(omp_clause_code_name): Add _simt_ name.
(walk_tree_1): Handle OMP_CLAUSE__SIMT_.
* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE__SIMT_.
* omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__SIMT_.
(scan_omp_simd): New function.
(scan_omp_1_stmt): Use it in target regions if needed.
(omp_max_vf): Don't max with omp_max_simt_vf.
(lower_rec_simd_input_clauses): Use omp_max_simt_vf if
OMP_CLAUSE__SIMT_ is present.
(lower_rec_input_clauses): Compute maybe_simt from presence of
OMP_CLAUSE__SIMT_.
(lower_lastprivate_clauses): Likewise.
(expand_omp_simd): Likewise.
(execute_omp_device_lower): Lower IFN_GOMP_USE_SIMT.
* internal-fn.def (GOMP_USE_SIMT): New internal function.
* tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE__SIMT_.

Co-Authored-By: Alexander Monakov <amonakov@ispras.ru>
From-SVN: r242714

* es.po, fr.po: Update.

From-SVN: r242711

OpenMP offloading to NVPTX: middle-end changes

* internal-fn.c (expand_GOMP_SIMT_LANE): New.
(expand_GOMP_SIMT_VF): New.
(expand_GOMP_SIMT_LAST_LANE): New.
(expand_GOMP_SIMT_ORDERED_PRED): New.
(expand_GOMP_SIMT_VOTE_ANY): New.
(expand_GOMP_SIMT_XCHG_BFLY): New.
(expand_GOMP_SIMT_XCHG_IDX): New.
* internal-fn.def (GOMP_SIMT_LANE): New.
(GOMP_SIMT_VF): New.
(GOMP_SIMT_LAST_LANE): New.
(GOMP_SIMT_ORDERED_PRED): New.
(GOMP_SIMT_VOTE_ANY): New.
(GOMP_SIMT_XCHG_BFLY): New.
(GOMP_SIMT_XCHG_IDX): New.
* omp-low.c (omp_maybe_offloaded_ctx): New, outlined from...
(create_omp_child_function): ...here.  Set "omp target entrypoint"
or "omp declare target" attribute based on is_gimple_omp_offloaded.
(omp_max_simt_vf): New.  Use it...
(omp_max_vf): ...here.
(lower_rec_input_clauses): Add reduction lowering for SIMT execution.
(lower_lastprivate_clauses): Likewise, for "lastprivate" lowering.
(lower_omp_ordered): Likewise, for "ordered" lowering.
(expand_omp_simd): Add SIMT transforms.
(pass_data_lower_omp): Add PROP_gimple_lomp_dev.
(execute_omp_device_lower): New.
(pass_data_omp_device_lower): New.
(pass_omp_device_lower): New pass.
(make_pass_omp_device_lower): New.
* passes.def (pass_omp_device_lower): Position new pass.
* tree-pass.h (PROP_gimple_lomp_dev): Define.
(make_pass_omp_device_lower): Declare.

From-SVN: r242710

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* gcc.target/i386/sse-22.c: Add avx5124fmaps,avx5124vnniw to
GCC target pragma before including immintrin.h.

From-SVN: r242708

re PR target/78451 (FAIL: gcc.target/i386/sse-22a.c: error: inlining failed in call to always_inline '_mm512_setzero_ps')

PR target/78451
* config/i386/avx512vlintrin.h (_mm_setzero_di): Removed.
(_mm_maskz_mov_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_load_epi64): Likewise.
(_mm_setzero_hi): Removed.
(_mm_maskz_loadu_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_abs_epi64, _mm_maskz_abs_epi64, _mm_maskz_srl_epi64,
_mm_maskz_unpackhi_epi64, _mm_maskz_unpacklo_epi64,
_mm_maskz_compress_epi64, _mm_srav_epi64, _mm_maskz_srav_epi64,
_mm_maskz_sllv_epi64, _mm_maskz_srlv_epi64, _mm_rolv_epi64,
_mm_maskz_rolv_epi64, _mm_rorv_epi64, _mm_maskz_rorv_epi64,
_mm_min_epi64, _mm_max_epi64, _mm_max_epu64, _mm_min_epu64,
_mm_lzcnt_epi64, _mm_maskz_lzcnt_epi64, _mm_conflict_epi64,
_mm_maskz_conflict_epi64, _mm_sra_epi64, _mm_maskz_sra_epi64,
_mm_maskz_sll_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64, _mm_alignr_epi64,
_mm_maskz_alignr_epi64, _mm_srai_epi64, _mm_maskz_slli_epi64):
Likewise.
(_mm_cvtepi32_epi8, _mm256_cvtepi32_epi8, _mm_cvtsepi32_epi8,
_mm256_cvtsepi32_epi8, _mm_cvtusepi32_epi8, _mm256_cvtusepi32_epi8,
_mm_cvtepi32_epi16, _mm256_cvtepi32_epi16, _mm_cvtsepi32_epi16,
_mm256_cvtsepi32_epi16, _mm_cvtusepi32_epi16, _mm256_cvtusepi32_epi16,
_mm_cvtepi64_epi8, _mm256_cvtepi64_epi8, _mm_cvtsepi64_epi8,
_mm256_cvtsepi64_epi8, _mm_cvtusepi64_epi8, _mm256_cvtusepi64_epi8,
_mm_cvtepi64_epi16, _mm256_cvtepi64_epi16, _mm_cvtsepi64_epi16,
_mm256_cvtsepi64_epi16, _mm_cvtusepi64_epi16, _mm256_cvtusepi64_epi16,
_mm_cvtepi64_epi32, _mm256_cvtepi64_epi32, _mm_cvtsepi64_epi32,
_mm256_cvtsepi64_epi32, _mm_cvtusepi64_epi32, _mm256_cvtusepi64_epi32,
_mm_maskz_set1_epi32, _mm_maskz_set1_epi64): Formatting fixes.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
(_mm256_permutex_pd, _mm256_maskz_permutex_epi64, _mm256_insertf32x4,
_mm256_maskz_insertf32x4, _mm256_inserti32x4, _mm256_maskz_inserti32x4,
_mm256_extractf32x4_ps, _mm256_maskz_extractf32x4_ps,
_mm256_shuffle_i32x4, _mm256_maskz_shuffle_i32x4, _mm256_shuffle_f64x2,
_mm256_maskz_shuffle_f64x2, _mm256_shuffle_f32x4,
_mm256_maskz_shuffle_f32x4, _mm256_maskz_shuffle_pd,
_mm_maskz_shuffle_pd, _mm256_maskz_shuffle_ps, _mm_maskz_shuffle_ps,
_mm256_maskz_srli_epi32, _mm_maskz_srli_epi32, _mm_maskz_srli_epi64,
_mm256_mask_slli_epi32, _mm256_maskz_slli_epi32, _mm256_mask_slli_epi64,
_mm256_maskz_slli_epi64, _mm256_roundscale_ps,
_mm256_maskz_roundscale_ps, _mm256_roundscale_pd,
_mm256_maskz_roundscale_pd, _mm_roundscale_ps, _mm_maskz_roundscale_ps,
_mm_roundscale_pd, _mm_maskz_roundscale_pd, _mm256_getmant_ps,
_mm256_maskz_getmant_ps, _mm_getmant_ps, _mm_maskz_getmant_ps,
_mm256_getmant_pd, _mm256_maskz_getmant_pd, _mm_getmant_pd,
_mm_maskz_getmant_pd, _mm256_maskz_shuffle_epi32,
_mm_maskz_shuffle_epi32, _mm256_rol_epi32, _mm256_maskz_rol_epi32,
_mm_rol_epi32, _mm_maskz_rol_epi32, _mm256_ror_epi32,
_mm256_maskz_ror_epi32, _mm_ror_epi32, _mm_maskz_ror_epi32,
_mm_maskz_alignr_epi32, _mm_maskz_alignr_epi64,
_mm256_maskz_srai_epi32, _mm_maskz_srai_epi32, _mm_srai_epi64,
_mm_maskz_srai_epi64, _mm256_maskz_permutex_pd,
_mm256_maskz_permute_pd, _mm256_maskz_permute_ps, _mm_maskz_permute_pd,
_mm_maskz_permute_ps, _mm256_permutexvar_ps): Formatting fixes.
(_mm_maskz_slli_epi64, _mm_rol_epi64, _mm_maskz_rol_epi64,
_mm_ror_epi64, _mm_maskz_ror_epi64): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_cvtps_ph, _mm256_maskz_cvtps_ph): Use _mm_setzero_si128
instead of _mm_setzero_hi.
* config/i386/avx512dqintrin.h (_mm512_broadcast_f64x2,
_mm512_broadcast_i64x2, _mm512_broadcast_f32x2, _mm512_broadcast_i32x2,
_mm512_broadcast_f32x8, _mm512_broadcast_i32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm512_cvtt_roundpd_epi64, _mm512_mask_cvtt_roundpd_epi64,
_mm512_maskz_cvtt_roundpd_epi64, _mm512_cvtt_roundpd_epu64,
_mm512_mask_cvtt_roundpd_epu64, _mm512_maskz_cvtt_roundpd_epu64,
_mm512_cvtt_roundps_epi64, _mm512_mask_cvtt_roundps_epi64,
_mm512_maskz_cvtt_roundps_epi64, _mm512_cvtt_roundps_epu64,
_mm512_mask_cvtt_roundps_epu64, _mm512_maskz_cvtt_roundps_epu64,
_mm512_cvt_roundpd_epi64, _mm512_mask_cvt_roundpd_epi64,
_mm512_maskz_cvt_roundpd_epi64, _mm512_cvt_roundpd_epu64,
_mm512_mask_cvt_roundpd_epu64, _mm512_maskz_cvt_roundpd_epu64,
_mm512_cvt_roundps_epi64, _mm512_mask_cvt_roundps_epi64,
_mm512_maskz_cvt_roundps_epi64, _mm512_cvt_roundps_epu64,
_mm512_mask_cvt_roundps_epu64, _mm512_maskz_cvt_roundps_epu64,
_mm512_cvt_roundepi64_ps, _mm512_mask_cvt_roundepi64_ps,
_mm512_maskz_cvt_roundepi64_ps, _mm512_cvt_roundepu64_ps,
_mm512_mask_cvt_roundepu64_ps, _mm512_maskz_cvt_roundepu64_ps,
_mm512_cvt_roundepi64_pd, _mm512_mask_cvt_roundepi64_pd,
_mm512_maskz_cvt_roundepi64_pd, _mm512_cvt_roundepu64_pd,
_mm512_mask_cvt_roundepu64_pd, _mm512_maskz_cvt_roundepu64_pd,
_mm512_reduce_pd, _mm512_maskz_reduce_pd, _mm512_reduce_ps,
_mm512_maskz_reduce_ps, _mm512_extractf32x8_ps,
_mm512_maskz_extractf32x8_ps, _mm512_extractf64x2_pd,
_mm512_maskz_extractf64x2_pd, _mm512_extracti32x8_epi32,
_mm512_maskz_extracti32x8_epi32, _mm512_range_pd,
_mm512_maskz_range_pd, _mm512_range_ps, _mm512_maskz_range_ps,
_mm512_range_round_pd, _mm512_maskz_range_round_pd,
_mm512_range_round_ps, _mm512_maskz_range_round_ps,
_mm512_maskz_insertf64x2, _mm512_insertf32x8,
_mm512_maskz_insertf32x8): Formatting fixes.
(_mm512_extracti64x2_epi64, _mm512_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
* config/i386/avx512vldqintrin.h (_mm_cvttpd_epi64,
_mm_cvttpd_epu64, _mm_cvtpd_epi64, _mm_cvtpd_epu64,
_mm_cvttps_epi64, _mm_maskz_cvttps_epi64, _mm_cvttps_epu64,
_mm_maskz_cvttps_epu64, _mm_maskz_mullo_epi64, _mm_cvtps_epi64,
_mm_maskz_cvtps_epi64, _mm_cvtps_epu64, _mm_maskz_cvtps_epu64,
_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64): Use
_mm_setzero_si128 instead of _mm_setzero_di.
(_mm256_extracti64x2_epi64, _mm256_maskz_extracti64x2_epi64):
Likewise in macros.
* config/i386/avx512vlbwintrin.h (_mm_maskz_mov_epi8,
_mm_maskz_loadu_epi16, _mm_maskz_mov_epi16, _mm_maskz_loadu_epi8,
_mm_permutexvar_epi16, _mm_maskz_maddubs_epi16): Use
_mm_setzero_si128 instead of _mm_setzero_hi.
(_mm_maskz_min_epu16, _mm_maskz_max_epu8, _mm_maskz_max_epi8,
_mm_maskz_min_epu8, _mm_maskz_min_epi8, _mm_maskz_max_epi16,
_mm_maskz_max_epu16, _mm_maskz_min_epi16): Use _mm_setzero_si128
instead of _mm_setzero_di.
(_mm_dbsad_epu8, _mm_maskz_shufflehi_epi16,
_mm_maskz_shufflelo_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_shufflehi_epi16, _mm_maskz_shufflelo_epi16,
_mm_maskz_slli_epi16): Use _mm_setzero_si128 instead of
_mm_setzero_hi.
(_mm_maskz_alignr_epi8): Use _mm_setzero_si128 instead of
_mm_setzero_di.
(_mm_maskz_mulhi_epi16, _mm_maskz_mulhi_epu16, _mm_maskz_mulhrs_epi16,
_mm_maskz_mullo_epi16, _mm_srav_epi16, _mm_srlv_epi16,
_mm_sllv_epi16): Use _mm_setzero_si128 instead of _mm_setzero_hi.

From-SVN: r242707

rs6000-c.c: Add built-in support for vector compare equal and vector compare not equal.

gcc/ChangeLog:

2016-11-21  Carl Love  <cel@us.ibm.com>

        * config/rs6000/rs6000-c.c: Add built-in support for vector compare
        equal and vector compare not equal.  The vector compares take two
        arguments of type vector bool char, vector bool short, vector bool int,
        vector bool long long with the same return type.
        * doc/extend.texi: Update built-in documentation file for the new
        powerpc built-ins.

gcc/testsuite/ChangeLog:

2016-11-21  Carl Love  <cel@us.ibm.com>

        * gcc.target/powerpc/builtins-3.c: New file to test the new
        built-ins for vector compare equal and vector compare not equal.

From-SVN: r242706

Makefile.in ($(lang_checks_parallelized)): Fix detection of -j argument.

gcc/ChangeLog

* Makefile.in ($(lang_checks_parallelized)): Fix detection
of -j argument.

gcc/ada/ChangeLog

* gcc-interface/Make-lang.in (check-acats): Fix detection
of -j argument.

libstdc++-v3/ChangeLog

* testsuite/Makefile.am
(check-DEJAGNU $(check_DEJAGNU_normal_targets)): Fix detection
of -j argument.
* testsuite/Makefile.in: Regenereate.

From-SVN: r242705

PR78465 Remove runtime tests for <atomic> macros

PR libstdc++/78465
* testsuite/29_atomics/headers/atomic/macros.cc: Replace runtime tests
with preprocessor conditions.

From-SVN: r242704

re PR fortran/78443 ([OOP] Incorrect behavior with non_overridable keyword)

2016-11-22  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78443
* class.c (add_proc_comp): Add a vtype component for non-overridable
procedures that are overriding.

2016-11-22  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78443
* gfortran.dg/typebound_proc_35.f90: New test case.

From-SVN: r242703

pr30778.c (memset): Use size_t for 3rd parameter in declaration.

gcc/testsuite/
* gcc.c-torture/execute/pr30778.c (memset): Use size_t for 3rd
parameter in declaration.

From-SVN: r242702

loop-split.c: Require int32plus.

gcc/testsuite/
* gcc.dg/loop-split.c: Require int32plus.
* gcc.dg/stack-layout-dynamic-1.c: Require ptr32plus.

From-SVN: r242701

pr53447-5.c: Fix test expectations for neon-fpu.

2016-11-22  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * gcc.target/arm/pr53447-5.c: Fix test expectations for neon-fpu.

From-SVN: r242700

builtin-shuffle-1.c (V): Use 4 * int in vector.

gcc/testsuite/
* c-c++-common/builtin-shuffle-1.c (V): Use 4 * int in vector.

From-SVN: r242697

Add multilib support for embedded bare-metal targets

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config.gcc: Allow new rmprofile value for configure option
    --with-multilib-list.
    * config/arm/t-rmprofile: New file.
    * doc/install.texi (--with-multilib-list): Document new rmprofile value
    for ARM.

From-SVN: r242696

[ARM] PR target/78439: Update movdi constraints for Cortex-A8 tuning to handle LDRD/STRD

PR target/78439
* config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
register operand in alternatives 4,5,6.

* gcc.c-torture/compile/pr78439.c: New test.

From-SVN: r242695

re PR target/77904 ([ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used)

2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/77904
    * config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
    in save register mask if it is needed.

    gcc/testsuite/
    PR target/77904
    * gcc.target/arm/pr77904.c: New test.

From-SVN: r242693

MIPS: Add the isa_rev>=2 option to interrupt_handler-bug-1.c.

gcc/testsuite/

* gcc.target/mips/interrupt_handler-bug-1.c (dg-options): Add
isa_rev>=2.

From-SVN: r242692

re PR tree-optimization/78436 (incorrect write to larger-than-type bitfield (signed char x:9))

PR tree-optimization/78436
* gimple-ssa-store-merging.c (zero_char_buf): Removed.
(shift_bytes_in_array, shift_bytes_in_array_right,
merged_store_group::apply_stores): Formatting fixes.
(clear_bit_region): Likewise.  Use memset.
(encode_tree_to_bitpos): Formatting fixes.  Fix comment typos - EPXR
instead of EXPR and inerted instead of inserted.  Use memset instead
of zero_char_buf.  For !BYTES_BIG_ENDIAN decrease byte_size by 1
if shift_amnt is 0.

* gcc.c-torture/execute/pr78436.c: New test.

From-SVN: r242691

re PR middle-end/78416 (wrong code for division by (u128)~INT64_MAX at -O0)

PR middle-end/78416
* expmed.c (expand_divmod): Use wide_int for computation of
op1_is_pow2.  Don't set it if op1 is 0.  Formatting fixes.
Use size <= HOST_BITS_PER_WIDE_INT instead of
HOST_BITS_PER_WIDE_INT >= size.

* gcc.dg/torture/pr78416.c: New test.

From-SVN: r242690

re PR middle-end/78445 (ICE in maybe_gen_insn, at optabs.c:7014)

PR tree-optimization/78445
* tree-if-conv.c (tree_if_conversion): If any_pred_load_store or
any_complicated_phi, version loop even if flag_tree_loop_if_convert is
1.  Formatting fix.

* gcc.dg/pr78445.c: New test.

From-SVN: r242689

[PR libgfortran/78449] XFAIL ieee_8.f90 on aarch64 and arm

ARM and AArch64 may not support trapping so runtime and
compile time check can differ.

gcc/testsuite/
PR libgfortran/78449
* gfortran.dg/ieee/ieee_8.f90 (aarch64*gnu, arm*gnu*): Mark xfail.

From-SVN: r242688

Add sem_item::m_hash_set (PR ipa/78309)

PR ipa/78309
* ipa-icf.c (void sem_item::set_hash): Update m_hash_set.
(sem_function::get_hash): Use the new field.
(sem_function::parse): Remove an argument from ctor.
(sem_variable::parse): Likewise.
(sem_variable::get_hash): Use the new field.
(sem_item_optimizer::read_section): Use new ctor and set hash.
* ipa-icf.h: _hash is removed from sem_item::sem_item,
sem_variable::sem_variable, sem_function::sem_function.

From-SVN: r242687

Daily bump.

From-SVN: r242686

re PR target/68538 (ICE in gen_reg_rtx, at emit-rtl.c:1027 when cross-compiling for cris-linux-gnu target)

PR target/68538
* config/cris/cris.md: Don't call copy_to_mode_reg unless
can_create_pseudo_p is true.

        PR target/68538
* gcc.c-torture/compile/pr68538.c: New test.

From-SVN: r242682

rs6000: rl[wd]imi without shift/rotate (PR68803)

We didn't have patterns yet for rl[wd]imi insns that do a rotate by 0.
This fixes it.

PR target/68803
* config/rs6000/rs6000.md (*rotlsi3_insert_5, *rotldi3_insert_6,
*rotldi3_insert_7): New define_insns.

From-SVN: r242681

rs6000.md (movdi_internal32): Change constraints so that DImode can be allocated to FP/vector registers in...

[gcc]
2016-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.md (movdi_internal32): Change constraints
so that DImode can be allocated to FP/vector registers in more
cases, and we can avoid direct move operations.  If the register
needs reloading, prefer GPRs over FP/vector registers.  In the
case of FPR vs. Altivec registers, prefer FPR registers unless we
have the ISA 3.0 reg+offset scalar instructions.
(movdi_internal64): Likewise.

[gcc/testsuite]
2016-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/ppc-round2.c: Allow XSCVDPSXWS and XSCVDPUXWS
to be generated instead of FCTIWUZ or FCTIWZ.

From-SVN: r242679

re PR middle-end/67335 (ICE in compiling omp simd function with unused argument)

PR middle-end/67335
* omp-simd-clone.c (simd_clone_adjust_argument_types): Use NULL prefix
for tmp simd array if DECL_NAME (parm) is NULL.

* g++.dg/vect/simd-clone-7.cc: New test.

From-SVN: r242678

re PR c++/71973 (c++ handles built-in functions inconsistently)

PR c++/71973
* g++.dg/torture/pr53321.C (size_t): Use __SIZE_TYPE__ instead of
long unsigned int.
* g++.dg/torture/pr63512.C (::strlen): Use __SIZE_TYPE__ instead of
unsigned long.

From-SVN: r242677

re PR target/25128 ([m68k] Suboptimal comparisons against 65536)

PR target/25128
* config/m68k/predicates.md (swap_peephole_relational_operator): New
predicate.
* config/m68k/m68k.md (relational tests against 65535/65536): New
peephole2.

PR target/25128
* gcc.target/m68k/pr25128.c: New test.

From-SVN: r242676

Remove dead FIXME

* tree-ssa-loop-prefetch.c: Delete FIXME after the includes.

From-SVN: r242675

Enable -fprintf-return-value by default.  Tested on powerpc64le and x86.

gcc/c-family/ChangeLog:

* c.opt (-fprintf-return-value): Enable by default.

gcc/ChangeLog:

* doc/invoke.texi (-fprintf-return-value): Document that option
is enabled by default.

From-SVN: r242674

avr-c.c (avr_register_target_pragmas): Use C++ for-loop declaration of loop variable.

gcc/
* config/avr/avr-c.c (avr_register_target_pragmas): Use C++
for-loop declaration of loop variable.
(avr_register_target_pragmas, avr_cpu_cpp_builtins): Same.
* config/avr/avr.c (avr_popcount_each_byte)
(avr_init_expanders, avr_regs_to_save, sequent_regs_live)
(get_sequence_length, avr_prologue_setup_frame, avr_map_metric)
(avr_expand_epilogue, avr_function_arg_advance)
(avr_out_compare, avr_out_plus_1, avr_out_bitop, avr_out_fract)
(avr_rotate_bytes, _reg_unused_after, avr_assemble_integer)
(avr_adjust_reg_alloc_order, output_reload_in_const)
(avr_conditional_register_usage, avr_find_unused_d_reg)
(avr_map_decompose, avr_fold_builtin): Same.

From-SVN: r242672

Don't define libstdc++-internal macros in Solaris 10+ <math.h>

libstdc++-v3:
* acinclude.m4 (GLIBCXX_CHECK_MATH11_PROTO): Update comments.
(__CORRECT_ISO_CPP11_MATH_H_PROTO): Rename to ...
(__CORRECT_ISO_CPP11_MATH_H_PROTO_FP): ... this.
Add test for C++11 <math.h> integral overloads.
* configure: Regenerate.
* config.h.in: Regenerate.

* include/c_global/cmath [__cplusplus >= 201103L]: Reflect
__CORRECT_ISO_CPP11_MATH_H_PROTO to
__CORRECT_ISO_CPP11_MATH_H_PROTO_FP rename.
* include/c_global/cmath [_GLIBCXX_USE_C99_MATH &&
!_GLIBCXX_USE_C99_FP_MACROS_DYNAMIC && __cplusplus >= 201103L]
(std::fpclassify): Wrap in !__CORRECT_ISO_CPP11_MATH_H_PROTO_INT.
(std::isfinite): Likewise.
(std::isinf): Likewise.
(std::isnan): Likewise.
(std::isnormal): Likewise.
(std::signbit): Likewise.
(std::isgreater): Likewise.
(std::isgreaterequal): Likewise.
(std::isless): Likewise.
(std::islessequal): Likewise.
(std::islessgreater): Likewise.
(std::isunordered): Likewise.
[__cplusplus >= 201103L && _GLIBCXX_USE_C99_MATH_TR1]
(std::acosh): Likewise.
(std::asinh): Likewise.
(std::atanh): Likewise.
(std::cbrt): Likewise.
(std::copysign): Likewise.
(std::erf): Likewise.
(std::erfc): Likewise.
(std::exp2): Likewise.
(std::expm1): Likewise.
(std::fdim): Likewise.
(std::fma): Likewise.
(std::fmax): Likewise.
(std::fmin): Likewise.
(std::hypot): Likewise.
(std::ilogb): Likewise.
(std::lgamma): Likewise.
(std::llrint): Likewise.
(std::llround): Likewise.
(std::log1p): Likewise.
(std::log2): Likewise.
(std::logb): Likewise.
(std::lrint): Likewise.
(std::lround): Likewise.
(std::nearbyint): Likewise.
(std::nextafter): Likewise.
(std::nexttoward): Likewise.
(std::remainder): Likewise.
(std::remquo): Likewise.
(std::rint): Likewise.
(std::round): Likewise.
(std::scalbln): Likewise.
(std::scalbn): Likewise.
(std::tgamma): Likewise.
(std::trunc): Likewise.
* include/tr1/cmath [_GLIBCXX_USE_C99_MATH_TR1 && __cplusplus >=
201103L]: Reflect __CORRECT_ISO_CPP11_MATH_H_PROTO to
__CORRECT_ISO_CPP11_MATH_H_PROTO_FP rename.

fixincludes:
* inclhack.def (solaris_math_12): New fix.
(hpux11_fabsf): Replace bypass by *-hp-hpux11* mach selector.
* fixincl.x: Regenerate.
* tests/base/math.h [SOLARIS_MATH_12_CHECK]: New test.

From-SVN: r242671

avr.c (avr_popcount): Remove static function.

gcc/
* config/avr/avr.c (avr_popcount): Remove static function.
(avr_popcount_each_byte, avr_out_bitop): Use popcount_hwi instead.

From-SVN: r242670

[arm] Remove unimplemented option -macps-float

* arm.opt (mapcs-float): Delete option
* arm.c (arm_option_override): Remove hunk relating to
TARGET_APCS_FLOAT.
* doc/invoke.texi (arm options): Remove documentation for -mapcs-float.

From-SVN: r242669

Handle sibcalls with aggregate returns

We treated this g as a sibling call to f:

      int f (int);
      int g (void) { return f (1); }

but not this one:

      struct s { int i; };
      struct s f (int);
      struct s g (void) { return f (1); }

We treated them both as sibcalls on x86 before the first patch for PR36326,
so I suppose this is a regression of sorts from 4.3.

The patch allows function returns to be local aggregate variables as well
as gimple registers.

gcc/
* tree-tailcall.c (process_assignment): Simplify the check for
a valid copy, allowing the source to be a local variable as
well as an SSA name.
(find_tail_calls): Allow copies between local variables to follow
the call.  Allow the result to be stored in any local variable,
even if it's an aggregate.
(eliminate_tail_call): Check whether the result is an SSA name
before updating its SSA_NAME_DEF_STMT.

gcc/testsuite/
* gcc.dg/tree-ssa/tailcall-7.c: New test.

From-SVN: r242668

substring_loc info needs default track-macro-expansion (PR preprocessor/78324)

gcc/ChangeLog:
PR preprocessor/78324
* input.c (get_substring_ranges_for_loc): Fail gracefully if
-ftrack-macro-expansion has a value other than 2.

gcc/testsuite/ChangeLog:
PR preprocessor/78324
* gcc.dg/plugin/diagnostic-test-string-literals-1.c
(test_multitoken_macro): New function.
* gcc.dg/plugin/diagnostic-test-string-literals-3.c: New test
case.
* gcc.dg/plugin/diagnostic-test-string-literals-4.c: New test
case.
* gcc.dg/plugin/plugin.exp (plugin_test_list): Add the new test
cases.
* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c (test_sprintf_note):
Move to...
* gcc.dg/tree-ssa/builtin-sprintf-warn-4.c: ...here.  Drop
-ftrack-macro-expansion=0.
(test_sprintf_note): Remove "P" macro.  Add
dg-begin/end-multiline-output directives.
(LINE, buffer, ptr): Copy from builtin-sprintf-warn-1.c.

From-SVN: r242667

target-supports.exp (check_effective_target_tiny): Return 1 for AVR_TINY.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_tiny) [avr]:
Return 1 for AVR_TINY.

From-SVN: r242666

Testcase for PR71785

gcc/testsuite/
PR rtl-optimization/71785
* gcc.target/powerpc/pr71785.c: New file.

From-SVN: r242665

re PR tree-optimization/78114 (gfortran.dg/vect/fast-math-mgrid-resid.f FAILs)

gcc/testsuite
PR testsuite/78114
* gfortran.dg/vect/fast-math-mgrid-resid.f: Add additional
options.  Refine test by checking predictive commining PHI
nodes in vectorized loop wrto vector factor.

From-SVN: r242664

shrink-wrap: Fix problem with DF checking (PR78400)

With my previous patch the compiler ICEs if you use --enable-checking=df.
This patch fixes it, by calling df_update_entry_exit_and_calls instead of
df_update_entry_block_defs and df_update_exit_block_uses.

PR rtl-optimization/78400
* shrink-wrap.c (try_shrink_wrapping_separate): Call
df_update_entry_exit_and_calls instead of df_update_entry_block_defs
and df_update_exit_block_uses.

From-SVN: r242663

re PR c++/71973 (c++ handles built-in functions inconsistently)

gcc:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* doc/invoke.texi (-Wno-builtin-declaration-mismatch): Document the
new default-enabled warning..
* builtin-types.def (BT_CONST_TM_PTR): New primitive type.
(BT_PTR_CONST_STRING): Updated.
(BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_PTR): Removed.
(BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_TM_PTR): New function type.
* builtins.def (DEF_TM_BUILTIN): Disable BOTH_P for TM builtins.
(strftime): Update builtin function.
* tree-core.h (TI_CONST_TM_PTR_TYPE): New enum value.
* tree.h (const_tm_ptr_type_node): New type node.
* tree.c (free_lang_data, build_common_tree_nodes): Initialize
const_tm_ptr_type_node.

c-family:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* c.opt (-Wbuiltin-declaration-mismatch): New warning.
* c-common.c (c_common_nodes_and_builtins): Initialize
const_tm_ptr_type_node.

c:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* c-decl.c (diagnose_mismatched_decls): Use
OPT_Wbuiltin_declaration_mismatch here too.

cp:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* decl.c (duplicate_decls): Warn when a built-in function is redefined.
Don't overload builtin functions with C++ functions.
Handle const_tm_ptr_type_node like file_ptr_node.
Copy the TREE_NOTHROW flag unmodified to the old decl.

lto:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* lto-lang.c (lto_init): Assert const_tm_ptr_type_node is sane.

testsuite:
2016-11-21  Bernd Edlinger  <bernd.edlinger@hotmail.de>

PR c++/71973
* g++.dg/pr71973-1.C: New test.
* g++.dg/pr71973-2.C: New test.
* g++.dg/pr71973-3.C: New test.
* g++.dg/lto/pr68811_0.C: Add -w to first lto-options.
* g++.dg/lookup/extern-c-redecl4.C: Adjust test expectations.
* g++.old-deja/g++.mike/p700.C: Add -Wno-builtin-declaration-mismatch
to dg-options.
* g++.old-deja/g++.other/realloc.C: Likewise.
* g++.old-deja/g++.other/builtins10.C: Adjust test expectations.

From-SVN: r242662

re PR tree-optimization/78413 (ICE in single_pred_edge, at basic-block.h:361)

[gcc]

2016-11-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/78413
* tree-if-conv.c (versionable_outer_loop_p): Require that both
inner and outer loop latches have single predecessors.

[gcc/testsuite]

2016-11-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

PR tree-optimization/78413
* gcc.dg/tree-ssa/pr78413.c: New test.

From-SVN: r242661

re PR target/78093 ([avr] New variable attribute "absdata" and option "-mabsdata" to enable LDS / STS on Reduced Tiny)

PR target/78093
* config/avr/avr.c (avr_decl_maybe_lds_p): New static function.
(avr_encode_section_info) [TARGET_ABSDATA && AVR_TINY]: Use it.

From-SVN: r242660

empty_fiq_handler.c: Skip if -mthumb is passed in and target is Thumb-only.

2016-11-21  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/empty_fiq_handler.c: Skip if -mthumb is passed in and
    target is Thumb-only.

From-SVN: r242658

make dead_or_set_{,regno_}p take rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* rtl.h: Adjust prototype.
* rtlanal.c (dead_or_set_p): Change argument type to rtx_insn *.
(dead_or_set_regno_p): Likewise.

From-SVN: r242657

make add_int_reg_note take rtx_insn *

gcc/ChangeLog:

2016-11-21  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

* rtl.h: Adjust prototype.
* rtlanal.c (add_int_reg_note): Change argument type to rtx_insn *.

From-SVN: r242656