Bruce Forstall [Tue, 8 Aug 2017 16:40:34 +0000 (09:40 -0700)]
Merge pull request #13263 from BruceForstall/FixDesktopX86SPMIBuild
Fix SuperPMI x86 desktop build
Pat Gavlin [Tue, 8 Aug 2017 16:36:05 +0000 (09:36 -0700)]
Merge pull request #13259 from pgavlin/VSO469210
Fix VSO 469210.
Victor "Nate" Graf [Tue, 8 Aug 2017 15:46:56 +0000 (08:46 -0700)]
Add smoke test for event pipe on Linux (#13240)
* Add smoke test for eventpipe
* Clean up some code from a different version
* Use more descriptive project and namespace names
Pat Gavlin [Tue, 8 Aug 2017 15:21:13 +0000 (08:21 -0700)]
Merge pull request #13260 from pgavlin/VSO471670
Fix VSO 471670.
dotnet-maestro-bot [Tue, 8 Aug 2017 08:16:52 +0000 (01:16 -0700)]
Update CoreClr, CoreFx to preview2-25608-01, preview2-25608-01, respectively (#13262)
Carol Eidt [Tue, 8 Aug 2017 04:37:49 +0000 (21:37 -0700)]
Merge pull request #13023 from wateret/fix-12994
[RyuJIT/armel] Make RefPosition arg regs fixed
Dan Moseley [Tue, 8 Aug 2017 03:37:50 +0000 (20:37 -0700)]
Remove some dead code (#13257)
Bruce Forstall [Tue, 8 Aug 2017 00:28:22 +0000 (17:28 -0700)]
Fix SuperPMI x86 desktop build
Pat Gavlin [Mon, 7 Aug 2017 23:41:56 +0000 (16:41 -0700)]
Fix VSO 471670.
If we remove a NOP during rationalize that is unused, we need to ensure
that its operand is also marked as an unused value.
Pat Gavlin [Mon, 7 Aug 2017 23:26:56 +0000 (16:26 -0700)]
Fix VSO 469210.
This bug arises when ARM32/Legacy backend generates an RMW operator
whose source operand is an addressing mode. In that case, `sched_AM`
needs to choose a register to use for the value that will be loaded from
memory. Originally it was doing so via `rsPickReg`, but that function
may spill registers that are in use, including the register that is
supposed to be modified by the RMW operator. All other points in
`sched_AM` that need to allocate a register use `rsPickFreeReg` in order
to avoid issues like this. This change updates the use of `rsPickReg` to
instead use `rsPickFreeReg`.
Joseph Tremoulet [Mon, 7 Aug 2017 23:07:21 +0000 (19:07 -0400)]
Merge pull request #13250 from JosephTremoulet/CaptureHead
Stop rejecting loops with backward exits
José Rivero [Mon, 7 Aug 2017 21:57:10 +0000 (14:57 -0700)]
Swaping the order of how scenarios are run. (#13255)
- Currently ILLink scenario is broken and the x64 scenario leg does not run JitBench
By swaping the scenario it will let JitBench run while ILLink is being fixed.
Brian Sullivan [Mon, 7 Aug 2017 21:09:12 +0000 (14:09 -0700)]
Merge pull request #13236 from briansull/arm-issue
Updated fix for issue #13093
Tarek Mahmoud Sayed [Mon, 7 Aug 2017 19:48:39 +0000 (12:48 -0700)]
Fix Region DisplayName (#13249)
This change fix the logic when getting the display name from the OS and when we use the native name instead
Jan Kotas [Mon, 7 Aug 2017 19:16:45 +0000 (12:16 -0700)]
Cleanup code access security from the unmanaged runtime (#13241)
Joseph Tremoulet [Mon, 7 Aug 2017 18:11:39 +0000 (11:11 -0700)]
Stop rejecting loops with backward exits
Remove some convoluted code from `optFindNaturalLoops` that has the effect
of rejecting loops with exits that are (lexically) backwards branches.
The comments in the removed code indicate that the intent was to identify
loops which include blocks lexically before `top`, but since `top` is
defined as `head->bbNext`, any such loop was doomed to be rejected by the
code (also being removed) that rejects a loop that "captures head".
When a loop does have a branch back to a block prior to `top`, the
subsequent code that identifies loop exits will identify it as such, and
the subsequent code that rejects predecessors other than `head` of loop
blocks ensures that the backwards branch truly was an exit.
This change still leaves `top` and `first` as separate concepts in the
loop table, to allow for subsequently improvements to loop detection to
identify such loops, though today they're always the same block.
Brian Sullivan [Fri, 4 Aug 2017 21:39:05 +0000 (14:39 -0700)]
Removed the legacy JIT32 assert regarding 4-byte alignment inArenaAllocator::allocateMemory
Immediately after this assert we roundUp to an pointer size allocation amount.
Stopped using two implementation of ArenaAllocator::allocateMemory
Instead we add ifdef DEBUG parts to the common version
Move the implementation of ArenaAllocator::allocateMemory to the header file
Fixed a couple of allocations in assertionprop to use CMF_AssertionProp so that we correctly
attribute which phase uses the memory being allocated.
Added range check for the array writes in Compiler::optMapComplementary
Removed the AlignUp to 4-byte in operator new and new[] in compiler.hpp
chunseoklee [Mon, 7 Aug 2017 17:51:02 +0000 (02:51 +0900)]
fix callsignalhandlerwrapper(arm) (#13114)
issue: #13099
1. add unwind information
2. add free_stack
dotnet-maestro-bot [Mon, 7 Aug 2017 17:48:01 +0000 (10:48 -0700)]
Update CoreClr, CoreFx to preview2-25607-01, preview2-25607-02, respectively (#13133)
dotnet bot [Mon, 7 Aug 2017 17:47:05 +0000 (10:47 -0700)]
Use attribute names without namespaces in a few places (#13248)
Signed-off-by: dotnet-bot <dotnet-bot@microsoft.com>
James Ko [Mon, 7 Aug 2017 16:55:51 +0000 (12:55 -0400)]
Reduce size of array enumerators for x86 (#13157)
Jonghyun Park [Mon, 7 Aug 2017 16:27:16 +0000 (01:27 +0900)]
Use placement new to initialize ELF Header (instead of memcpy) (#13218)
Jim Ma [Mon, 7 Aug 2017 16:25:25 +0000 (04:25 +1200)]
Enable string format tests on Linux. (#13191)
Modified string format tests so that it can be supported on Linux.
Fix #11655
Davis Goodin [Mon, 7 Aug 2017 15:00:42 +0000 (10:00 -0500)]
Update buildtools to 2.0.0-prerelease-01903-01. (#13228)
Jan Kotas [Mon, 7 Aug 2017 12:56:05 +0000 (05:56 -0700)]
Move files to shared partition (#13244)
Sergio Schvezov [Mon, 7 Aug 2017 12:55:34 +0000 (09:55 -0300)]
Update linux-instructions.md (#13246)
On Ubuntu a configuration failure occurs when running `cmake` through `build.sh` on `corefx` asking to install `libkrb5-dev` or its equivalent.
Hanjoung Lee [Mon, 7 Aug 2017 02:35:21 +0000 (11:35 +0900)]
[RyuJIT/armel] Fix ifdef condition and Formatting Error
Hanjoung Lee [Fri, 4 Aug 2017 08:20:34 +0000 (17:20 +0900)]
[RyuJIT/armel] arg regs are always TYP_INT
Hanjoung Lee [Wed, 2 Aug 2017 08:19:55 +0000 (17:19 +0900)]
[RyuJIT/armel] Allocate one more temp for call address
Hanjoung Lee [Tue, 1 Aug 2017 02:45:17 +0000 (11:45 +0900)]
[RyuJIT/armel] Each reg gets own SpillFlag for MultiRegOp
Hanjoung Lee [Tue, 25 Jul 2017 11:50:01 +0000 (20:50 +0900)]
[RyuJIT/armel] Make RefPosition arg regs fixed
Passing double arg regs via `r0:r1` or `r2:r3`,
each RefPosition's RegMask should have only one exact register
so the candidate register can be fixed.
e.g.)
```
<RefPosition #4099 @2625 RefTypeUse <Ivl:1237> BB35 regmask=[r0-r1] last>
<RefPosition #4100 @2625 RefTypeUse <Ivl:1238> BB35 regmask=[r0-r1] last>
```
to be:
```
<RefPosition #4099 @2625 RefTypeUse <Ivl:1237> BB35 regmask=[r0] last fixed>
<RefPosition #4100 @2625 RefTypeUse <Ivl:1238> BB35 regmask=[r1] last fixed>
```
Fix #12994
Pat Gavlin [Sat, 5 Aug 2017 02:00:48 +0000 (19:00 -0700)]
Merge pull request #13227 from BruceForstall/Revert13186
Revert "Fixes issue #13093"
github-john-doe [Fri, 4 Aug 2017 22:12:03 +0000 (15:12 -0700)]
typo (dotnet/corert#4274)
Signed-off-by: dotnet-bot <dotnet-bot@microsoft.com>
github-john-doe [Fri, 4 Aug 2017 22:50:47 +0000 (15:50 -0700)]
typo (#13229)
Maoni Stephens [Fri, 4 Aug 2017 19:55:58 +0000 (12:55 -0700)]
align the segment size to power of 2 and perf fix on getting the seg mapping table indices (#13076)
seg size fixes
Bruce Forstall [Fri, 4 Aug 2017 14:13:59 +0000 (07:13 -0700)]
Revert "Fixes issue #13093"
This reverts commit
0d390cceb7ab0c8a271afce315fe4456211fdc6c.
Bruce Forstall [Fri, 4 Aug 2017 14:03:22 +0000 (07:03 -0700)]
Merge pull request #13197 from BredPet/master
ARM32: fix switch jump table generation bug
Michal Strehovský [Fri, 4 Aug 2017 04:20:50 +0000 (21:20 -0700)]
Merge pull request dotnet/corert#4271 from dotnet/nmirror
Merge nmirror to master
Signed-off-by: dotnet-bot <dotnet-bot@microsoft.com>
Petr Bred [Thu, 3 Aug 2017 15:23:53 +0000 (18:23 +0300)]
ARM32: fix switch jump table generation bug
- force using an inlined jumping instead switch table generation
- see https://github.com/dotnet/coreclr/issues/13194
Signed-off-by: Petr Bred <bredpetr@gmail.com>
Shiming Ge [Fri, 4 Aug 2017 06:18:01 +0000 (14:18 +0800)]
Merge pull request #13143 from shimingsg/v-shige/add-nogc
Add NoGC test to coreclr
Brian Sullivan [Fri, 4 Aug 2017 00:21:19 +0000 (17:21 -0700)]
Merge pull request #13186 from briansull/alloc-align-fixes
Fixes issue #13093
Brian Sullivan [Thu, 3 Aug 2017 01:48:48 +0000 (18:48 -0700)]
Fixes issue #13093
Removed the legacy JIT32 assert regarding 4-byte alignment inArenaAllocator::allocateMemory
Immediately after this assert we roundUp to an pointer size allocation amount.
Fixed a couple of allocations in assertionprop to use CMF_AssertionProp so that we correctly
attribute which phase uses the memory being allocated.
Added range check for the array writes in Compiler::optMapComplementary
Removed the now unnecessary AlignUp to 4-byte in operator new and new[] in compiler.hpp
José Rivero [Thu, 3 Aug 2017 21:59:47 +0000 (14:59 -0700)]
Drop the first iteration value of JitBench. (#13211)
github-john-doe [Thu, 3 Aug 2017 20:37:11 +0000 (13:37 -0700)]
typo (#13196)
* typo
* typo
Carol Eidt [Thu, 3 Aug 2017 15:16:05 +0000 (08:16 -0700)]
Merge pull request #13145 from hqueue/arm/ryujit/issue_13118
[Ryujit/ARM32] Update allocateBusyReg() in LSRA for ARM32
Bruce Forstall [Thu, 3 Aug 2017 15:06:10 +0000 (08:06 -0700)]
Merge pull request #13166 from YongseopKim/ryujit/arm32/add_handling_secure_delegate_inv
[RyuJIT/ARM32] Adds code to handle SecureDelegateInvoke
Yongseop Kim [Wed, 2 Aug 2017 12:04:47 +0000 (21:04 +0900)]
[RyuJIT/ARM32] Adds code to handle SecureDelegateInvoke
- Adds code to handle SecureDelegateInvoke on morph phase like legacy's handling.
- Set R4 to proper addr for indirect call of vsd
- This is like legacy's doing from #6500.
- Fix #12993
Hyung-Kyu Choi [Thu, 3 Aug 2017 02:24:38 +0000 (11:24 +0900)]
Apply review feedback
- Sink a local variable into the innermost block
- Fix format for if-else statement by adding braces
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Stephen Toub [Thu, 3 Aug 2017 01:55:58 +0000 (21:55 -0400)]
Merge pull request #13154 from christianscheuer/fix-readme
Fix reference to System.Threading.Thread class in README.md
Michelle McDaniel [Thu, 3 Aug 2017 00:25:00 +0000 (17:25 -0700)]
Merge pull request #13182 from adiaaida/addMinOptsTP
Add JitMinOpts throughput jobs
Michelle McDaniel [Wed, 2 Aug 2017 23:29:37 +0000 (16:29 -0700)]
Add JitMinOpts throughput jobs
This change adds an opt_level throughput option so that we can run
throughput jobs in minopts mode. This also adds jobs to the lab for min
opts runs
Andy Ayers [Wed, 2 Aug 2017 22:46:56 +0000 (15:46 -0700)]
JIT: refactor logic for removing box upstream side effects (#13169)
Introduce a new method `gtTryRemoveBoxUpstreamEffects` to capture
the logic for cleaning up after a dead value type box into a utility.
Call this from `gtFoldExprSpecial` and now also from the inliner when
it finds a dead box argument.
Also remove the useless `fgExpandInline` field and associated
`fgIsInlining` method, as the jit never set the field to true.
No diffs from the refactoring. The inliner case kicks in in 3 places
in the test tree.
Closes #13136.
José Rivero [Wed, 2 Aug 2017 21:58:46 +0000 (14:58 -0700)]
Add JitBench scenario testing. (#11400)
Noah Falk [Wed, 2 Aug 2017 21:06:21 +0000 (14:06 -0700)]
Merge pull request #13158 from parjong/fix/INTERPERTER_GDBJIT_Conflict
Resolve FEATURE_GDBJIT/FEATURE_INTERPRETER conflict
Carol Eidt [Wed, 2 Aug 2017 18:31:13 +0000 (11:31 -0700)]
Merge pull request #13155 from CarolEidt/UModTreeNodeInfo
Set Register Requirements for Mod/Div
Joseph Tremoulet [Wed, 2 Aug 2017 18:28:40 +0000 (14:28 -0400)]
Merge pull request #13128 from JosephTremoulet/Mulshift
Emit power-of-two constant multiply as shift
Russell C Hadley [Wed, 2 Aug 2017 17:29:19 +0000 (10:29 -0700)]
Merge pull request #11456 from CarolEidt/EHWriteThruDoc
Add an alternate algorithm done during LSRA
Steve MacLean [Wed, 2 Aug 2017 10:48:14 +0000 (06:48 -0400)]
[Arm64] GetLargestOnDieCacheSize (#13071)
Look for cache info in /sys/.../cache/index*/size
If that fails estimate cache size based on processor count
Hyung-Kyu Choi [Wed, 2 Aug 2017 10:06:04 +0000 (19:06 +0900)]
[RyuJIT/ARM32] Update allocateBusyReg() with a helper for ARM32
- Add a helper `isRegInUse()`
- Update `allocateBusyReg()` using `isRegInUse()` for ARM32
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Hyung-Kyu Choi [Wed, 2 Aug 2017 09:35:53 +0000 (18:35 +0900)]
[RyuJIT/ARM32] Unassign a double register properly in allocateBusyReg()
- Introduce a helper, `unassignDoublePhysReg()` for ARM32
- Update `allocateBusyReg()` for ARM32 using `unassignDoublePhysReg()`
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Jonghyun Park [Wed, 2 Aug 2017 09:20:44 +0000 (18:20 +0900)]
Remove unused extern declarations (#13159)
Hyung-Kyu Choi [Wed, 2 Aug 2017 08:39:25 +0000 (17:39 +0900)]
[RyuJIT/ARM32] Update allocateBusy() to test spill candiates with new helpers
- Introduce a helper `canSpillReg` for all targets
- Introduce a helper `canSpillDoubleReg` for ARM32
- Remove a obsolute helper `canSpillThisReg`
- Update allocateBusy() to test spill candiates with new helpers
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Steve MacLean [Wed, 2 Aug 2017 08:37:37 +0000 (04:37 -0400)]
PAL enable Thread affinity support (#12936)
Hyung-Kyu Choi [Wed, 2 Aug 2017 06:47:10 +0000 (15:47 +0900)]
[RyuJIT/ARM32] Helpers to check and test assigned intervals for a register
- Add two helper functions, i.e. `checkActiveInterval` and `checkActiveIntervals`
- Remove one helper function. `checkReferenceAt()`
- Simplify `allocateBusyReg()` by using helpers
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Jonghyun Park [Wed, 2 Aug 2017 05:11:26 +0000 (14:11 +0900)]
Use 'udf 0xff' instead of 'bkpt 0xbe' as a poison (#13152)
Hyung-Kyu Choi [Wed, 2 Aug 2017 04:28:12 +0000 (13:28 +0900)]
Apply review feedback
- Use simpler condition and add an assertion
- Fix typo
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Hyung-Kyu Choi [Wed, 2 Aug 2017 03:40:34 +0000 (12:40 +0900)]
Enable build of crosscomponent for armel (#11066)
* Enable build of crosscomponent for armel
Enable build of crosscomponent for armel in addition to arm
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
* Fix typo
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Jonghyun Park [Wed, 2 Aug 2017 03:05:34 +0000 (12:05 +0900)]
Resolve FEATURE_GDBJIT/FEATURE_INTERPRETER conflict
Carol Eidt [Wed, 2 Aug 2017 01:19:36 +0000 (18:19 -0700)]
Set Register Requirements for Mod/Div
Swaroop Sridhar [Fri, 26 May 2017 02:55:32 +0000 (19:55 -0700)]
LinkBench: Enable Roslyn
This change enables Roslyn runs as part of ILLink.
Roslyn was previously disabled because .Net CLI didnt use the latest
Roslyn compilers. Now that this issue is fixed, we re-enable Roslyn.
The different .Net versions necessary to run the benchmarks are
all downloaded, and the benchmarks are built using them.
Brian Sullivan [Wed, 2 Aug 2017 00:35:50 +0000 (17:35 -0700)]
Merge pull request #13151 from briansull/dump-fixes
Minor fixes for JitDumps
Christian Scheuer [Wed, 2 Aug 2017 00:30:32 +0000 (02:30 +0200)]
Fix reference to System.Threading.Thread class
Steve MacLean [Wed, 2 Aug 2017 00:24:51 +0000 (20:24 -0400)]
[Arm64/Unix] Add OfficialBuildRID linux-arm64 (#12372)
* [Arm64/Unix] Add OfficialBuildRID linux-arm64
* [Arm64/Unix] Fix nuget package build
Steve MacLean [Thu, 6 Jul 2017 23:59:49 +0000 (23:59 +0000)]
GC Prefer CompareExchange
Steve MacLean [Thu, 6 Jul 2017 23:58:36 +0000 (23:58 +0000)]
GC Reduce unnecessary work
Simplify cache alignment
Remove unecessary barriers
Remove unnecessary Interlocked::Decrement
Remove unused join variables
Brian Sullivan [Tue, 1 Aug 2017 22:28:16 +0000 (15:28 -0700)]
Merge pull request #12856 from briansull/method-referenced-ibcdata
Record references to all of the hot methods specified by the IBC profile data
Bruce Forstall [Tue, 1 Aug 2017 21:12:46 +0000 (14:12 -0700)]
Merge pull request #13109 from mikedn/range-alloc
Remove unnecessary allocations from RangeCheck
Bruce Forstall [Tue, 1 Aug 2017 20:39:47 +0000 (13:39 -0700)]
Merge pull request #12929 from mikedn/cast-cmp-test
Use "test reg, reg" instead of "cmp reg, 0" for cast overflow checks
mikedn [Tue, 1 Aug 2017 20:38:12 +0000 (23:38 +0300)]
Refactor emitter::emitInsMov (#12905)
* Split emitter::emitInsMov into separate functions
None of this function's callers need it to figure out what kind of "mov" to emit, the callers already know what they need and they should call the appropiate function.
Copy & paste code, no actual changes.
* Pass the destination register to emitInsLoadInd
This way it can be used for contained indirs where the destination register is set on the parent node.
* Cleanup emitInsLoadInd/emitInsStoreInd/emitInsStoreLcl
Jonghyun Park [Tue, 1 Aug 2017 20:33:50 +0000 (05:33 +0900)]
Fix build errors when TRACK_SYNC is defined (#13122)
* Fix build errors when TRACK_SYNC is defined
* Remove unnecessary default constructor
Bruce Forstall [Tue, 1 Aug 2017 20:32:41 +0000 (13:32 -0700)]
Merge pull request #12926 from mikedn/dead-cast-code
Delete dead code from genIntToIntCast
Joseph Tremoulet [Mon, 31 Jul 2017 20:37:51 +0000 (16:37 -0400)]
Emit power-of-two constant multiply as shift
Most of these get translated to shifts at Morph, but adding a failsafe
here next to the transform for 3/5/9->LEA ensures we won't have these in
the emitted code when they (re-)appear in later phases.
Bruce Forstall [Tue, 1 Aug 2017 20:19:22 +0000 (13:19 -0700)]
Merge pull request #13125 from sdmaclea/PR-POISON
[Arm64] Implement Poison()
Bruce Forstall [Tue, 1 Aug 2017 20:15:19 +0000 (13:15 -0700)]
Merge pull request #13134 from BruceForstall/Fix12911
Handle unspilling part of a multi-use reg with FREE_REG
Brian Sullivan [Tue, 1 Aug 2017 18:45:45 +0000 (11:45 -0700)]
Merge pull request #13147 from jashook/fix_desktop_build_break
Fix Desktop build break in regset.cpp
Brian Sullivan [Tue, 1 Aug 2017 18:23:39 +0000 (11:23 -0700)]
Merge branch 'master' into dump-fixes
Brian Sullivan [Tue, 1 Aug 2017 18:20:53 +0000 (11:20 -0700)]
Minor fixes for JitDumps
- Remove extra ']' in rsMarkRegUsed and rsMarkArgRegUsedByPromotedFieldArg
- removed incorrect newline splits in rsMarkPairUsed
- Check if rsUsedAddr[] is null before calling printTreeID
- Check if spillAddr is null before calling printTreeID
Mark Wilkie [Tue, 1 Aug 2017 18:20:22 +0000 (11:20 -0700)]
Merge pull request #13130 from markwilkie/CROSS-Doc
Added CROSS guidance
Bruce Forstall [Tue, 1 Aug 2017 18:07:57 +0000 (11:07 -0700)]
Merge pull request #13142 from hseok-oh/ryujit/fix_12627
[RyuJIT/ARM32] Tailcall: passing struct argument
Brian Sullivan [Tue, 1 Aug 2017 18:03:25 +0000 (11:03 -0700)]
Merge pull request #13002 from sdmaclea/PR-ARM64-resolveEntryPoint
[Arm64] Fix ResolveStub tokenHash lookup
Bruce Forstall [Tue, 1 Aug 2017 17:54:58 +0000 (10:54 -0700)]
Merge pull request #13138 from hseok-oh/ryujit/nyi_zr
[RyuJIT/ARM32] Remove NYI: using zero register
Mark Wilkie [Tue, 1 Aug 2017 17:45:52 +0000 (10:45 -0700)]
small updates....
Bruce Forstall [Tue, 1 Aug 2017 17:29:04 +0000 (10:29 -0700)]
Merge pull request #13144 from parjong/fix/INTERPRETER_build
Fix FEATURE_INTERPRETER build
Mark Wilkie [Tue, 1 Aug 2017 17:18:16 +0000 (10:18 -0700)]
Updated guidance based on PR feedback
Steve MacLean [Tue, 1 Aug 2017 17:11:55 +0000 (13:11 -0400)]
[Arm64] Adjust alignment for 128 byte cache line (#12801)
jashook [Tue, 1 Aug 2017 16:35:29 +0000 (09:35 -0700)]
Fix Desktop build break in regset.cpp
Pat Gavlin [Tue, 1 Aug 2017 15:53:58 +0000 (08:53 -0700)]
Merge pull request #12947 from pgavlin/GH12919
Lock arg registers when generating a `JMP` on ARM/Legacy.
Hyung-Kyu Choi [Tue, 1 Aug 2017 12:44:55 +0000 (21:44 +0900)]
[Ryujit/ARM32] Update allocateBusyReg() in LSRA for ARM32
- Add two helper functions. `canSpillThisReg()` and `checkReferenceAt()`
- Update allocateBusyReg() to spill and allocate a double register properly
Signed-off-by: Hyung-Kyu Choi <hk0110.choi@samsung.com>
Jonghyun Park [Tue, 1 Aug 2017 13:04:24 +0000 (22:04 +0900)]
Fix FEATURE_INTERPRETER build error
Shiming Ge (Pactera Technologies) [Tue, 1 Aug 2017 11:59:42 +0000 (04:59 -0700)]
Add NoGC test to coreclr