Mark de Wever [Wed, 2 Feb 2022 18:28:03 +0000 (19:28 +0100)]
[libc++][nfc] Use TEST_SAFE_STATIC.
This avoids using an libc++ internal macro in our tests.
Reviewed By: #libc, philnik, ldionne
Differential Revision: https://reviews.llvm.org/D118874
Mark de Wever [Fri, 4 Feb 2022 07:03:50 +0000 (08:03 +0100)]
[libc++] Removes cpp17_output_iterator's default constructor.
This has been suggested in D117950.
Reviewed By: ldionne, #libc, philnik
Differential Revision: https://reviews.llvm.org/D118971
Andy Yankovsky [Mon, 7 Feb 2022 20:37:38 +0000 (20:37 +0000)]
[Support] Don't print stacktrace if DbgHelp.dll hasn't been loaded yet
On Windows certain function from `Signals.h` require that `DbgHelp.dll` is loaded. This typically happens when the main program calls `llvm::InitLLVM`, however in some cases main program doesn't do that (e.g. when the application is using LLDB via `liblldb.dll`). This patch adds a safe guard to prevent crashes. More discussion in
https://reviews.llvm.org/D119009.
Reviewed By: aganea
Differential Revision: https://reviews.llvm.org/D119181
Mircea Trofin [Tue, 8 Feb 2022 15:27:11 +0000 (07:27 -0800)]
[nfc][mlgo][regalloc] Stop warnings about unused function
Added a `NoopSavedModelImpl` type which can be used as a mock AOT-ed
saved model, and further minimize conditional compilation cases. This
also removes unused function warnings on gcc.
Krzysztof Drewniak [Mon, 7 Feb 2022 21:45:40 +0000 (21:45 +0000)]
[MLIR][GPU] Update GPUToROCDL to account for ControlFlow dialect
The conversion to the new ControlFlow dialect didn't change the
GPUToROCDL pass - this commit fixes this issue.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D119188
Hongtao Yu [Fri, 28 Jan 2022 23:53:37 +0000 (15:53 -0800)]
[llvm-profgen] On-demand track optimized-away inlinees for preinliner.
Tracking optimized-away inlinees based on all probes in a binary is expansive in terms of memory usage I'm making the tracking on-demand based on profiled functions only. This saves about 10% memory overall for a medium-sized benchmark.
Before:
note: After parsePerfTraces
note: Thu Jan 27 18:42:09 2022
note: VM: 8.68 GB RSS: 8.39 GB
note: After computeSizeForProfiledFunctions
note: Thu Jan 27 18:42:41 2022
note: **VM: 10.63 GB RSS: 10.20 GB**
note: After generateProbeBasedProfile
note: Thu Jan 27 18:45:49 2022
note: VM: 25.00 GB RSS: 24.95 GB
note: After postProcessProfiles
note: Thu Jan 27 18:49:29 2022
note: VM: 26.34 GB RSS: 26.27 GB
After:
note: After parsePerfTraces
note: Fri Jan 28 12:04:49 2022
note: VM: 8.68 GB RSS: 7.65 GB
note: After computeSizeForProfiledFunctions
note: Fri Jan 28 12:05:26 2022
note: **VM: 8.68 GB RSS: 8.42 GB**
note: After generateProbeBasedProfile
note: Fri Jan 28 12:08:03 2022
note: VM: 22.93 GB RSS: 22.89 GB
note: After postProcessProfiles
note: Fri Jan 28 12:11:30 2022
note: VM: 24.27 GB RSS: 24.22 GB
This should be a no-diff change in terms of profile quality.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D118515
Mark de Wever [Sat, 29 Jan 2022 13:52:41 +0000 (14:52 +0100)]
[libc++][format[[nfc] Use string_view in tests.
This change is a preparation for adapting the tests for
P2216 std::format improvements
Reviewed By: #libc, Quuxplusone, ldionne
Differential Revision: https://reviews.llvm.org/D118717
Balazs Benics [Tue, 8 Feb 2022 16:27:57 +0000 (17:27 +0100)]
[analyzer] Prevent misuses of -analyze-function
Sometimes when I pass the mentioned option I forget about passing the
parameter list for c++ sources.
It would be also useful newcomers to learn about this.
This patch introduces some logic checking common misuses involving
`-analyze-function`.
Reviewed-By: martong
Differential Revision: https://reviews.llvm.org/D118690
Matt Arsenault [Fri, 4 Feb 2022 19:29:12 +0000 (14:29 -0500)]
AMDGPU: Use reserved VGPR for AGPR spills to memory
Previously would reuse the VGPR used for large frame offsets with the
one needed for copying from the AGPR. Fix this by reusing the register
we already reserved for handling AGPR to AGPR copies.
Philip Reames [Tue, 8 Feb 2022 14:56:05 +0000 (06:56 -0800)]
[SCEV] Generalize SCEVEqualsPredicate to any compare [NFC]
PredicatedScalarEvolution has a predicate type for representing A == B. This change generalizes it into something which can represent a A <pred> B.
This generality is currently unused, but is motivated by a couple of recent cases which have come up. In particular, I'm currently playing around with using this to simplify the runtime checking code in LoopVectorizer. Regardless of the outcome of that prototyping, generalizing the compare node seemed useful.
Nikita Popov [Tue, 8 Feb 2022 16:14:41 +0000 (17:14 +0100)]
[Mem2Reg] Check that load type matches alloca type
Alloca promotion can only deal with cases where the load/store
types match the alloca type (it explicitly does not support
bitcasted load/stores).
With opaque pointers this is no longer enforced through the pointer
type, so add an explicit check.
Matt Arsenault [Wed, 15 Dec 2021 02:56:48 +0000 (21:56 -0500)]
AMDGPU: Reserve v32 if we may need to copy between AGPRs on gfx908
We need to guarantee cheap copies between AGPRs, and unfortunately
gfx908 cannot directly do this. Theoretically we could set the
scavenger up with an emergency spill slot, but it also feels
unreasonable to pay that cost for what was assumed to be a simple and
cheap copy. Pick a register that doesn't conflict with any ABI
registers.
This does not address the same issue when copying from SGPR to AGPR
for gfx90a (this coincidentally fixes it for gfx908), but that's less
interesting since the register allocator shouldn't be proactively
introducing such copies.
One edge case I'm worried about is respecting the VGPR budget implied
by amdgpu-waves-per-eu. If the theoretical upper bound of a function
is 32 VGPRs, this will force the actual count to be 33.
This is also broken if inline assembly uses/defs something in v32. The
coalescer will eliminate the intermediate vreg between the def and
use, and the introduced copy will clobber the user value.
(cherry picked from commit
3335784ac2d587ff4eac04586e189532ae8b2607)
Matt Arsenault [Fri, 4 Feb 2022 19:56:03 +0000 (14:56 -0500)]
AMDGPU: Regenerate mir test checks to include -NEXT
Louis Dionne [Mon, 7 Feb 2022 22:25:41 +0000 (17:25 -0500)]
[libc++] Add a Lit configuration for running back-deployment tests
This testing configuration links tests against one libc++ shared library,
but runs them against another libc++ shared library. This makes sure that
we can build applications against the libc++ provided in a recent SDK and
back-deploy them to platforms containing older libc++ dylibs.
It also switches the Apple CI script to using that new configuration
instead of the legacy one.
Differential Revision: https://reviews.llvm.org/D119195
zhijian [Tue, 8 Feb 2022 15:57:04 +0000 (10:57 -0500)]
[NFC] Refactor llvm-nm symbol comparing and split sorting
Summary:
1.added a helper function isSymbolDefined().
2.Split out sorting code
3.refactor symbol comparing function
Reviewers: James Henderson,Fangrui Song
Differential Revision: https://reviews.llvm.org/D119028
Sanjay Patel [Tue, 8 Feb 2022 15:41:34 +0000 (10:41 -0500)]
[SDAG] enable binop identity constant folds for fmul/fdiv
The test diffs are identical to D119111.
This only affects x86 currently because no other target
has an override for the TLI hook that controls this transform.
Nikita Popov [Tue, 8 Feb 2022 15:50:11 +0000 (16:50 +0100)]
[AutoUpgrade] Handle remangling upgrade for ptr.annotation
The code assumed that the upgrade would happen due to the argument
count changing from 4 to 5. However, a remangling upgrade is also
possible here.
David Sherwood [Wed, 2 Feb 2022 09:02:16 +0000 (09:02 +0000)]
[AArch64][CodeGen] Always use SVE (when enabled) to lower 64-bit vector multiplies
This patch adds custom lowering support for ISD::MUL with v1i64 and v2i64
types when SVE is enabled, regardless of the minimum SVE vector length. We
do this because NEON simply does not have 64-bit vector multiplies, so we
want to take advantage of these instructions in SVE.
I've updated the 128-bit min SVE vector bits tests here:
CodeGen/AArch64/sve-fixed-length-int-arith.ll
CodeGen/AArch64/sve-fixed-length-int-mulh.ll
CodeGen/AArch64/sve-fixed-length-int-rem.ll
Differential Revision: https://reviews.llvm.org/D118802
Arjun P [Tue, 8 Feb 2022 15:36:24 +0000 (21:06 +0530)]
[MLIR][Presburger] Support computing volumes via hyperrectangular overapproximation
Add support for computing an overapproximation of the number of integer points
in a polyhedron. The returned result is actually the number of integer points
one gets by computing the "rational shadow" obtained by projecting out the
local IDs, finding the minimal axis-parallel hyperrectangular approximation
of the shadow, and returning the number of integer points in that. This does
not currently support symbols.
Reviewed By: Groverkss
Differential Revision: https://reviews.llvm.org/D119228
Roman Lebedev [Tue, 8 Feb 2022 15:35:22 +0000 (18:35 +0300)]
[ValueTracking] Only check for non-undef/poison if already known to be a self-multiply
https://godbolt.org/z/js9fTTG9h
^ we don't care what `isGuaranteedNotToBeUndefOrPoison()` says
unless we already knew that the operands were equal.
Roman Lebedev [Tue, 8 Feb 2022 15:27:29 +0000 (18:27 +0300)]
[NFC][clang] Autogenerate checklines in CodeGenCXX/nrvo.cpp
It checks IR after optimizations, which is inherently fragile,
and the results are now different after the recent patch.
Arjun P [Tue, 8 Feb 2022 15:23:43 +0000 (20:53 +0530)]
[MLIR][Presburger] Simplex::computeIntegerBounds: support unbounded directions by returning Optionals
Nathan Sidwell [Mon, 7 Feb 2022 18:08:18 +0000 (10:08 -0800)]
[demangler][NFC] Utility header cleanups
a) Using a do...while loop in the number formatter means we do not
have to special case zero.
b) Let's use 'if (auto size = ...) {}' for appending to the output
buffer.
c) We should also be using memcpy there, not memmove -- the string
being appended is never part of the current buffer.
d) Let's put all the operator<< functions together.
e) I find 'if (cond) frob(..., true) ; elseOD frob(..., false)'
somewhat confusing. Let's just use std::abs in the signed integer
printer and let CSE decide about the duplicate < 0 testing.
f) Let's have as many as possible return *this. That's both more
consistent, and allows tailcalls in some cases (the actual number
formatter has a local array though).
These changes removed around 100 bytes from the demangler's
instructions on x86_64.
Reviewed By: ChuanqiXu
Differential Revision: https://reviews.llvm.org/D119176
Nikita Popov [Thu, 3 Feb 2022 13:46:57 +0000 (14:46 +0100)]
[OpenCL] Mark kernel arguments as ABI aligned
Following the discussion on D118229, this marks all pointer-typed
kernel arguments as having ABI alignment, per section 6.3.5 of
the OpenCL spec:
> For arguments to a __kernel function declared to be a pointer to
> a data type, the OpenCL compiler can assume that the pointee is
> always appropriately aligned as required by the data type.
Differential Revision: https://reviews.llvm.org/D118894
Nikita Popov [Tue, 8 Feb 2022 12:52:02 +0000 (13:52 +0100)]
[AMDGPURewriteOutArguments] Don't use pointer element type
Instead of using the pointer element type, look at how the pointer
is actually being used in store instructions, while looking through
bitcasts. This makes the transform compatible with opaque pointers
and a bit more general.
It's worth noting that I have dropped the 3-vector to 4-vector
shufflevector special case, because this is now handled in a
different way: If the value is actually used as a 4-vector, then
we're directly going to use that type, instead of shuffling to a
3-vector in between.
Differential Revision: https://reviews.llvm.org/D119237
Simon Pilgrim [Tue, 8 Feb 2022 15:09:12 +0000 (15:09 +0000)]
[X86] selectLEAAddr - relax heuristic to only require one operand to be a MathWithFlags op (PR46809)
As suggested by @craig.topper, relaxing LEA matching to only require the ADD to be fed from a single op with EFLAGS helps avoid duplication when the EFLAGS are consumed in a later, dependent instruction.
There was some concern about whether the heuristic is too simple, not taking into account lost loads that can't fold by using a LEA, but some basic tests (included in select-lea.ll) don't suggest that's really a problem.
Differential Revision: https://reviews.llvm.org/D118128
serge-sans-paille [Fri, 4 Feb 2022 11:14:43 +0000 (12:14 +0100)]
Cleanup LLVMDebugInfoCodeView headers
Major user-facing changes:
Many headers in llvm/DebugInfo/CodeView no longer include
llvm/Support/BinaryStreamReader.h or llvm/Support/BinaryStreamWriter.h,
those headers may need to be included manually.
Several headers in llvm/DebugInfo/CodeView no longer include
llvm/DebugInfo/CodeView/EnumTables.h or llvm/DebugInfo/CodeView/CodeView.h,
those headers may need to be included manually.
Some statistics:
$ clang++ -E -Iinclude -I../llvm/include ../llvm/lib/DebugInfo/CodeView/*.cpp -std=c++14 -fno-rtti -fno-exceptions | wc -l
after: 2794466
before: 2832765
Discourse thread on the topic: https://discourse.llvm.org/t/include-what-you-use-include-cleanup/
Differential Revision: https://reviews.llvm.org/D119092
Simon Pilgrim [Tue, 8 Feb 2022 14:59:59 +0000 (14:59 +0000)]
[X86] Remove __builtin_ia32_padd/psub saturated intrinsics and use generic __builtin_elementwise_add/sub_sat
D117898 added the generic __builtin_elementwise_add_sat and __builtin_elementwise_sub_sat with the same integer behaviour as the SSE/AVX instructions
This patch removes the __builtin_ia32_padd/psub saturated intrinsics and just uses the generics - the existing tests see no changes:
__m256i test_mm256_adds_epi8(__m256i a, __m256i b) {
// CHECK-LABEL: test_mm256_adds_epi8
// CHECK: call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %{{.*}}, <32 x i8> %{{.*}})
return _mm256_adds_epi8(a, b);
}
Nikita Popov [Tue, 8 Feb 2022 14:57:48 +0000 (15:57 +0100)]
[AutoUpgrade] Also upgrade intrinsics in invokes
We currently don't have any specialized upgrades for intrinsics
that can be used in invokes, but they can still be subject to
a generic remangling upgrade. In particular, this happens when
upgrading statepoint intrinsics under -opaque-pointers.
This patch just changes the upgrade code to work on CallBase
instead of CallInst in particular.
Joseph Huber [Tue, 8 Feb 2022 14:38:33 +0000 (09:38 -0500)]
[OpenMP] Enable new driver tests for AMDGPU
This patch enables running the new driver tests for AMDGPU. Previously
this was disabled because some tests failed. This was only because the
new driver tests hadn't been listed as unsupported or expected to fail.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D119240
Sanjay Patel [Tue, 8 Feb 2022 13:32:14 +0000 (08:32 -0500)]
[SDAG] move x86 select-with-identity-constant fold behind a target hook; NFC
This is no-functional-change-intended because only the
x86 target enables the TLI hook currently.
We can add fmul/fdiv opcodes to the switch similar to the
proposal D119111, but we don't need to make other changes
like enabling target-specific combines.
We can also add integer opcodes (add, or, shl, etc.) to
the switch because this function is called from all of the
generic binary opcodes.
The goal is to incrementally enable the profitable diffs
from D90113 while avoiding regressions.
Differential Revision: https://reviews.llvm.org/D119150
Roman Lebedev [Tue, 8 Feb 2022 13:54:03 +0000 (16:54 +0300)]
[SimplifyCFG] 'merge compatible invokes': support normal destination w/ uses
If the original invokes had uses, the uses must have been in PHI's,
but that immediately results in the incoming values being incompatible.
But we'll replace uses of the original invokes with the use of the
merged invoke, so as long as the incoming values become compatible
after that, we can merge.
Roman Lebedev [Tue, 8 Feb 2022 13:34:34 +0000 (16:34 +0300)]
[SimplifyCFG] 'merge compatible invokes': support normal destination w/ PHIs but no uses
As long as the incoming values for all the invokes in the set
are identical, we can merge the invokes.
Roman Lebedev [Tue, 8 Feb 2022 12:42:03 +0000 (15:42 +0300)]
[SimplifyCFG] 'merge compatible invokes': support normal destination w/ no uses, no PHI's
Even if the invokes have normal destination, iff it's the same block,
we can merge them. For now, require that there are no PHI nodes,
and the returned values of invokes aren't used.
Roman Lebedev [Tue, 8 Feb 2022 12:13:16 +0000 (15:13 +0300)]
[NFC][SimplifyCFG] 'merge compatible invokes': more tests for various edge-cases
Simon Pilgrim [Tue, 8 Feb 2022 14:45:28 +0000 (14:45 +0000)]
Revert rG6c174ab2ad0676b295f11f6c3913eff9289fa6b9 "[X86] Remove __builtin_ia32_padd/psub saturated intrinsics and use generic __builtin_elementwise_add/sub_sat"
Missed some legacy builtin tests that need cleaning up first
Sheng [Tue, 8 Feb 2022 14:32:48 +0000 (14:32 +0000)]
[GlobalISel] Add big endian support in CallLowering
When splitting values, CallLowering assumes Lo part goes first. But in big endian ISA such as M68k, Hi part goes first.
This patch fixes this.
Differential Revision: https://reviews.llvm.org/D116877
Nathan Sidwell [Fri, 28 Jan 2022 17:27:28 +0000 (09:27 -0800)]
[demangler] Improve ->* & .* demangling
The demangler treats ->* as a BinaryExpr, but .* as a MemberExpr.
That's inconsistent. This makes the former a MemberExpr too.
However, in order to not regress the paren output, MemberExpr::print
is modified to parenthesize the MemberExpr if the operator ends with
'*'. Printing is affected thusly:
Before:
obj.member
obj->member
obj.*member
(obj) ->* (member)
After:
obj.member # Unchanged
obj->member # Unchanged
obj.*(member) # Added paren member operand
obj->*(member) # Removed paren on object operand, less whitespace
The right solution to the paren problem is to add some notion of
precedence (and associativity) to Nodes, but that's a larger change
that would become simpler once the refactoring I'm doing is completed.
FWIW, binutils' demangler's paren algorithm has a small idea of
precedence, and will generally not emit parens when the operand is
unary.
Reviewed By: bruno
Differential Revision: https://reviews.llvm.org/D118486
Simon Pilgrim [Tue, 8 Feb 2022 14:21:11 +0000 (14:21 +0000)]
[X86] Remove __builtin_ia32_padd/psub saturated intrinsics and use generic __builtin_elementwise_add/sub_sat
D117898 added the generic __builtin_elementwise_add_sat and __builtin_elementwise_sub_sat with the same integer behaviour as the SSE/AVX instructions
This patch removes the __builtin_ia32_padd/psub saturated intrinsics and just uses the generics - the existing tests see no changes:
__m256i test_mm256_adds_epi8(__m256i a, __m256i b) {
// CHECK-LABEL: test_mm256_adds_epi8
// CHECK: call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %{{.*}}, <32 x i8> %{{.*}})
return _mm256_adds_epi8(a, b);
}
Nikita Popov [Tue, 8 Feb 2022 14:16:16 +0000 (15:16 +0100)]
[AArch64TargetTransformInfo] Avoid pointer element type access
Use the element type of the gathered/scattered vector instead.
Simon Pilgrim [Tue, 8 Feb 2022 14:13:36 +0000 (14:13 +0000)]
Fix signed/unsigned comparison warnings on ppc buildbots
Corentin Jabot [Tue, 8 Feb 2022 14:13:04 +0000 (09:13 -0500)]
Add core papers adopted at the february plenary.
2 papers are added to the status page, one targeting
C++23, the other added to the batch of C++20 concept papers.
Nikita Popov [Tue, 8 Feb 2022 14:04:23 +0000 (15:04 +0100)]
[AsmPrinter] Avoid pointer element type access
Instead of checking for a bitcast from a function type, check
whether the aliasee is a function after stripping bitcasts. This
is not strictly equivalent, but serves the same purpose.
Simon Pilgrim [Tue, 8 Feb 2022 13:55:01 +0000 (13:55 +0000)]
Fix signed/unsigned comparison warnings on ppc buildbots
Sven van Haastregt [Tue, 8 Feb 2022 13:42:24 +0000 (13:42 +0000)]
[OpenCL] opencl-c.h: remove arg names from arm_dot; NFC
This simplifies completeness comparisons against OpenCLBuiltins.td.
David Pagan [Tue, 8 Feb 2022 13:33:52 +0000 (08:33 -0500)]
Enable inoutset dependency-type in depend clause.
Done in manner similar to mutexinoutset
(see https://reviews.llvm.org/D57576)
Runtime support already exists in LLVM OpenMP runtime (see
https://reviews.llvm.org/D97085).
The value used to identify an inoutset dependency type in the LLVM
OpenMP runtime is 8.
Some tests updated due to change in dependency type error messages that
now include new dependency type. Also updated
test/OpenMP/task_codegen.cpp to verify we emit the right code.
Arjun P [Tue, 8 Feb 2022 12:25:40 +0000 (17:55 +0530)]
[MLIR][Presburger] factor out duplicated function `parsePoly` into a Utils.h
Reviewed By: Groverkss
Differential Revision: https://reviews.llvm.org/D119194
Simon Pilgrim [Tue, 8 Feb 2022 13:33:18 +0000 (13:33 +0000)]
[ValueTracking] Add support for X*X self-multiplication
D108992 added KnownBits handling for 'Quadratic Reciprocity' self-multiplication patterns (bit[1] == 0), which can be used for non-undef values (poison is OK).
This patch adds noundef selfmultiply handling to value tracking so demanded bits patterns can make use of it.
Differential Revision: https://reviews.llvm.org/D117995
Simon Pilgrim [Tue, 8 Feb 2022 13:29:49 +0000 (13:29 +0000)]
[ValueTracking] Replace dyn_cast with dyn_cast_or_null to account for getTerminator returning null
Noticed while running checks on D117995 - a hexagon regression test was managing to return a block without a terminator
Jesko Appelfeller [Tue, 8 Feb 2022 13:30:59 +0000 (08:30 -0500)]
Make run-clang-tidy.py print the configured checks correctly
The test invocation at the start of run-clang-tidy.py (line 257) prints
all enabled checks - meaning either the default set or anything
configured via the -checks option. If any checks were (un-)configured
via the -config option, these are not printed. This is confusing to the
user, since the list of checks that are printed may be different from
the list of checks that are used by the non-testing calls to clang-tidy,
where the -config option is passed correctly.
This patch adds the -config option to the test invocation of clang-tidy
at the start of the script. This means that checks (un-)configured via
the -config option (rather than the -checks option) are applied
correctly, when printing the list of enabled checks.
Nikita Popov [Tue, 8 Feb 2022 13:21:40 +0000 (14:21 +0100)]
[AMDGPU] Regenerate test checks (NFC)
Use --include-generated-funcs checks. Unfortunately this places
all the functions at the end of the file rather than interleaving
them, but at least makes it feasible to update these tests.
Simon Moll [Tue, 8 Feb 2022 12:20:45 +0000 (13:20 +0100)]
[VE] v256.32|64 setcc isel and tests
Reviewed By: kaz7
Differential Revision: https://reviews.llvm.org/D119223
Simon Pilgrim [Tue, 8 Feb 2022 11:57:05 +0000 (11:57 +0000)]
[ADT] Add APInt/MathExtras isShiftedMask variant returning mask offset/length
In many cases, calls to isShiftedMask are immediately followed with checks to determine the size and position of the bitmask.
This patch adds variants of APInt::isShiftedMask, isShiftedMask_32 and isShiftedMask_64 that return these values as additional arguments.
I've updated a number of cases that were either performing seperate size/position calculations or had created their own local wrapper versions of these.
Differential Revision: https://reviews.llvm.org/D119019
Guillaume Chatelet [Fri, 26 Nov 2021 14:00:17 +0000 (14:00 +0000)]
[libc] Optimized version of memmove
This implementation relies on storing data in registers for sizes up to 128B.
Then depending on whether `dst` is less (resp. greater) than `src` we move data forward (resp. backward) by chunks of 32B.
We first make sure one of the pointers is aligned to increase performance on large move sizes.
Differential Revision: https://reviews.llvm.org/D114637
Simon Pilgrim [Tue, 8 Feb 2022 11:47:50 +0000 (11:47 +0000)]
Attempt to fix sphinx 'Malformed table' warning.
David Green [Tue, 8 Feb 2022 11:27:10 +0000 (11:27 +0000)]
[AArch64] Attempt to emitConjunction from brcond
We currently use emitConjunction to create CCMP conjunctions from the
conditions of selects, helping turning and/ors into more optimal ccmp
sequences that don't need to go through csels. This extends that to also
be used whilst lowering brcond, giving more opportunity for better
condition generation.
Differential Revision: https://reviews.llvm.org/D118650
Simon Pilgrim [Tue, 8 Feb 2022 11:21:46 +0000 (11:21 +0000)]
[Clang] Add elementwise saturated add/sub builtins
This patch implements `__builtin_elementwise_add_sat` and `__builtin_elementwise_sub_sat` builtins.
These map to the add/sub saturated math intrinsics described here:
https://llvm.org/docs/LangRef.html#saturation-arithmetic-intrinsics
With this in place we should then be able to replace the x86 SSE adds/subs intrinsics with these generic variants - it looks like other targets should be able to use these as well (arm/aarch64/webassembly all have similar examples in cgbuiltin).
Differential Revision: https://reviews.llvm.org/D117898
Mubashar Ahmad [Thu, 27 Jan 2022 12:42:58 +0000 (12:42 +0000)]
[AArch64] FeaturePerfMon Added to CPUs
FeaturePerfMon has been enabled for CPUs in AArch64.
Differential Revision: https://reviews.llvm.org/D118705
Nikita Popov [Tue, 8 Feb 2022 11:18:15 +0000 (12:18 +0100)]
[NVPTXISelLowering] Remove unnecessary context parameter (NFCI)
The module context shouldn't be relevant here, and should never
be null either.
Nikita Popov [Tue, 8 Feb 2022 11:08:23 +0000 (12:08 +0100)]
[NVPTXISelLowering] Use byval IndirectType
Instead of the pointer element type.
Nikita Popov [Tue, 8 Feb 2022 11:03:38 +0000 (12:03 +0100)]
[NVPTXISelLowering] Use getByValSize()
Instead of computing the size of the pointer element type.
Guillaume Chatelet [Mon, 7 Feb 2022 15:23:42 +0000 (15:23 +0000)]
[libc] Don't use Clang flags on other compilers
This is necessary to get llvm-libc compile with GCC.
This patch is extracted from D119002.
Differential Revision: https://reviews.llvm.org/D119143
Nikita Popov [Tue, 8 Feb 2022 10:57:18 +0000 (11:57 +0100)]
[NVPTXAsmPrinter] Use byval type
Instead of pointer element type.
Andrzej Warzynski [Mon, 7 Feb 2022 14:03:49 +0000 (14:03 +0000)]
[flang][nfc] Add an assert to guard against `nullptr` dereferencing
Differential Revision: https://reviews.llvm.org/D119133
Guillaume Chatelet [Thu, 3 Feb 2022 12:36:05 +0000 (12:36 +0000)]
[libc] Disable rtti/expections
llvm-libc exhibits a C interface but its source is C++.
This patch explicitly disables the use of exceptions and RTTI when compiling the entrypoints.
Differential Revision: https://reviews.llvm.org/D118889
Fraser Cormack [Fri, 28 Jan 2022 12:33:37 +0000 (12:33 +0000)]
[RISCV] Optimize splats of extracted vector elements
This patch adds an optimization to splat-like operations where the
splatted value is extracted from a identically-sized vector. On RVV we
can splat that via vrgather.vx/vrgather.vi without dropping to scalar
beforehand.
We do have a similar VECTOR_SHUFFLE-specific optimization but that only
works on fixed-length vector types and for those with a constant splat
lane. This patch extends this optimization to make it work on
scalable-vector types and on unknown extract indices.
It is performed during fixed-vector BUILD_VECTOR lowering and during a
new DAGCombine on SPLAT_VECTOR for scalable vectors.
Reviewed By: craig.topper, khchen
Differential Revision: https://reviews.llvm.org/D118456
Nikita Popov [Tue, 8 Feb 2022 10:41:45 +0000 (11:41 +0100)]
[NVPTXLowerArgs] Use byval type
Instead of pointer element type.
Nikita Popov [Tue, 8 Feb 2022 10:37:42 +0000 (11:37 +0100)]
[OpenMPIRBuilderTest] Remove getPointerElementType() uses (NFC)
Use the type of the stored value instead.
Guillaume Chatelet [Mon, 7 Feb 2022 15:18:11 +0000 (15:18 +0000)]
[libc][NFC] moving template specialization outside class declaration
This is necessary to get llvm-libc compile with GCC.
This patch is extracted from D119002.
Differential Revision: https://reviews.llvm.org/D119142
David Green [Tue, 8 Feb 2022 10:28:33 +0000 (10:28 +0000)]
[AArch64] Add some additional tests for conditions of branches. NFC
Tres Popp [Tue, 8 Feb 2022 10:15:04 +0000 (11:15 +0100)]
Remove restriction on static dimensions in Shape method
mlir::shape::ToExtentTensorOp::areCastCompatible didn't allow the input
to have a static dimension, but that is allowed.
Cullen Rhodes [Tue, 8 Feb 2022 10:03:32 +0000 (10:03 +0000)]
[mlir][Affine][Vector] NFC: fix examples in comments
s/-affine-vectorize/-affine-super-vectorize/g
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D118892
Nikita Popov [Tue, 8 Feb 2022 09:29:51 +0000 (10:29 +0100)]
[ArgPromotion] Check dereferenceability on argument as well
Before walking all the callers, check whether we have a
dereferenceable attribute directly on the argument.
Also make it clearer that the code currently does not treat
alignment correctly.
Nikita Popov [Tue, 8 Feb 2022 09:27:17 +0000 (10:27 +0100)]
[ArgPromotion] Test dereferenceable annotation on callee (NFC)
While we check dereferenceability of all callers, we don't check
dereferenceability annotations on the callee.
Nikita Popov [Tue, 8 Feb 2022 09:12:46 +0000 (10:12 +0100)]
[Bitstream] Make MaxChunkSize word-size independent
We only support chunks <= 32 bits regardless of whether we're
running on a 64-bit platform or not. Chunk size > 32 <= 64 would
cause UB in the reading code.
Nikita Popov [Tue, 8 Feb 2022 08:48:43 +0000 (09:48 +0100)]
[Bitcode] Prevent OOB read for invalid name size
Nikita Popov [Tue, 8 Feb 2022 08:40:57 +0000 (09:40 +0100)]
[Bitstream] Check for unterminated VBR
This avoid shift larger than bitwidth UB.
Nikita Popov [Tue, 8 Feb 2022 08:33:55 +0000 (09:33 +0100)]
[Bitcode] Add missing includes in llvm-dis-fuzzer
Probably missed as part of some recent header cleanup.
Clement Courbet [Tue, 8 Feb 2022 08:42:44 +0000 (09:42 +0100)]
[NFC] Fix comment.
The extra space causes the table to render incorrectly in doxygen.
Marek Kurdej [Tue, 8 Feb 2022 08:21:12 +0000 (09:21 +0100)]
[clang-format] Comment unused parameters. NFC.
Marek Kurdej [Tue, 8 Feb 2022 08:18:28 +0000 (09:18 +0100)]
[clang-format] Fix typo. NFC.
Alex Zinenko [Mon, 7 Feb 2022 09:28:09 +0000 (10:28 +0100)]
[mlir] Move constBuidlerCall from to ArrayAttrBase
This makes it applicable to both ArrayAttr and its typed subclasses instead of
only the latter. There is no good reason why ArrayAttr shouldn't be
const-buildable while its typed subclasses are, this was likely just an
omission.
Depends On D119113
Reviewed By: rriddle, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D119114
Alex Zinenko [Mon, 7 Feb 2022 09:27:07 +0000 (10:27 +0100)]
[mlir] ODS: require DefaultValuedAttr to be const-buildable
ODS provides a mechanism for defalut-valued attributes based on a wrapper
TableGen class that is recognized by mlir-tblgen. Such attributes, if not set
on the operaiton, can be construted on-the-fly in their getter given a constant
value. In order for this construction to work, the attribute specificaiton in
ODS must set the constBuilderCall field correctly. This has not been verified,
which could lead to invalid C++ code being generated by mlir-tblgen.
Closes #53588.
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D119113
Zi Xuan Wu [Tue, 8 Feb 2022 07:18:59 +0000 (15:18 +0800)]
[CSKY] Add CSKYDisassembler.cpp to construct objdump
CSKYDisassembler tries to disassemble register MC operand from register num for different register class, and
also handles immediate num and carry flag operand which is not encoded in instruction binary.
Also enhance the printer of instruction to accept sub-option to control the print format. Sometimes, it prefers to
print number in hex, especially when immediate number represents symbol address.
Zi Xuan Wu [Tue, 8 Feb 2022 03:52:50 +0000 (11:52 +0800)]
[CSKY] Add CK800 series ProcessorModel and complete related SubtargetFeatures
Now we only support CSKY 800 series cpus and newer cpus in the future undering CSKYv2 ABI specification.
There are 11 processor family enums for CK series cpus such as CK801, CK802, CK803, CK803S, CK804, CK805,
CK807, CK810, CK810V, CK860, CK860V.
The SchedMachineModels are not ready for different cpus, so only NoSchedModel is used.
Tres Popp [Tue, 8 Feb 2022 08:00:03 +0000 (09:00 +0100)]
Add missing BUILD dependency to ShapeOps
Rainer Orth [Tue, 8 Feb 2022 07:57:59 +0000 (08:57 +0100)]
[CodeGen][test] XFAIL CodeGen/Generic/ForceStackAlign.ll on SPARC
`CodeGen/Generic/ForceStackAlign.ll` `FAIL`s on SPARC like this:
LLVM ERROR: Function "g" required stack re-alignment, but LLVM couldn't
handle it (probably because it has a dynamic alloca).
According to the comments in `llvm/lib/Target/Sparc/SparcFrameLowering.cpp`
(`SparcFrameLowering::emitPrologue`) and `SparcRegisterInfo.cpp`
(`SparcRegisterInfo::canRealignStack`) this isn't going to change any time
soon, so this patch `XFAIL`s the test.
Tested on `sparcv9-sun-solaris2.11`.
Differential Revision: https://reviews.llvm.org/D119119
Jason Molenda [Tue, 8 Feb 2022 07:51:46 +0000 (23:51 -0800)]
Platform gdb RSP packet doc fixes based on implementation behavior
Reviewing some recent fixes to the platform packet implementations
in lldb, I saw the docs were out of sync in a few spots. Updated them.
Differential Revision: https://reviews.llvm.org/D118842
Mariusz Ceier [Tue, 8 Feb 2022 07:26:22 +0000 (23:26 -0800)]
[lldb][CMake] Fix linking of gdb-remote when LLVM_ENABLE_ZLIB is ON
When LLVM_ENABLE_ZLIB is ON gdb-remote should link against ZLIB::ZLIB.
This fixes
```
/mnt/b/yoe/master/build/tmp/hosttools/ld: lib/liblldbPluginProcessGDBRemote.a(GDBRemoteCommunication.cpp.o): in function `lldb_private::process_gdb_remote::GDBRemoteCommunication::DecompressPacket() [clone .localalias]':
GDBRemoteCommunication.cpp:(.text._ZN12lldb_private18process_gdb_remote22GDBRemoteCommunication16DecompressPacketEv+0x59a): undefined reference to `inflateInit2_'
/mnt/b/yoe/master/build/tmp/hosttools/ld: GDBRemoteCommunication.cpp:(.text._ZN12lldb_private18process_gdb_remote22GDBRemoteCommunication16DecompressPacketEv+0x5af): undefined reference to `inflate'
```
Reviewed By: JDevlieghere, MaskRay
Differential Revision: https://reviews.llvm.org/D119186
Carl Ritson [Tue, 8 Feb 2022 06:01:07 +0000 (15:01 +0900)]
[MachineLICM] Add shouldHoist method to TargetInstrInfo
Add a shouldHoist method to TargetInstrInfo which is queried by
MachineLICM to override hoisting decisions for a given target.
This mirrors functionality provided by shouldSink.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D118773
Lang Hames [Tue, 8 Feb 2022 06:41:53 +0000 (17:41 +1100)]
[ORC-RT] Fix missing #include from
f9aef477ebc.
Lang Hames [Tue, 8 Feb 2022 05:31:17 +0000 (16:31 +1100)]
[ORC][ORC-RT] Rewrite the MachO platform to use allocation actions.
This patch updates the MachO platform (both the ORC MachOPlatform class and the
ORC-Runtime macho_platform.* files) to use allocation actions, rather than EPC
calls, to transfer the initializer information scraped from each linked object.
Interactions between the ORC and ORC-Runtime sides of the platform are
substantially redesigned to accomodate the change.
The high-level changes in this patch are:
1. The MachOPlatform::setupJITDylib method now calls into the runtime to set up
a dylib name <-> header mapping, and a dylib state object (JITDylibState).
2. The MachOPlatformPlugin builds an allocation action that calls the
__orc_rt_macho_register_object_platform_sections and
__orc_rt_macho_deregister_object_platform_sections functions in the runtime
to register the address ranges for all "interesting" sections in the object
being allocated (TLS data sections, initializers, language runtime metadata
sections, etc.).
3. The MachOPlatform::rt_getInitializers method (the entry point in the
controller for requests from the runtime for initializer information) is
replaced by MachOPlatform::rt_pushInitializers. The former returned a data
structure containing the "interesting" section address ranges, but these are
now handled by __orc_rt_macho_register_object_platform_sections. The new
rt_pushInitializers method first issues a lookup to trigger materialization
of the "interesting" sections, then returns the dylib dependence tree rooted
at the requested dylib for dlopen to consume. (The dylib dependence tree is
returned by rt_pushInitializers, rather than being handled by some dedicated
call, because rt_pushInitializers can alter the dependence tree).
The advantage of these changes (beyond the performance advantages of using
allocation actions) is that it moves more information about the materialized
portions of the JITDylib into the executor. This tends to make the runtime
easier to reason about, e.g. the implementation of dlopen in the runtime is now
recursive, rather than relying on recursive calls in the controller to build a
linear data structure for consumption by the runtime. This change can also make
some operations more efficient, e.g. JITDylibs can be dlclosed and then
re-dlopened without having to pull all initializers over from the controller
again.
In addition to the high-level changes, there are some low-level changes to ORC
and the runtime:
* In ORC, at ExecutionSession teardown time JITDylibs are now destroyed in
reverse creation order. This is on the assumption that the ORC runtime will be
loaded into an earlier dylib that will be used by later JITDylibs. This is a
short-term solution to crashes that arose during testing when the runtime was
torn down before its users. Longer term we will likely destroy dylibs in
dependence order.
* toSPSSerializable(Expected<T> E) is updated to explicitly initialize the T
value, allowing it to be used by Ts that have explicit constructors.
* The ORC runtime now (1) attempts to track ref-counts, and (2) distinguishes
not-yet-processed "interesting" sections from previously processed ones. (1)
is necessary for standard dlopen/dlclose emulation. (2) is intended as a step
towards better REPL support -- it should enable future runtime calls that
run only newly registered initializers ("dlopen_more", "dlopen_additions",
...?).
Fangrui Song [Tue, 8 Feb 2022 06:02:25 +0000 (22:02 -0800)]
[ELF] AArch64ErrataFix: replace std::map with DenseMap. NFC
There is now no <map> in lld/ELF.
Fangrui Song [Tue, 8 Feb 2022 05:53:34 +0000 (21:53 -0800)]
[ELF] Clean up headers. NFC
wangpc [Tue, 8 Feb 2022 05:42:15 +0000 (13:42 +0800)]
[RISCV] Split f64 undef into two i32 undefs
So that no store instruction will be generated.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D118222
Lang Hames [Tue, 8 Feb 2022 05:18:43 +0000 (16:18 +1100)]
[llvm-jitlink] Don't add process symbols to every JITDylib.
The addProcessSymbols function added a generator for process symbols to every
JITDylib in the session, but this is unhelpful default behavior (e.g. it will
cause the ORC runtime's definition of __cxa_atexit to be shadowed by the
process's definition for all JITDylibs except main).
Since the loadProcessSymbols function already added a generator to main we only
need to drop this function. Other JITDylibs wishing to resolve process symbols
can link against the main JITDylib by passing `-lmain`.
Lang Hames [Tue, 8 Feb 2022 05:10:10 +0000 (16:10 +1100)]
[ORC-RT] Make ExecutorAddr hashable.
This will be used in an upcoming macho_platform patch.
Amir Ayupov [Mon, 7 Feb 2022 19:03:20 +0000 (11:03 -0800)]
[BOLT][CMAKE][NFC] Update runtime/CMakeLists.txt
Summary:
- Specify compiler flags for runtime libraries as BOLT_RT_FLAGS,
- Remove redundant CMake definitions.
Reviewers: maksfb
FBD34048561
Amir Ayupov [Thu, 3 Feb 2022 03:08:27 +0000 (19:08 -0800)]
[BOLT] Add ld.lld substitution
Register ld.lld substition (tests were failing)
Reviewed By: yota9
Differential Revision: https://reviews.llvm.org/D118738
wangpc [Tue, 8 Feb 2022 04:52:13 +0000 (12:52 +0800)]
[RISCV] Pre-commit test for D118222
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D119212