Aaron Williams [Thu, 20 Aug 2020 05:21:58 +0000 (07:21 +0200)]
mips: octeon: Add header octeon-feature.h
This header includes the Octeon feature detection used in many Octeon
drivers.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:21:57 +0000 (07:21 +0200)]
mips: octeon: Add header cvmx-regs.h
This header includes common register defines and accessor functions.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 20 Aug 2020 05:21:56 +0000 (07:21 +0200)]
mips: octeon: lowlevel_init.S: Add NMI handling code for SMP Linux booting
This patch adds the necessary lowlevel init code, to enable SMP Linux
booting. This code will be used with the platform specific Octeon Linux
boot command "bootoctlinux", which starts a configurable number of cores
into Linux.
Additionally some erratas and lowlevel register initializations are
copied from the original Cavium / Marvell U-Boot source code, enabling
booting into the Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 20 Aug 2020 05:21:55 +0000 (07:21 +0200)]
mips: octeon: octeon-model.h: Enable inclusion from assembler files
Add the #ifdef __ASSEMBLY__ checks to enable inclusion of this header
from assembler files.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:43 +0000 (13:04 +0200)]
mips: octeon: octeon_ebb7304_defconfig: Enable USB support
This patch enables USB support with some helpful commands, like fs
support.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:42 +0000 (13:04 +0200)]
mips: octeon: Add USB DT nodes
Add the USB device tree nodes to the Octeon dts/dtsi files.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 24 Aug 2020 11:04:41 +0000 (13:04 +0200)]
mips: octeon: cache.c: Flush all pending writes in flush_dcache_range()
As noticed while working on the USB xHCI support, Octeon needs to flush
all pending writes so that the values are present in the memory. Add
this "syncw" instruction (twice) to flush_dcache_range().
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:40 +0000 (13:04 +0200)]
mips: octeon: Add mangle-port.h
Import platform specific mangle-port.h header, allowing a area specific
swapping, which is needed on Octeon for USB & PCI areas.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:39 +0000 (13:04 +0200)]
mips: octeon: cpu.c: Add table for selective swapping
Import octeon_should_swizzle_table[] which is needed for the area
specific swapping. It will be used by the platform specific
mangle-port.h header.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:38 +0000 (13:04 +0200)]
usb: xhci: octeon: Add DWC3 glue layer for Octeon
This patch adds the glue layer for the MIPS Octeon SoCs. It's ported
mainly from the Linux code.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:37 +0000 (13:04 +0200)]
usb: xhci: xhci_bulk_tx: Don't "BUG" when comparing addresses
Octeon uses mapped addresses for virtual and physical memory. It's not
that easy to calculate the resulting addresses here. So let's remove
this BUG_ON() completely, as it's not really helpful.
Please also note, that BUG_ON() is not recommended any more in the Linux
kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:36 +0000 (13:04 +0200)]
usb: xhci: xhci-dwc3.c: Use dev_remap_addr() instead of dev_get_addr()
On MIPS platforms, mapping of the base address is needed. This patch
switches from dev_get_addr() to dev_remap_addr() to get the mapped base
address of the xHCI controller.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Wed, 2 Sep 2020 06:29:10 +0000 (08:29 +0200)]
mips: octeon: octeon_ebb7304: Add DDR4 support
This patch adds the board specific configuration (struct) for the
Octeon 3 EBB7304 EVK. This struct is ported from the 2013er Cavium /
Marvell U-Boot repository. Also, the Octeon RAM driver is enabled in
the board defconfig for its usage.
Tested with one and two DIMMs on the EBB7304 EVK (8 & 16 GiB).
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 2 Sep 2020 06:29:09 +0000 (08:29 +0200)]
mips: octeon: dram.c: Add RAM driver support
This patch adds the initialization call for the Octeon RAM driver to
the Octeon platforms code. So if enabled via Kconfig, the DDR driver
will be called and the RAM will be configured and used. If the RAM
driver is not enabled, the L2 cache is still used as RAM.
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:08 +0000 (08:29 +0200)]
ram: octeon: Add MIPS Octeon3 DDR4 support (part 3/3)
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 3 includes the DIMM SPD handling code and the Kconfig / Makefile
integration.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:07 +0000 (08:29 +0200)]
ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3)
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 2 includes the very complex Octeon 3 DDR4 configuration
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:06 +0000 (08:29 +0200)]
ram: octeon: Add MIPS Octeon3 DDR4 support (part 1/3)
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 1 adds the base U-Boot RAM driver, which will be instantiated by
the DT based probing.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:05 +0000 (08:29 +0200)]
mips: octeon: Add octeon_ddr.h header
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:04 +0000 (08:29 +0200)]
mips: octeon Add cvmx/cvmx-lmcx-defs.h header
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:03 +0000 (08:29 +0200)]
mips: octeon: Add octeon-model.h header
This header is used by the upcoming DDR driver and potentially by other
drivers ported from the 2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 2 Sep 2020 06:29:02 +0000 (08:29 +0200)]
mips: octeon: dts: mrvl, cn73xx.dtsi: Add memory controller DT node
This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Tue, 6 Oct 2020 12:36:38 +0000 (08:36 -0400)]
Merge tag 'efi-2021-01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc1
The following bugs in the UEFI system are resolved:
* illegal free in EFI_LOAD_FILE2_PROTOCOL implementation
* incorrect documentation of EFI_LOAD_FILE2_PROTOCOL implementation
* output of CRC32 as decimal instead hexadecimal in unit test
* use EfiReservedMemoryType for no-map reserved memory
* avoid unnecessary resets in UEFI unit tests
* call EFI bootmgr even without having /EFI/boot
Tom Rini [Tue, 6 Oct 2020 12:36:10 +0000 (08:36 -0400)]
Merge tag 'u-boot-amlogic-
20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
Heinrich Schuchardt [Thu, 27 Aug 2020 10:52:20 +0000 (12:52 +0200)]
efi_loader: consider no-map property of reserved memory
The device tree may contain a /reserved-memory node. The no-map property
of the sub-nodes signals if the memory may be accessed by the UEFI payload
or not.
In the EBBR specification (https://github.com/arm-software/ebbr) the
modeling of the reserved memory has been clarified.
If a reserved memory node in the device tree has the no-map property map,
create a EfiReservedMemoryType memory map entry else use
EfiBootServicesData.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 17 Sep 2020 17:09:23 +0000 (19:09 +0200)]
efi_loader: QEMU CONFIG_EFI_GRUB_ARM32_WORKAROUND=n
CONFIG_EFI_GRUB_ARM32 is only needed for architectures with caches that are
not managed via CP15 (or for some outdated buggy versions of GRUB). It
makes more sense to disable the setting per architecture than per defconfig.
Move QEMU's CONFIG_EFI_GRUB_ARM32_WORKAROUND=n from defconfig to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sean Anderson [Mon, 28 Sep 2020 16:08:37 +0000 (12:08 -0400)]
efi: Fix typo in documentation
There is an extra space.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Michael Walle [Tue, 29 Sep 2020 06:54:48 +0000 (08:54 +0200)]
distro_bootcmd: call EFI bootmgr even without having /EFI/boot
Currently, the EFI bootmgr is only called if there is a EFI binary
inside the path for removable media is found, i.e. /EFI/boot/. This
doesn't make sense. It is the duty of the bootmgr to find out the
path and name of the EFI binary to boot. It should be called even
if there is no /EFI/boot directory.
Thus, call the bootmgr before we try to boot the EFI binary inside
the removable media path.
Also remove the ${fdtcontroladdr} parameter because the fallback is
handled in cmd/bootefi.c and that already takes care of correct settings
if the board has ACPI and thus no device tree at all.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 30 Sep 2020 19:52:09 +0000 (21:52 +0200)]
efi_selftest: avoid unnecessary reset
When we do not execute a test requiring ExitBootServices do not reset the
system after testing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 3 Oct 2020 11:43:45 +0000 (13:43 +0200)]
efi_selftest: print CRC32 of initrd as hexadecimal
Print the CRC32 loaded via the EFI_LOAD_FILE2_PROTOCOL as a hexadecimal
number.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sat, 3 Oct 2020 11:12:03 +0000 (13:12 +0200)]
efi_selftest: enable printing hexadecimal numbers
Add code to use %x in efi_st_print().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 3 Oct 2020 10:50:52 +0000 (12:50 +0200)]
efi_loader: illegal free in EFI_LOAD_FILE2_PROTOCOL
strsep() changes the address that its first argument points to.
We cannot use the changed address as argument of free().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sat, 3 Oct 2020 10:44:31 +0000 (12:44 +0200)]
efi_loader: description EFI_LOAD_FILE2_PROTOCOL
U-Boot offers a EFI_LOAD_FILE2_PROTOCOL which the Linux EFI stub can use to
load an initial RAM disk. Update the function comments of the
implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Mon, 5 Oct 2020 17:11:41 +0000 (13:11 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 5 Oct 2020 17:05:46 +0000 (13:05 -0400)]
Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.
Signed-off-by: Tom Rini <trini@konsulko.com>
Neil Armstrong [Thu, 1 Oct 2020 08:04:56 +0000 (10:04 +0200)]
pwm: Add driver for Amlogic Meson PWM controller
This adds the driver for the PWM controller found in the Amlogic SoCs.
This PWM is only a set of Gates, Dividers and Counters:
PWM output is achieved by calculating a clock that permits calculating
two periods (low and high). The counter then has to be set to switch after
N cycles for the first half period.
The hardware has no "polarity" setting. This driver reverses the period
cycles (the low length is inverted with the high length) for
PWM_POLARITY_INVERSED.
Disabling the PWM stops the output immediately (without waiting for the
current period to complete first).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 2 Oct 2020 07:32:12 +0000 (09:32 +0200)]
pinctrl: meson-axg: add missing GPIOA_18
Add the missing GPIOA_18 from the missing EE gpio list.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 2 Oct 2020 07:31:46 +0000 (09:31 +0200)]
pinctrl: meson-axg-pmx: fix gpio request
The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Neil Armstrong [Mon, 21 Sep 2020 07:34:15 +0000 (09:34 +0200)]
board: amlogic: vim3: add support for dynamic PCIe enable
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
an USB3.0 Type A connector and a M.2 Key M slot.
The PHY driving these differential lines is shared between
the USB3.0 controller and the PCIe Controller, thus only
a single controller can use it.
This adds this dynamic switching right before booting Linux
and the configuration steps in the boards documentation.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[narmstrong: fixed warning by replacing min() by min_t()]
Neil Armstrong [Mon, 21 Sep 2020 07:34:14 +0000 (09:34 +0200)]
configs: vim3: use the vim3 board support
Use the newly added VIM3 board support instead of the generic W400.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 21 Sep 2020 07:34:13 +0000 (09:34 +0200)]
board: amlogic: add a vim3 specific board support
The VIM3 will need a specific code to enable PCIe if enabled in the MCU,
thus add a specific board support for VIM3 & VIM3L.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 21 Sep 2020 07:34:12 +0000 (09:34 +0200)]
ARM: dts: sync amlogic G12A/SM1 DT from Linux 5.9-rc1
This imports the G12A & SM1 SoC and boards DT changes from the Linux
commit
9123e3a74ec7 ("Linux 5.9-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:19 +0000 (10:48 +0200)]
configs: s400: enable USB
Enable USB Host & Gadget on the Amlogic S400 board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:18 +0000 (10:48 +0200)]
ARM: dts: meson-axg: add USB nodes for S400
Add the correcly architectured USB Glue node for Meson AXG and the
S400 board in -u-boot.dtsi until support in upstream Linux then
backported.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:17 +0000 (10:48 +0200)]
arm: meson-axg: add board_usb_init()/cleanup() for USB gadget
Add the board_usb_init()/cleanup() for USB gadget for AXG based
on the code for the G12A architecture.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:16 +0000 (10:48 +0200)]
phy: meson-gxl-usb: depend on Meson AXG aswell
Enable build of meson-gxl-usb PHY for the AXG architecture aswell.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:15 +0000 (10:48 +0200)]
phy: meson-gxl: remove invalid USB3 PHY driver
The registers which are managed by the meson-gxl-usb3 PHY driver are
actually "USB control" registers (which are "glue" registers which
manage OTG detection and routing of the OTG capable port between the
DWC2 peripheral-only controller and the DWC3 host-only controller).
Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb
driver supports the USB control registers on GXL and GXM SoCs (these
were previously managed by the meson-gxl-usb3 PHY driver).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:14 +0000 (10:48 +0200)]
ARM: mach-meson: use new DWC3 glue for GXL & GXM
Use the new Amlogic GXL/GXM USB Glue instead of the set of USB3 PHY
and Simple DWC3 wrapper.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:13 +0000 (10:48 +0200)]
usb: dwc3: add Amlogic GXL & GXL DWC3 Glue
The USB support was initialy done with a set of PHYs and dwc3-of-simple
because the architecture of the USB complex was not understood correctly
at the time (and proper documentation was missing...).
But with the G12A family, the USB complex was correctly understood and
implemented correctly.
This adds a proper driver for the glue, based on the G12A one, but with
enough changes to require a different driver in U-Boot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:48:12 +0000 (10:48 +0200)]
ARM: dts: sync amlogic AXG/GXL/GXM DT from Linux 5.8-rc1
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux
commit
b3a9e3b9622a ("Linux 5.8-rc1").
This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 10 Sep 2020 08:50:39 +0000 (10:50 +0200)]
board: s400: generate unique mac address from SoC serial
Enable unique mac address generation from SoC serial on S400 board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Mon, 5 Oct 2020 15:15:32 +0000 (11:15 -0400)]
Prepare v2020.10
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 5 Oct 2020 14:54:27 +0000 (10:54 -0400)]
Merge tag 'u-boot-atmel-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next
First set of u-boot-atmel features for 2021.01 cycle:
This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
Tom Rini [Mon, 5 Oct 2020 14:54:10 +0000 (10:54 -0400)]
Merge tag 'u-boot-stm32-
20201003' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next
- stm32mp: DT alignment with Linux 5.9-rc4
- stm32mp: convert drivers to APIs which support live DT
- stm32mp: gpio: minor fixes
Claudiu Beznea [Thu, 1 Oct 2020 10:27:25 +0000 (13:27 +0300)]
cpu: at91: add driver for CPU
Add basic CPU driver use to retrieve information about CPU itself.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tom Rini [Fri, 2 Oct 2020 16:00:39 +0000 (12:00 -0400)]
Merge branch 'rpi-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi into next
Ovidiu Panait [Tue, 29 Sep 2020 17:27:13 +0000 (20:27 +0300)]
pinctrl: bcm283x: Store the return value of dev_read_u32_default to int
Currently, the return value of dev_read_u32_default is stored in an u32,
causing the subsequent "if (function < 0)" to always be false:
u32 function;
...
function = dev_read_u32_default(config, "brcm,function", -1);
if (function < 0) {
debug("Failed reading function for pinconfig %s (%d)\n",
config->name, function);
return -EINVAL;
}
Make "function" variable an int to fix this.
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Ovidiu Panait [Tue, 29 Sep 2020 17:27:12 +0000 (20:27 +0300)]
pinctrl: bcm283x: Read address from DT in ofdata_to_platdata
Factor out reading IP base address to ofdata_to_platdata function, which
is designed for this purpose. Also, drop the dev->priv NULL check, since
this is already done by the dm core when allocating space using
priv_auto_alloc_size feature. (in drivers/core/device.c ->
device_ofdata_to_platdata).
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Ovidiu Panait [Tue, 29 Sep 2020 17:27:11 +0000 (20:27 +0300)]
pinctrl: bcm283x: DM_FLAG_PRE_RELOC: Remove OF_CONTROL check
Remove CONFIG_IS_ENABLED(OF_CONTROL) check from DM_FLAG_PRE_RELOC, since
this driver only supports OF_CONTROL.
drivers/pinctrl/broadcom/Kconfig:
config PINCTRL_BCM283X
depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Patrick Delaunay [Wed, 9 Sep 2020 15:48:15 +0000 (17:48 +0200)]
mailbox: stm32_ipcc: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 15:44:13 +0000 (17:44 +0200)]
video: stm32_dsi: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 15:44:12 +0000 (17:44 +0200)]
video: stm32_ltdc: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 15:50:15 +0000 (17:50 +0200)]
pinctrl: stm32: Add header with SPDX licence
Cosmetics: Add header with SPDX licence
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 15:50:14 +0000 (17:50 +0200)]
pinctrl: stm32: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 16:28:34 +0000 (18:28 +0200)]
gpio: stm32: check result of ofnode_phandle_args
Add test on the size of ofnode_phandle_args result to avoid access
to uninitialized elements in args[] field.
This patch avoids the issue when gpio-ranges cell size is not 3 as
expected, for example:
gpio-ranges = <&pinctrl 0>;
instead of
gpio-ranges = <&pinctrl 0 112 16>;
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 16:28:33 +0000 (18:28 +0200)]
gpio: stm32: cosmetic: cleanup gpio_stm32_probe
Move the variables definition at the beggining of the function
gpio_stm32_probe().
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 16 Sep 2020 08:01:32 +0000 (10:01 +0200)]
ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4
DT alignment with Linux kernel v5.9-rc4 for the STM32MP15x soc
device tree files and the STMicroelectronics boards device tree files.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Soeren Moch [Thu, 27 Aug 2020 19:52:46 +0000 (21:52 +0200)]
board: tbs2910: Use recommended distroboot addresses
According to doc/README.distro fdt_addr must not be set when DTB is not
available from hardware. So remove this entry.
Use address 32MB above the start of DRAM for kernel_addr_r. This way
we likely can avoid the self-relocation of the compressed kernel image
before it decompresses to offset 0x8000 from start of DRAM.
Use address 128MB above the start of DRAM for fdt_addr_r, since this is
the maximum location for the end of the kernel. So we avoid overwriting
the DTB.
Use 512k above that for ramdisk_addr_r. This should be enough for the
DTB, rest of DRAM can be used for initrd.
Place boot script / extlinux.conf at offset 0 / 1MB from start of DRAM.
This space is available for processing in U-Boot.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 2 Oct 2020 12:42:26 +0000 (08:42 -0400)]
Merge tag 'u-boot-stm32-
20201002' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fixup SPI-NOR boot on AV96 board
Marek Vasut [Thu, 1 Oct 2020 10:25:55 +0000 (12:25 +0200)]
ARM: dts: stm32: Add missing dm-spl props for SPI NOR on AV96
The u-boot,dm-spl DT props are missing on AV96, hence the pinmux and
flash0 nodes are not included in the reduced SPL DT. This prevents
SPI NOR boot from working at all. Fix this by filling them in.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tom Rini [Thu, 1 Oct 2020 18:52:56 +0000 (14:52 -0400)]
Merge branch 'next' of git://git.denx.de/u-boot-usb into next
- Assorted XHCI improvements
Tom Rini [Thu, 1 Oct 2020 18:51:58 +0000 (14:51 -0400)]
Revert "net: smc911x: Automatically Update ethaddr with MAC"
Upon further discussion on the mailing list, we should not get in the
situation where the generic code path to set ethaddr/etc correctly does
not work. Revert this until someone can further debug the smc911x
driver regarding this issue.
This reverts commit
387cbf096e443705fa66776027273ed257ec6ca3.
Signed-off-by: Tom Rini <trini@konsulko.com>
Lad Prabhakar [Mon, 21 Sep 2020 17:24:09 +0000 (18:24 +0100)]
usb: xhci-rcar: Add support for R8A774A1 SoC
The R8A774A1 is compatible with the generic rcar-gen3-xhci controller.
This patch adds the compatibility flag, to support the xHCI controller.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Chunfeng Yun [Tue, 8 Sep 2020 17:00:03 +0000 (19:00 +0200)]
usb: xhci: convert to readx_poll_sleep_timeout()
Use readx_poll_sleep_timeout() to poll the register status
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 17:00:02 +0000 (19:00 +0200)]
usb: xhci: use macros with parameter to fill ep_info2
Use macros with parameter to fill ep_info2, then some macros
for MASK and SHIFT can be removed
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 17:00:01 +0000 (19:00 +0200)]
usb: xhci: convert to TRB_TX_TYPE()
Use TRB_TX_TYPE() instead of (TRB_DATA_OUT/IN << TRB_TX_TYPE_SHIFT)
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 17:00:00 +0000 (19:00 +0200)]
usb: xhci: convert to TRB_LEN() and TRB_INTR_TARGET()
For normal TRB fields:
use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK);
and use TRB_INTR_TARGET(x) instead of
(((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT)
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 16:59:59 +0000 (18:59 +0200)]
usb: xhci: convert to TRB_TYPE()
Use TRB_TYPE(p) instead of ((p) << TRB_TYPE_SHIFT)
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 16:59:58 +0000 (18:59 +0200)]
usb: xhci: convert to HCS_MAX_PORTS()
Use HCS_MAX_PORTS(p) instead of
((p & HCS_MAX_PORTS_MASK) >> HCS_MAX_PORTS_SHIFT)
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 16:59:57 +0000 (18:59 +0200)]
usb: xhci: add quirks flag to support MediaTek xHCI 0.96
There some vendor quirks for MTK xHCI 0.96 host controller:
1. It defines some extra SW scheduling parameters for HW
to minimize the scheduling effort for synchronous and
interrupt endpoints. The parameters are put into reserved
DWs of slot context and endpoint context.
2. Its TDS in Normal TRB defines a number of packets that
remains to be transferred for a TD after processing all
Max packets in all previous TRBs.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 16:59:56 +0000 (18:59 +0200)]
usb: xhci: create one unified function to calculate TRB TD remainder
xhci versions 1.0 and later report the untransferred data remaining in a
TD a bit differently than older hosts.
We used to have separate functions for these, and needed to check host
version before calling the right function.
Now Mediatek host has an additional quirk on how it uses the TD Size
field for remaining data. To prevent yet another function for calculating
remainder we instead want to make one quirk friendly unified function.
Porting from the Linux:
c840d6ce772d("xhci: create one unified function to calculate TRB TD remainder.")
124c39371114("xhci: use boolean to indicate last trb in td remainder calculation")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Chunfeng Yun [Tue, 8 Sep 2020 16:59:55 +0000 (18:59 +0200)]
usb: xhci: add a member hci_version in xhci_ctrl struct
Add a member to save xHCI version, it's used some times.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 1 Oct 2020 14:29:39 +0000 (10:29 -0400)]
Merge branch 'next' of git://git.denx.de/u-boot-sh into next
Tom Rini [Thu, 1 Oct 2020 13:46:10 +0000 (09:46 -0400)]
Merge branch '2020-09-30-assorted-network-improvements' into next
- Generic UDP framework
- TFTP fixes
- dwc_eth_qos, smc911x, smc911x and mscc phy fixes
Tom Rini [Thu, 1 Oct 2020 12:55:20 +0000 (08:55 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Fix compatible string check
- Espressobin: Extend README for more MAC addresses
Tom Rini [Thu, 1 Oct 2020 12:36:29 +0000 (08:36 -0400)]
Merge tag 'late-bugfix-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c late bugfix for v2020.10
- rcar_i2c: Fix i2c read/write errors
fixes commit
7c8f821e ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
Tom Rini [Thu, 1 Oct 2020 12:36:09 +0000 (08:36 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Andre Heider [Tue, 29 Sep 2020 12:34:26 +0000 (14:34 +0200)]
arm: mvebu: Espressobin: Fix checks against machine compatible strings
The patches changing the compatible strings to the ones used by Linux have
not been merged yet, so fix the checks to use the current in-tree ones.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 25 Sep 2020 07:54:16 +0000 (09:54 +0200)]
arm: mvebu: Espressobin: Instructions for more MAC addresses in README.marvell
Some Espressobin boards got assigned more than one MAC address. Update
instructions how to correctly store and preserve all MAC addresses.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Lad Prabhakar [Wed, 30 Sep 2020 12:24:12 +0000 (13:24 +0100)]
i2c: rcar_i2c: Fix i2c read/write errors
commit
7c8f821e5dde ("i2c: rcar_i2c: Set the slave address from
rcar_i2c_xfer") blindly called rcar_i2c_set_addr() with read argument
always set to 1 during xfer which introduced read/write errors, whereas
earlier rcar_i2c_read_common() called rcar_i2c_set_addr() with read set to
1 and rcar_i2c_write_common() called rcar_i2c_set_addr() with read set 0.
Fixes:
7c8f821e5dde ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Philippe Reynes [Fri, 18 Sep 2020 12:13:02 +0000 (14:13 +0200)]
sntp: use udp framework
This commits update the support of sntp to use
the framework udp. This change allows to remove
all the reference to sntp in the main network
file net/net.c.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Fri, 18 Sep 2020 12:13:01 +0000 (14:13 +0200)]
sandbox: enable support of generic udp protocol
This commit enable the support of the generic udp protocol.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Fri, 18 Sep 2020 12:13:00 +0000 (14:13 +0200)]
net: add a generic udp protocol
This commit adds a generic udp protocol framework in the
network loop. So protocol based on udp may be implemented
without modifying the network loop (for example custom
wait magic packet).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Wed, 9 Sep 2020 16:30:06 +0000 (18:30 +0200)]
net: dwc_eth_qos: Convert to use APIs which support live DT
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Srinath Mannam [Thu, 2 Apr 2020 10:38:12 +0000 (16:08 +0530)]
phy: add support for stingray PAXB PHY controller
Add support for stingray PAXB PHY controller driver.
This driver supports maximum 8 PAXB phys using pipemux data.
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Heinrich Schuchardt [Mon, 14 Sep 2020 09:00:18 +0000 (11:00 +0200)]
net: use log_err() for 'No ethernet found' message
Write the 'No ethernet found' message via the log drivers. This allows
suppressing it during output via the syslog driver.
This fixes the problem reported in:
[PATCH 0/4] log: Fix the syslog spam when running tests
https://lists.denx.de/pipermail/u-boot/2020-September/426343.html
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ley Foon Tan [Tue, 25 Aug 2020 02:26:37 +0000 (10:26 +0800)]
net: tftp: Fix load_block offset calculation
When load the last block, the "len" might not be a block size. This cause
loading the incorrect last block data.
The fix change "len" to tftp_block_size and minus one tftp_block_size
for offset calculation.
Use same offset calculation formula as in store_block().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Ley Foon Tan [Tue, 25 Aug 2020 02:26:36 +0000 (10:26 +0800)]
net: tftp: Fix store_block offset calculation
tftp_cur_block start with 1 for first block, but tftp_cur_block counter is
start with zero when block number is rollover. The existing code
"tftp_cur_block - 1" will cause the block number become -1 in store_block()
when tftp_cur_block is 0 when tftp_cur_block is rollover.
The fix pass in tftp_cur_block to store_block() and minus the
tftp_block_size when do the offset calculation.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Ley Foon Tan [Tue, 25 Aug 2020 02:26:35 +0000 (10:26 +0800)]
net: tftp: Fix tftp_prev_block counter update
Fixes missing update to tftp_prev_block counter before increase
tftp_cur_block counter when do the tftpput operation.
tftp_prev_block counter is used in update_block_number() function to
check whether block number (sequence number) is rollover. This bug
cause the tftpput command fail to upload a large file when block
number is greater than 16-bit (0xFFFF).
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Adam Ford [Tue, 18 Aug 2020 13:19:02 +0000 (08:19 -0500)]
net: smc911x: Automatically Update ethaddr with MAC
The ethernet controller can read the MAC from EEPROM and display it,
but if ethaddr is not set, the ethernet is still unavailable.
This patch checks will automatically set the MAC address if it has
not already been set.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thirupathaiah Annapureddy [Tue, 18 Aug 2020 00:08:26 +0000 (17:08 -0700)]
net: ftgmac100: Add support for board specific PHY interface address
ftgmac100 driver is using hard-coded PHY interface address of zero.
Each board can have different PHY interface address (phy_addr).
This commit modifies the driver to make use of board specific address
by leveraging CONFIG_PHY_ADDR.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>