Thomas Raoux [Thu, 29 Oct 2020 21:28:01 +0000 (14:28 -0700)]
[mlir][vector] Improve vector distribute integration test and fix block distribution
Fix semantic in the distribute integration test based on offline feedback. This
exposed a bug in block distribution, we need to make sure the id is multiplied
by the stride of the vector. Fix the transformation and unit test.
Differential Revision: https://reviews.llvm.org/D89291
Craig Topper [Thu, 29 Oct 2020 21:16:12 +0000 (14:16 -0700)]
[RISCV] Improve worklist management in the DAG combine for SLLW/SRLW/SRAW
This combine makes two calls to SimplifyDemandedBits, one for the LHS and one
for the RHS. If the LHS call returns true, we don't make the RHS call. When
SimplifyDemandedBits makes a change, it will add the nodes around the change to
the DAG combiner worklist. If the simplification happens on the first recursion
step, the N will get added to the worklist. But if the simplification happens
deeper in the recursion, then N will not be revisited until the next time the
DAG combiner runs.
This patch explicitly addes N to the worklist anytime a Simplification is made.
Without this we might miss additional simplifications on the LHS or never
simplify the RHS. Special care also needs to be taken to not add N if it has
been CSEd by the simplification. There are similar examples in DAGCombiner and
the X86 target, but I don't have a test for it for RISC-V. I've also returned
SDValue(N, 0) instead of SDValue() so DAGCombiner knows a change was made and
will update its Statistic variable.
The test here was constructed so that 2 simplifications happen to the LHS.
Without this fix one happens in the post type legalization DAG combine and the
other happens after LegalizeDAG. This prevents the RHS from ever being
simplified causing the left and right shift to clear the upper 32 bits of the
RHS to be left behind.
Differential Revision: https://reviews.llvm.org/D90339
Craig Topper [Thu, 29 Oct 2020 21:15:37 +0000 (14:15 -0700)]
[RISCV] Add test case for D90339
Jim Ingham [Thu, 29 Oct 2020 21:43:03 +0000 (14:43 -0700)]
Use !hasLocalLinkage instead of listing the symbol types
we should be exporting one by one.
Differential Revision: https://reviews.llvm.org/D78972
Jim Ingham [Wed, 28 Oct 2020 18:58:25 +0000 (11:58 -0700)]
Mark the execution of stop-hooks as non-interactive.
The intention is not to allow stop-hook commands to query the
user, so this is correct. It also works around a deadlock in
switching to the Python Session to execute python based commands
in the stop hook when the Debugger stdin is backed by a FILE *.
Differential Revision: https://reviews.llvm.org/D90332
Christian Sigg [Thu, 29 Oct 2020 17:13:01 +0000 (18:13 +0100)]
[mlir][gpu] Add pass to make GPU ops within a region execute asynchronously.
Do not use the pass yet, except in a test.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D89937
Christian Sigg [Thu, 29 Oct 2020 16:58:48 +0000 (17:58 +0100)]
[mlir][gpu] Handle async in gpu.launch_func lowering.
For the synchronous case, destroy the stream after synchronization.
Sneak in a unrelated change to report why the gpu.wait conversion pattern didn't match.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D89933
Nikita Popov [Thu, 29 Oct 2020 20:59:58 +0000 (21:59 +0100)]
[SDAG] Extract helper to determine neutral element (NFC)
Make the existing VECREDUCE based code more generic, but expressing
it in terms of the neutral value of the base opcode instead.
Stefanos Baziotis [Thu, 29 Oct 2020 20:50:07 +0000 (22:50 +0200)]
[LCSSA] Doc for special treatment of PHIs
Differential Revision: https://reviews.llvm.org/D89739
Christian Sigg [Thu, 22 Oct 2020 05:49:50 +0000 (07:49 +0200)]
[mlir][gpu] Allow gpu.launch_func to be async.
This is a roll-forward of rGec7780ebdab4, now that the remaining
gpu.launch_func have been converted to custom form in rGb22f111023ba.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D90420
Nikita Popov [Thu, 29 Oct 2020 20:41:58 +0000 (21:41 +0100)]
[LoopUtils] Fix neutral value for vector.reduce.fadd
Use -0.0 instead of 0.0 as the start value. The previous use of 0.0
was fine for all existing uses of this function though, as it is
always generated with fast flags right now, and thus nsz.
Ilya Bukonkin [Tue, 29 Sep 2020 12:51:49 +0000 (15:51 +0300)]
GetModule, GetExeModule methods added
Florian Hahn [Thu, 29 Oct 2020 19:46:34 +0000 (19:46 +0000)]
[SLP] Consider alternatives for cost of select instructions.
Some architectures do not have general vector select instructions (e.g.
AArch64). But some cmp/select patterns can be vectorized using other
instructions/intrinsics.
One example is using min/max instructions for certain patterns.
This patch updates the cost calculations for selects in the SLP
vectorizer to consider using min/max intrinsics.
This patch does not change SLP vectorizer's codegen itself to actually
generate those intrinsics, but relies on the backends to lower the
vector cmps & selects. This keeps things simple on the SLP side and
works well in practice for AArch64.
This exposes additional SLP vectorization opportunities in some
benchmarks on AArch64 (-O3 -flto).
Metric: SLP.NumVectorInstructions
Program base slp diff
test-suite...ications/JM/ldecod/ldecod.test 502.00 697.00 38.8%
test-suite...ications/JM/lencod/lencod.test 1023.00 1414.00 38.2%
test-suite...-typeset/consumer-typeset.test 56.00 65.00 16.1%
test-suite...6/464.h264ref/464.h264ref.test 804.00 822.00 2.2%
test-suite...006/453.povray/453.povray.test 3335.00 3357.00 0.7%
test-suite...CFP2000/177.mesa/177.mesa.test 2110.00 2121.00 0.5%
test-suite...:: External/Povray/povray.test 2378.00 2382.00 0.2%
Reviewed By: RKSimon, samparker
Differential Revision: https://reviews.llvm.org/D89969
Thomas Lively [Thu, 29 Oct 2020 20:37:55 +0000 (13:37 -0700)]
[WebAssembly] Remove unused FileCheck test prefixes
This commit removes unused FileCheck prefixes from WebAssembly test files to
avoid causing test failures once FileCheck disallows unused prefixes by default.
See D90281 and the corresponding llvm-dev thread for context.
Reviewed By: aardappel
Differential Revision: https://reviews.llvm.org/D90416
Nikita Popov [Thu, 29 Oct 2020 20:27:59 +0000 (21:27 +0100)]
[SDAG] Fix neutral value for vecreduce_fadd
The neutral value for FADD is -0.0, not 0.0, so this is what we
need to pad vectors with.
Nikita Popov [Thu, 29 Oct 2020 19:34:13 +0000 (20:34 +0100)]
[CodeGen] Fix neutral value of vecreduce fadd in tests (NFC)
The neutral value is -0.0, not 0.0. This doesn't matter for "fast"
reductions due to nsz, but does matter for reassoc-only and seq
reductions.
Change tests to mostly use -0.0 where the neutral value was intended,
and add some additional test coverage in some places. Also update
LangRef to use the right value.
Christian Sigg [Thu, 29 Oct 2020 18:16:19 +0000 (19:16 +0100)]
[mlir][gpu] NFC: Change gpu.launch_func ops to custom format.
This should fix the reason for the failures after
ec7780ebdab480139596c3cb08ee77d7035457b3. I will roll forward in a separate change.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D90410
Tony [Wed, 28 Oct 2020 22:20:51 +0000 (22:20 +0000)]
[AMDGPU] Update AMD GPU documentation
- AMDGPUUsage.rst: Correct AMD GPU DWARF address space table address
sizes which are in bits and not bytes.
- clang/.../Options.td: Improve description of AMD GPU options.
- Re-generate ClangComamndLineReference.rst from clang/.../Options.td .
Differential Revision: https://reviews.llvm.org/D90364
Alex Orlov [Thu, 29 Oct 2020 20:11:16 +0000 (00:11 +0400)]
Added remotely ran compiler-rt tests.
Use LLVM/utils/remote-exec.py to run compiler-rt tests remotely on the target.
Reviewed By: vvereschaka
Differential Revision: https://reviews.llvm.org/D90054
Marcel Hlopko [Thu, 29 Oct 2020 20:01:28 +0000 (13:01 -0700)]
Remove HAVE_VCS_VERSION_INC, not needed
This preprocessor define was meant to be used to conditionally include VCSVersion.inc. However, the define was always set, and it was the content of the header that was conditionally generated. Therefore HAVE_VCS_VERSION_INC should be cleaned up.
Reviewed By: gribozavr2, MaskRay
Differential Revision: https://reviews.llvm.org/D84623
Nikita Popov [Thu, 29 Oct 2020 19:21:25 +0000 (20:21 +0100)]
[SDAG] Extract helper to get vecreduce base opcode (NFC)
Adhemerval Zanella [Thu, 29 Oct 2020 14:49:28 +0000 (14:49 +0000)]
[sanitizer] Disable ASLR for release_shadow_space
On aarch64 with kernel 4.12.13 the test sporadically fails with
RSS at start: 1564, after mmap: 103964, after mmap+set label: 308768, \
after fixed map: 206368, after another mmap+set label: 308768, after \
munmap: 206368
release_shadow_space.c.tmp: [...]/release_shadow_space.c:80: int \
main(int, char **): Assertion `after_fixed_mmap <= before + delta' failed.
It seems on some executions the memory is not fully released, even
after munmap. And it also seems that ASLR is hurting it by adding
some fragmentation, by disabling it I could not reproduce the issue
in multiple runs.
Peyton, Jonathan L [Thu, 29 Oct 2020 18:57:33 +0000 (13:57 -0500)]
[OpenMP] Add NULL check in dispatcher debug output
Patch by Nawrin Sultana
Differential Revision: https://reviews.llvm.org/D90403
Dávid Bolvanský [Thu, 29 Oct 2020 18:14:55 +0000 (19:14 +0100)]
[InferAttrs] Add nocapture/writeonly to string/mem libcalls
One step closer to fix PR47644.
Differential Revision: https://reviews.llvm.org/D89645
Paul-Antoine Arras [Thu, 29 Oct 2020 18:08:45 +0000 (11:08 -0700)]
[llvm-libtool-darwin] Add support for LLVM bitcode files
This diff adds support for LLVM bitcode objects to llvm-libtool-darwin.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D88722
Utkarsh Saxena [Fri, 23 Oct 2020 08:19:53 +0000 (10:19 +0200)]
[clangd] Add support for multiple DecisionForest model experiments.
With every incremental change, one needs to check-in new model upstream.
This also significantly increases the size of the git repo with every
new model.
Testing and comparing the old and previous model is also not possible as
we run only a single model at any point.
One solution is to have a "staging" decision forest which can be
injected into clangd without pushing it to upstream. Compare the
performance of the staging model with the live model. After a couple of
enhancements have been done to staging model, we can then replace the
live model upstream with the staging model. This reduces upstream churn
and also allows us to compare models with current baseline model.
This is done by having a callback in CodeCompleteOptions which is called
only when we want to use a decision forest ranking model. This allows us
to inject different completion model internally.
Differential Revision: https://reviews.llvm.org/D90014
Craig Topper [Thu, 29 Oct 2020 18:39:19 +0000 (11:39 -0700)]
[RISCV] Remove include of RISCVRegisterInfo.h from RISCVBaseInfo.h
RISCVRegisterInfo.h is part of the CodeGen layer. The Utils library
is intended to be shared with the MC layer so shouldn't use files
from the CodeGen layer.
The register enum names are already available from
RISCVMCTargetDesc.h. It appears what was coming from this include
was a transitive include of the Register class which I've replaced
with MCRegister. Register has a constructor from MCRegister so it
should be convertible.
Teresa Johnson [Thu, 29 Oct 2020 18:22:28 +0000 (11:22 -0700)]
[MemProf] Temporarily disable test failing on a couple bots
I finally see why this test is failing (on now 2 bots). Somehow the path
name is getting messed up, and the "linux" converted to "1". I suspect
there is something in the environment causing the macro expansion in the
test to get messed up:
http://lab.llvm.org:8011/#/builders/112/builds/555/steps/5/logs/FAIL__MemProfiler-x86_64-linux__log_path_test_cpp
http://lab.llvm.org:8011/#/builders/37/builds/275/steps/31/logs/stdio
On the avr bot:
-DPROFILE_NAME_VAR="/home/buildbot/llvm-avr-linux/llvm-avr-linux/stage1/projects/compiler-rt/test/memprof/X86_64LinuxConfig/TestCases/Output/log_path_test.cpp.tmp.log2"
after macros expansions becomes:
/home/buildbot/llvm-avr-1/llvm-avr-1/stage1/projects/compiler-rt/test/memprof/X86_64LinuxConfig/TestCases/Output/log_path_test.cpp.tmp.log2
Similar (s/linux/1/) on the other bot.
Disable it while I investigate
Sylvestre Ledru [Thu, 29 Oct 2020 16:56:53 +0000 (17:56 +0100)]
Add support of the next Ubuntu (Ubuntu 21.04 - Hirsute Hippo)
Thomas Lively [Thu, 29 Oct 2020 18:06:20 +0000 (11:06 -0700)]
[WebAssembly] Implement SIMD signselect instructions
As proposed in https://github.com/WebAssembly/simd/pull/124, using the opcodes
adopted by V8 in
https://chromium-review.googlesource.com/c/v8/v8/+/2486235/2/src/wasm/wasm-opcodes.h.
Uses new builtin functions and a new target intrinsic exclusively to ensure that
the new instructions are only emitted when a user explicitly opts in to using
them since they are still in the prototyping and evaluation phase.
Differential Revision: https://reviews.llvm.org/D90357
Louis Dionne [Thu, 29 Oct 2020 17:04:41 +0000 (13:04 -0400)]
[libc++] Minor cleanup in the test suite
Jody Sankey [Thu, 29 Oct 2020 17:51:01 +0000 (10:51 -0700)]
[sanitizer][fuchsia] Avoid deprecated syscall.
The zx_clock_get syscall on Fuchsia is deprecated - ref
https://fuchsia.dev/fuchsia-src/reference/syscalls/clock_get
This changes to the recommended replacement; calling zx_clock_read on
the userspace UTC clock.
Reviewed By: mcgrathr, phosek
Differential Revision: https://reviews.llvm.org/D90169
Roland McGrath [Wed, 28 Oct 2020 01:30:25 +0000 (18:30 -0700)]
[Support] Make Support/SwapByteOrder.h compile on Fuchsia
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D90279
Jay Foad [Wed, 28 Oct 2020 13:06:44 +0000 (13:06 +0000)]
[AMDGPU] Fix double space in disassembly of ds_gws_sema_* with gds
By setting up the AsmStrings correctly we can remove some special cases
from AMDGPUInstPrinter::printOffset.
Differential Revision: https://reviews.llvm.org/D90307
Mehdi Amini [Thu, 29 Oct 2020 17:30:27 +0000 (17:30 +0000)]
Revert "[mlir][gpu] Allow gpu.launch_func to be async."
This reverts commit
ec7780ebdab480139596c3cb08ee77d7035457b3.
One of the bot is crashing in a test related to this change.
Teresa Johnson [Thu, 29 Oct 2020 16:40:22 +0000 (09:40 -0700)]
[MemProf] Augment test to debug avr bot failure
After
81f7b96ed0a2295e0b82ca185019370ac8e1895e, I can see that the
reason this test is failing on llvm-avr-linux is that it doesn't think
the directory exists (error comes during file open for write command).
Not sure why since this is the main test Output directory and we created
a different file there earlier in the test from the same file open
invocation. Print directory contents in an attempt to debug.
Jan Kratochvil [Thu, 29 Oct 2020 16:54:43 +0000 (17:54 +0100)]
[nfc] [lldb] Remove excessive parentheses in SymbolFileDWARF::GetUID
Mircea Trofin [Thu, 29 Oct 2020 03:16:51 +0000 (20:16 -0700)]
[ThinLTO] Fix empty .llvmcmd sections
When passing -lto-embed-bitcode=post-merge-pre-opt, we were getting
empty .llvmcmd sections. It turns out that is because the
CodeGenOptions::CmdArgs field was only populated when clang saw
-fembed-bitcode={all|marker}.
This patch always populates the CodeGenOptions::CmdArgs. The overhead
of carrying through in memory in all cases is likely negligible in
the grand schema of things, and it keeps the using code simple.
Differential Revision: https://reviews.llvm.org/D90366
Christian Sigg [Thu, 22 Oct 2020 05:49:50 +0000 (07:49 +0200)]
[mlir][gpu] Allow gpu.launch_func to be async.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D89324
Simon Pilgrim [Thu, 29 Oct 2020 16:27:04 +0000 (16:27 +0000)]
[X86] Add PR46393 test case
Jon Chesterfield [Thu, 29 Oct 2020 16:24:53 +0000 (16:24 +0000)]
[AMDGPU] Add __builtin_amdgcn_grid_size
[AMDGPU] Add __builtin_amdgcn_grid_size
Similar to D76772, loads the data from the dispatch pointer. Marked invariant.
Patch also updates the openmp devicertl to use this builtin.
Reviewed By: yaxunl
Differential Revision: https://reviews.llvm.org/D90251
Sanjay Patel [Thu, 29 Oct 2020 16:12:25 +0000 (12:12 -0400)]
[x86] add test for umul intrinsic costs; NFC
Fangrui Song [Thu, 29 Oct 2020 16:03:13 +0000 (09:03 -0700)]
[MC] Error for .globl/.local which change the symbol binding and warn for .weak
GNU as let .weak override .globl since binutils-gdb
5ca547dc2399a0a5d9f20626d4bf5547c3ccfddd (1996) while MC lets the last
directive win (PR38921).
This caused an issue to Linux's powerpc port which has been fixed by
http://git.kernel.org/linus/
968339fad422a58312f67718691b717dac45c399
Binding overriding is error-prone. This patch disallows a changed binding.
(https://sourceware.org/pipermail/binutils/2020-March/000299.html )
Our behavior regarding `.globl x; .weak x` matches GNU as. Such usage is
still suspicious but we issue a warning for now. We may upgrade it to an
error in the future.
Reviewed By: jhenderson, nickdesaulniers
Differential Revision: https://reviews.llvm.org/D90108
Jay Foad [Thu, 29 Oct 2020 12:10:56 +0000 (12:10 +0000)]
[AMDGPU] Use pseudo instructions for readlane/writelane
This reverts r227987 "R600/SI: Determine target-specific encoding of READLANE and WRITELANE early v2".
All the codegen changes are caused by the post-RA scheduler no longer
treating readlane/writelane as scheduling barriers due to having
unmodelled side effects. (The pseudos are hasSideEffects = 0, but the
real instructions are hasSideEffects = ? which TableGen conservatively
treats as 1.)
Differential Revision: https://reviews.llvm.org/D90401
Teresa Johnson [Sun, 25 Oct 2020 05:32:03 +0000 (22:32 -0700)]
[sanitizer] Print errno for report file open failure
To help debug failures, specifically the llvm-avr-linux bot failure from
5c20d7db9f2791367b9311130eb44afecb16829c:
http://lab.llvm.org:8011/#/builders/112/builds/407/steps/5/logs/FAIL__MemProfiler-x86_64-linux-dynamic__log_path_t
Also re-enable the failing test which I temporarily disabled, to
see if this change will help identify why that particular log file can't
be opened for write on that bot (when another log file in the same
directory could earlier in the test).
Differential Revision: https://reviews.llvm.org/D90120
Scott Linder [Thu, 29 Oct 2020 15:22:15 +0000 (15:22 +0000)]
[NFC] Add more tests for DISubprogram verifier
Minimum amount of tests to cover (most) of the DISubprogram verifier
checks.
Reviewed By: vsk
Differential Revision: https://reviews.llvm.org/D90340
Change-Id: Icd25dac64f87f6dcf67ff3443eb4f95af18d05a8
Simon Pilgrim [Thu, 29 Oct 2020 14:30:42 +0000 (14:30 +0000)]
[InstCombine] visitShl - ensure inner shifts have inrange amounts
Noticed when fixing OSS Fuzz #26716
Nicolas Vasilache [Thu, 29 Oct 2020 14:02:56 +0000 (14:02 +0000)]
[mlir][Linalg] Make Linalg fusion a test pass
Linalg "tile-and-fuse" is currently exposed as a Linalg pass "-linalg-fusion" but only the mechanics of the transformation are currently relevant.
Instead turn it into a "-test-linalg-greedy-fusion" pass which performs canonicalizations to enable more fusions to compose.
This allows dropping the OperationFolder which is not meant to be used with the pattern rewrite infrastructure.
Differential Revision: https://reviews.llvm.org/D90394
Nicholas Guy [Thu, 29 Oct 2020 13:58:39 +0000 (13:58 +0000)]
[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz
Fixes a regression caused by D82439, in which IT blocks were no longer being generated when -Oz is present.
Differential Revision: https://reviews.llvm.org/D88496
Nicholas Guy [Thu, 29 Oct 2020 13:56:52 +0000 (13:56 +0000)]
[ARM] Add IT block generation test
D88496 introduces some new behaviour to IT block generation,
behaviour which is not covered by the current unit tests.
This adds one to cover it
Differential Revision: https://reviews.llvm.org/D90398
Kazushi (Jam) Marukawa [Thu, 29 Oct 2020 12:17:37 +0000 (21:17 +0900)]
[VE] Change to use integrated assembly by defualt
We've implemented integrated assembler. Now, we change to use
integrated assembler by default. Update a regression test also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90396
Louis Dionne [Thu, 29 Oct 2020 15:07:39 +0000 (11:07 -0400)]
[libc++] Remove additional uses of std::rand() missed by
63aeadb4849d
Jay Foad [Thu, 29 Oct 2020 10:20:54 +0000 (10:20 +0000)]
[AMDGPU] Remove gds operand from ds_gws_* MachineInstrs
The operand value was always 1 (except in some bad MIR tests) so it was
redundant.
Differential Revision: https://reviews.llvm.org/D90378
Jay Foad [Thu, 29 Oct 2020 09:39:28 +0000 (09:39 +0000)]
[AMDGPU] Fix double space in disassembly of s_set_gpr_idx_mode
Differential Revision: https://reviews.llvm.org/D90374
Jay Foad [Wed, 28 Oct 2020 16:59:29 +0000 (16:59 +0000)]
[AMDGPU] Fix double space in disassembly of some DPP instructions
Differential Revision: https://reviews.llvm.org/D90373
Frederik Gossen [Thu, 29 Oct 2020 13:48:07 +0000 (13:48 +0000)]
[MLIR] Support walks over regions and blocks
Add specializations for `walk` to allow traversal of regions and blocks.
Differential Revision: https://reviews.llvm.org/D90379
David Sherwood [Mon, 26 Oct 2020 15:12:58 +0000 (15:12 +0000)]
[SVE] Remove TypeSize comparison operators
All known instances in the code where we relied upon the TypeSize
comparison operators have now been changed to either use scalar
interger comparisons or one of the TypeSize::isKnownXY functions.
It is now safe to remove the comparison operators.
Differential Revision: https://reviews.llvm.org/D90160
Kazushi (Jam) Marukawa [Thu, 29 Oct 2020 11:57:00 +0000 (20:57 +0900)]
[VE] Add missing BCR format
Add missing "BCR %sy, 0, target" format instruction and a regression
test for this format.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90387
Nico Weber [Thu, 29 Oct 2020 14:29:53 +0000 (10:29 -0400)]
Revert "clang-format: Add a consumer to diagnostics engine"
This reverts commit
df00267f1fdb0b098dc42f1caa8a59b29c8e0e5f.
clang-format should not depend on Frontend, see comment on
https://reviews.llvm.org/D90121.
Kazushi (Jam) Marukawa [Thu, 29 Oct 2020 12:01:16 +0000 (21:01 +0900)]
[VE] Add missing symbolic branch patterns
Add missing symbolic branch patterns to a regression test.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90388
Kazushi (Jam) Marukawa [Thu, 29 Oct 2020 11:38:04 +0000 (20:38 +0900)]
[VE] Support register aliases in llvm-mc
Support register aliases in MC layer to compile existing assembly
files with clang and integrated assembler.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90383
Valentin Clement [Thu, 29 Oct 2020 13:54:31 +0000 (09:54 -0400)]
[mlir][openacc] Add if and device_type to update op
Update op is modelling the update directive (2.14.4) from the OpenACC specs.
An if condition and a device_type list can be attached to the directive. This patch add
these two information to the current op.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D90310
Valentin Clement [Thu, 29 Oct 2020 13:53:10 +0000 (09:53 -0400)]
[flang][openacc] Enforce no modifier on enter data and exit data clauses
Enter data can have the copyin clause and exit data can have the copyout clause.
Both clauses support modifier with other directive but for these two directives no modifier
are supported. This semantic check enforce this rule.
Reviewed By: kiranktp
Differential Revision: https://reviews.llvm.org/D90280
Marek Kurdej [Thu, 29 Oct 2020 13:39:09 +0000 (14:39 +0100)]
[libcxx] [docs] [NFC] Fix typo.
Daniel Kiss [Thu, 29 Oct 2020 13:03:30 +0000 (14:03 +0100)]
[libcxx] Add targets to available features.
This patch add the target-* (x86_64-*) as used elsewhere in llvm.
Reviewed By: #libc, #libc_abi, ldionne
Differential Revision: https://reviews.llvm.org/D88027
Daniel Kiss [Thu, 29 Oct 2020 13:00:40 +0000 (14:00 +0100)]
[libunwind] Fix linker flag handling in the tests.
--export-dynamic is not always available on all targets.
-funwind-tables was a duplicate in the lit.site.cfg.in.
Reviewed By: ldionne
Differential Revision: https://reviews.llvm.org/D90202
Pavel Labath [Wed, 28 Oct 2020 13:59:14 +0000 (14:59 +0100)]
[lldb] Use reverse connection method for lldb-server tests
This fixes an flakyness is all gdb-remote tests. These tests have been
(mildly) flaky since we started using "localhost" instead of 127.0.0.1
in the test suite. The reason is that lldb-server needs to create two
sockets (v4 and v6) to listen for localhost connections. The algorithm
it uses first tries to select a random port (bind(localhost:0)) for the
first address, and then bind the same port for the second one.
The creating of the second socket can fail as there's no guarantee that
port will be available -- it seems that the (linux) kernel tries to
choose an unused port for the first socket (I've had to create thousands
of sockets to reproduce this reliably), but this can apparantly fail
when the system is under load (and our test suite creates a _lot_ of
sockets).
The socket creationg operation is considered successful if it creates at
least one socket is created, but the test harness has no way of knowing
which one it is, so it can end up connecting to the wrong address.
I'm not aware of a way to atomically create two sockets bound to the
same port. One way to fix this would be to make lldb-server report the
address is it listening on instead of just the port. However, this would
be a breaking change and it's not clear to me that's worth it (the
algorithm works pretty well under normal circumstances).
Instead, this patch sidesteps that problem by using "reverse"
connections. This way, the test harness is responsible for creating the
listening socket so it can pass the address that it has managed to open.
It also results in much simpler code overall.
To preserve test coverage for the named pipe method, I've moved the
relevant code to a dedicated test. To avoid original problem, this test
passes raw addresses (as obtained by getaddrinfo(localhost)) instead of
"localhost".
Differential Revision: https://reviews.llvm.org/D90313
Georgii Rymar [Tue, 27 Oct 2020 09:15:09 +0000 (12:15 +0300)]
[llvm-readobj/elf] - Fix a crash when dumping a dynamic relocation that refer to a symbol past the EOF.
There is a possible scenario when we crash when dumping dynamic relocations.
For that we should have no section headers (to take the number of synamic symbols from)
and a dynamic relocation that refers to a symbol with an index that is too large to be in a file.
The patch fixes it.
Differential revision: https://reviews.llvm.org/D90214
Alok Kumar Sharma [Thu, 29 Oct 2020 12:11:44 +0000 (17:41 +0530)]
[DebugInfo] [NFCI] Additional test for support of DW_TAG_generic_subrange
As suggested by dstenb, additional test is added to check emission of DW_OP_consts.
Differential Revision: https://reviews.llvm.org/D89218
Clement Courbet [Thu, 29 Oct 2020 10:48:43 +0000 (11:48 +0100)]
[llvm-exegesis] Do not try to assign random registers twice.
Doing a random assignment assigns both tested (forward) and back-to-back
(backward) instructions.
When none of the tested instruction and back-to-back instruction have
implicit aliasing, we're currently trying to do a random register
asignment twice.
Fix this (see PR26418).
Differential Revision: https://reviews.llvm.org/D90380
Adam Balogh [Thu, 15 Oct 2020 13:07:48 +0000 (15:07 +0200)]
[ADT] Fix for ImmutableMapRef
The `Root` member of `ImmutableMapRef` was changed recently from a plain
pointer to `IntrusiveRefCntPtr`. However, the `Profile` member function
was not adjusted. This results in comilation error whenever the
`Profile` method is used on an `ImmutableMapRef`. This patch fixes this
issue and also adds unit tests for `ImmutableMapRef`.
Differential Revision: https://reviews.llvm.org/D89486
Georgii Rymar [Thu, 29 Oct 2020 08:55:00 +0000 (11:55 +0300)]
[yaml2obj][test] - Merge strtab-implicit-sections-*.yaml into strtab-implicit-sections.yaml and improve testing of .shstrtab
This creates `strtab-implicit-sections.yaml` and merges 2 `strtab-implicit-sections*` tests into it.
I've also added a few tests for `.shstrtab` section related to section flags.
With that we have a single place where we can test implicit string table sections and
the `.shstrtab` section in particular.
Differential revision: https://reviews.llvm.org/D90372
Simon Pilgrim [Wed, 28 Oct 2020 16:17:45 +0000 (16:17 +0000)]
[InstCombine] Add select+funnel-shift test patterns
dfukalov [Tue, 27 Oct 2020 15:17:38 +0000 (18:17 +0300)]
[MIR] Fix out of bounds access in MIRPrinter.
Fixes: SWDEV-256460
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D90239
Max Kazantsev [Thu, 29 Oct 2020 11:09:31 +0000 (18:09 +0700)]
[NFC][SCEV] Use generic predicate checkers to simplify code
Jay Foad [Thu, 29 Oct 2020 10:55:16 +0000 (10:55 +0000)]
[AMDGPU] Simplify insertNoops functions. NFC.
Alok Kumar Sharma [Thu, 29 Oct 2020 10:38:51 +0000 (16:08 +0530)]
[DebugInfo] [NFCI] Adding a missed out line in support for DW_TAG_generic_subrange.
This commit adds a missed out line in earlier commit for DW_TAG_generic_subrange.
Previous commit ID:
a6dd01afa3d5902203d04a72e0b478078f796a35
Differential Revision: https://reviews.llvm.org/D89218
Thanks markus for pointing this out.
Florian Hahn [Thu, 29 Oct 2020 09:30:37 +0000 (09:30 +0000)]
[SCEV] Match 'zext (trunc A to iB) to iY' as URem.
URem operations with constant power-of-2 second operands are modeled as
such. This patch on its own has very little impact (e.g. no changes in
CodeGen for MultiSource/SPEC2000/SPEC2006 on X86 -O3 -flto), but I'll
soon post follow-up patches that make use of it to more accurately
determine the trip multiple.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D89821
Max Kazantsev [Thu, 29 Oct 2020 10:34:58 +0000 (17:34 +0700)]
[NFC] Add some new util functions to ICmpInst
Tres Popp [Thu, 29 Oct 2020 10:01:05 +0000 (11:01 +0100)]
[mlir] Reorder shape assuming bufferization.
The previous ordering continued to use the original assuming after
replacing it which is not allowed. Now, inline the region from the old
into the new before the replacement.
Differential Revision: https://reviews.llvm.org/D90375
Georgii Rymar [Wed, 28 Oct 2020 12:05:35 +0000 (15:05 +0300)]
[yaml2obj][test] - Merge dynsymtab-shlink.yaml to dynsym-section.yaml
This simplifies the dynsymtab-shlink.yaml test (with use of macros)
and merges it into the dynsym-section.yaml test.
Differential revision: https://reviews.llvm.org/D90301
Krasimir Georgiev [Thu, 29 Oct 2020 10:27:54 +0000 (11:27 +0100)]
clang-format: Add a consumer to diagnostics engine
Contributed by dmikis (Kirill Dmitrenko)!
Otherwise problems like trying to format readonly file in-place led to crashes.
I've added reviewers by looking at `git blame` and other reviews to the changed file, so may have missed someone.
Reviewed By: krasimir
Differential Revision: https://reviews.llvm.org/D90121
Kazushi (Jam) Marukawa [Wed, 28 Oct 2020 11:13:45 +0000 (20:13 +0900)]
[VE] Add missing vector regression test
I forgot to add a regression test for VMAXX instruction when I added
it. So, I'm adding it now.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90356
Kazushi (Jam) Marukawa [Wed, 28 Oct 2020 11:11:40 +0000 (20:11 +0900)]
[VE] Add vector control instructions
Add LVL/SVL/SMVL/LVIX isntructions. Add regression tests too.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90355
David Spickett [Tue, 27 Oct 2020 11:55:27 +0000 (11:55 +0000)]
[lldb] Correct --help output for qemu rootfs script
It was printing "Usage:" twice.
Reviewed By: omjavaid
Differential Revision: https://reviews.llvm.org/D90225
David Zarzycki [Thu, 29 Oct 2020 09:53:47 +0000 (05:53 -0400)]
[lldb] Unbreak the build after a recent PowerPC change
40dd4d5233d9f81705a24d91b48d2620e487b89d introduced two new types.
Max Kazantsev [Thu, 29 Oct 2020 09:29:45 +0000 (16:29 +0700)]
[SCEV][NFC] Use general predicate checkers in monotonicity check
This makes the code more compact and readable.
Georgii Rymar [Wed, 28 Oct 2020 10:34:28 +0000 (13:34 +0300)]
[yaml2obj] - Improve handling of SectionHeaderTable::NoHeaders flag.
When `NoHeaders` is set, we still have following issues:
1) We emit the `.shstrtab` implicit section of size 1 (empty string table).
2) We still align the start of the section header table, what affects the output size.
3) We still write section header table bytes.
This patch fixes all of these issues.
Differential revision: https://reviews.llvm.org/D90295
David Green [Thu, 29 Oct 2020 09:13:23 +0000 (09:13 +0000)]
[InterleaveAccess] Recognise Interleave loads through binary operations
Instcombine will currently sink identical shuffles though vector binary
operations. This is probably generally useful, but can break up the code
pattern we use to represent an interleaving load group. This patch
reverses that in the InterleaveAccessPass to re-recognise the pattern of
shuffles sunk past binary operations and folds them back if an
interleave group can be created.
Differential Revision: https://reviews.llvm.org/D89489
Sam McCall [Tue, 27 Oct 2020 09:58:34 +0000 (10:58 +0100)]
[CMake] Support inter-proto dependencies in generate_protos.
Differential Revision: https://reviews.llvm.org/D90215
Max Kazantsev [Thu, 29 Oct 2020 08:27:21 +0000 (15:27 +0700)]
[NFC][SCEV] Refactor monotonic predicate checks to return enums instead of bools
This patch gets rid of output parameter which is not needed for most users
and prepares this API for further refactoring.
Sam McCall [Fri, 9 Oct 2020 13:17:26 +0000 (15:17 +0200)]
[clangd] Support CodeActionParams.only
Differential Revision: https://reviews.llvm.org/D89126
Vitaly Buka [Thu, 29 Oct 2020 08:09:39 +0000 (01:09 -0700)]
Revert "[NFC][TSAN] Logs to debug test script on bot"
Done with debugging. Script didn't work because of low limit on open
files on the bot.
This reverts commit
220293da53b5049ded67b1a251bd85069fa068e7.
Christian Sigg [Thu, 29 Oct 2020 07:17:27 +0000 (08:17 +0100)]
[mlir][gpu] Fix leaked stream and module when lowering gpu.launch_func to runtime calls.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D90370
Georgii Rymar [Wed, 28 Oct 2020 15:11:28 +0000 (18:11 +0300)]
[llvm-objdump][test] - Stop using precompiled binary in MachO/disassemble-g-dsym.test
This removes Inputs/libbogus11.a
Initially I've removed it in D90013, but had to restore it, because BB found this
test is using it.
I've updated the test to use YAMLs, added comment and one more possible error check.
Differential revision: https://reviews.llvm.org/D90312
Cameron Finucane [Thu, 29 Oct 2020 06:47:38 +0000 (23:47 -0700)]
[libFuzzer] Remove InterruptHandler from Fuchsia implementation
As implemented, the `InterruptHandler` thread was spinning trying to
`select()` on a null "stdin", wasting a significant amount of CPU for no
benefit. As Fuchsia does not have a native concept of stdin (or POSIX
signals), this commit simply removes this feature entirely.
Reviewed By: aarongreen
Differential Revision: https://reviews.llvm.org/D89266
Fangrui Song [Thu, 29 Oct 2020 06:58:31 +0000 (23:58 -0700)]
[Reassociate][test] Delete improper -NOT patterns to work with -enable-new-pm=1
The two tests rely on LegacyInlinerBase::doFinalization to remove
Function::isDefTriviallyDead() functions. The new PM does not have the behavior.
The -NEXT patterns checking the emptiness are actually sufficient.
Note, reassociate-deadinst.ll has become stale - it no longer catches
the problem r285380 intended. Unfortunately it is difficult to craft a
new test because it is actually pretty difficult to break it with
`MadeChange = true;` all over the file.
Serge Pavlov [Fri, 23 Oct 2020 11:36:16 +0000 (18:36 +0700)]
[FPEnv] Tests for rounding properties of constant evalution
These are moved from D88498.
Differential Revision: https://reviews.llvm.org/D90026
Fangrui Song [Thu, 29 Oct 2020 05:58:20 +0000 (22:58 -0700)]
[opt] Pin -stats-json & -opt-bisect-limit tests to -enable-new-pm=0
-stats-json requires `TimeReagion PassTimer(getPassTimer(...))` in the legacy
PM. The loss of functionality is not critical because we have the similar -time-passes.
Johannes Doerfert [Thu, 29 Oct 2020 05:38:40 +0000 (00:38 -0500)]
[Attributor][NFC] Rerun update test script