Martin Storsjö [Sat, 10 Oct 2020 11:33:10 +0000 (14:33 +0300)]
[lldb] [Windows] Remove unused functions. NFC.
These became unused in
51117e3c51754f3732e.
Martin Storsjö [Sat, 10 Oct 2020 11:26:32 +0000 (14:26 +0300)]
[lldb] [Windows] Add missing 'override', silencing warnings. NFC.
Also remove superfluous 'virtual' in overridden methods.
Simon Pilgrim [Sat, 10 Oct 2020 17:18:57 +0000 (18:18 +0100)]
[PowerPC] Add ppc32 funnel shift test coverage
Simon Pilgrim [Sat, 10 Oct 2020 15:28:59 +0000 (16:28 +0100)]
[InstCombine] Add test case showing rotate intrinsic being split by SimplifyDemandedBits
Noticed while triaging regression report on D88834
Michał Górny [Sat, 10 Oct 2020 16:54:52 +0000 (18:54 +0200)]
[lldb] [Process/FreeBSDRemote] Fix double semicolon
Michał Górny [Sat, 10 Oct 2020 07:36:57 +0000 (09:36 +0200)]
[lldb] [Process/FreeBSDRemote] Kill process via PT_KILL
Use PT_KILL to kill the stopped process. This ensures that the process
termination is reported properly and fixes delay/error on killing it.
Differential Revision: https://reviews.llvm.org/D89182
Michał Górny [Sat, 10 Oct 2020 07:23:15 +0000 (09:23 +0200)]
[lldb] [Process/FreeBSD] Mark methods override in RegisterContext*
Differential Revision: https://reviews.llvm.org/D89181
Philip Reames [Sat, 10 Oct 2020 16:48:02 +0000 (09:48 -0700)]
Step down from security group
Resigning from security group as Azul representative as I have left Azul. Previously communicated via email with security group.
Differential Revision: https://reviews.llvm.org/D88933
Tim Renouf [Tue, 6 Oct 2020 17:23:59 +0000 (18:23 +0100)]
[AMDGPU] Add gfx602, gfx705, gfx805 targets
At AMD, in an internal audit of our code, we found some corner cases
where we were not quite differentiating targets enough for some old
hardware. This commit is part of fixing that by adding three new
targets:
* The "Oland" and "Hainan" variants of gfx601 are now split out into
gfx602. LLPC (in the GPUOpen driver) and other front-ends could use
that to avoid using the shaderZExport workaround on gfx602.
* One variant of gfx703 is now split out into gfx705. LLPC and other
front-ends could use that to avoid using the
shaderSpiCsRegAllocFragmentation workaround on gfx705.
* The "TongaPro" variant of gfx802 is now split out into gfx805.
TongaPro has a faster 64-bit shift than its former friends in gfx802,
and a subtarget feature could be set up for that to take advantage of
it. This commit does not make that change; it just adds the target.
V2: Add clang changes. Put TargetParser list in order.
V3: AMDGCNGPUs table in TargetParser.cpp needs to be in GPUKind order,
so fix the GPUKind order.
Differential Revision: https://reviews.llvm.org/D88916
Change-Id: Ia901a7157eb2f73ccd9f25dbacec38427312377d
Florian Hahn [Sat, 10 Oct 2020 15:39:48 +0000 (16:39 +0100)]
[SCEV] Add test cases where the max BTC is imprecise, due to step != 1.
Add a test case where we fail to compute a tight max backedge taken
count, due to the step being != 1.
This is part of the issue with PR40961.
Florian Hahn [Sat, 10 Oct 2020 15:20:37 +0000 (16:20 +0100)]
[SCEV] Handle ULE in applyLoopGuards.
Handle ULE predicate in similar fashion to ULT predicate in
applyLoopGuards.
Florian Hahn [Sat, 10 Oct 2020 11:26:01 +0000 (12:26 +0100)]
[SCEV] Add a test case with ULE loop guard.
Nikita Popov [Sat, 10 Oct 2020 14:09:15 +0000 (16:09 +0200)]
[MemCpyOpt] Add test for incorrect memset DSE (NFC)
We can't shorten the memset if there's a throwing call in between
and the destination is non-local.
David Green [Sat, 10 Oct 2020 13:50:25 +0000 (14:50 +0100)]
[ARM] Attempt to make Tail predication / RDA more resilient to empty blocks
There are a number of places in RDA where we assume the block will not
be empty. This isn't necessarily true for tail predicated loops where we
have removed instructions. This attempt to make the pass more resilient
to empty blocks, not casting pointers to machine instructions where they
would be invalid.
The test contains a case that was previously failing, but recently been
hidden on trunk. It contains an empty block to begin with to show a
similar error.
Differential Revision: https://reviews.llvm.org/D88926
Alok Kumar Sharma [Sat, 10 Oct 2020 12:18:35 +0000 (17:48 +0530)]
[DebugInfo] Support for DWARF attribute DW_AT_rank
This patch adds support for DWARF attribute DW_AT_rank.
Summary:
Fortran assumed rank arrays have dynamic rank. DWARF attribute
DW_AT_rank is needed to support that.
Testing:
unit test cases added (hand-written)
check llvm
check debug-info
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D89141
Benjamin Kramer [Sat, 10 Oct 2020 12:13:42 +0000 (14:13 +0200)]
[clangd] Map bits/stdint-intn.h and bits/stdint-uintn.h to cstdint.
These are private glibc headers containing parts of the implementation
of stdint.h.
David Green [Sat, 10 Oct 2020 09:15:43 +0000 (10:15 +0100)]
[AArch64][LV] Move vectorizer test to Transforms/LoopVectorize/AArch64. NFC
David Green [Sat, 10 Oct 2020 09:04:28 +0000 (10:04 +0100)]
[TblGen][Scheduling] Fix debug output. NFC
This just moves some newlines to the expected places.
Tatiana Shpeisman [Sat, 10 Oct 2020 08:45:05 +0000 (14:15 +0530)]
[mlir][scf] Fix a bug in scf::ForOp loop unroll with an epilogue
Fixes a bug in formation and simplification of an epilogue loop generated
during loop unroll of scf::ForOp (https://bugs.llvm.org/show_bug.cgi?id=46689)
Differential Revision: https://reviews.llvm.org/D87583
Nikita Popov [Fri, 9 Oct 2020 19:09:16 +0000 (21:09 +0200)]
[MemCpyOpt] Don't hoist store that's not guaranteed to execute
MemCpyOpt can hoist stores while load+store pairs into memcpy.
This hoisting can currently result in stores being executed that
weren't guaranteed to execute in the original problem.
Differential Revision: https://reviews.llvm.org/D89154
Denis Antrushin [Wed, 7 Oct 2020 18:32:50 +0000 (01:32 +0700)]
[Statepoints] Allow deopt GC pointer on VReg if gc-live bundle is empty.
Currently we allow passing pointers from deopt bundle on VReg only if
they were seen in list of gc-live pointers passed on VRegs.
This means that for the case of empty gc-live bundle we spill deopt
bundle's pointers. This change allows lowering deopt pointers to VRegs
in case of empty gc-live bundle. In case of non-empty gc-live bundle,
behavior does not change.
Reviewed By: skatkov
Differential Revision: https://reviews.llvm.org/D88999
Zi Xuan Wu [Tue, 29 Sep 2020 04:31:36 +0000 (12:31 +0800)]
[CSKY 1/n] Add basic stub or infra of csky backend
This patch introduce files that just enough for lib/Target/CSKY to compile.
Notably a basic CSKYTargetMachine and CSKYTargetInfo.
Differential Revision: https://reviews.llvm.org/D88466
Fangrui Song [Sat, 10 Oct 2020 01:28:31 +0000 (18:28 -0700)]
[PowerPC] Fix signed overflow in decomposeMulByConstant after D88201
Caught by multipliers LONG_MAX (after +1) and LONG_MIN (after -1) in CodeGen/PowerPC/mul-const-i64.ll
Xiang1 Zhang [Sat, 10 Oct 2020 00:59:27 +0000 (08:59 +0800)]
[X86] Add CET test, NFC
Valentin Clement [Sat, 10 Oct 2020 01:02:29 +0000 (21:02 -0400)]
[mlir][openacc] Introduce acc.exit_data operation
This patch introduces the acc.exit_data operation that represents an OpenACC Exit Data directive.
Operands and attributes are derived from clauses in the spec 2.6.6.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D88969
Sean Silva [Sat, 10 Oct 2020 00:31:42 +0000 (17:31 -0700)]
[mlir] Rename BufferPlacement.h to Bufferize.h
Context: https://llvm.discourse.group/t/what-is-the-strategy-for-tensor-memref-conversion-bufferization/1938/14
Differential Revision: https://reviews.llvm.org/D89174
Walter Erquinigo [Sat, 3 Oct 2020 19:23:12 +0000 (12:23 -0700)]
[intel pt] Refactor parsing
With the feedback I was getting in different diffs, I realized that splitting the parsing logic into two classes was not easy to deal with. I do see value in doing that, but I'd rather leave that as a refactor after most of the intel-pt logic is in place. Thus, I'm merging the common parser into the intel pt one, having thus only one that is fully aware of Intel PT during parsing and object creation.
Besides, based on the feedback in https://reviews.llvm.org/D88769, I'm creating a ThreadIntelPT class that will be able to orchestrate decoding of its own trace and can handle the stop events correctly.
This leaves the TraceIntelPT class as an initialization class that glues together different components. Right now it can initialize a trace session from a json file, and in the future will be able to initialize a trace session from a live process.
Besides, I'm renaming SettingsParser to SessionParser, which I think is a better name, as the json object represents a trace session of possibly many processes.
With the current set of targets, we have the following
- Trace: main interface for dealing with trace sessions
- TraceIntelPT: plugin Trace for dealing with intel pt sessions
- TraceIntelPTSessionParser: a parser of a json trace session file that can create a corresponding TraceIntelPT instance along with Targets, ProcessTraces (to be created in https://reviews.llvm.org/D88769), and ThreadIntelPT threads.
- ProcessTrace: (to be created in https://reviews.llvm.org/D88769) can handle the correct state of the traces as the user traverses the trace. I don't think there'll be a need an intel-pt specific implementation of this class.
- ThreadIntelPT: a thread implementation that can handle the decoding of its own trace file, along with keeping track of the current position the user is looking at when doing reverse debugging.
Differential Revision: https://reviews.llvm.org/D88841
Aart Bik [Fri, 9 Oct 2020 23:56:11 +0000 (16:56 -0700)]
[mlir] [standard] fixed typo in comment
There is an atomic_rmw and a generic_atomic_rmw operation.
The doc of the latter incorrectly referred to former though.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D89172
Fangrui Song [Fri, 9 Oct 2020 23:38:12 +0000 (16:38 -0700)]
[bugpoint] Delete -safe-llc and make -run-llc work like -run-llc -safe-run-llc
Stella Stamenova [Fri, 9 Oct 2020 23:27:50 +0000 (16:27 -0700)]
[mlir, win] Mark several MLRI tests as unsupported on system-windows
They are currently marked as unsupported when windows is part of the triple, but they actually fail when they are run on Windows, so they are unsupported on system-windows
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D89169
Changpeng Fang [Fri, 9 Oct 2020 23:20:26 +0000 (16:20 -0700)]
Sink: Handle instruction sink when a user is dead
Summary:
The current instruction sink pass uses findNearestCommonDominator of all users to find block to sink the instruction to.
However, a user may be in a dead block, which will result in unexpected behavior.
This patch handles such cases by skipping dead blocks. This patch fixes:
https://bugs.llvm.org/show_bug.cgi?id=47415
Reviewers:
MaskRay, arsenm
Differential Revision:
https://reviews.llvm.org/D89166
Joao Moreira [Fri, 9 Oct 2020 22:25:24 +0000 (15:25 -0700)]
[X86] Check if call is indirect before emitting NT_CALL
The notrack prefix is a relaxation of CET policies which makes it possible to indirectly call targets which do not have an ENDBR instruction in the landing address. To emit a call with this prefix, the special attribute "nocf_check" is used. When used as a function attribute, a CallInst targeting the respective function will return true for the method "doesNoCfCheck()", no matter if it is a direct call (and such should remain like this, as the information that the to-be-called function won't perform control-flow checks is useful in other contexts). Yet, when emitting an X86ISD::NT_CALL, the respective CallInst should be verified for its indirection, allowing that the prefixed calls are only emitted in the right situations.
Update the respective testing unit to also verify for direct calls to functions with ''nocf_check'' attributes.
The bug can also be reproduced through compiling the following C code using the -fcf-protection=full flag.
int __attribute__((nocf_check)) foo(int a) {};
int main() {
foo(42);
}
Differential Revision: https://reviews.llvm.org/D87320
Fangrui Song [Fri, 9 Oct 2020 21:51:45 +0000 (14:51 -0700)]
[X86][test] Add a regression test for lock cmpxchg16b on a global variable with offset
Add a test for a bug (uncovered by D88808) fixed by
f34bb06935aa3bab353d70d515b767fdd2f5625c.
Also delete cmpxchg16b.ll which is covered by atomic128.ll
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D89163
Eli Friedman [Thu, 8 Oct 2020 23:04:28 +0000 (16:04 -0700)]
[SCCP] Reduce the number of times ResolvedUndefsIn is called for large modules.
If a module has many values that need to be resolved by
ResolvedUndefsIn, compilation takes quadratic time overall. Solve should
do a small amount of work, since not much is added to the worklists each
time markOverdefined is called. But ResolvedUndefsIn is linear over the
length of the function/module, so resolving one undef at a time is
quadratic in general.
To solve this, make ResolvedUndefsIn resolve every undef value at once,
instead of resolving them one at a time. This loses a little
optimization power, but can be a lot faster.
We still need a loop around ResolvedUndefsIn because markOverdefined
could change the set of blocks that are live. That should be uncommon,
hopefully. We could optimize it by tracking which blocks transition from
dead to live, instead of iterating over the whole module to find them.
But I'll leave that for later. (The whole function will become a lot
simpler once we start pruning branches on undef.)
The regression test changes seem minor. The specific cases in question
could probably be optimized with a bit more work, but they seem like
edge cases that don't really matter.
Fixes an "infinite" compile issue my team found on an internal workoad.
Differential Revision: https://reviews.llvm.org/D89080
Steven Wu [Fri, 9 Oct 2020 22:17:16 +0000 (15:17 -0700)]
[IRMover] Add missing open quote in the warning message
Fix the missing single quotation mark in the warning message for
target triple mismatch.
Jordan Rupprecht [Fri, 9 Oct 2020 21:36:20 +0000 (14:36 -0700)]
Temporarily revert "[ThinLTO] Re-order modules for optimal multi-threaded processing"
This reverts commit
6537004913f3009d896bc30856698e7d22199ba7. This is causing test failures internally, and while a few of the cases turned out to be bad user code (relying on a specific order of static initialization across translation units), some cases are less clear. Temporarily reverting for now, and Teresa is going to follow up with more details.
Thomas Lively [Fri, 9 Oct 2020 21:17:53 +0000 (21:17 +0000)]
[WebAssembly] Prototype i16x8.q15mulr_sat_s
This saturating, rounding, Q-format multiplication instruction is proposed in
https://github.com/WebAssembly/simd/pull/365.
Differential Revision: https://reviews.llvm.org/D88968
Louis Dionne [Fri, 9 Oct 2020 19:06:04 +0000 (15:06 -0400)]
[libc++] Remove code to prevent overwriting the system libc++ on Darwin
The system partition is read-only since Catalina.
Louis Dionne [Fri, 9 Oct 2020 19:04:12 +0000 (15:04 -0400)]
[libc++] Remove redundant if(LIBCXX_INSTALL_LIBRARY)
The individual LIBCXX_INSTALL_(SHARED|STATIC)_LIBRARY are already
dependent on whether LIBCXX_INSTALL_LIBRARY is ON or OFF.
Saleem Abdulrasool [Thu, 1 Oct 2020 05:42:17 +0000 (22:42 -0700)]
DirectoryWatcher: add an implementation for Windows
This implements the directory watcher on Windows. It does the most
naive thing for simplicity. ReadDirectoryChangesW is used to monitor
the changes. However, in order to support interruption, we must use
overlapped IO, which allows us to use the blocking, synchronous
mechanism. We create a thread to post the notification to the consumer
to allow the monitoring to continue. The two threads communicate via a
locked queue.
Differential Revision: https://reviews.llvm.org/D88666
Reviewed By: Adrian McCarthy
Mircea Trofin [Fri, 9 Oct 2020 20:35:56 +0000 (13:35 -0700)]
[NFC][Regalloc] VirtRegAuxInfo::Hint does not need to be a field
It is only used in weightCalcHelper, and cleared upon its finishing its
job there.
The patch further cleans up style guide discrepancies, and simplifies
CopyHint by removing duplicate 'IsPhys' information (it's what the Reg
field would report).
Krzysztof Parzyszek [Thu, 8 Oct 2020 22:20:31 +0000 (17:20 -0500)]
[Hexagon] Remove ISD node VSPLATW, use VSPLAT instead
This is a step towards improving HVX codegen for splat.
Krzysztof Parzyszek [Thu, 8 Oct 2020 22:12:32 +0000 (17:12 -0500)]
[Hexagon] Generalize handling of SDNodes created during ISel
The selection of HVX shuffles can produce more nodes in the DAG,
which need special handling, or otherwise they would be left
unselected by the main selection code. Make the handling of such
nodes more general.
Christian Sigg [Thu, 8 Oct 2020 11:43:18 +0000 (13:43 +0200)]
Add GPU async op interface and token type.
See https://llvm.discourse.group/t/rfc-new-dialect-for-modelling-asynchronous-execution-at-a-higher-level/1345
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D88954
Nicolas Vasilache [Fri, 9 Oct 2020 19:15:16 +0000 (19:15 +0000)]
[mlir][Linalg] NFC - Cleanup explicitly instantiated paterns 2/n - Loops.cpp
This revision belongs to a series of patches that reduce reliance of Linalg transformations on templated rewrite and conversion patterns.
Instead, this uses a MatchAnyTag pattern for the vast majority of cases and dispatches internally.
Differential revision: https://reviews.llvm.org/D89133
Nicolas Vasilache [Fri, 9 Oct 2020 14:31:52 +0000 (14:31 +0000)]
[mlir][Linalg] NFC - Cleanup explicitly instantiated paterns 1/n - LinalgToStandard.cpp
This revision belongs to a series of patches that reduce reliance of Linalg transformations on templated rewrite and conversion patterns.
Instead, this uses a MatchAnyTag pattern for the vast majority of cases and dispatches internally.
Differential Revision: https://reviews.llvm.org/D89133
Nicolas Vasilache [Fri, 9 Oct 2020 10:45:59 +0000 (10:45 +0000)]
Revert "Give attributes C++ namespaces."
This reverts commit
0a34492f36d77f043d371cc91f359b2d65e86475.
This change turned out to be very intrusive wrt some internal projects.
Reverting until this can be sorted out.
Arthur Eubanks [Fri, 9 Oct 2020 19:35:23 +0000 (12:35 -0700)]
[Reg2Mem][NewPM] Pin test to legacy PM
This pass hasn't been touched in a long time and isn't used in tree.
Vy Nguyen [Mon, 21 Sep 2020 21:41:48 +0000 (17:41 -0400)]
Enable LSAN for Android
Make use of the newly added thread-properties API (available since 31).
Differential Revision: https://reviews.llvm.org/D85927
Mircea Trofin [Fri, 9 Oct 2020 19:18:52 +0000 (12:18 -0700)]
[NFC][Regalloc] Fix coding style in CalcSpillWeights
Stella Laurenzo [Fri, 9 Oct 2020 19:16:45 +0000 (12:16 -0700)]
NFC: Address post-commit doc/formatting comments on TypeID.h.
Stella Laurenzo [Fri, 9 Oct 2020 18:49:38 +0000 (11:49 -0700)]
[mlir] Fix TypeID for shared libraries built with -fvisibility=hidden.
* Isolates the visibility controlled parts of its implementation to a detail namespace.
* Applies a struct level visibility attribute which applies to the static local within the get() functions.
* The prior version was not emitting a symbol for the static local "instance" fields when the user TU was compiled with -fvisibility=hidden.
Differential Revision: https://reviews.llvm.org/D89153
Scott Linder [Fri, 9 Oct 2020 19:02:53 +0000 (19:02 +0000)]
[clang] Add a test for CGDebugInfo treatment of blocks
There doesn't seem to be a direct test of this, and I'm planning to make
future changes which will affect it.
I'm not particularly familiar with the blocks extension, so suggestions
for better tests are welcome.
Differential Revision: https://reviews.llvm.org/D88754
Craig Topper [Fri, 9 Oct 2020 18:48:10 +0000 (11:48 -0700)]
[X86] When expanding LCMPXCHG16B_NO_RBX in EmitInstrWithCustomInserter, directly copy address operands instead of going through X86AddressMode.
I suspect getAddressFromInstr and addFullAddress are not handling
all addresses cases properly based on a report from MaskRay.
So just copy the operands directly. This should be more efficient
anyway.
Craig Topper [Fri, 9 Oct 2020 17:26:50 +0000 (10:26 -0700)]
[X86] Don't copy kill flag when expanding LCMPXCHG16B_SAVE_RBX
The expansion code creates a copy to RBX before the real LCMPXCHG16B.
It's possible this copy uses a register that is also used by the
real LCMPXCHG16B. If we set the kill flag on the use in the copy,
then we'll fail the machine verifier on the use on the LCMPXCHG16B.
Differential Revision: https://reviews.llvm.org/D89151
Nikita Popov [Fri, 9 Oct 2020 18:52:08 +0000 (20:52 +0200)]
[MemCpyOpt] Add test for incorrectly hoisted store (NFC)
Louis Dionne [Fri, 9 Oct 2020 18:40:47 +0000 (14:40 -0400)]
[libc++] Fixup a missing occurrence of LIBCXX_ENABLE_DEBUG_MODE
Louis Dionne [Fri, 9 Oct 2020 18:39:20 +0000 (14:39 -0400)]
[libc++] Rename LIBCXX_ENABLE_DEBUG_MODE to LIBCXX_ENABLE_DEBUG_MODE_SUPPORT
To make it clearer this is about whether the library supports the debug
mode at all, not whether the debug mode is enabled. Per comment by Nico
Weber on IRC.
Louis Dionne [Fri, 9 Oct 2020 18:21:23 +0000 (14:21 -0400)]
[libc++] NFCI: Define small methods of basic_stringstream inline
It greatly increases readability because defining the methods out-of-line
involves a ton of boilerplate template declarations.
Arthur Eubanks [Wed, 7 Oct 2020 03:28:43 +0000 (20:28 -0700)]
[BPF] Make BPFAbstractMemberAccessPass required
Or else on optnone functions we get the following during instruction selection:
fatal error: error in backend: Cannot select: intrinsic %llvm.preserve.struct.access.index
Currently the -O0 pipeline doesn't properly run passes registered via
TargetMachine::registerPassBuilderCallbacks(), so don't add that RUN
line yet. That will be fixed after this.
Reviewed By: yonghong-song
Differential Revision: https://reviews.llvm.org/D89083
Simon Pilgrim [Fri, 9 Oct 2020 18:19:35 +0000 (19:19 +0100)]
[ARM][MIPS] Add funnel shift test coverage
Based on offline discussions regarding D89139 and D88783 - we want to make sure targets aren't doing anything particularly dumb
Tests copied from aarch64 which has a mixture of general, legalization and special case tests
Jonas Devlieghere [Fri, 9 Oct 2020 17:57:37 +0000 (10:57 -0700)]
[lldb] Update docs with new buildbot URLs
Buildbot got upgraded and now the (LLDB) builders have different URLs.
Giorgis Georgakoudis [Tue, 7 Jul 2020 21:14:47 +0000 (14:14 -0700)]
[OpenMPOpt] Merge parallel regions
There are cases that generated OpenMP code consists of multiple,
consecutive OpenMP parallel regions, either due to high-level
programming models, such as RAJA, Kokkos, lowering to OpenMP code, or
simply because the programmer parallelized code this way. This
optimization merges consecutive parallel OpenMP regions to: (1) reduce
the runtime overhead of re-activating a team of threads; (2) enlarge the
scope for other OpenMP optimizations, e.g., runtime call deduplication
and synchronization elimination.
This implementation defensively merges parallel regions, only when they
are within the same BB and any in-between instructions are safe to
execute in parallel.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D83635
Louis Dionne [Fri, 25 Sep 2020 13:24:14 +0000 (09:24 -0400)]
[libc++] Clean up logic around aligned/sized allocation and deallocation
Due to the need to support compilers that implement builtin operator
new/delete but not their align_val_t overloaded versions, there was a
lot of complexity. By assuming that a compiler that supports the builtin
new/delete operators also supports their align_val_t overloads, the code
can be simplified quite a bit.
Differential Revision: https://reviews.llvm.org/D88301
Louis Dionne [Wed, 7 Oct 2020 18:27:55 +0000 (14:27 -0400)]
[clang] Don't look into <sysroot> for C++ headers if they are found alongside the toolchain
Currently, Clang looks for libc++ headers alongside the installation
directory of Clang, and it also adds a search path for headers in the
-isysroot. This is problematic if headers are found in both the toolchain
and in the sysroot, since #include_next will end up finding the libc++
headers in the sysroot instead of the intended system headers.
This patch changes the logic such that if the toolchain contains libc++
headers, no C++ header paths are added in the sysroot. However, if the
toolchain does *not* contain libc++ headers, the sysroot is searched as
usual.
This should not be a breaking change, since any code that previously
relied on some libc++ headers being found in the sysroot suffered from
the #include_next issue described above, which renders any libc++ header
basically useless.
Differential Revision: https://reviews.llvm.org/D89001
Louis Dionne [Fri, 9 Oct 2020 16:33:49 +0000 (12:33 -0400)]
[libc++] Remove some workarounds for C++03
We don't support any compiler that doesn't support variadics and rvalue
references in C++03 mode, so these workarounds can be dropped. There's
still *a lot* of cruft related to these workarounds, but I try to tackle
a bit of it here and there.
Arthur Eubanks [Thu, 8 Oct 2020 15:53:00 +0000 (08:53 -0700)]
[FixIrreducible][NewPM] Port -fix-irreducible to NPM
In the NPM, a pass cannot depend on another non-analysis pass. So pin
the test that tests that -lowerswitch is run automatically to legacy PM.
Reviewed By: sameerds
Differential Revision: https://reviews.llvm.org/D89051
Arthur Eubanks [Thu, 17 Sep 2020 23:19:04 +0000 (16:19 -0700)]
[LoopInterchange][NewPM] Port -loop-interchange to NPM
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D89058
Jay Foad [Fri, 9 Oct 2020 12:28:19 +0000 (13:28 +0100)]
[AMDGPU] Only enable mad/mac legacy f32 patterns if denormals may be flushed
Following on from D88890, this makes the newly added patterns
conditional on NoFP32Denormals. mad/mac f32 instructions always flush
denormals regardless of the MODE register setting, and I believe the
legacy variants do the same.
Differential Revision: https://reviews.llvm.org/D89123
Tres Popp [Fri, 9 Oct 2020 13:37:42 +0000 (15:37 +0200)]
[mlir] Forward listeners when utilizing scf::IfOp::get*BodyBuilder.
Without this PatternRewriting infrastructure does not know of modifications and
cannot properly legalize nor rollback changes.
Differential Revision: https://reviews.llvm.org/D89129
Simon Pilgrim [Fri, 9 Oct 2020 15:54:32 +0000 (16:54 +0100)]
[InstCombine] Support lshr(trunc(lshr(x,c1)), c2) -> trunc(lshr(lshr(x,c1),c2)) uniform vector tests
FoldShiftByConstant is hardcoded for scalar/uniform outer shift amounts atm so that needs to be fixed first to support non-uniform cases
Simon Pilgrim [Fri, 9 Oct 2020 15:32:07 +0000 (16:32 +0100)]
[InstCombine] Add lshr(trunc(lshr(x,c1)), c2) -> trunc(lshr(lshr(x,c1),c2)) vector tests
Eugene Zhulenev [Thu, 8 Oct 2020 20:28:09 +0000 (13:28 -0700)]
[MLIR] Add async token/value arguments to async.execute op
Async execute operation can take async arguments as dependencies.
Change `async.execute` custom parser/printer format to use `%value as %unwrapped: !async.value<!type>` sytax.
Reviewed By: mehdi_amini, herhut
Differential Revision: https://reviews.llvm.org/D88601
Andrzej Warzynski [Fri, 9 Oct 2020 09:57:35 +0000 (10:57 +0100)]
[mlir] Fix shared libs build
Reverts one breaking change introduced in
https://reviews.llvm.org/D88846.
Differential Revision: https://reviews.llvm.org/D89111
David Green [Fri, 9 Oct 2020 15:25:25 +0000 (16:25 +0100)]
[ARM] Add MVE vecreduce costmodel tests. NFC
There were some existing tests that were not super useful. New ones are
added for testing MVE specific patterns.
Scott Linder [Fri, 9 Oct 2020 15:13:45 +0000 (15:13 +0000)]
[NFC] Reformat MILexer.cpp:getIdentifierKind
Reformat to avoid unrelated changes in diff of future patch.
Committed as obvious.
Simon Pilgrim [Fri, 9 Oct 2020 14:59:19 +0000 (15:59 +0100)]
[InstCombine] commonShiftTransforms - add support for pow2 nonuniform constant vectors in srem fold
Note: we already fold srem to undef if any denominator vector element is undef.
Krzysztof Parzyszek [Fri, 9 Oct 2020 14:34:24 +0000 (09:34 -0500)]
[Hexagon] Return 1 instead of 0 from getMaxInterleaveFactor
Sanjay Patel [Fri, 9 Oct 2020 14:25:08 +0000 (10:25 -0400)]
[InstCombine] allow vector splats for add+and with high-mask
There might be a better way to specify the pre-conditions,
but this is hopefully clearer than the way it was written:
https://rise4fun.com/Alive/Jhk3
Pre: C2 < 0 && isShiftedMask(C2) && (C1 == C1 & C2)
%a = and %x, C2
%r = add %a, C1
=>
%a2 = add %x, C1
%r = and %a2, C2
Simon Pilgrim [Fri, 9 Oct 2020 13:42:34 +0000 (14:42 +0100)]
[InstCombine] Add tests for X shift (A srem B) -> X shift (A and B-1) pow2 nonuniform constant vectors
Anastasia Stulova [Fri, 9 Oct 2020 14:13:39 +0000 (15:13 +0100)]
[OpenCL] Add new compilation mode for OpenCL 3.0.
Extended -cl-std/std flag with CL3.0 and added predefined version macros.
Patch by Anton Zabaznov (azabaznov)!
Tags: #clang
Differential Revision: https://reviews.llvm.org/D88300
Louis Dionne [Fri, 9 Oct 2020 14:08:02 +0000 (10:08 -0400)]
[libc++] Make sure we don't cache DSL functions too aggressively
To make sure we don't store a mutable object (which could be modified by
outside code without us noticing) as the cache key, we pickle the cache
key to get a byte stream. If two keys are unequal, we know for sure they
will not have the same pickling. And if they are equal, there's a large
chance they will have the same pickling. If they don't, we might end up
not reusing a cached entry when we could have, but at least the behavior
we'll have is semantically correct.
Irina Dobrescu [Fri, 2 Oct 2020 14:45:44 +0000 (15:45 +0100)]
[mlir][openmp][NFC]Remove unnecessary brackets and rephrase ParallelOp description in mlir definition
Differential Revision: https://reviews.llvm.org/D88740
Sam McCall [Fri, 9 Oct 2020 14:08:44 +0000 (16:08 +0200)]
[clangd] Stop logging in fromJSON, report instead.
Fanbo Meng [Fri, 9 Oct 2020 14:13:45 +0000 (10:13 -0400)]
[SystemZ][z/OS] Update target specific __attribute__((aligned)) value for test
z/OS defaults to 16 bytes for __attribute__((aligned)), modify the test to differentiate between z/OS and Linux on s390x.
Reviewed By: abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D89127
Louis Dionne [Fri, 9 Oct 2020 14:08:42 +0000 (10:08 -0400)]
[libc++] More consistency with declaring int main(int, char**)
Tres Popp [Fri, 9 Oct 2020 12:34:44 +0000 (14:34 +0200)]
[mlir] Use PatternRewriter infrastructure for shape.assuming bufferization
Without this, legalization might not recursively handle child ops properly.
Additionally, this is required for pattern rewriting to properly rollback conversions.
Differential Revision: https://reviews.llvm.org/D89122
LLVM GN Syncbot [Fri, 9 Oct 2020 13:54:24 +0000 (13:54 +0000)]
[gn build] Port
0741a2c9cac
Stefan Pintilie [Fri, 9 Oct 2020 13:20:00 +0000 (08:20 -0500)]
[Clang][unittests][NFC] Break up test in Callbacks.cpp
The Callbacks.cpp test was taking a long time to compile on some build bots
causing timeouts. This patch splits up that test into five separate cpp
files and a header file.
Reviewed By: gribozavr2
Differential Revision: https://reviews.llvm.org/D88886
Florian Hahn [Fri, 9 Oct 2020 13:32:21 +0000 (14:32 +0100)]
[SCEV] Do not apply info from loop guards in AddRecs.
We cannot guarantee that the replacement expression is loop-invariant in
all AddRecs in the source expression. Use a rewriter that skips
AddRecExpr for now.
Fixes PR47776.
Simon Pilgrim [Fri, 9 Oct 2020 13:22:19 +0000 (14:22 +0100)]
[InstCombine] foldShiftOfShiftedLogic - add support for nonuniform constant vectors
Alexander Kornienko [Thu, 8 Oct 2020 22:56:00 +0000 (00:56 +0200)]
Remove old create(MainFile)?IncludeInsertion overloads
Reviewed By: hokein
Differential Revision: https://reviews.llvm.org/D89117
Simon Pilgrim [Fri, 9 Oct 2020 13:09:52 +0000 (14:09 +0100)]
[InstCombine] foldShiftOfShiftedLogic - replace cast<BinaryOperator> with m_BinOp matcher. NFCI.
Allows us to drop the !isa<ConstantExpr> check.
Stephan Herhut [Fri, 9 Oct 2020 10:12:35 +0000 (12:12 +0200)]
[mlir][gpu] Fix bug in kernel outlining
The updated version of kernel outlining did not handle cases correctly
where an operand of a candidate for sinking itself was defined by an operation
that is a sinking candidate. In such cases, it could happen that sunk
operations were inserted in the wrong order, breaking ssa properties.
Differential Revision: https://reviews.llvm.org/D89112
Simon Pilgrim [Fri, 9 Oct 2020 12:41:58 +0000 (13:41 +0100)]
[InstCombine] Add nonuniform/undef vector tests for shift(binop(shift(x,c1),y),c2) patterns
Martin Storsjö [Tue, 6 Oct 2020 10:07:17 +0000 (13:07 +0300)]
[LLD] [ELF] Fix the help listing for the wrap option. NFC.
This option just takes a single symbol name per invocation of the
option.
Differential Revision: https://reviews.llvm.org/D89007
Konstantin Zhuravlyov [Fri, 9 Oct 2020 12:29:53 +0000 (08:29 -0400)]
Regenerate ClangCommandLineReference.rst
Differential Revision: https://reviews.llvm.org/D89091
Ben Dunbobbin [Mon, 31 Aug 2020 20:32:36 +0000 (21:32 +0100)]
[windows-itanium] make dllimport/export handling closer to MS behavior
Differential Revision: https://reviews.llvm.org/D86828
Ben Dunbobbin [Fri, 9 Oct 2020 12:22:46 +0000 (13:22 +0100)]
Revert "first upstream review"
Pushed by accident :(
This reverts commit
4eb627ed96e3f2f9f24aec8a0654ce5204874bb8.
Ben Dunbobbin [Mon, 31 Aug 2020 20:32:36 +0000 (21:32 +0100)]
first upstream review