platform/kernel/u-boot.git
2 years agosocfpga: arria10: Wait for fifo empty after writing bitstream
Paweł Anikiel [Fri, 17 Jun 2022 10:47:25 +0000 (12:47 +0200)]
socfpga: arria10: Wait for fifo empty after writing bitstream

For some reason, on the Mercury+ AA1 module, calling
fpgamgr_wait_early_user_mode immediately after writing the peripheral
bitstream leaves the fpga in a broken state (ddr calibration hangs).
Adding a delay before the first sync word is written seems to fix this.
Inspecting the fpgamgr registers before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agosocfpga: arria10: Improve bitstream loading speed
Paweł Anikiel [Fri, 17 Jun 2022 10:47:24 +0000 (12:47 +0200)]
socfpga: arria10: Improve bitstream loading speed

Apply some optimizations to speed up bitstream loading
(both for full and split periph/core bitstreams):

 * Change the size of the first fs read, so that all the subsequent
   reads are aligned to a specific value (called MAX_FIRST_LOAD_SIZE).
   This value was chosen so that in subsequent reads the fat fs driver
   doesn't have to allocate a temporary buffer in get_contents
   (assuming 8KiB clusters).

 * Change the buffer size to a larger value when reading to ddr
   (but not too large, because large transfers cause a stack overflow
   in the dwmmc driver).

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agosocfpga: arria10: Replace delays with busy waiting in cm_full_cfg
Paweł Anikiel [Fri, 17 Jun 2022 10:47:23 +0000 (12:47 +0200)]
socfpga: arria10: Replace delays with busy waiting in cm_full_cfg

Using udelay while the clocks aren't fully configured causes the timer
system to save the wrong clock rate. Use sdelay and wait_on_value
instead (the values used in these functions were found experimentally).

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agosysreset: socfpga: Use parent device for reading base address
Paweł Anikiel [Fri, 17 Jun 2022 10:47:22 +0000 (12:47 +0200)]
sysreset: socfpga: Use parent device for reading base address

This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agomisc: atsha204a: Increase wake delay by tWHI
Paweł Anikiel [Fri, 17 Jun 2022 10:47:21 +0000 (12:47 +0200)]
misc: atsha204a: Increase wake delay by tWHI

From the ATSHA204A datasheet (document DS40002025A):

Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.

tWHI value can be found in table 7-2.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoconfig: Add Chameleonv3 config
Paweł Anikiel [Fri, 17 Jun 2022 10:47:20 +0000 (12:47 +0200)]
config: Add Chameleonv3 config

Add defconfig and Kconfig files for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoboard: Add Chameleonv3 board dir
Paweł Anikiel [Fri, 17 Jun 2022 10:47:19 +0000 (12:47 +0200)]
board: Add Chameleonv3 board dir

Add board directory for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoarm: dts: Add Chameleonv3 devicetrees
Paweł Anikiel [Fri, 17 Jun 2022 10:47:18 +0000 (12:47 +0200)]
arm: dts: Add Chameleonv3 devicetrees

Add devicetrees for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoarm: dts: Add Chameleonv3 handoff headers
Paweł Anikiel [Fri, 17 Jun 2022 10:47:17 +0000 (12:47 +0200)]
arm: dts: Add Chameleonv3 handoff headers

Add handoff headers for the Google Chameleonv3 variants: 480-2 and
270-3. Both files were generated using qts-filter-a10.sh.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoarm: dts: Add Mercury+ AA1 devicetrees
Paweł Anikiel [Fri, 17 Jun 2022 10:47:16 +0000 (12:47 +0200)]
arm: dts: Add Mercury+ AA1 devicetrees

Devicetree headers for Mercury+ AA1 module

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agomtd: mxs_nand_spl: fix nand_command protocol violation
Andrea Scian [Tue, 21 Jun 2022 20:05:10 +0000 (22:05 +0200)]
mtd: mxs_nand_spl: fix nand_command protocol violation

mxs_nand_command() implementation assume that it's working with a
LP NAND, which is a common case nowadays and thus uses two bytes
for column address.

However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
expects only one byte of column address, even for LP NANDs.
This leads to ONFI detection problem with some NAND manufacturer (like
Winbond) but not with others (like Samsung and Spansion)

We fix this with a simple workaround to avoid the 2nd byte column address
for those two commands.

Also align the code with nand_base to support 16 bit devices.

Tested on an iMX6SX device with:
* Winbond W29N04GVSIAA
* Spansion S34ML04G100TF100
* Samsung K9F4G08U00

Tested on imx8mn device with:
* Windbond W29N04GV

Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
CC: Stefano Babic <sbabic@denx.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoMerge branch '2022-06-28-assorted-fixes'
Tom Rini [Tue, 28 Jun 2022 21:02:25 +0000 (17:02 -0400)]
Merge branch '2022-06-28-assorted-fixes'

- Fix a squashfs security issue, an i2c access security issue and fix
  NAND booting on imx8mn_bsh_smm_s2

2 years agoconfigs: imx8mn_bsh_smm_s2: add mtdparts to bootargs
Dario Binacchi [Sun, 26 Jun 2022 10:05:18 +0000 (12:05 +0200)]
configs: imx8mn_bsh_smm_s2: add mtdparts to bootargs

Passing the mtdparts environment variable to the Linux kernel is
required to properly mount the UBI rootfs.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2 years agoconfigs: imx8mn_bsh_smm_s2: remove console from bootargs
Dario Binacchi [Sun, 26 Jun 2022 10:05:17 +0000 (12:05 +0200)]
configs: imx8mn_bsh_smm_s2: remove console from bootargs

The Linux kernel device tree already specifies the device to be used for
boot console output with a stdout-path property under /chosen.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2 years agoconfigs: imx8mn_bsh_smm_s2: add UBI commands
Dario Binacchi [Sun, 26 Jun 2022 10:05:16 +0000 (12:05 +0200)]
configs: imx8mn_bsh_smm_s2: add UBI commands

imx8mn_bsh_smm_s2 uses ubifs rootfs, UBI commands are required to flash
it.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2 years agoconfigs: imx8mn_bsh_smm_s2: add NAND driver
Dario Binacchi [Sun, 26 Jun 2022 10:05:15 +0000 (12:05 +0200)]
configs: imx8mn_bsh_smm_s2: add NAND driver

It allows to boot from NAND.

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2 years agofs/squashfs: Use kcalloc when relevant
Miquel Raynal [Mon, 27 Jun 2022 10:20:03 +0000 (12:20 +0200)]
fs/squashfs: Use kcalloc when relevant

A crafted squashfs image could embed a huge number of empty metadata
blocks in order to make the amount of malloc()'d memory overflow and be
much smaller than expected. Because of this flaw, any random code
positioned at the right location in the squashfs image could be memcpy'd
from the squashfs structures into U-Boot code location while trying to
access the rearmost blocks, before being executed.

In order to prevent this vulnerability from being exploited in eg. a
secure boot environment, let's add a check over the amount of data
that is going to be allocated. Such a check could look like:

if (!elem_size || n > SIZE_MAX / elem_size)
return NULL;

The right way to do it would be to enhance the calloc() implementation
but this is quite an impacting change for such a small fix. Another
solution would be to add the check before the malloc call in the
squashfs implementation, but this does not look right. So for now, let's
use the kcalloc() compatibility function from Linux, which has this
check.

Fixes: c5100613037 ("fs/squashfs: new filesystem")
Reported-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu@sony.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu@sony.com>
2 years agoi2c: fix stack buffer overflow vulnerability in i2c md command
Nicolas Iooss [Fri, 10 Jun 2022 14:50:25 +0000 (14:50 +0000)]
i2c: fix stack buffer overflow vulnerability in i2c md command

When running "i2c md 0 0 80000100", the function do_i2c_md parses the
length into an unsigned int variable named length. The value is then
moved to a signed variable:

    int nbytes = length;
    #define DISP_LINE_LEN 16
    int linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
    ret = dm_i2c_read(dev, addr, linebuf, linebytes);

On systems where integers are 32 bits wide, 0x80000100 is a negative
value to "nbytes > DISP_LINE_LEN" is false and linebytes gets assigned
0x80000100 instead of 16.

The consequence is that the function which reads from the i2c device
(dm_i2c_read or i2c_read) is called with a 16-byte stack buffer to fill
but with a size parameter which is too large. In some cases, this could
trigger a crash. But with some i2c drivers, such as drivers/i2c/nx_i2c.c
(used with "nexell,s5pxx18-i2c" bus), the size is actually truncated to
a 16-bit integer. This is because function i2c_transfer expects an
unsigned short length. In such a case, an attacker who can control the
response of an i2c device can overwrite the return address of a function
and execute arbitrary code through Return-Oriented Programming.

Fix this issue by using unsigned integers types in do_i2c_md. While at
it, make also alen unsigned, as signed sizes can cause vulnerabilities
when people forgot to check that they can be negative.

Signed-off-by: Nicolas Iooss <nicolas.iooss+uboot@ledger.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
2 years agoMerge tag 'u-boot-imx-20220628' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Tue, 28 Jun 2022 15:10:23 +0000 (11:10 -0400)]
Merge tag 'u-boot-imx-20220628' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2022.07

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12541

2 years agokontron-sl-mx8mm: Add CAAM support
Fabio Estevam [Thu, 9 Jun 2022 20:13:31 +0000 (17:13 -0300)]
kontron-sl-mx8mm: Add CAAM support

Add CAAM support, which is required when enabling HAB secure boot.

Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could
build successfully, if selected.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2 years agoboard: apalis_imx6: DDR init using mx6_dram_cfg()
Francesco Dolcini [Fri, 24 Jun 2022 10:33:36 +0000 (12:33 +0200)]
board: apalis_imx6: DDR init using mx6_dram_cfg()

Do DDR initialization using the procedural mx6_dram_cfg() instead of
programming the MMDC using a raw list of register/value pairs, this
solves some rare boot failures on specific "bad" modules.

Calibration values, DDR geometry are unchanged, memory timings are
updated according to the relevant memory datasheet, no changes on
the power consumption.

For IT temperature range SKUs CL is decreased from 8 to 7 and tFAW
value is increased, for commercial temperature range SKUs some
changes on ODT parameters.

This change was validated over a range of different apalis-imx6 SoM, on
the whole working temperature range with weeks of continuous testing.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx: kontron-sl-mx8mm: Enable PCA9450 regulator driver and fix SD card access
Frieder Schrempf [Mon, 27 Jun 2022 11:00:59 +0000 (13:00 +0200)]
imx: kontron-sl-mx8mm: Enable PCA9450 regulator driver and fix SD card access

Currently accessing the SD card on USDHC2 fails with:

=> mmc dev 1
Card did not respond to voltage select! : -110

This is due to the fact that UHS modes are enabled in the defconfig
and the devicetree, but the referenced LDO5 regulator (reg_nvcc_sd)
is not available to switch the data lines from 3.3V to 1.8V mode.

By enabling the regulator driver the vqmmc-supply is now available
and the SD card works also in high speed modes:

=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device

Please note that the board has a GPIO connected to the SD_VSEL signal
of the PMIC. As the driver uses the LDO5CTRL_H register to set the
voltage, we need to make sure that this GPIO (GPIO01_IO4) is set to
a high level.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
2 years agopmic: pca9450: Add optional SD_VSEL GPIO for LDO5
Frieder Schrempf [Mon, 27 Jun 2022 11:00:58 +0000 (13:00 +0200)]
pmic: pca9450: Add optional SD_VSEL GPIO for LDO5

LDO5 has two separate control registers. LDO5CTRL_L is used if the
input signal SD_VSEL is low and LDO5CTRL_H if it is high.
The current driver implementation only uses LDO5CTRL_H. To make this
work on boards that have SD_VSEL connected to a GPIO, we add support
for specifying an optional GPIO and setting it to high at probe time.

In the future we might also want to add support for boards that have
SD_VSEL set to a fixed low level. In this case we need to change the
driver to be able to use the LDO5CTRL_L register.

This is a port of the same change in the Linux kernel:
8c67a11bae88 ("regulator: pca9450: Add SD_VSEL GPIO for LDO5")

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
2 years agomx6: ddr: Fix disabling on-die termination
Francesco Dolcini [Fri, 24 Jun 2022 10:33:35 +0000 (12:33 +0200)]
mx6: ddr: Fix disabling on-die termination

In case rtt_nom is set to 0 keep ODT disabled (MMDC MPODTCTRL = 0).
No changes required for DDR MR1 Rtt_Nom impedance register, 0 value is
already handled correctly.

No board is currently affected by this change (rtt_nom != 0 on all i.MX6
ddr3 boards), this will be used by a follow-up change.

Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agotoradex: apalis/colibri_imx6: Fix CLKO1/CLKO2 output
Francesco Dolcini [Fri, 24 Jun 2022 09:52:19 +0000 (11:52 +0200)]
toradex: apalis/colibri_imx6: Fix CLKO1/CLKO2 output

Set CLK01 and CLK02 to 24MHz and enable it in CCM_CCOSR register.

This clock is used by both the audio codec (CLKO1) and by the CSI camera
(CLKO2) and is expected to be 24MHz.

Despite the wrong 16.5MHz there was no real issue because of the wrong
frequency since Linux reconfigures the clocks afterward, however this
was triggering an issue with noise coming from the SGTL5000 audio codec.

The problem is that the SGTL5000 does not have a reset pin and after it
is configured if the input MCLK clock is disabled it produces a constant
noise on its output, this was happening on software reboot.

Forcing the clock to be enabled in U-Boot prevent the problem by making
sure that the clock is always available, without this change as soon as
Linux was changing the clock tree (setting clk_out_sel=1 without setting
clko2_en=1) the noise would start till the actual clock was enabled
(clko2_en=1) during the SGTL5000 driver probe.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver
Marek Vasut [Wed, 15 Jun 2022 11:07:39 +0000 (13:07 +0200)]
ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver

Replace the ad-hoc I2C register programming scripted in board
environment with U-Boot DM driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx8m: fixup thermal trips
Andrejs Cainikovs [Fri, 27 May 2022 13:20:42 +0000 (15:20 +0200)]
imx8m: fixup thermal trips

Fixup thermal trips in Linux device tree according to SoC thermal
grade.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Adam Ford <aford173@gmail.com>
2 years agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Mon, 27 Jun 2022 01:06:08 +0000 (21:06 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

The main attraction are two regressions, plus a fix
for a long standing bug:
- Fix USB support on boards with a switched VBUS regulator.
- Fix failing boot due to env loading on boards without MMC (CHIP).
- Fix PSCI CPU_OFF operation on R40 boards.
The rest are smaller fixes, and the forgotten DT sync for sun4i boards.

2 years agosunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform
qianfan Zhao [Sat, 14 May 2022 03:19:23 +0000 (11:19 +0800)]
sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform

linux system will die if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online

The reason is that the R40 version of sunxi_cpu_set_power always passes
0 for the CPU number, so we turn off CPU0, regardless of what CPU the
CPU_OFF request came for.

Fix this by passing the proper CPU number, as there are proper power
clamp registers for every of the four cores.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agosunxi: fix initial environment loading without MMC
Samuel Holland [Wed, 20 Apr 2022 22:15:39 +0000 (23:15 +0100)]
sunxi: fix initial environment loading without MMC

Commit e42dad4168fe ("sunxi: use boot source for determining environment
location") changed our implementation of env_get_location() and enabled
it for every board, even those without MMC support (like the C.H.I.P.
boards). However the default fallback location of ENVL_FAT requires MMC
support compiled in, so the board hangs when trying to initially load
the environment.

Change the algorithm to only return configured environment locations,
and improve the fallback algorithm on the way.

The env_init() routine calling this function here does not behave well
if the return value is ENVL_UNKNOWN on the very first call: it will make
U-Boot proper silently hang very early.
Work around this issue by making sure we return some configured (dummy)
environment location when prio is 0. This for instance happens when
booting via FEL.

This fixes U-Boot loading on the C.H.I.P. boards.

Fixes: e42dad4168fe ("sunxi: use boot source for determining environment location")
Reported-by: Chris Morgan <macroalpha82@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix FEL boot case by not returning ENVL_UNKNOWN when prio==0]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoclk: sunxi: Add additional RTC compatible strings
Samuel Holland [Sun, 1 May 2022 03:38:36 +0000 (22:38 -0500)]
clk: sunxi: Add additional RTC compatible strings

Compatible strings for some new RTC hardware variants were added to
the binding. Add them to the driver in preparation for supporting
those new SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agogpio: sunxi: Fix build with CONFIG_SPL_SERIAL=n
Samuel Holland [Wed, 11 May 2022 00:03:34 +0000 (19:03 -0500)]
gpio: sunxi: Fix build with CONFIG_SPL_SERIAL=n

This driver uses simple_strtol(), so it needs SPL_STRTO. Before commit
88ca8e26958b6 ("disk: Add an option for partitions in SPL"), SPL_STRTO
was always selected indirectly. Now it is not, so select it here.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoARM: dts: sun4i: Sync from Linux v5.18-rc1
Samuel Holland [Thu, 26 May 2022 03:26:02 +0000 (22:26 -0500)]
ARM: dts: sun4i: Sync from Linux v5.18-rc1

Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

The previous version of this change was only partially applied.

Fixes: 4746694cba74 ("ARM: dts: sun4i: Sync from Linux v5.18-rc1")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agosunxi: usb: convert PHY GPIO functions to DM
Andre Przywara [Tue, 7 Jun 2022 22:36:18 +0000 (23:36 +0100)]
sunxi: usb: convert PHY GPIO functions to DM

The Allwinner USB PHY driver is still using the legacy GPIO interface,
which is now implemented by the DM_GPIO compat functions.
Those seem to have some design flaws, as setting the direction, then
later setting the value will not work, if the DM_GPIO driver is
implementing set_flags.

Fix this by using the dm_ version of the direct GPIO interface, which
uses struct gpio_desc structs to handle requested GPIOs, and actually
keeps the flags we set earlier.

This fixes USB operation on boards which need to toggle the VBUS supply
via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2 years agoMerge tag 'video-20220625' of https://source.denx.de/u-boot/custodians/u-boot-video
Tom Rini [Sat, 25 Jun 2022 12:38:00 +0000 (08:38 -0400)]
Merge tag 'video-20220625' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix building sandbox with NO_SDL=1
 - fix stb TrueType to check return value of STBTT_malloc()
 - remove not required DM_REGULATOR test in stm32 dsi driver

2 years agovideo: stm32: remove test on CONFIG_DM_REGULATOR
Patrick Delaunay [Mon, 20 Jun 2022 09:55:07 +0000 (11:55 +0200)]
video: stm32: remove test on CONFIG_DM_REGULATOR

The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b439
("power: regulator: add dummy helper").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agodriver: video: Check allocated pointers
Bin Meng [Wed, 18 May 2022 05:36:18 +0000 (13:36 +0800)]
driver: video: Check allocated pointers

The codes that call STBTT_malloc() / stbtt__new_active() do not check
the return value at present which may cause segfault.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2 years agosandbox: sdl: Add stub sandbox_sdl_remove_display()
Andrew Scull [Wed, 23 Mar 2022 20:20:37 +0000 (20:20 +0000)]
sandbox: sdl: Add stub sandbox_sdl_remove_display()

Building the sandbox with NO_SDL=1 resulted in an undefined reference to
'sandbox_sdl_remove_display'. Resolve this by adding a stub
implementation to match the stubs of the other similar functions.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoMerge branch '2022-06-23-important-fixes'
Tom Rini [Thu, 23 Jun 2022 15:27:04 +0000 (11:27 -0400)]
Merge branch '2022-06-23-important-fixes'

- Apple NVMe updates to support macOS 13 changes, kontron-sl-mx8mm dts
  changes to fix some problems.

2 years agoimx: kontron-sl-mx8mm: Remove deprecated phy-mode property
Frieder Schrempf [Tue, 14 Jun 2022 13:03:19 +0000 (15:03 +0200)]
imx: kontron-sl-mx8mm: Remove deprecated phy-mode property

This was previously needed, but U-Boot is now capable of parsing
the new "phy-connection-type" property that is already used in
the main devicetree.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx: kontron-sl-mx8mm: Sync dts files and fix ethernet
Frieder Schrempf [Tue, 14 Jun 2022 13:03:18 +0000 (15:03 +0200)]
imx: kontron-sl-mx8mm: Sync dts files and fix ethernet

This syncs the devicetree files with the latest Linux kernel (5.19-rc2).
This also fixes the currently broken ethernet support:

Before:

  Net:   Could not get PHY for FEC0: addr 0

After:

  Net:   eth0: ethernet@30be0000

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoarm: apple: Increase RTKit timeouts
Janne Grunau [Tue, 14 Jun 2022 07:09:09 +0000 (09:09 +0200)]
arm: apple: Increase RTKit timeouts

Timeouts are not expected to happen and are handled as fatal errors.
Increase all timeouts to 1 second as defensive measure to avoid relying
on the timing behaviour of certain firmware versions or configurations.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2 years agoMAINTAINERS: Add nvme_apple to Apple SoC section
Janne Grunau [Tue, 14 Jun 2022 07:09:08 +0000 (09:09 +0200)]
MAINTAINERS: Add nvme_apple to Apple SoC section

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2 years agoarm: apple: nvme: Add SART support and RTKit buffer management
Janne Grunau [Tue, 14 Jun 2022 07:09:07 +0000 (09:09 +0200)]
arm: apple: nvme: Add SART support and RTKit buffer management

The NVMe firmware in the macOS 13 beta blocks or crashes with u-boot's
current minimal RTKit implementation. It does not provide buffers for
the firmware's buffer requests. The ANS2 firmware included in macOS 11
and 12 tolerates this. The firmware included in the first macOS 13 beta
requires buffers for the crashlog and ioreport endpoints to function.

In the case of the NVMe the buffers are physical memory. Access to
physical memory is guarded by what Apple calls SART.
Import m1n1's SART driver (exclusively used for the NVMe controller).
Implement buffer management helpers for RTKit. These are generic since
other devices (none in u-boot so far) require different handling.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2 years agoPrepare v2022.07-rc5
Tom Rini [Mon, 20 Jun 2022 18:30:36 +0000 (14:30 -0400)]
Prepare v2022.07-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoMerge tag 'efi-2022-07-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 19 Jun 2022 15:30:29 +0000 (11:30 -0400)]
Merge tag 'efi-2022-07-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2020-07-rc5-2

Documentation:

* man-pages for booti and printenv

UEFI

* correct return value for printenv -e command
* initialize console size late

2 years agoefi_loader: initialize console size late
Heinrich Schuchardt [Tue, 14 Jun 2022 06:02:03 +0000 (08:02 +0200)]
efi_loader: initialize console size late

If CONFIG_VIDEO_DM=n we query the display size from the serial console.
Especially when using a remote console the response can be so late that
it interferes with autoboot.

Only query the console size when running an EFI binary.

Add debug output showing the determined console size.

Reported-by: Fabio Estevam <festevam@gmail.com>
Fixes: a57ad20d07e8 ("efi_loader: split efi_init_obj_list() into two stages")
Fixes: a9bf024b2933 ("efi_loader: disk: a helper function to create efi_disk objects from udevice")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Fabio Estevam <festevam@denx.de>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
2 years agotest: work around for EFI terminal size probing
Heinrich Schuchardt [Sun, 19 Jun 2022 12:02:18 +0000 (14:02 +0200)]
test: work around for EFI terminal size probing

When the UEFI sub-system is initialized it sends an escape sequence to the
serial console to determine the terminal size. This stops the
run_command_list() function of the console emulation from recognizing the
U-Boot command line prompt.

Add a 'print -e' command as first command in the command list to work
around this issue.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agocmd: correct return value for printenv -e
Heinrich Schuchardt [Sun, 19 Jun 2022 11:36:48 +0000 (13:36 +0200)]
cmd: correct return value for printenv -e

If printenv -e is executed and the specified variable is not found, the
return value $? of the command should be 1 (false).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agodoc: man-page for the printenv command
Heinrich Schuchardt [Sun, 19 Jun 2022 11:59:22 +0000 (13:59 +0200)]
doc: man-page for the printenv command

Privide a man-page for the printenv command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agodoc: man-page for bootz command
Heinrich Schuchardt [Sat, 11 Jun 2022 06:23:31 +0000 (08:23 +0200)]
doc: man-page for bootz command

Provide a man-page for the bootz command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoMerge tag 'u-boot-stm32-20220617' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Fri, 17 Jun 2022 13:41:11 +0000 (09:41 -0400)]
Merge tag 'u-boot-stm32-20220617' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Fix the stm32prog command for stm32mp platform
- Add stm32mp15x DHCOR based DRC Compact board

2 years agoMerge commit '32e0379143b433e29d76404f5f4c279067e48853' of https://github.com/tienfon...
Tom Rini [Fri, 17 Jun 2022 13:35:28 +0000 (09:35 -0400)]
Merge commit '32e0379143b433e29d76404f5f4c279067e48853' of https://github.com/tienfong/uboot_mainline

2 years agoMerge branch '2022-06-16-assorted-bugfixes'
Tom Rini [Fri, 17 Jun 2022 13:13:50 +0000 (09:13 -0400)]
Merge branch '2022-06-16-assorted-bugfixes'

- A wide array of regression fixes and minor updates

2 years agoddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
Dinesh Maniyam [Wed, 1 Jun 2022 10:49:02 +0000 (18:49 +0800)]
ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched

Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agodrivers: cache: ncore: Disable snoop filter
Dinesh Maniyam [Wed, 1 Jun 2022 07:57:25 +0000 (15:57 +0800)]
drivers: cache: ncore: Disable snoop filter

There is hardware bug in NCORE CCU IP and it is causing an issue in the
coherent directory tracking of outstanding cache lines.
The workaround is disabling snoop filter.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoarm: dts: socfpga: stratix10: Add freeze controller node
Dinesh Maniyam [Tue, 31 May 2022 08:15:17 +0000 (16:15 +0800)]
arm: dts: socfpga: stratix10: Add freeze controller node

The freeze controller is required for FPGA partial reconfig.
This node is disable on default.
Enable this node via u-boot fdt command when needed.

Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoarm: dts: socfpga: agilex: Add freeze controller node
Dinesh Maniyam [Tue, 31 May 2022 08:05:56 +0000 (16:05 +0800)]
arm: dts: socfpga: agilex: Add freeze controller node

The freeze controller is required for FPGA partial reconfig.
This node is disable on default.
Enable this node via u-boot fdt command when needed.

Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoarch: arm: socfpga: timer_s10: Override udelay for secure section
Dinesh Maniyam [Wed, 1 Jun 2022 07:54:59 +0000 (15:54 +0800)]
arch: arm: socfpga: timer_s10: Override udelay for secure section

Override __udelay() as 'always inlined' function so that PSCI code
run in '__secure' section can call this delay function as well.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoARM: dts: stm32: Add DHCOR based DRC Compact board
Marek Vasut [Mon, 13 Jun 2022 09:55:21 +0000 (11:55 +0200)]
ARM: dts: stm32: Add DHCOR based DRC Compact board

Add DT for DH DRC Compact unit, which is a universal controller device.
The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD
card slot, eMMC and SDIO Wi-Fi.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add alternate pinmux for SPI2 pins
Marek Vasut [Mon, 13 Jun 2022 09:55:20 +0000 (11:55 +0200)]
ARM: dts: stm32: Add alternate pinmux for SPI2 pins

Add another mux option for SPI2 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add alternate pinmux for CAN1 pins
Marek Vasut [Mon, 13 Jun 2022 09:55:19 +0000 (11:55 +0200)]
ARM: dts: stm32: Add alternate pinmux for CAN1 pins

Add another mux option for CAN1 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add alternate pinmux for UART5 pins
Marek Vasut [Mon, 13 Jun 2022 09:55:18 +0000 (11:55 +0200)]
ARM: dts: stm32: Add alternate pinmux for UART5 pins

Add another mux option for UART5 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add alternate pinmux for UART4 pins
Marek Vasut [Mon, 13 Jun 2022 09:55:17 +0000 (11:55 +0200)]
ARM: dts: stm32: Add alternate pinmux for UART4 pins

Add another mux option for UART4 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add alternate pinmux for UART3 pins
Marek Vasut [Mon, 13 Jun 2022 09:55:16 +0000 (11:55 +0200)]
ARM: dts: stm32: Add alternate pinmux for UART3 pins

Add another mux option for UART3 pins, this is used on DRC Compact board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agostm32mp: stm32prog: fix the last character of dfu_alt_add third parameter
Patrick Delaunay [Thu, 16 Jun 2022 16:37:59 +0000 (18:37 +0200)]
stm32mp: stm32prog: fix the last character of dfu_alt_add third parameter

The third parameter of dfu_alt_add(), the string description of alternate,
is build in stm32prog_alt_add() with a unnecessary character ';' at the
end of the string.

This separator was required in the first implementation of
dfu_alt_add() but is no more needed in the current implementation;
this separator is managed only in dfu_config_interfaces() which call
dfu_alt_add() for this parameter without this separator.

And since the commit 53b406369e9d ("DFU: Check the number of arguments
and argument string strictly"), this added character cause an error when
the stm32prog command is executed because the third parameter of
dfu_alt_add() must be a string with a numerical value; 's' must be NULL
in the result of call in dfu_fill_entity_mmc():
  third_arg = simple_strtoul(argv[2], &s, 0);

Fixes: 53b406369e9d ("DFU: Check the number of arguments and argument string strictly")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agonet: Fix discuss discard typo
Marek Vasut [Sun, 1 May 2022 16:43:55 +0000 (18:43 +0200)]
net: Fix discuss discard typo

Replace discuss with discard, that is what happens with packet with
incorrect checksum. Fix the typo.

Fixes: 4b37fd146bb ("Convert CONFIG_UDP_CHECKSUM to Kconfig")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2 years agotools: binman: install btool
Peng Fan [Tue, 14 Jun 2022 10:42:07 +0000 (18:42 +0800)]
tools: binman: install btool

btool is needed after install binman to system.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2 years agoboard: ti: am335x: eth_cpsw should depend on CONFIG_NET
Corentin LABBE [Tue, 14 Jun 2022 08:44:07 +0000 (08:44 +0000)]
board: ti: am335x: eth_cpsw should depend on CONFIG_NET

The origin of this patch is the breaking of am335x-hs boot
due to commit e41651fffda7 ("dm: Support parent devices with of-platdata")
HS boards have less SRAM for SPL and so this commit increased memory usage beyond am335x limit.
This commit added 10 driver binding pass and am335x boot only if one pass is done.
SPL try to do more than one pass due to eth_cpsw failing.
Since HS SPL does not need network (and NET is already disabled in config),
the easiest fix is to "remove" eth_cpsw from SPL by testing if NET is enabled.

Signed-off-by: Corentin LABBE <clabbe@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Andrew Davis <afd@ti.com>
2 years agoarmv8: always use current exception level for TCR_ELx access
Andre Przywara [Mon, 13 Jun 2022 23:11:10 +0000 (00:11 +0100)]
armv8: always use current exception level for TCR_ELx access

Currently get_tcr() takes an "el" parameter, to select the proper
version of the TCR_ELx system register.
This is problematic in case of the Apple M1, since it runs with
HCR_EL2.E2H fixed to 1, so TCR_EL2 is actually using the TCR_EL1 layout,
and we get the wrong version.

For U-Boot's purposes the only sensible choice here is the current
exception level, and indeed most callers treat it like that, so let's
remove that parameter and read the current EL inside the function.
This allows us to check for the E2H bit, and pretend it's EL1 in this
case.

There are two callers which don't care about the EL, and they pass 0,
which looks wrong, but is irrelevant in these two cases, since we don't
use the return value there. So the change cannot affect those two.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2 years agoarm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocks
Heiko Thiery [Sat, 11 Jun 2022 06:09:04 +0000 (08:09 +0200)]
arm64: dts: imx8mq-kontron-pitx-imx8m-u-boot.dtsi: disable assigned clocks

With the move to use DM_CLK the boards uart stops working. The used
properties are not supported by the imx8mq clock driver. Thus
the correct baudrate cannot be selected. Remove this properties here and
the board can start with working uart. Keep it in the main dts because
linux handles these porperties fine.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2 years agousb: host: ehci-generic: Make resets and clocks optional
Andre Przywara [Tue, 7 Jun 2022 23:42:22 +0000 (00:42 +0100)]
usb: host: ehci-generic: Make resets and clocks optional

The generic EHCI binding does not *require* resets and clocks
properties, and indeed for instance the Allwinner A20 SoCs does not
need or define any resets in its DT.

Don't easily give up if clk_get_bulk() or reset_get_bulk() return an
error, but check if that is due to the DT simply having no entries for
either of them.

This fixes USB operation on all boards with an Allwinner A10 or A20 SoC,
which were reporting an error after commit ba96176ab70e2999:
=======================
Bus usb@1c14000: ehci_generic usb@1c14000: Failed to get resets (err=-2)
probe failed, error -2
=======================

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agofs/squashfs: sqfs_read: Prevent arbitrary code execution
Miquel Raynal [Thu, 9 Jun 2022 14:02:06 +0000 (16:02 +0200)]
fs/squashfs: sqfs_read: Prevent arbitrary code execution

Following Jincheng's report, an out-of-band write leading to arbitrary
code execution is possible because on one side the squashfs logic
accepts directory names up to 65535 bytes (u16), while U-Boot fs logic
accepts directory names up to 255 bytes long.

Prevent such an exploit from happening by capping directory name sizes
to 255. Use a define for this purpose so that developers can link the
limitation to its source and eventually kill it some day by dynamically
allocating this array (if ever desired).

Link: https://lore.kernel.org/all/CALO=DHFB+yBoXxVr5KcsK0iFdg+e7ywko4-e+72kjbcS8JBfPw@mail.gmail.com
Reported-by: Jincheng Wang <jc.w4ng@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Jincheng Wang <jc.w4ng@gmail.com>
2 years agoodroid_xu3: Fix board environment variable
Tom Rini [Wed, 8 Jun 2022 18:30:14 +0000 (14:30 -0400)]
odroid_xu3: Fix board environment variable

When migrating CONFIG_CONS_INDEX to Kconfig, on this platform we changed
what "board" evaluated to in the environment.  This in turn meant that
we would no longer try and find the correct fdtfile via the normal
distro boot logic.  Fix this by overriding board in the default
environment, as done on other platforms where CONFIG_SYS_BOARD is not
what we want to be in the board environment variable.

Fixes: f76750d11133 ("Convert CONFIG_CONS_INDEX et al to Kconfig")
Reported-by: Gabriel Hojda <ghojda@yo2urs.ro>
Tested-by: Gabriel Hojda <ghojda@yo2urs.ro>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 years ago.gitignore: add files produced by b4
Andrey Zhizhikin [Tue, 7 Jun 2022 08:13:00 +0000 (10:13 +0200)]
.gitignore: add files produced by b4

b4 utility [1] is introduced by Linux Kernel developers and used to
fetch patches and patch series from lore.kernel.org and is proven
to be useful for U-Boot development. Detailed usage of the tool can be
read under post from the original author [2].

This tool fetches files from the list and populates the source folder
with additional files (*.cover and *.mbx) which are not ignored by git
and shown as newly added files.

Add those file patterns into .gitignore file, so they can be safely
skipped during changes attestation.

Link: [1]: https://pypi.org/project/b4/
Link: [2]: https://people.kernel.org/monsieuricon/introducing-b4-and-patch-attestation
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2 years agoarch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlock
Christian Gmeiner [Thu, 12 May 2022 06:21:01 +0000 (08:21 +0200)]
arch: arm: mach-k3: am642_init: bring back MCU_PADCFG_MMR1 unlock

Without this register unlock it is not possible to configure the
pinmux used for mcu spi0.

Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2 years agoUpdate email address and company name
Christophe Leroy [Thu, 12 May 2022 14:21:53 +0000 (16:21 +0200)]
Update email address and company name

This patch updates my email address and company name.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
2 years agocrypto: fsl_hash: Remove unnecessary alignment check in caam_hash()
Stefan Roese [Fri, 29 Apr 2022 13:34:44 +0000 (15:34 +0200)]
crypto: fsl_hash: Remove unnecessary alignment check in caam_hash()

While working on an LX2160 based board and updating to latest mainline
I noticed problems using the HW accelerated hash functions on this
platform, when trying to boot a FIT Kernel image. Here the resulting
error message:

   Using 'conf-freescale_lx2160a.dtb' configuration
   Trying 'kernel-1' kernel subimage
   Verifying Hash Integrity ... sha256Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
 error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
ERROR: can't get kernel image!

Testing and checking with Gaurav Jain from NXP has revealed, that this
alignment check is not necessary here at all. So let's remove this
check completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gaurav Jain <gaurav.jain@nxp.com>
Cc: dullfire@yahoo.com
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2 years agoMerge tag 'u-boot-imx-20220616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Thu, 16 Jun 2022 12:38:46 +0000 (08:38 -0400)]
Merge tag 'u-boot-imx-20220616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220616
-------------------

Fixes for 2022.07 + Toradex apalis-imx8 (missed in last PR)

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12322

2 years agoarm: socfpga: vining: Unmount UBIFS and detach UBI in ubi_load script
Marek Vasut [Mon, 20 Dec 2021 21:57:57 +0000 (22:57 +0100)]
arm: socfpga: vining: Unmount UBIFS and detach UBI in ubi_load script

Clean up in ubiload script. Unmount UBIFS from which kernel image was
loaded and detach UBI on which the UBIFS is located, otherwise message
similar to the following is printed just before booting kernel:

Removing MTD device #7 (rootfs) with use count 1
Error when deleting partition "rootfs" (-16)

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoddr: altera: Stratix10: Use phys_size_t for memory size
Tien Fong Chee [Wed, 27 Apr 2022 04:52:42 +0000 (12:52 +0800)]
ddr: altera: Stratix10: Use phys_size_t for memory size

Replace with phys_size_t for all memory size variables declaration
for the sake of scalability. phys_size_t is defined in
/arch/arm/include/asm/types.h.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPS
Tien Fong Chee [Wed, 27 Apr 2022 04:27:21 +0000 (12:27 +0800)]
ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPS

Bit[7-4] for both register seq2core and core2seq handshake in HPS are not
required for triggering DDR re-calibration or resetting EMIF. So, ignoring
these bits just for playing it safe.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoarm: dts: socfpga: stratix10: Update MMC smplsel value
Yau Wai Gan [Tue, 24 May 2022 07:02:28 +0000 (15:02 +0800)]
arm: dts: socfpga: stratix10: Update MMC smplsel value

This new MMC sample select value is obtained from running
tests on multiple Stratix 10 boards and proven working.

Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-pmic
Tom Rini [Thu, 16 Jun 2022 03:11:30 +0000 (23:11 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-pmic

2 years agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Thu, 16 Jun 2022 03:10:17 +0000 (23:10 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-mmc

2 years agointel: n5x: ddr: update license
Tien Fong Chee [Fri, 10 Jun 2022 11:18:00 +0000 (19:18 +0800)]
intel: n5x: ddr: update license

All the source code of sdram_n5x.c are from Intel, update the license to
use both GPL2.0 and BSD-3 Clause because this copy of code may used for
open source and internal project.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agospi: nxp_fspi: Fix clock imbalance
Marek Vasut [Mon, 13 Jun 2022 12:35:25 +0000 (14:35 +0200)]
spi: nxp_fspi: Fix clock imbalance

The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(),
where the IP clock are initially disabled. Drop the second disabling of
clock to prevent clock enable/disable imbalance reported by clock core:

"
clk qspi_root_clk already disabled
"

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agommc: fsl_esdhc_imx: Implement wait_dat0 mmc ops
Loic Poulain [Thu, 26 May 2022 14:37:22 +0000 (16:37 +0200)]
mmc: fsl_esdhc_imx: Implement wait_dat0 mmc ops

Implement wait_dat0 mmc ops callbac, allowing to reduce SPL boot time.

Before (using grabserial):
[0.000001 0.000001] U-Boot SPL 2021.04-xxxx
[0.028257 0.028257] DDRINFO: start DRAM init
[0.028500 0.000243] DDRINFO: DRAM rate 3000MTS
[0.304627 0.276127] DDRINFO:ddrphy calibration done
[0.305647 0.001020] DDRINFO: ddrmix config done
[0.352584 0.046937] SEC0:  RNG instantiated
[0.374299 0.021715] Normal Boot
[0.374675 0.000376] Trying to boot from MMC2
[1.250580 0.875905] NOTICE:  BL31: v2.4(release):lf-5.10.72-2.2.0-0-g5782363f9
[1.251985 0.001405] NOTICE:  BL31: Built : 08:02:40, Apr 12 2022
[1.522560 0.270575]
[1.522734 0.000174]
[1.522788 0.000054] U-Boot 2021.04-xxxx

After:
[0.000001 0.000001] U-Boot SPL 2021.04-xxxx
[0.001614 0.001614] DDRINFO: start DRAM init
[0.002377 0.000763] DDRINFO: DRAM rate 3000MTS
[0.278494 0.276117] DDRINFO:ddrphy calibration done
[0.279266 0.000772] DDRINFO: ddrmix config done
[0.338432 0.059166] SEC0:  RNG instantiated
[0.339051 0.000619] Normal Boot
[0.339431 0.000380] Trying to boot from MMC2
[0.412587 0.073156] NOTICE:  BL31: v2.4(release):lf-5.15.5-1.0.0-0-g05f788b
[0.414191 0.001604] NOTICE:  BL31: Built : 10:35:26, Apr  6 2022
[0.700685 0.286494]
[0.700793 0.000108]
[0.700845 0.000052] U-Boot 2021.04-xxxx

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: Add support for wait_dat0 callback
Loic Poulain [Thu, 26 May 2022 14:37:21 +0000 (16:37 +0200)]
mmc: Add support for wait_dat0 callback

There is no wait_dat0 mmc ops, causing operations waiting for data
line state change (e.g mmc_switch_voltage) to fallback to a 250ms
active delay. mmc_ops still used when DM_MMC is not enabled, which
is often the case for SPL. The result can be unexpectly long SPL
boot time.

This change adds support for wait_dat0() mmc operation.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agoenv: mmc : align erase address and size on erase_grp_size
Patrick Delaunay [Tue, 15 Feb 2022 15:23:23 +0000 (16:23 +0100)]
env: mmc : align erase address and size on erase_grp_size

On eMMC device, the erase_grp_size > 1 so the address and size for the
erase block command in env/mmc.c can be unaligned on erase group size and
some strange trace occurs and the result is not guarantee by MMC devices.

The SD-Card behavior doesn't change as erase_grp_size = 1 for SD-Card.

For example, on eMMC present on STM32MP15C-EV1 and before the patch:

  STM32MP> env erase

  Erasing Environment on MMC...

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x27ff

  16 blocks erased: OK

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x23ff

  16 blocks erased: OK
  OK

After this patch:
  STM32MP> env erase
  Erasing Environment on MMC...
  1024 blocks erased at 0x2000: OK
  1024 blocks erased at 0x2000: OK
  OK

Here the 2 copies of U-Boot environment are in the same devices Erase
group: it is erased twice.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agommc: fix error message for unaligned erase request
Patrick Delaunay [Tue, 15 Feb 2022 15:23:22 +0000 (16:23 +0100)]
mmc: fix error message for unaligned erase request

Fix the end address in the message for unaligned erase request in
mmc_berase() when start + blkcnt is aligned to erase_grp_size.

for example:
  - start = 0x2000 - 26
  - count = 26
  - erase_grp_size = 0x400

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x27ff

But no issue when the end address is not aligned, for example
  - start = 0x2000 - 2 * 26
  - count = 26
  - erase_grp_size = 0x400

  Caution! Your devices Erase group is 0x400
  The erase range would be change to 0x2000~0x23ff

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agosecure boot: enable ARCH_MISC_INIT config.
Gaurav Jain [Thu, 9 Jun 2022 11:02:15 +0000 (16:32 +0530)]
secure boot: enable ARCH_MISC_INIT config.

add ARCH_MISC_INIT to initilaize caam jr driver.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoclk: imx8mp: use usb_core_ref for usb_root_clk
Andrey Zhizhikin [Fri, 3 Jun 2022 15:15:22 +0000 (17:15 +0200)]
clk: imx8mp: use usb_core_ref for usb_root_clk

Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY,
HSIOMIX clock") added usb_core_ref for USB Controller but never set it
to be used as a clock source, using rather "osc_32k" instead.

This produces following boot log message:
"clk_register: failed to get osc_32k device (parent of usb_root_clk)"

Fix the USB controller clock source by using usb_core_ref instead of
osc_32k.

Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoclk: imx8mp: fix root clock names for ecspi
Andrey Zhizhikin [Fri, 3 Jun 2022 15:15:21 +0000 (17:15 +0200)]
clk: imx8mp: fix root clock names for ecspi

Root clock name contained underscore, which does not match to the actual
clock name.

Correct the name to match what is present in the FDT.

Fixes: 87f958810fcb ("clk: imx8mp: Add ECSPI clocks")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoverdin-imx8mm, verdin-imx8mp: Fix default systemd console output
Philippe Schenker [Wed, 25 May 2022 07:55:02 +0000 (09:55 +0200)]
verdin-imx8mm, verdin-imx8mp: Fix default systemd console output

systemd prints its messages on the last console= statement that it finds
in the kernel arguments. The current ordering sends the systemd messages
to tty1, by default this is the display.

Ensure that systemd sends its messages to the default UART, reorder the
console= statements accordingly.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agomx6cuboxi: enable driver for adin1300 phy
Josua Mayer [Thu, 19 May 2022 09:32:00 +0000 (12:32 +0300)]
mx6cuboxi: enable driver for adin1300 phy

Since SoMs revision 1.9 the ar8035 phy has been replaced by adin1300.
Enable the driver so that the new SoMs have functional networking.

Signed-off-by: Josua Mayer <josua@solid-run.com>
2 years agomx6cuboxi: fixup dtb ethernet phy nodes before booting an OS
Josua Mayer [Thu, 19 May 2022 09:31:59 +0000 (12:31 +0300)]
mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS

SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300
at address 1. Because early SoMs had a hardware flaw, the ar8035 can
also appear at address 4 - making it a total of 3 phy nodes in the DTB.

To avoid confusing Linux with probe errors, fixup the dtb to only enable
the phy node that is detected at runtime.

Signed-off-by: Josua Mayer <josua@solid-run.com>
2 years agoARM: dts: imx6qdl-sr-som: add support for alternate phy addresses
Josua Mayer [Thu, 19 May 2022 09:31:58 +0000 (12:31 +0300)]
ARM: dts: imx6qdl-sr-som: add support for alternate phy addresses

The Cubox has an unstable phy address - which can appear at either
address 0 (intended) or 4 (unintended).

SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which
will always appear at address 1.

Change the reg property of the phy node to the magic value 0xffffffff,
which indicates to the generic phy driver that all addresses should be
probed. That allows the same node (which is pinned by phy-handle) to match
either the AR8035 PHY at both possible addresses, as well as the new one
at address 1.
Also add the new adi,phy-output-clock property for enabling the 125MHz
clock used by the fec ethernet controller, as submitted to Linux [1].

Linux solves this problem differently:
For the ar8035 phy it will probe both phy nodes in device-tree in order,
and use the one that succeeds. For the new adin1300 it expects U-Boot to
patch the status field in the DTB before booting

While at it also sync the reset-delay with the upstream Linux dtb.

[1] https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-josua@solid-run.com/

Signed-off-by: Josua Mayer <josua@solid-run.com>
2 years agophy: adin: add support for clock output
Josua Mayer [Thu, 19 May 2022 09:31:57 +0000 (12:31 +0300)]
phy: adin: add support for clock output

The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.

Add support for selecting the clock via device-tree properties.

This patch is based on the Linux implementation for this feature,
which has been added to netdev/net-next.git [1].

[2] https://patchwork.kernel.org/project/netdevbpf/cover/20220517085143.3749-1-josua@solid-run.com/

Signed-off-by: Josua Mayer <josua@solid-run.com>
2 years agophy: adin: fix broken support for adi, phy-mode-override
Nate Drude [Thu, 19 May 2022 09:31:56 +0000 (12:31 +0300)]
phy: adin: fix broken support for adi, phy-mode-override

Currently, the adin driver fails to compile.

The original patch introducing the adin driver used the function
phy_get_interface_by_name to support the adi,phy-mode-override
property. Unfortunately, a few days before the adin patch
was accepted, another patch removed support for phy_get_interface_by_name:

https://github.com/u-boot/u-boot/commit/123ca114e07ecf28aa2538748d733e2b22d8b8b5

This patch refactors adin_get_phy_mode_override, implementing the logic in
the new function, ofnode_read_phy_mode, from the patch above.

Signed-off-by: Nate Drude <nate.d@variscite.com>
Tested-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Josua Mayer <josua@solid-run.com>