platform/upstream/llvm.git
2 years ago[RISCV] Do not outline CFI instructions when they are needed in EH
wangpc [Fri, 22 Apr 2022 04:22:36 +0000 (12:22 +0800)]
[RISCV] Do not outline CFI instructions when they are needed in EH

We saw a failure caused by unwinding with incomplete CFIs, so we
can't outline CFI instructions when they are needed in EH.

This is a recommit of 0d40688, which was reverted in ce83883 as
related precommit test 360d44e caused some errors.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D122634

2 years ago[RISCV] Precommit test for D122634
wangpc [Fri, 22 Apr 2022 03:33:38 +0000 (11:33 +0800)]
[RISCV] Precommit test for D122634

This is a recommit of 360d44e, which was reverted
in b1620d4 because it caused some errors due to no
`nounwind` attrs in `machine-outliner-cfi.mir`.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D123364

2 years ago[AMDGPU] Remove no-ret atomic ops selection in the post-isel hook
Abinav Puthan Purayil [Tue, 19 Apr 2022 17:57:34 +0000 (23:27 +0530)]
[AMDGPU] Remove no-ret atomic ops selection in the post-isel hook

No-ret atomic ops are now selected in tblgen.

Differential Revision: https://reviews.llvm.org/D124086

2 years ago[AMDGPU] Remove atomic pattern args in FLAT_[Global_]Atomic_Pseudo defs
Abinav Puthan Purayil [Tue, 19 Apr 2022 17:32:38 +0000 (23:02 +0530)]
[AMDGPU] Remove atomic pattern args in FLAT_[Global_]Atomic_Pseudo defs

We already have explicit patterns for these.

Differential Revision: https://reviews.llvm.org/D124084

2 years ago[AMDGPU] Select no-return DS_PK_ADD_F16 in tblgen
Abinav Puthan Purayil [Sat, 9 Apr 2022 12:43:03 +0000 (18:13 +0530)]
[AMDGPU] Select no-return DS_PK_ADD_F16 in tblgen

Differential Revision: https://reviews.llvm.org/D123584

2 years ago[AMDGPU] Select no-return atomic intrinsics in tblgen
Abinav Puthan Purayil [Fri, 8 Apr 2022 09:26:18 +0000 (14:56 +0530)]
[AMDGPU] Select no-return atomic intrinsics in tblgen

This is to avoid relying on the post-isel hook.

This change also enable the saddr pattern selection for atomic
intrinsics in GlobalISel.

Differential Revision: https://reviews.llvm.org/D123583

2 years ago[tsan][test] Change -tsan to -passes=tsan
Fangrui Song [Fri, 22 Apr 2022 03:44:56 +0000 (20:44 -0700)]
[tsan][test] Change -tsan to -passes=tsan

2 years ago[x86] Support 3 builtin functions for 32-bits mode
Xiang1 Zhang [Fri, 22 Apr 2022 01:40:00 +0000 (09:40 +0800)]
[x86] Support 3 builtin functions for 32-bits mode
_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64

Reviewed By:RKSimon, Topper Craig
Differential Revision: https://reviews.llvm.org/D124067

2 years ago[RISCV][NFC] Use defvar to simplify pattern definations.
Ping Deng [Fri, 22 Apr 2022 02:44:56 +0000 (02:44 +0000)]
[RISCV][NFC] Use defvar to simplify pattern definations.

Reviewed By: jacquesguan, frasercrmck

Differential Revision: https://reviews.llvm.org/D123839

2 years ago[randstruct] Check final randomized layout ordering
Bill Wendling [Fri, 22 Apr 2022 02:40:28 +0000 (19:40 -0700)]
[randstruct] Check final randomized layout ordering

This uses "llvm::shuffle" to stop differences in shuffle ordering on
different platforms.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D124199

2 years ago[LegacyPM] Remove AddressSanitizerLegacyPass
Fangrui Song [Fri, 22 Apr 2022 02:25:57 +0000 (19:25 -0700)]
[LegacyPM] Remove AddressSanitizerLegacyPass

Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove AddressSanitizerLegacyPass,
ModuleAddressSanitizerLegacyPass, and ASanGlobalsMetadataWrapperPass.

MemorySanitizerLegacyPass was removed in D123894.

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D124216

2 years ago[DebugInfo][test] Delete a legacy asan test
Fangrui Song [Fri, 22 Apr 2022 02:22:47 +0000 (19:22 -0700)]
[DebugInfo][test] Delete a legacy asan test

2 years ago[DebugInfo][test] Delete a legacy asan test
Fangrui Song [Fri, 22 Apr 2022 02:21:27 +0000 (19:21 -0700)]
[DebugInfo][test] Delete a legacy asan test

2 years agoRevert "[LegacyPM] Remove AddressSanitizerLegacyPass"
Nico Weber [Fri, 22 Apr 2022 02:14:36 +0000 (22:14 -0400)]
Revert "[LegacyPM] Remove AddressSanitizerLegacyPass"

This reverts commit e68c589e53da4a53bf1cea79a9cb38308edbb8c6.
Breaks check-llvm, see comments on https://reviews.llvm.org/D124216

2 years ago[gn build] (manually) port a7691dee2d3c (TestAST)
Nico Weber [Fri, 22 Apr 2022 01:32:23 +0000 (21:32 -0400)]
[gn build] (manually) port a7691dee2d3c (TestAST)

This makes clang/lib/Testing the very first non-test()-target that includes
gtest headers, which means it needs an explicit dep on gtest.

2 years ago[Clang Format] emmintrin.h smmintrin.h (NFC)
Xiang1 Zhang [Fri, 22 Apr 2022 01:18:41 +0000 (09:18 +0800)]
[Clang Format] emmintrin.h smmintrin.h (NFC)

2 years ago[MLIR] prefer /bin/sh over /bin/bash for simple test scripts
Will Dietz [Thu, 21 Apr 2022 22:14:45 +0000 (17:14 -0500)]
[MLIR] prefer /bin/sh over /bin/bash for simple test scripts

These scripts do not appear to require bash, and while /bin/sh
is not guaranteed either it's more commonly available.

Fixes tests on NixOS and in certain sandbox build environments.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D124205

2 years ago[LegacyPM] Remove AddressSanitizerLegacyPass
Fangrui Song [Fri, 22 Apr 2022 01:18:39 +0000 (18:18 -0700)]
[LegacyPM] Remove AddressSanitizerLegacyPass

Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove AddressSanitizerLegacyPass,
ModuleAddressSanitizerLegacyPass, and ASanGlobalsMetadataWrapperPass.

MemorySanitizerLegacyPass was removed in D123894.

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D124216

2 years agoRevert "[x86] Support 3 builtin functions for 32-bits mode"
Xiang1 Zhang [Fri, 22 Apr 2022 01:11:40 +0000 (09:11 +0800)]
Revert "[x86] Support 3 builtin functions for 32-bits mode"

This reverts commit a69c219a8c9f7eaff142b6b4d135ac0456e0d4ae.

2 years ago[x86] Support 3 builtin functions for 32-bits mode
Xiang1 Zhang [Thu, 21 Apr 2022 01:10:45 +0000 (09:10 +0800)]
[x86] Support 3 builtin functions for 32-bits mode
_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64

2 years agoAMDGPU: Fix fneg combine test not checking full result
Matt Arsenault [Fri, 15 Apr 2022 13:50:45 +0000 (09:50 -0400)]
AMDGPU: Fix fneg combine test not checking full result

This wasn't accounting for the canonicalize of the input, or checking
the output fneg isn't folded as intended. Avoids test failure in
unrelated patch which happens to change register numberings.

2 years ago[mlir] Modify SuperVectorize to generate select op->combiner op
Amy Zhuang [Fri, 22 Apr 2022 00:09:13 +0000 (17:09 -0700)]
[mlir] Modify SuperVectorize to generate select op->combiner op

Insert the select op before the combiner op when vectorizing a
reduction loop that needs a mask, so the vectorized reduction loop
can pass isLoopParallel check and be transformed correctly in later
passes.

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D124047

2 years ago[scudo] Disable memory tagging on arm64_32
Dominic Chen [Thu, 21 Apr 2022 00:33:25 +0000 (17:33 -0700)]
[scudo] Disable memory tagging on arm64_32

arm64_32 is an ILP32 platform

Differential Revision: https://reviews.llvm.org/D124135

2 years ago[libcxx] Add some missing xlocale wrapper functions for OpenBSD
Brad Smith [Fri, 22 Apr 2022 00:00:59 +0000 (20:00 -0400)]
[libcxx] Add some missing xlocale wrapper functions for OpenBSD

Reviewed By: Mordante

Differential Revision: https://reviews.llvm.org/D122861

2 years agoRevert "[asan] Emit .size directive for global object size before redzone"
Vitaly Buka [Thu, 21 Apr 2022 23:20:04 +0000 (16:20 -0700)]
Revert "[asan] Emit .size directive for global object size before redzone"
Revert "[docs] Fix underline"

Breaks a lot of asan tests in google.

This reverts commit 365c3e85bced1fb56c2d94adc34bff7a94abe4a6.
This reverts commit 78a784bea443cdcecf894155ab37893d7a8e8332.

2 years ago[LLDB][NativePDB] Make sure the number of param symbol records is the same as the...
Zequan Wu [Thu, 21 Apr 2022 23:06:49 +0000 (16:06 -0700)]
[LLDB][NativePDB] Make sure the number of param symbol records is the same as the number get from function type record before setting parameters.

2 years ago[BOLT][DWARF] Implement monolithic DWARF5
Alexander Yermolovich [Thu, 21 Apr 2022 22:47:49 +0000 (15:47 -0700)]
[BOLT][DWARF] Implement monolithic DWARF5

Added implementation to support DWARF5 in monolithic mode.
Next step DWARF5 split dwarf support.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D121876

2 years ago[OpenMP] Properly guard linker input using the new driver
Joseph Huber [Thu, 21 Apr 2022 22:49:31 +0000 (18:49 -0400)]
[OpenMP] Properly guard linker input using the new driver

Summary:
A new offloading action builder line was added that wasn't guarded with
the new driver for OpenMP. This doesn't affect anything now but could
potentially cause problems.

2 years ago[OpenMP][Docs] Remove usage of deprecated flag in documentation
Joseph Huber [Thu, 21 Apr 2022 22:34:19 +0000 (18:34 -0400)]
[OpenMP][Docs] Remove usage of deprecated flag in documentation

Summary:
This documentation used the `-fopenmp-target-new-runtime` flag which is
deprecated and has no effect. Remove it.

2 years agoRevert "[clang][safestack] Remove triple from stack usage test"
Paul Kirth [Thu, 21 Apr 2022 22:44:42 +0000 (22:44 +0000)]
Revert "[clang][safestack] Remove triple from stack usage test"

This reverts commit 414f84ba29d96c8cbbe198cfc022146e4582cbef.

Requires deirectives had already been added to the test, and CC1 tests
should use a target triple.

Differential Revision: https://reviews.llvm.org/D124210

2 years ago[mlgo][nfc] Decouple TensorSpec from tensorflow.
Mircea Trofin [Tue, 19 Apr 2022 21:21:16 +0000 (14:21 -0700)]
[mlgo][nfc] Decouple TensorSpec from tensorflow.

The motivation is twofold:

1) Allow plugging in a different training-time evaluator, e.g.
   TFLite-based, etc.

2) Allow using TensorSpec for AOT, too, to support evolution: we start
   by extracting a superset of the features currently supported by a
   model. For the tensors the model does not support, we just return a
   valid, but useless, buffer. This makes using a 'smaller' model (less
   supported tensors) transparent to the compiler. The key is to
   dimension the buffer appropriately, and we already have TensorSpec
   modeling that info.

The only coupling was due to the reliance of a TF internal API for
getting the element size, but for the types we are interested in,
`sizeof` is sufficient.

A subsequent change will yank out TensorSpec in its own module.

Differential Revision: https://reviews.llvm.org/D124045

2 years ago[mlir][Linalg] Deprecate legacy reshape + generic op folding patterns.
Mahesh Ravishankar [Thu, 21 Apr 2022 04:54:16 +0000 (04:54 +0000)]
[mlir][Linalg] Deprecate legacy reshape + generic op folding patterns.

These patterns have been superceded by the fusion by collapsing patterns.

Differential Revision: https://reviews.llvm.org/D124145

2 years ago[libc] Use correct mnemonic for arm64_32 architecture
Dominic Chen [Thu, 21 Apr 2022 00:28:51 +0000 (17:28 -0700)]
[libc] Use correct mnemonic for arm64_32 architecture

arm64_32 is an ILP32 platform

Differential Revision: https://reviews.llvm.org/D124134

2 years ago[DEBUG-INFO] Change how we handle auto return types for lambda operator() to be consi...
Shafik Yaghmour [Thu, 21 Apr 2022 21:56:22 +0000 (14:56 -0700)]
[DEBUG-INFO] Change how we handle auto return types for lambda operator() to be consistent with gcc

D70524 added support for auto return types for C++ member functions. I was
implementing support on the LLDB side for looking up the deduced type.

I ran into trouble with some cases with respect to lambdas. I looked into
how gcc was handling these cases and it appears gcc emits the deduced return type for lambdas.

So I am changing out behavior to match that.

Differential Revision: https://reviews.llvm.org/D123319

2 years ago[clang][safestack] Remove triple from stack usage test
Paul Kirth [Thu, 21 Apr 2022 21:51:03 +0000 (21:51 +0000)]
[clang][safestack] Remove triple from stack usage test

Supplying the target triple caused breakeages for compilers that don't support
the supplied triple.

Reviewed By: mysterymath

Differential Revision: https://reviews.llvm.org/D124203

2 years ago[clang-format] Fix a crash on AllowShortFunctionsOnASingleLine
owenca [Thu, 21 Apr 2022 06:53:17 +0000 (23:53 -0700)]
[clang-format] Fix a crash on AllowShortFunctionsOnASingleLine

Fixes #55008.

Differential Revision: https://reviews.llvm.org/D124152

2 years ago[TTI] Pre-commit cost model tests splat-loads.
Vasileios Porpodas [Thu, 21 Apr 2022 20:59:51 +0000 (13:59 -0700)]
[TTI] Pre-commit cost model tests splat-loads.

2 years agoFix sanitizer stack traces on aarch64.
Roy Sundahl [Thu, 21 Apr 2022 00:58:52 +0000 (17:58 -0700)]
Fix sanitizer stack traces on aarch64.

Fixes llvm-project/compiler-rt/test/asan/TestCases/null_deref.cpp on
macOS/aarch64.

The bp (base pointer) variable was being loaded from register LR and
not FP on aarch64 (except for this narrow case):
defined(__IPHONE_8_0) && __IPHONE_OS_VERSION_MAX_ALLOWED >= __IPHONE_8_0

Without a valid bp from the FP register, it is not possible to traverse
previous frames for a complete stack trace. The rationale for fetching
the LR as the bp for all cases except above is not clear but since the
FP register is the canonical register for use as the frame pointer, this
commit removes the restriction above for unconditional use all aarch64.

rdar://91587039

Differential Revision: https://reviews.llvm.org/D124140

2 years ago[Testing] Fix standalone builds after a7691dee2d3c0ea3f9f4d1
Sam McCall [Thu, 21 Apr 2022 21:22:22 +0000 (23:22 +0200)]
[Testing] Fix standalone builds after a7691dee2d3c0ea3f9f4d1

2 years agoUse builtin recognition to detect std::move / std::forward.
Richard Smith [Thu, 21 Apr 2022 00:51:44 +0000 (17:51 -0700)]
Use builtin recognition to detect std::move / std::forward.

Replaces some prior ad-hoc detection strategies and generally cleans up
a little. No functional change intended.

2 years ago[clang-format][NFC] Clean up code in token annotator
owenca [Wed, 13 Apr 2022 21:54:32 +0000 (14:54 -0700)]
[clang-format][NFC] Clean up code in token annotator

Differential Revision: https://reviews.llvm.org/D123741

2 years ago[DWARF] Add API to get data from MCDwarfLineStr
Alexander Yermolovich [Thu, 21 Apr 2022 21:07:05 +0000 (14:07 -0700)]
[DWARF] Add API to get data from MCDwarfLineStr

This API will be used in D121876, to get finalized string data for
.debug_line_str.

Reviewed By: dblaikie, rafauler

Differential Revision: https://reviews.llvm.org/D124052

2 years ago[docs] Fix underline
Alex Brachet [Thu, 21 Apr 2022 21:05:49 +0000 (21:05 +0000)]
[docs] Fix underline

2 years ago[clangd] Fix CLANGD_TIDY_CHECKS=Off tests after b859c39c40a7
Sam McCall [Thu, 21 Apr 2022 21:02:28 +0000 (23:02 +0200)]
[clangd] Fix CLANGD_TIDY_CHECKS=Off tests after b859c39c40a7

2 years ago[msan] Update Use-after-destruction documentation
Vitaly Buka [Wed, 20 Apr 2022 01:42:17 +0000 (18:42 -0700)]
[msan] Update Use-after-destruction documentation

Reviewed By: kda, eugenis

Differential Revision: https://reviews.llvm.org/D124058

2 years agoMark test stack-usage-safestack.c as requiring x86.
Douglas Yung [Thu, 21 Apr 2022 20:55:51 +0000 (13:55 -0700)]
Mark test stack-usage-safestack.c as requiring x86.

This should fix buildbots that don't build the x86 target.

2 years ago[Testing] fix shared lib build after a7691dee2d3c0ea3f9f4d1
Sam McCall [Thu, 21 Apr 2022 20:49:03 +0000 (22:49 +0200)]
[Testing] fix shared lib build after a7691dee2d3c0ea3f9f4d1

We still want clang_target_link_libraries for the clang deps.

2 years ago[asan] Emit .size directive for global object size before redzone
Alex Brachet [Thu, 21 Apr 2022 20:46:38 +0000 (20:46 +0000)]
[asan] Emit .size directive for global object size before redzone

This emits an `st_size` that represents the actual useable size of an object before the redzone is added.

Reviewed By: vitalybuka, MaskRay, hctim

Differential Revision: https://reviews.llvm.org/D123010

2 years ago[bazel] try to adapt a7691dee2d3c0ea3f9f4d1, again
Sam McCall [Thu, 21 Apr 2022 20:33:33 +0000 (22:33 +0200)]
[bazel] try to adapt a7691dee2d3c0ea3f9f4d1, again

2 years ago[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X (2nd try)
Sanjay Patel [Thu, 21 Apr 2022 20:07:00 +0000 (16:07 -0400)]
[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X (2nd try)

The first attempt at this missed a check to make sure the offset
constant was in range and caused many bot failures.

That was missed in the Alive2 proof because on overshift creates
poison rather than the assert from APInt. Here's an alternate
attempt at a proof using count-trailing-zeros:
https://alive2.llvm.org/ce/z/pnXQYR

Original commit message:

This is similar to an existing pre-shift-of-constant fold:
8a9c70fc01e6
...but in this case, we need no-wrap on the shl and a negative
offset:
https://alive2.llvm.org/ce/z/_RVz99

2 years ago[bazel] try to adapt a7691dee2d3c0ea3f9f4d1
Sam McCall [Thu, 21 Apr 2022 20:09:05 +0000 (22:09 +0200)]
[bazel] try to adapt a7691dee2d3c0ea3f9f4d1

2 years agoRevert "[SimplifyCFG] Handle branch on same condition in pred more directly" and...
Fangrui Song [Thu, 21 Apr 2022 19:58:58 +0000 (12:58 -0700)]
Revert "[SimplifyCFG] Handle branch on same condition in pred more directly" and "[SimplifyCFG] Make FoldCondBranchOnPHI more amenable to extension"

This reverts commit 3df86e799e46bc1139372a2f40c31333716e3ad6.
This reverts commit 8988254667fff67d1f585396aa0e9933f5ba69ad.

`[SimplifyCFG] Handle branch on same condition in pred more directly`
caused non-determinism when compiling opt with a bootstrapped clang.
I have to revert the dependent commit as well.

2 years ago[Testing] TestAST, a helper for writing straight-line AST tests
Sam McCall [Tue, 12 Apr 2022 14:27:11 +0000 (16:27 +0200)]
[Testing] TestAST, a helper for writing straight-line AST tests

Tests that need ASTs have to deal with the awkward control flow of
FrontendAction in some way. There are a few idioms used:
 - don't bother with unit tests, use clang -dump-ast
 - create an ASTConsumer by hand, which is bulky
 - use ASTMatchFinder - works pretty well if matchers are actually
   needed, very strange if they are not
 - use ASTUnit - this yields nice straight-line code, but ASTUnit is a
   terrifically complicated library not designed for this purpose

TestAST provides a very simple way to write straight-line tests: specify
the code/flags and it provides an AST that is kept alive until the
object is destroyed.
It's loosely modeled after TestTU in clangd, which we've successfully
used for a variety of tests.

I've updated a couple of clang tests to use this helper, IMO they're clearer.

Differential Revision: https://reviews.llvm.org/D123668

2 years ago[Libomptarget][remote] Add OpenMP linker flag to the plugin
Atmn Patel [Thu, 21 Apr 2022 19:40:43 +0000 (15:40 -0400)]
[Libomptarget][remote] Add OpenMP linker flag to the plugin

The remote offloading server and plugin rely on OpenMP, so this needs to be added as a linker flag. Without this, applications segfault.

Differential Revision: https://reviews.llvm.org/D124200

2 years ago[DeveloperPolicy] Add invitation link for commit access.
Xiang Li [Thu, 21 Apr 2022 18:45:30 +0000 (11:45 -0700)]
[DeveloperPolicy] Add invitation link for commit access.

In some case, GitHub will not send notification for commit access invitation. Add invitation link for people don't get notification from GitHub.

Reviewed By: lattner

Differential Revision: https://reviews.llvm.org/D124191

2 years ago[AsmParser/Printer] Rework sourceloc support for function arguments.
Chris Lattner [Thu, 21 Apr 2022 17:43:30 +0000 (10:43 -0700)]
[AsmParser/Printer] Rework sourceloc support for function arguments.

When Location tracking support for block arguments was added, we
discussed various approaches to threading support for this through
function-like argument parsing.  At the time, we added a parallel array
of locations that could hold this.  It turns out that that approach was
verbose and error prone, roughly no one adopted it.

This patch takes a different approach, adding an optional source
locator to the UnresolvedOperand class.  This fits much more naturally
into the standard structure we use for representing locators, and gives
all the function like dialects locator support for free (e.g. see the
test adding an example for the LLVM dialect).

Differential Revision: https://reviews.llvm.org/D124188

2 years ago[libc++][CI] added XFAIL LIBCXX-AIX-FIXME to new runnning test cases after install...
zhijian [Thu, 21 Apr 2022 19:25:40 +0000 (15:25 -0400)]
[libc++][CI] added XFAIL LIBCXX-AIX-FIXME to new runnning test cases after install locale fileset on AIX OS.

Summary:

1. there are 23 test cases which do not run because of locale fileset not install, after the locale installed, these test cases will be run and fail. "LIBCXX-AIX-FIXME" on the 23 test cases which remain to be investigated on AIX.

2.after installed the locale fileset ,
the test case
libcxx/test/std/localization/locale.categories/category.collate/locale.collate.byname/compare.pass.cpp pass
remove XFAIL: LIBCXX-AIX-FIXME from the file

Reviewers: David Tenty
Differential Revision: https://reviews.llvm.org/D124174

2 years ago[MLIR] Fix iteration counting in greedy pattern application
Frederik Gossen [Thu, 21 Apr 2022 19:14:07 +0000 (15:14 -0400)]
[MLIR] Fix iteration counting in greedy pattern application

Previously, checking that a fix point is reached was counted as a full
iteration. As this "iteration" never changes the IR, this seems counter-
intuitive.

Differential Revision: https://reviews.llvm.org/D123641

2 years agoReland [Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory
Sam McCall [Thu, 21 Apr 2022 18:24:19 +0000 (20:24 +0200)]
Reland [Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory

This reverts commit eadf35270727ca743c11b07040bbfedd415ab6dc.

The reland fixes a couple of places in clang that were unneccesarily
requesting a null-terminated buffer of the PCH, and hitting assertions.

2 years ago[RISCV] Teach generateInstSeqImpl to generate BSETI for single bit cases.
Craig Topper [Thu, 21 Apr 2022 19:04:57 +0000 (12:04 -0700)]
[RISCV] Teach generateInstSeqImpl to generate BSETI for single bit cases.

If the immediate has one bit set, but isn't a simm32 we can try
the BSETI instruction from Zbs.

2 years ago[SystemZ] Add z16 scheduler description
Ulrich Weigand [Thu, 21 Apr 2022 18:38:16 +0000 (20:38 +0200)]
[SystemZ] Add z16 scheduler description

Add scheduler description for the new IBM z16 processor.

Patch by Jonas Paulsson.

2 years agoRevert "[Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory"
Sam McCall [Thu, 21 Apr 2022 18:22:47 +0000 (20:22 +0200)]
Revert "[Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory"

This reverts commit 6e22dac2e2955db1310c63aec215fc22d8da258e.

Seems to cause bot failures e.g.
https://lab.llvm.org/buildbot/#/builders/109/builds/37071

2 years ago[InstCombine] add more tests for a planned shift fold; NFC
Sanjay Patel [Thu, 21 Apr 2022 18:05:38 +0000 (14:05 -0400)]
[InstCombine] add more tests for a planned shift fold; NFC

These are reductions for a missed constraint (the offset
constant must be less than the bitwidth) that caused the
first version of the patch ( 5819f4a42286 ) to be reverted.

2 years ago[LegacyPM] Remove GCOVProfilerLegacyPass
Fangrui Song [Thu, 21 Apr 2022 17:59:29 +0000 (10:59 -0700)]
[LegacyPM] Remove GCOVProfilerLegacyPass

Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove GCOVProfilerLegacyPass.

I have checked many LLVM users and only llvm-hs[1] uses the legacy gcov pass.

[1]: https://github.com/llvm-hs/llvm-hs/issues/392

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D123829

2 years agoSupport z16 processor name
Ulrich Weigand [Thu, 21 Apr 2022 17:55:58 +0000 (19:55 +0200)]
Support z16 processor name

The recently announced IBM z16 processor implements the architecture
already supported as "arch14" in LLVM.  This patch adds support for
"z16" as an alternate architecture name for arch14.

2 years ago[Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory
Sam McCall [Thu, 21 Apr 2022 15:59:50 +0000 (17:59 +0200)]
[Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory

Instead of unconditionally copying the PCHBuffer into an ostream which can be
backed either by a string or a file, just make the PCHBuffer itself the
in-memory storage.

Differential Revision: https://reviews.llvm.org/D124180

2 years ago[clangd] Fix a declare-constructor tweak crash on incomplete fields.
Haojian Wu [Thu, 21 Apr 2022 09:14:36 +0000 (11:14 +0200)]
[clangd] Fix a declare-constructor tweak crash on incomplete fields.

Differential Revision: https://reviews.llvm.org/D124154

2 years ago[sanitizer] Fix prctl unit test on non-SMT systems
Ulrich Weigand [Thu, 21 Apr 2022 17:31:04 +0000 (19:31 +0200)]
[sanitizer] Fix prctl unit test on non-SMT systems

On systems where the kernel supports the PR_SCHED_CORE
interface, but there is no SMT, the prctl call will set
errno to ENODEV, which currently causes the test to fail.

Fix by accepting ENODEV in addition to EINVAL.

2 years ago[LegacyPM] Remove MemorySanitizerLegacyPass
Fangrui Song [Thu, 21 Apr 2022 17:21:46 +0000 (10:21 -0700)]
[LegacyPM] Remove MemorySanitizerLegacyPass

Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove MemorySanitizerLegacyPass.

Differential Revision: https://reviews.llvm.org/D123894

2 years ago[SLP] Refactoring isLegalBroadcastLoad() to use `ElementCount`.
Vasileios Porpodas [Wed, 20 Apr 2022 15:17:29 +0000 (08:17 -0700)]
[SLP] Refactoring isLegalBroadcastLoad() to use `ElementCount`.

Replacing `unsigned` with `ElementCount` in the argument of `isLegalBroadcastLoad()`.
This helps reduce the diff of a future SLP patch for AArch64.

2 years ago[AIX] Always pass namedsects option when linking with PGO.
Wael Yehia [Tue, 19 Apr 2022 22:42:03 +0000 (22:42 +0000)]
[AIX] Always pass namedsects option when linking with PGO.

Differential Revision: https://reviews.llvm.org/D124046

2 years agoRevert "[InstCombine] Add one use limitation for (X * C2) << C1 --> X * (C2 << C1)"
chenglin.bi [Thu, 21 Apr 2022 16:56:20 +0000 (00:56 +0800)]
Revert "[InstCombine] Add one use limitation for  (X * C2) << C1 --> X * (C2 << C1)"

This reverts commit b543d28df7b067dcda833c717a59faa28c1151a1.

2 years ago[mlir] enable doc generation for the transform dialect
Alex Zinenko [Thu, 21 Apr 2022 16:25:55 +0000 (18:25 +0200)]
[mlir] enable doc generation for the transform dialect

2 years ago[RISCV] Add special case to constant materialization to remove trailing zeros first.
Craig Topper [Thu, 21 Apr 2022 06:09:59 +0000 (23:09 -0700)]
[RISCV] Add special case to constant materialization to remove trailing zeros first.

If there are fewer than 12 trailing zeros, we'll try to use an ADDI
at the end of the sequence. If we strip trailing zeros and end the
sequence with a SLLI we might find a shorter sequence.

Differential Revision: https://reviews.llvm.org/D124148

2 years ago[AMDGPU] Refine 64 bit misaligned LDS ops selection
Stanislav Mekhanoshin [Tue, 12 Apr 2022 22:29:44 +0000 (15:29 -0700)]
[AMDGPU] Refine 64 bit misaligned LDS ops selection

Here is the performance data:
```
Using platform: AMD Accelerated Parallel Processing
Using device: gfx900:xnack-

ds_write_b64                       aligned by  8:  3.2 sec
ds_write2_b32                      aligned by  8:  3.2 sec
ds_write_b16 * 4                   aligned by  8:  7.0 sec
ds_write_b8 * 8                    aligned by  8: 13.2 sec
ds_write_b64                       aligned by  1:  7.3 sec
ds_write2_b32                      aligned by  1:  7.5 sec
ds_write_b16 * 4                   aligned by  1: 14.0 sec
ds_write_b8 * 8                    aligned by  1: 13.2 sec
ds_write_b64                       aligned by  2:  7.3 sec
ds_write2_b32                      aligned by  2:  7.5 sec
ds_write_b16 * 4                   aligned by  2:  7.1 sec
ds_write_b8 * 8                    aligned by  2: 13.3 sec
ds_write_b64                       aligned by  4:  4.6 sec
ds_write2_b32                      aligned by  4:  3.2 sec
ds_write_b16 * 4                   aligned by  4:  7.1 sec
ds_write_b8 * 8                    aligned by  4: 13.3 sec
ds_read_b64                        aligned by  8:  2.3 sec
ds_read2_b32                       aligned by  8:  2.2 sec
ds_read_u16 * 4                    aligned by  8:  4.8 sec
ds_read_u8 * 8                     aligned by  8:  8.6 sec
ds_read_b64                        aligned by  1:  4.4 sec
ds_read2_b32                       aligned by  1:  7.3 sec
ds_read_u16 * 4                    aligned by  1: 14.0 sec
ds_read_u8 * 8                     aligned by  1:  8.7 sec
ds_read_b64                        aligned by  2:  4.4 sec
ds_read2_b32                       aligned by  2:  7.3 sec
ds_read_u16 * 4                    aligned by  2:  4.8 sec
ds_read_u8 * 8                     aligned by  2:  8.7 sec
ds_read_b64                        aligned by  4:  4.4 sec
ds_read2_b32                       aligned by  4:  2.3 sec
ds_read_u16 * 4                    aligned by  4:  4.8 sec
ds_read_u8 * 8                     aligned by  4:  8.7 sec

Using platform: AMD Accelerated Parallel Processing
Using device: gfx1030

ds_write_b64                       aligned by  8:  4.4 sec
ds_write2_b32                      aligned by  8:  4.3 sec
ds_write_b16 * 4                   aligned by  8:  7.9 sec
ds_write_b8 * 8                    aligned by  8: 13.0 sec
ds_write_b64                       aligned by  1: 23.2 sec
ds_write2_b32                      aligned by  1: 23.1 sec
ds_write_b16 * 4                   aligned by  1: 44.0 sec
ds_write_b8 * 8                    aligned by  1: 13.0 sec
ds_write_b64                       aligned by  2: 23.2 sec
ds_write2_b32                      aligned by  2: 23.1 sec
ds_write_b16 * 4                   aligned by  2:  7.9 sec
ds_write_b8 * 8                    aligned by  2: 13.1 sec
ds_write_b64                       aligned by  4: 13.5 sec
ds_write2_b32                      aligned by  4:  4.3 sec
ds_write_b16 * 4                   aligned by  4:  7.9 sec
ds_write_b8 * 8                    aligned by  4: 13.1 sec
ds_read_b64                        aligned by  8:  3.5 sec
ds_read2_b32                       aligned by  8:  3.4 sec
ds_read_u16 * 4                    aligned by  8:  5.3 sec
ds_read_u8 * 8                     aligned by  8:  8.5 sec
ds_read_b64                        aligned by  1: 13.1 sec
ds_read2_b32                       aligned by  1: 22.7 sec
ds_read_u16 * 4                    aligned by  1: 43.9 sec
ds_read_u8 * 8                     aligned by  1:  7.9 sec
ds_read_b64                        aligned by  2: 13.1 sec
ds_read2_b32                       aligned by  2: 22.7 sec
ds_read_u16 * 4                    aligned by  2:  5.6 sec
ds_read_u8 * 8                     aligned by  2:  7.9 sec
ds_read_b64                        aligned by  4: 13.1 sec
ds_read2_b32                       aligned by  4:  3.4 sec
ds_read_u16 * 4                    aligned by  4:  5.6 sec
ds_read_u8 * 8                     aligned by  4:  7.9 sec
```

GFX10 exposes a different pattern for sub-DWORD load/store performance
than GFX9. On GFX9 it is faster to issue a single unaligned load or
store than a fully split b8 access, where on GFX10 even a full split
is better. However, this is a theoretical only gain because splitting
an access to a sub-dword level will require more registers and packing/
unpacking logic, so ignoring this option it is better to use a single
64 bit instruction on a misaligned data with the exception of 4 byte
aligned data where ds_read2_b32/ds_write2_b32 is better.

Differential Revision: https://reviews.llvm.org/D123956

2 years ago[InstCombine] Add one use limitation for (X * C2) << C1 --> X * (C2 << C1)
chenglin.bi [Thu, 21 Apr 2022 16:32:36 +0000 (00:32 +0800)]
[InstCombine] Add one use limitation for  (X * C2) << C1 --> X * (C2 << C1)

Follow up D123453, add one-use limitation for
(X * C2) << C1 --> X * (C2 << C1)
to make consistent with
lshr (mul nuw x, MulC), ShAmtC -> mul nuw x, (MulC >> ShAmtC)

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D124183

2 years ago[clang][HIP] Updating driver to enable archive/bitcode to bitcode linking when target...
Jacob Lambert [Thu, 21 Apr 2022 07:01:15 +0000 (00:01 -0700)]
[clang][HIP] Updating driver to enable archive/bitcode to bitcode linking when targeting HIPAMD toolchain

Differential Revision: https://reviews.llvm.org/D124151

2 years agoRevert "[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X"
Sanjay Patel [Thu, 21 Apr 2022 16:14:08 +0000 (12:14 -0400)]
Revert "[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X"

This reverts commit 5819f4a422865fc9a8ea4dc772769e14010ff6a7.
This caused bots to fail with a crash/assert during the fold,
so some constraint was missed.

2 years ago[InstCombine] add baseline test for (X * C2) << C1 --> X * (C2 << C1) without one...
chenglin.bi [Thu, 21 Apr 2022 16:12:06 +0000 (00:12 +0800)]
[InstCombine] add baseline test for (X * C2) << C1 --> X * (C2 << C1) without one use; NFC

2 years ago[Frontend] Simplify PrecompiledPreamble::PCHStorage. NFC
Sam McCall [Thu, 21 Apr 2022 14:37:01 +0000 (16:37 +0200)]
[Frontend] Simplify PrecompiledPreamble::PCHStorage. NFC

- Remove fiddly union, preambles are heavyweight
- Remove fiddly move constructors in TempPCHFile and PCHStorage, use unique_ptr
- Remove unneccesary accessors on PCHStorage
- Remove trivial InMemoryStorage
- Move implementation details into cpp file

This is a prefactoring, followup change will change the in-memory PCHStorage to
avoid extra string copies while creating it.

Differential Revision: https://reviews.llvm.org/D124177

2 years ago[lld/mac] Warn that writing zippered outputs isn't implemented
Nico Weber [Wed, 20 Apr 2022 16:36:16 +0000 (12:36 -0400)]
[lld/mac] Warn that writing zippered outputs isn't implemented

A "zippered" dylib contains several LC_BUILD_VERSION load commands, usually
one each for "normal" macOS and one for macCatalyst.

These are usually created by passing something like

   -shared -target arm64-apple-macos -darwin-target-variant arm64-apple-ios13.1-macabi

to clang, which turns it into

    -platform_version macos 12.0.0 12.3 -platform_version "mac catalyst" 14.0.0 15.4

for the linker.

ld64.lld can read these files fine, but it can't write them.  Before this
change, it would just silently use the last -platform_version flag and ignore
the rest.

This change adds a warning that writing zippered dylibs isn't implemented yet
instead.

Sadly, parts of ld64.lld's test suite relied on the previous
"silently use last flag" semantics for its test suite: `%lld` always expanded
to `ld64.lld -platform_version macos 10.15 11.0` and tests that wanted a
different value passed a 2nd `-platform_version` flag later on. But this now
produces a warning if the platform passed to `-platform_version` is not `macos`.

There weren't very many cases of this, so move these to use `%no-arg-lld` and
manually pass `-arch`.

Differential Revision: https://reviews.llvm.org/D124106

2 years ago[clangd] Add beforeExecute() callback to FeatureModules.
Adam Czachorowski [Thu, 21 Apr 2022 14:25:57 +0000 (16:25 +0200)]
[clangd] Add beforeExecute() callback to FeatureModules.

It runs immediatelly before FrontendAction::Execute() with a mutable
CompilerInstance, allowing FeatureModules to register callbacks, remap
files, etc.

Differential Revision: https://reviews.llvm.org/D124176

2 years ago[X86] Add test case for Issue #54911
Simon Pilgrim [Thu, 21 Apr 2022 16:02:05 +0000 (17:02 +0100)]
[X86] Add test case for Issue #54911

2 years agoRevert D121279 "[MLIR][GPU] Add canonicalizer for gpu.memcpy"
Fangrui Song [Thu, 21 Apr 2022 15:55:13 +0000 (08:55 -0700)]
Revert D121279 "[MLIR][GPU] Add canonicalizer for gpu.memcpy"

This reverts commit 12f55cac69d8978d1c433756a8b2114bf9ed1e1b.

Causes miscompile. Will follow up with a reproduce.

2 years ago[M68k] Regenerate cmp.ll tests
Simon Pilgrim [Thu, 21 Apr 2022 15:54:00 +0000 (16:54 +0100)]
[M68k] Regenerate cmp.ll tests

M68k is still experimental so wasn't updated in a recent DAG combine

2 years ago[fuchsia] Don't include duplicate profiling symbols for Fuchsia
Tyler Mandry [Thu, 21 Apr 2022 15:42:55 +0000 (15:42 +0000)]
[fuchsia] Don't include duplicate profiling symbols for Fuchsia

InstrProfilingPlatformLinux.c already provides these symbols. Linker order
saved us from noticing before.

Reviewed By: mcgrathr

Differential Revision: https://reviews.llvm.org/D124136

2 years ago[compiler-rt][Darwin] Add arm64 to simulator platforms
Byoungchan Lee [Thu, 21 Apr 2022 15:29:45 +0000 (17:29 +0200)]
[compiler-rt][Darwin] Add arm64 to simulator platforms

This patch is the reland of a8e5ce76b475a22546090a73c22fa4f83529aa4e,
which includes additional SDK version checks to ensure that
XCode's headers support arm64 builds.

Differential Revision: https://reviews.llvm.org/D119174

2 years ago[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X
Sanjay Patel [Thu, 21 Apr 2022 14:54:40 +0000 (10:54 -0400)]
[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X

This is similar to an existing pre-shift-of-constant fold:
8a9c70fc01e6
...but in this case, we need no-wrap on the shl and a negative
offset:
https://alive2.llvm.org/ce/z/_RVz99

Fixes #54890

2 years ago[InstCombine] add tests for C << (X - C1); NFC
Sanjay Patel [Wed, 20 Apr 2022 19:43:14 +0000 (15:43 -0400)]
[InstCombine] add tests for C << (X - C1); NFC

2 years ago[PS4] Driver: use correct --shared option
Paul Robinson [Thu, 21 Apr 2022 15:19:20 +0000 (08:19 -0700)]
[PS4] Driver: use correct --shared option

2 years ago[clangd] Include Cleaner: suppress unused warnings for IWYU pragma: export
Kirill Bobyrev [Thu, 21 Apr 2022 14:59:59 +0000 (16:59 +0200)]
[clangd] Include Cleaner: suppress unused warnings for IWYU pragma: export

Add limited support for "IWYU pragma: export" - for now it just supresses the
warning similar to "IWYU pragma: keep".

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D124170

2 years ago[clangd] Correctly identify self-contained headers included rercursively
Kirill Bobyrev [Thu, 21 Apr 2022 14:30:29 +0000 (16:30 +0200)]
[clangd] Correctly identify self-contained headers included rercursively

Right now when exiting the file Headers.cpp will identify the recursive
inclusion (with a new FileID) as non self-contained and will add it to the set
from which it will never be removed. As a result, we get incorrect results in
the IncludeStructure and Include Cleaner. This patch is a fix.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D124166

2 years ago[llvm-ar] Fix thin archive being wrongly converted to a full archive
gbreynoo [Thu, 21 Apr 2022 14:48:26 +0000 (15:48 +0100)]
[llvm-ar] Fix thin archive being wrongly converted to a full archive

When using the L option to quick append a full archive to a thin
archive, the thin archive was being wrongly converted to a full archive.
I've fixed the issue and added a check for it in
thin-to-full-archive.test and expanded some tests.

Differential Revision: https://reviews.llvm.org/D123142

2 years ago[mlir] Connect Transform dialect to PDL
Alex Zinenko [Wed, 20 Apr 2022 10:57:23 +0000 (12:57 +0200)]
[mlir] Connect Transform dialect to PDL

This introduces a pair of ops to the Transform dialect that connect it to PDL
patterns. Transform dialect relies on PDL for matching the Payload IR ops that
are about to be transformed. For this purpose, it provides a container op for
patterns, a "pdl_match" op and transform interface implementations that call
into the pattern matching infrastructure.

To enable the caching of compiled patterns, this also provides the extension
mechanism for TransformState. Extensions allow one to store additional
information in the TransformState and thus communicate it between different
Transform dialect operations when they are applied. They can be added and
removed when applying transform ops. An extension containing a symbol table in
which the pattern names are resolved and a pattern compilation cache is
introduced as the first client.

Depends On D123664

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D124007

2 years ago[LLVM-ML] Add standard LLVM debug flags
Eric Astor [Thu, 21 Apr 2022 14:01:02 +0000 (10:01 -0400)]
[LLVM-ML] Add standard LLVM debug flags

Adds support for -debug and -debug-only= flags.

Reviewed By: ayzhao

Differential Revision: https://reviews.llvm.org/D123545

2 years agoAMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32
Petar Avramovic [Thu, 21 Apr 2022 13:41:12 +0000 (15:41 +0200)]
AMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32

Fix isVCC for register that was assigned register class during
inst-selection. This happens when register has multiple uses.
For wave32, uniform i1 to vcc copy was selected like vcc to vcc
copy when uniform i1 had assigned register class.
Uniform i1 register with assigned register class will have s1 LLT,
be defined using G_TRUNC and class will be SReg_32RegClass.
Vcc i1 register with assigned register class will have s1 LLT,
class will be SReg_32RegClass for wave32 and SReg_64RegClass for
wave64 and register will not be defined by G_TRUNC.

Differential Revision: https://reviews.llvm.org/D124163

2 years agoAMDGPU/GlobalISel: Precommit test for D124163
Petar Avramovic [Thu, 21 Apr 2022 13:37:11 +0000 (15:37 +0200)]
AMDGPU/GlobalISel: Precommit test for D124163

2 years ago[InstCombine] Fix typo in test (NFC)
Nikita Popov [Thu, 21 Apr 2022 13:58:17 +0000 (15:58 +0200)]
[InstCombine] Fix typo in test (NFC)

This is a copy paste mistake, this variant of the test was supposed
to use poison instead of undef.

2 years ago[AArch64] Add `foldOverflowCheck` DAG combine
Karl Meakin [Thu, 21 Apr 2022 13:55:27 +0000 (14:55 +0100)]
[AArch64] Add `foldOverflowCheck` DAG combine

Differential Revision: https://reviews.llvm.org//D123779

2 years ago[AArch64] Add lowerings for {ADD,SUB}CARRY and S{ADD,SUB}O_CARRY
Karl Meakin [Thu, 21 Apr 2022 13:54:05 +0000 (14:54 +0100)]
[AArch64] Add lowerings for {ADD,SUB}CARRY and S{ADD,SUB}O_CARRY

Differential Revision: https://reviews.llvm.org/D123322