Xiang Li [Thu, 21 Apr 2022 18:45:30 +0000 (11:45 -0700)]
[DeveloperPolicy] Add invitation link for commit access.
In some case, GitHub will not send notification for commit access invitation. Add invitation link for people don't get notification from GitHub.
Reviewed By: lattner
Differential Revision: https://reviews.llvm.org/D124191
Chris Lattner [Thu, 21 Apr 2022 17:43:30 +0000 (10:43 -0700)]
[AsmParser/Printer] Rework sourceloc support for function arguments.
When Location tracking support for block arguments was added, we
discussed various approaches to threading support for this through
function-like argument parsing. At the time, we added a parallel array
of locations that could hold this. It turns out that that approach was
verbose and error prone, roughly no one adopted it.
This patch takes a different approach, adding an optional source
locator to the UnresolvedOperand class. This fits much more naturally
into the standard structure we use for representing locators, and gives
all the function like dialects locator support for free (e.g. see the
test adding an example for the LLVM dialect).
Differential Revision: https://reviews.llvm.org/D124188
zhijian [Thu, 21 Apr 2022 19:25:40 +0000 (15:25 -0400)]
[libc++][CI] added XFAIL LIBCXX-AIX-FIXME to new runnning test cases after install locale fileset on AIX OS.
Summary:
1. there are 23 test cases which do not run because of locale fileset not install, after the locale installed, these test cases will be run and fail. "LIBCXX-AIX-FIXME" on the 23 test cases which remain to be investigated on AIX.
2.after installed the locale fileset ,
the test case
libcxx/test/std/localization/locale.categories/category.collate/locale.collate.byname/compare.pass.cpp pass
remove XFAIL: LIBCXX-AIX-FIXME from the file
Reviewers: David Tenty
Differential Revision: https://reviews.llvm.org/D124174
Frederik Gossen [Thu, 21 Apr 2022 19:14:07 +0000 (15:14 -0400)]
[MLIR] Fix iteration counting in greedy pattern application
Previously, checking that a fix point is reached was counted as a full
iteration. As this "iteration" never changes the IR, this seems counter-
intuitive.
Differential Revision: https://reviews.llvm.org/D123641
Sam McCall [Thu, 21 Apr 2022 18:24:19 +0000 (20:24 +0200)]
Reland [Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory
This reverts commit
eadf35270727ca743c11b07040bbfedd415ab6dc.
The reland fixes a couple of places in clang that were unneccesarily
requesting a null-terminated buffer of the PCH, and hitting assertions.
Craig Topper [Thu, 21 Apr 2022 19:04:57 +0000 (12:04 -0700)]
[RISCV] Teach generateInstSeqImpl to generate BSETI for single bit cases.
If the immediate has one bit set, but isn't a simm32 we can try
the BSETI instruction from Zbs.
Ulrich Weigand [Thu, 21 Apr 2022 18:38:16 +0000 (20:38 +0200)]
[SystemZ] Add z16 scheduler description
Add scheduler description for the new IBM z16 processor.
Patch by Jonas Paulsson.
Sam McCall [Thu, 21 Apr 2022 18:22:47 +0000 (20:22 +0200)]
Revert "[Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory"
This reverts commit
6e22dac2e2955db1310c63aec215fc22d8da258e.
Seems to cause bot failures e.g.
https://lab.llvm.org/buildbot/#/builders/109/builds/37071
Sanjay Patel [Thu, 21 Apr 2022 18:05:38 +0000 (14:05 -0400)]
[InstCombine] add more tests for a planned shift fold; NFC
These are reductions for a missed constraint (the offset
constant must be less than the bitwidth) that caused the
first version of the patch (
5819f4a42286 ) to be reverted.
Fangrui Song [Thu, 21 Apr 2022 17:59:29 +0000 (10:59 -0700)]
[LegacyPM] Remove GCOVProfilerLegacyPass
Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove GCOVProfilerLegacyPass.
I have checked many LLVM users and only llvm-hs[1] uses the legacy gcov pass.
[1]: https://github.com/llvm-hs/llvm-hs/issues/392
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D123829
Ulrich Weigand [Thu, 21 Apr 2022 17:55:58 +0000 (19:55 +0200)]
Support z16 processor name
The recently announced IBM z16 processor implements the architecture
already supported as "arch14" in LLVM. This patch adds support for
"z16" as an alternate architecture name for arch14.
Sam McCall [Thu, 21 Apr 2022 15:59:50 +0000 (17:59 +0200)]
[Frontend] avoid copy of PCH data when PrecompiledPreamble stores it in memory
Instead of unconditionally copying the PCHBuffer into an ostream which can be
backed either by a string or a file, just make the PCHBuffer itself the
in-memory storage.
Differential Revision: https://reviews.llvm.org/D124180
Haojian Wu [Thu, 21 Apr 2022 09:14:36 +0000 (11:14 +0200)]
[clangd] Fix a declare-constructor tweak crash on incomplete fields.
Differential Revision: https://reviews.llvm.org/D124154
Ulrich Weigand [Thu, 21 Apr 2022 17:31:04 +0000 (19:31 +0200)]
[sanitizer] Fix prctl unit test on non-SMT systems
On systems where the kernel supports the PR_SCHED_CORE
interface, but there is no SMT, the prctl call will set
errno to ENODEV, which currently causes the test to fail.
Fix by accepting ENODEV in addition to EINVAL.
Fangrui Song [Thu, 21 Apr 2022 17:21:46 +0000 (10:21 -0700)]
[LegacyPM] Remove MemorySanitizerLegacyPass
Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove MemorySanitizerLegacyPass.
Differential Revision: https://reviews.llvm.org/D123894
Vasileios Porpodas [Wed, 20 Apr 2022 15:17:29 +0000 (08:17 -0700)]
[SLP] Refactoring isLegalBroadcastLoad() to use `ElementCount`.
Replacing `unsigned` with `ElementCount` in the argument of `isLegalBroadcastLoad()`.
This helps reduce the diff of a future SLP patch for AArch64.
Wael Yehia [Tue, 19 Apr 2022 22:42:03 +0000 (22:42 +0000)]
[AIX] Always pass namedsects option when linking with PGO.
Differential Revision: https://reviews.llvm.org/D124046
chenglin.bi [Thu, 21 Apr 2022 16:56:20 +0000 (00:56 +0800)]
Revert "[InstCombine] Add one use limitation for (X * C2) << C1 --> X * (C2 << C1)"
This reverts commit
b543d28df7b067dcda833c717a59faa28c1151a1.
Alex Zinenko [Thu, 21 Apr 2022 16:25:55 +0000 (18:25 +0200)]
[mlir] enable doc generation for the transform dialect
Craig Topper [Thu, 21 Apr 2022 06:09:59 +0000 (23:09 -0700)]
[RISCV] Add special case to constant materialization to remove trailing zeros first.
If there are fewer than 12 trailing zeros, we'll try to use an ADDI
at the end of the sequence. If we strip trailing zeros and end the
sequence with a SLLI we might find a shorter sequence.
Differential Revision: https://reviews.llvm.org/D124148
Stanislav Mekhanoshin [Tue, 12 Apr 2022 22:29:44 +0000 (15:29 -0700)]
[AMDGPU] Refine 64 bit misaligned LDS ops selection
Here is the performance data:
```
Using platform: AMD Accelerated Parallel Processing
Using device: gfx900:xnack-
ds_write_b64 aligned by 8: 3.2 sec
ds_write2_b32 aligned by 8: 3.2 sec
ds_write_b16 * 4 aligned by 8: 7.0 sec
ds_write_b8 * 8 aligned by 8: 13.2 sec
ds_write_b64 aligned by 1: 7.3 sec
ds_write2_b32 aligned by 1: 7.5 sec
ds_write_b16 * 4 aligned by 1: 14.0 sec
ds_write_b8 * 8 aligned by 1: 13.2 sec
ds_write_b64 aligned by 2: 7.3 sec
ds_write2_b32 aligned by 2: 7.5 sec
ds_write_b16 * 4 aligned by 2: 7.1 sec
ds_write_b8 * 8 aligned by 2: 13.3 sec
ds_write_b64 aligned by 4: 4.6 sec
ds_write2_b32 aligned by 4: 3.2 sec
ds_write_b16 * 4 aligned by 4: 7.1 sec
ds_write_b8 * 8 aligned by 4: 13.3 sec
ds_read_b64 aligned by 8: 2.3 sec
ds_read2_b32 aligned by 8: 2.2 sec
ds_read_u16 * 4 aligned by 8: 4.8 sec
ds_read_u8 * 8 aligned by 8: 8.6 sec
ds_read_b64 aligned by 1: 4.4 sec
ds_read2_b32 aligned by 1: 7.3 sec
ds_read_u16 * 4 aligned by 1: 14.0 sec
ds_read_u8 * 8 aligned by 1: 8.7 sec
ds_read_b64 aligned by 2: 4.4 sec
ds_read2_b32 aligned by 2: 7.3 sec
ds_read_u16 * 4 aligned by 2: 4.8 sec
ds_read_u8 * 8 aligned by 2: 8.7 sec
ds_read_b64 aligned by 4: 4.4 sec
ds_read2_b32 aligned by 4: 2.3 sec
ds_read_u16 * 4 aligned by 4: 4.8 sec
ds_read_u8 * 8 aligned by 4: 8.7 sec
Using platform: AMD Accelerated Parallel Processing
Using device: gfx1030
ds_write_b64 aligned by 8: 4.4 sec
ds_write2_b32 aligned by 8: 4.3 sec
ds_write_b16 * 4 aligned by 8: 7.9 sec
ds_write_b8 * 8 aligned by 8: 13.0 sec
ds_write_b64 aligned by 1: 23.2 sec
ds_write2_b32 aligned by 1: 23.1 sec
ds_write_b16 * 4 aligned by 1: 44.0 sec
ds_write_b8 * 8 aligned by 1: 13.0 sec
ds_write_b64 aligned by 2: 23.2 sec
ds_write2_b32 aligned by 2: 23.1 sec
ds_write_b16 * 4 aligned by 2: 7.9 sec
ds_write_b8 * 8 aligned by 2: 13.1 sec
ds_write_b64 aligned by 4: 13.5 sec
ds_write2_b32 aligned by 4: 4.3 sec
ds_write_b16 * 4 aligned by 4: 7.9 sec
ds_write_b8 * 8 aligned by 4: 13.1 sec
ds_read_b64 aligned by 8: 3.5 sec
ds_read2_b32 aligned by 8: 3.4 sec
ds_read_u16 * 4 aligned by 8: 5.3 sec
ds_read_u8 * 8 aligned by 8: 8.5 sec
ds_read_b64 aligned by 1: 13.1 sec
ds_read2_b32 aligned by 1: 22.7 sec
ds_read_u16 * 4 aligned by 1: 43.9 sec
ds_read_u8 * 8 aligned by 1: 7.9 sec
ds_read_b64 aligned by 2: 13.1 sec
ds_read2_b32 aligned by 2: 22.7 sec
ds_read_u16 * 4 aligned by 2: 5.6 sec
ds_read_u8 * 8 aligned by 2: 7.9 sec
ds_read_b64 aligned by 4: 13.1 sec
ds_read2_b32 aligned by 4: 3.4 sec
ds_read_u16 * 4 aligned by 4: 5.6 sec
ds_read_u8 * 8 aligned by 4: 7.9 sec
```
GFX10 exposes a different pattern for sub-DWORD load/store performance
than GFX9. On GFX9 it is faster to issue a single unaligned load or
store than a fully split b8 access, where on GFX10 even a full split
is better. However, this is a theoretical only gain because splitting
an access to a sub-dword level will require more registers and packing/
unpacking logic, so ignoring this option it is better to use a single
64 bit instruction on a misaligned data with the exception of 4 byte
aligned data where ds_read2_b32/ds_write2_b32 is better.
Differential Revision: https://reviews.llvm.org/D123956
chenglin.bi [Thu, 21 Apr 2022 16:32:36 +0000 (00:32 +0800)]
[InstCombine] Add one use limitation for (X * C2) << C1 --> X * (C2 << C1)
Follow up D123453, add one-use limitation for
(X * C2) << C1 --> X * (C2 << C1)
to make consistent with
lshr (mul nuw x, MulC), ShAmtC -> mul nuw x, (MulC >> ShAmtC)
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D124183
Jacob Lambert [Thu, 21 Apr 2022 07:01:15 +0000 (00:01 -0700)]
[clang][HIP] Updating driver to enable archive/bitcode to bitcode linking when targeting HIPAMD toolchain
Differential Revision: https://reviews.llvm.org/D124151
Sanjay Patel [Thu, 21 Apr 2022 16:14:08 +0000 (12:14 -0400)]
Revert "[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X"
This reverts commit
5819f4a422865fc9a8ea4dc772769e14010ff6a7.
This caused bots to fail with a crash/assert during the fold,
so some constraint was missed.
chenglin.bi [Thu, 21 Apr 2022 16:12:06 +0000 (00:12 +0800)]
[InstCombine] add baseline test for (X * C2) << C1 --> X * (C2 << C1) without one use; NFC
Sam McCall [Thu, 21 Apr 2022 14:37:01 +0000 (16:37 +0200)]
[Frontend] Simplify PrecompiledPreamble::PCHStorage. NFC
- Remove fiddly union, preambles are heavyweight
- Remove fiddly move constructors in TempPCHFile and PCHStorage, use unique_ptr
- Remove unneccesary accessors on PCHStorage
- Remove trivial InMemoryStorage
- Move implementation details into cpp file
This is a prefactoring, followup change will change the in-memory PCHStorage to
avoid extra string copies while creating it.
Differential Revision: https://reviews.llvm.org/D124177
Nico Weber [Wed, 20 Apr 2022 16:36:16 +0000 (12:36 -0400)]
[lld/mac] Warn that writing zippered outputs isn't implemented
A "zippered" dylib contains several LC_BUILD_VERSION load commands, usually
one each for "normal" macOS and one for macCatalyst.
These are usually created by passing something like
-shared -target arm64-apple-macos -darwin-target-variant arm64-apple-ios13.1-macabi
to clang, which turns it into
-platform_version macos 12.0.0 12.3 -platform_version "mac catalyst" 14.0.0 15.4
for the linker.
ld64.lld can read these files fine, but it can't write them. Before this
change, it would just silently use the last -platform_version flag and ignore
the rest.
This change adds a warning that writing zippered dylibs isn't implemented yet
instead.
Sadly, parts of ld64.lld's test suite relied on the previous
"silently use last flag" semantics for its test suite: `%lld` always expanded
to `ld64.lld -platform_version macos 10.15 11.0` and tests that wanted a
different value passed a 2nd `-platform_version` flag later on. But this now
produces a warning if the platform passed to `-platform_version` is not `macos`.
There weren't very many cases of this, so move these to use `%no-arg-lld` and
manually pass `-arch`.
Differential Revision: https://reviews.llvm.org/D124106
Adam Czachorowski [Thu, 21 Apr 2022 14:25:57 +0000 (16:25 +0200)]
[clangd] Add beforeExecute() callback to FeatureModules.
It runs immediatelly before FrontendAction::Execute() with a mutable
CompilerInstance, allowing FeatureModules to register callbacks, remap
files, etc.
Differential Revision: https://reviews.llvm.org/D124176
Simon Pilgrim [Thu, 21 Apr 2022 16:02:05 +0000 (17:02 +0100)]
[X86] Add test case for Issue #54911
Fangrui Song [Thu, 21 Apr 2022 15:55:13 +0000 (08:55 -0700)]
Revert D121279 "[MLIR][GPU] Add canonicalizer for gpu.memcpy"
This reverts commit
12f55cac69d8978d1c433756a8b2114bf9ed1e1b.
Causes miscompile. Will follow up with a reproduce.
Simon Pilgrim [Thu, 21 Apr 2022 15:54:00 +0000 (16:54 +0100)]
[M68k] Regenerate cmp.ll tests
M68k is still experimental so wasn't updated in a recent DAG combine
Tyler Mandry [Thu, 21 Apr 2022 15:42:55 +0000 (15:42 +0000)]
[fuchsia] Don't include duplicate profiling symbols for Fuchsia
InstrProfilingPlatformLinux.c already provides these symbols. Linker order
saved us from noticing before.
Reviewed By: mcgrathr
Differential Revision: https://reviews.llvm.org/D124136
Byoungchan Lee [Thu, 21 Apr 2022 15:29:45 +0000 (17:29 +0200)]
[compiler-rt][Darwin] Add arm64 to simulator platforms
This patch is the reland of
a8e5ce76b475a22546090a73c22fa4f83529aa4e,
which includes additional SDK version checks to ensure that
XCode's headers support arm64 builds.
Differential Revision: https://reviews.llvm.org/D119174
Sanjay Patel [Thu, 21 Apr 2022 14:54:40 +0000 (10:54 -0400)]
[InstCombine] C0 <<{nsw, nuw} (X - C1) --> (C0 >> C1) << X
This is similar to an existing pre-shift-of-constant fold:
8a9c70fc01e6
...but in this case, we need no-wrap on the shl and a negative
offset:
https://alive2.llvm.org/ce/z/_RVz99
Fixes #54890
Sanjay Patel [Wed, 20 Apr 2022 19:43:14 +0000 (15:43 -0400)]
[InstCombine] add tests for C << (X - C1); NFC
Paul Robinson [Thu, 21 Apr 2022 15:19:20 +0000 (08:19 -0700)]
[PS4] Driver: use correct --shared option
Kirill Bobyrev [Thu, 21 Apr 2022 14:59:59 +0000 (16:59 +0200)]
[clangd] Include Cleaner: suppress unused warnings for IWYU pragma: export
Add limited support for "IWYU pragma: export" - for now it just supresses the
warning similar to "IWYU pragma: keep".
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D124170
Kirill Bobyrev [Thu, 21 Apr 2022 14:30:29 +0000 (16:30 +0200)]
[clangd] Correctly identify self-contained headers included rercursively
Right now when exiting the file Headers.cpp will identify the recursive
inclusion (with a new FileID) as non self-contained and will add it to the set
from which it will never be removed. As a result, we get incorrect results in
the IncludeStructure and Include Cleaner. This patch is a fix.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D124166
gbreynoo [Thu, 21 Apr 2022 14:48:26 +0000 (15:48 +0100)]
[llvm-ar] Fix thin archive being wrongly converted to a full archive
When using the L option to quick append a full archive to a thin
archive, the thin archive was being wrongly converted to a full archive.
I've fixed the issue and added a check for it in
thin-to-full-archive.test and expanded some tests.
Differential Revision: https://reviews.llvm.org/D123142
Alex Zinenko [Wed, 20 Apr 2022 10:57:23 +0000 (12:57 +0200)]
[mlir] Connect Transform dialect to PDL
This introduces a pair of ops to the Transform dialect that connect it to PDL
patterns. Transform dialect relies on PDL for matching the Payload IR ops that
are about to be transformed. For this purpose, it provides a container op for
patterns, a "pdl_match" op and transform interface implementations that call
into the pattern matching infrastructure.
To enable the caching of compiled patterns, this also provides the extension
mechanism for TransformState. Extensions allow one to store additional
information in the TransformState and thus communicate it between different
Transform dialect operations when they are applied. They can be added and
removed when applying transform ops. An extension containing a symbol table in
which the pattern names are resolved and a pattern compilation cache is
introduced as the first client.
Depends On D123664
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D124007
Eric Astor [Thu, 21 Apr 2022 14:01:02 +0000 (10:01 -0400)]
[LLVM-ML] Add standard LLVM debug flags
Adds support for -debug and -debug-only= flags.
Reviewed By: ayzhao
Differential Revision: https://reviews.llvm.org/D123545
Petar Avramovic [Thu, 21 Apr 2022 13:41:12 +0000 (15:41 +0200)]
AMDGPU/GlobalISel: Fix isVCC for uniform s1 with reg class on wave32
Fix isVCC for register that was assigned register class during
inst-selection. This happens when register has multiple uses.
For wave32, uniform i1 to vcc copy was selected like vcc to vcc
copy when uniform i1 had assigned register class.
Uniform i1 register with assigned register class will have s1 LLT,
be defined using G_TRUNC and class will be SReg_32RegClass.
Vcc i1 register with assigned register class will have s1 LLT,
class will be SReg_32RegClass for wave32 and SReg_64RegClass for
wave64 and register will not be defined by G_TRUNC.
Differential Revision: https://reviews.llvm.org/D124163
Petar Avramovic [Thu, 21 Apr 2022 13:37:11 +0000 (15:37 +0200)]
AMDGPU/GlobalISel: Precommit test for D124163
Nikita Popov [Thu, 21 Apr 2022 13:58:17 +0000 (15:58 +0200)]
[InstCombine] Fix typo in test (NFC)
This is a copy paste mistake, this variant of the test was supposed
to use poison instead of undef.
Karl Meakin [Thu, 21 Apr 2022 13:55:27 +0000 (14:55 +0100)]
[AArch64] Add `foldOverflowCheck` DAG combine
Differential Revision: https://reviews.llvm.org//D123779
Karl Meakin [Thu, 21 Apr 2022 13:54:05 +0000 (14:54 +0100)]
[AArch64] Add lowerings for {ADD,SUB}CARRY and S{ADD,SUB}O_CARRY
Differential Revision: https://reviews.llvm.org/D123322
Nikita Popov [Thu, 21 Apr 2022 13:53:14 +0000 (15:53 +0200)]
[InstCombine] Remove dead code (NFC)
This was a leftover condition without code.
Jannik Silvanus [Thu, 21 Apr 2022 13:42:22 +0000 (14:42 +0100)]
[AMDGPU]: Fix failing assertion in SIMachineScheduler
This fixes the assertion failure "Loop in the Block Graph!".
SIMachineScheduler groups instructions into blocks (also referred to
as coloring or groups) and then performs a two-level scheduling:
inter-block scheduling, and intra-block scheduling.
This approach requires that the dependency graph on the blocks which
is obtained by contracting the blocks in the original dependency graph
is acyclic. In other words: Whenever A and B end up in the same block,
all vertices on a path from A to B must be in the same block.
When compiling an example consisting of an export followed by
a buffer store, we see a dependency between these two. This dependency
may be false, but that is a different issue.
This dependency was not correctly accounted for by SiMachineScheduler.
A new test case si-scheduler-exports.ll demonstrating this is
also added in this commit.
The problematic part of SiMachineScheduler was a post-optimization of
the block assignment that tried to group all export instructions into
a separate export block for better execution performance. This routine
correctly checked that any paths from exports to exports did not
contain any non-exports, but not vice-versa: In case of an export with
a non-export successor dependency, that single export was moved
to a separate block, which could then be both a successor and a
predecessor block of a non-export block.
As fix, we now skip export grouping if there are exports with direct
non-export successor dependencies. This fixes the issue at hand,
but is slightly pessimistic:
We *could* group all exports into a separate block that have neither
direct nor indirect export successor dependencies.
We will review the potential performance impact and potentially
revisit with a more sophisticated implementation.
Note that just grouping all exports without direct non-export successor
dependencies could still lead to illegal blocks, since non-export A
could depend on export B that depends on export C. In that case,
export C has no non-export successor, but still may not be grouped
into an export block.
Luo, Yuanke [Thu, 21 Apr 2022 13:38:55 +0000 (21:38 +0800)]
[X86] Add test case for SetCCMOVMSK combine.
Create 2 users for MOVMSK to test if compiler would perform the combine
"MOVMSK(CONCAT(X,Y)) == 0 -> MOVMSK(OR(X,Y))".
Nikita Popov [Thu, 21 Apr 2022 13:45:54 +0000 (15:45 +0200)]
[InstCombine] Add tests for memset with undef/poison value (NFC)
Nikita Popov [Thu, 21 Apr 2022 13:40:48 +0000 (15:40 +0200)]
[InstCombine] Split up test for store with undef (NFC)
Markus Böck [Thu, 21 Apr 2022 13:32:21 +0000 (15:32 +0200)]
[mlir] Fix `Region`s `takeBody` method if the region is not empty
The current implementation of takeBody first clears the Region, before then taking ownership of the blocks of the other regions. The issue here however, is that when clearing the region, it does not take into account references of operations to each other. In particular, blocks are deleted from front to back, and operations within a block are very likely to be deleted despite still having uses, causing an assertion to trigger [0].
This patch fixes that issue by simply calling dropAllReferences()before clearing the blocks.
[0] https://github.com/llvm/llvm-project/blob/
9a8bb4bc635de9d56706262083c15eb1e0cf3e87/mlir/lib/IR/Operation.cpp#L154
Differential Revision: https://reviews.llvm.org/D123913
Fabian Wolff [Thu, 21 Apr 2022 13:18:31 +0000 (15:18 +0200)]
[clang-tidy] Fix behavior of `modernize-use-using` with nested structs/unions
Fixes https://github.com/llvm/llvm-project/issues/50334.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D113804
Andrew Savonichev [Tue, 19 Apr 2022 17:01:14 +0000 (20:01 +0300)]
[NVPTX] Fix LIT tests with default nameTableKind
Default nameTableKind results in the following DWARF section:
.section .debug_pubnames
{
.b32 LpubNames_end0-LpubNames_start0 // Length of Public Names Info
LpubNames_start0:
[...]
LpubNames_end0:
}
Without -mattr=+ptx75 ptxas complains about labels and label
expressions:
error : Feature 'labels1 - labels2 expression in .section' requires
PTX ISA .version 7.5 or later
error : Feature 'Defining labels in .section' requires PTX ISA
.version 7.0 or later
The patch modifies dbg-value-const-byref.ll to let it run without PTX
7.5 (available from CUDA 11.0), and adds a new test just for this
case.
Differential revision: https://reviews.llvm.org/D124108
Simon Pilgrim [Thu, 21 Apr 2022 12:58:43 +0000 (13:58 +0100)]
[InstCombine] Add nonpow2 (negative) test for D123374
Aaron Ballman [Thu, 21 Apr 2022 12:52:07 +0000 (08:52 -0400)]
Fix Sphinx build
Nikita Popov [Thu, 21 Apr 2022 12:34:36 +0000 (14:34 +0200)]
[PhaseOrdering] Remove RUN lines for legacy PM (NFC)
wangpc [Thu, 21 Apr 2022 12:32:56 +0000 (20:32 +0800)]
Revert "[RISCV] Precommit test for D122634"
This reverts commit
360d44e86defea94fb5608765fbdbfdb2a36f4c6.
Nikolas Klauser [Wed, 20 Apr 2022 08:52:04 +0000 (10:52 +0200)]
[libc++] Use bit field for checking if string is in long or short mode
This makes the code a bit simpler and (I think) removes the undefined behaviour from the normal string layout.
Reviewed By: ldionne, Mordante, #libc
Spies: labath, dblaikie, JDevlieghere, krytarowski, jgorbe, jingham, saugustine, arichardson, libcxx-commits
Differential Revision: https://reviews.llvm.org/D123580
Pavel Labath [Wed, 20 Apr 2022 18:52:14 +0000 (20:52 +0200)]
[lldb] Adjust libc++ string formatter for changes in D123580
The code needs more TLC, but for now I've tried making only the changes
that are necessary to get the tests passing -- postponing the more
invasive changes after I create a more comprehensive test.
In a couple of places I have changed the index-based element accesses to
name-based ones (as these are less sensitive to code perturbations). I'm
not sure why the code was using indexes in the first place, but I've
(manually) tested the change with various libc++ versions, and found no
issues with this approach.
Differential Revision: https://reviews.llvm.org/D124113
Nikola Tesic [Thu, 21 Apr 2022 11:56:51 +0000 (13:56 +0200)]
[Debugify] Limit number of processed functions for original mode
Debugify in OriginalDebugInfo mode, does (DebugInfo) collect-before-pass & check-after-pass
for each instruction, which is pretty expensive. When used to analyze DebugInfo losses
in large projects (like LLVM), this raises the build time unacceptably.
This patch introduces a limit for the number of processed functions per compile unit.
By default, the limit is set to UINT_MAX (practically unlimited), and by using the introduced
option -debugify-func-limit the limit could be set to any positive integer number.
Differential revision: https://reviews.llvm.org/D115714
Markus Böck [Thu, 21 Apr 2022 11:43:00 +0000 (13:43 +0200)]
[mlir] Make `Regions`s `cloneInto` multithread-readable
Prior to this patch, `cloneInto` would do a simple walk over the blocks and contained operations and clone and map them as it encounters them. As finishing touch it then remaps any successor and operands it has remapped during that process.
This is generally fine, but sadly leads to a lot of uses of both operations and blocks from the source region, in the cloned operations in the target region. Those uses lead to writes in the use-def list of the operations, making `cloneInto` never thread safe.
This patch reimplements `cloneInto` in three steps to avoid ever creating any extra uses on elements in the source region:
* It first creates the mapping of all blocks and block operands
* It then clones all operations to create the mapping of all operation results, but does not yet clone any regions or set the operands
* After all operation results have been mapped, it now sets the operations operands and clones their regions.
That way it is now possible to call `cloneInto` from multiple threads if the Region or Operation is isolated-from-above. This allows creating copies of functions or to use `mlir::inlineCall` with the same source region from multiple threads. In the general case, the method is thread-safe if through cloning, no new uses of `Value`s from outside the cloned Operation/Region are created. This can be ensured by mapping any outside operands via the `BlockAndValueMapping` to `Value`s owned by the caller thread.
While I was at it, I also reworked the `clone` method of `Operation` a little bit and added a proper options class to avoid having a `cloneWithoutRegionsAndOperands` method, and be more extensible in the future. `cloneWithoutRegions` is now also a simple wrapper that calls `clone` with the proper options set. That way all the operation cloning code is now contained solely within `clone`.
Differential Revision: https://reviews.llvm.org/D123917
Hui Xie [Thu, 21 Apr 2022 11:08:34 +0000 (13:08 +0200)]
[libcxx][ranges] add views::join adaptor object. added test coverage to join_view
- added views::join adaptor object
- added test for the adaptor object
- fixed some join_view's tests. e.g iter_swap test
- added some negative tests for join_view to test that operations do not exist when constraints aren't met
- added tests that locks down issues that were already addressed in previous change
- LWG3500 `join_view::iterator::operator->()` is bogus
- LWG3313 `join_view::iterator::operator--` is incorrectly constrained
- LWG3517 `join_view::iterator`'s `iter_swap` is underconstrained
- P2328R1 join_view should join all views of ranges
- fixed some issues in join_view and added tests
- LWG3535 `join_view::iterator::iterator_category` and `::iterator_concept` lie
- LWG3474 Nesting ``join_views`` is broken because of CTAD
- added tests for an LWG issue that isn't resolved in the standard yet, but the previous code has workaround.
- LWG3569 Inner iterator not default_initializable
Reviewed By: #libc, var-const
Spies: var-const, libcxx-commits
Differential Revision: https://reviews.llvm.org/D123466
Dmitry Preobrazhensky [Thu, 21 Apr 2022 10:32:25 +0000 (13:32 +0300)]
[AMDGPU][MC][NFC][GFX940] Corrected an error position
Differential Revision: https://reviews.llvm.org/D124099
Uday Bondhugula [Wed, 20 Apr 2022 17:13:35 +0000 (22:43 +0530)]
Add async dependencies support for gpu.launch op
Add async dependencies support for gpu.launch op: this allows specifying
a list of async tokens ("streams") as dependencies for the launch.
Update the GPU kernel outlining pass lowering to propagate async
dependencies from gpu.launch to gpu.launch_func op. Previously, a new
stream was being created and destroyed for a kernel launch. The async
deps support allows the kernel launch to be serialized on an existing
stream.
Differential Revision: https://reviews.llvm.org/D123499
Alexey Moksyakov [Thu, 21 Apr 2022 10:52:00 +0000 (13:52 +0300)]
[BOLT] Add R_AARCH64_PREL16/32/64 relocations support
Reviewed By: yota9, rafauler
Differential Revision: https://reviews.llvm.org/D122294
Vladislav Khmelevsky [Tue, 19 Apr 2022 15:48:27 +0000 (18:48 +0300)]
[BOLT] Fix build with GCC 7.3.0
The gcc 7.3.0 version raises "could not covert" error without std::move
used explicitly.
Differential Revision: https://reviews.llvm.org/D124009
Dmitry Preobrazhensky [Thu, 21 Apr 2022 10:15:01 +0000 (13:15 +0300)]
[AMDGPU][GFX90A+] Disabled ds_ordered_count and exp
Differential Revision: https://reviews.llvm.org/D124087
Daniil Dudkin [Fri, 15 Apr 2022 16:40:15 +0000 (01:40 +0900)]
[flang] Do not ICE on recursive function definition in function result
The following code causes the compiler to ICE in several places due to
lack of support of recursive procedure definitions through the function
result.
function foo() result(r)
procedure(foo), pointer :: r
end function foo
Daniil Dudkin [Thu, 21 Apr 2022 09:58:41 +0000 (18:58 +0900)]
[NFC] Test commit
An empty commit to test the access
Sven van Haastregt [Thu, 21 Apr 2022 09:52:41 +0000 (10:52 +0100)]
[OpenCL] Guard read_write images with TypeExtension
Ensure that any `read_write` image type carries the
`__opencl_c_read_write_images` upon construction of the `ImageType`.
Haojian Wu [Thu, 21 Apr 2022 09:20:40 +0000 (11:20 +0200)]
[clangd] tweak tile should start with a capital letter.
to consistent with other tweaks.
Nikita Popov [Wed, 20 Apr 2022 15:03:45 +0000 (17:03 +0200)]
[SimplifyCFG] Handle branch on same condition in pred more directly
Rather than creating a PHI node and then using the PHI threading
code, directly handle this case in
FoldCondBranchOnValueKnownInPredecessor().
This change is supposed to be NFC-ish, but may cause changes due
to different transform order.
Haojian Wu [Thu, 21 Apr 2022 08:24:56 +0000 (10:24 +0200)]
[AST] Support template declaration found through using-decl for QualifiedTemplateName.
This is a followup of https://reviews.llvm.org/D123127, adding support
for the QualifiedTemplateName.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D123775
Nikita Popov [Wed, 20 Apr 2022 12:02:46 +0000 (14:02 +0200)]
[SimplifyCFG] Make FoldCondBranchOnPHI more amenable to extension
This general threading transform can be performed whenever we know
a constant value for the condition in a predecessor, which would
currently just be the case of a phi node with constant arguments.
gpei-dev [Tue, 19 Apr 2022 05:44:04 +0000 (13:44 +0800)]
Force insert zero-idiom and break false dependency of dest register for several instructions.
The related instructions are:
VPERMD/Q/PS/PD
VRANGEPD/PS/SD/SS
VGETMANTSS/SD/SH
VGETMANDPS/PD - mem version only
VPMULLQ
VFMULCSH/PH
VFCMULCSH/PH
Differential Revision: https://reviews.llvm.org/D116072
Nikita Popov [Thu, 21 Apr 2022 08:45:40 +0000 (10:45 +0200)]
Revert "[GVNSink] Regenerate test checks (NFC)"
This reverts commit
3b132300728e7ed06e59e449ceb8175305869a49.
It looks like GVNSink is currently non-deterministic, due to an
std::sort() on BasicBlock* pointers in ModelledPHI. This becomes
visible in the generated checks.
wangpc [Thu, 21 Apr 2022 08:23:10 +0000 (16:23 +0800)]
Revert "[RISCV] Do not outline CFI instructions when they are needed in EH"
This reverts commit
0d40688925a384088c149d1830dc0761a90364f7.
wangpc [Thu, 21 Apr 2022 08:11:41 +0000 (16:11 +0800)]
[RISCV] Do not outline CFI instructions when they are needed in EH
We saw a failure caused by unwinding with incomplete CFIs, so we
can't outline CFI instructions when they are needed in EH.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D122634
wangpc [Thu, 21 Apr 2022 08:07:57 +0000 (16:07 +0800)]
[RISCV] Precommit test for D122634
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D123364
Nikita Popov [Thu, 21 Apr 2022 08:06:47 +0000 (10:06 +0200)]
[GVNSink] Regenerate test checks (NFC)
Tobias Hieta [Thu, 21 Apr 2022 07:42:08 +0000 (09:42 +0200)]
[CMake] Check for problematic MSVC + /arch:AVX configuration
Add a new CMake file to expand on for more problematic configurations
in the future.
Related to #54645
Reviewed By: beanz, phosek, smeenai
Differential Revision: https://reviews.llvm.org/D123777
Chuanqi Xu [Thu, 21 Apr 2022 07:32:39 +0000 (15:32 +0800)]
[NFC] Code cleanups for coroutine after we remvoed legacy passes
Nimish Mishra [Thu, 21 Apr 2022 03:45:45 +0000 (09:15 +0530)]
Added lowering support for atomic read and write constructs
This patch adds lowering support for atomic read and write constructs.
Also added is pointer modelling code to allow FIR pointer like types to
be inferred and converted while lowering.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D122725
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Xiang Li [Thu, 7 Apr 2022 20:48:39 +0000 (13:48 -0700)]
[HLSL] Add shader attribute
Shader attribute is for shader library identify entry functions.
Here's an example,
[shader("pixel")]
float ps_main() : SV_Target {
return 1;
}
When compile this shader to library target like -E lib_6_3, compiler needs to know ps_main is an entry function for pixel shader. Shader attribute is to offer the information.
A new attribute HLSLShader is added to support shader attribute. It has an EnumArgument which included all possible shader stages.
Reviewed By: aaron.ballman, MaskRay
Differential Revision: https://reviews.llvm.org/D123907
Fraser Cormack [Tue, 19 Apr 2022 08:25:40 +0000 (09:25 +0100)]
[RISCV] Don't emit fractional VIDs with negative steps
We can't shift-right negative numbers to divide them, so avoid emitting
such sequences. Use negative numerators as a proxy for this situation, since
the indices are always non-negative.
An alternative strategy could be to add a compiler flag to emit division
instructions, which would at least allow us to test the VID sequence
matching itself.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D123796
Fraser Cormack [Tue, 19 Apr 2022 08:25:40 +0000 (09:25 +0100)]
[RISCV] Add another test showing incorrect BUILD_VECTOR lowering
This test shows a (contrived) BUILD_VECTOR which is correctly identified
as a sequence of ((vid * -3) / 8) + 5. However, the issue is that using
shift-right for the divide is invalid as the step values are negative.
This patch just adds the test: the fix is added in D123796.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D123989
Fangrui Song [Thu, 21 Apr 2022 05:49:49 +0000 (22:49 -0700)]
[ELF] Fix spurious GOT/PLT assertion failure when .dynsym is discarded
Linux kernel arch/arm64/kernel/vmlinux.lds.S discards .dynsym . D123985 triggers
a spurious assertion failure. Detect the case with
`!mainPart->dynSymTab->getParent()`.
River Riddle [Thu, 21 Apr 2022 04:39:02 +0000 (21:39 -0700)]
[mlir][NFC] Update remaining textual references of un-namespaced `func` operations
The special case parsing of operations in the `func` dialect is being removed, and
operations will require the dialect namespace prefix.
River Riddle [Wed, 20 Apr 2022 23:22:21 +0000 (16:22 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in Transform tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:22:03 +0000 (16:22 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in Pass/Target tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:21:36 +0000 (16:21 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in tool/runner tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:20:54 +0000 (16:20 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in IR/Interface tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:20:21 +0000 (16:20 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in Integration tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:19:48 +0000 (16:19 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in Tensor/Tosa/Vector tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:19:21 +0000 (16:19 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in SPIRV tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:18:14 +0000 (16:18 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in SparseTensor tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:17:16 +0000 (16:17 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in LLVM/Math/MemRef/NVGPU/OpenACC/OpenMP/Quant/SCF/Shape tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:16:23 +0000 (16:16 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in Linalg tests
The special case parsing of `func` operations is being removed.
River Riddle [Wed, 20 Apr 2022 23:15:59 +0000 (16:15 -0700)]
[mlir][NFC] Update textual references of `func` to `func.func` in Bufferization/Complex/EmitC/CF/Func/GPU tests
The special case parsing of `func` operations is being removed.