Michael J. Spencer [Wed, 27 Jun 2018 23:58:08 +0000 (23:58 +0000)]
Add support for generating a call graph profile from Branch Frequency Info.
=== Generating the CG Profile ===
The CGProfile module pass simply gets the block profile count for each BB and scans for call instructions. For each call instruction it adds an edge from the current function to the called function with the current BB block profile count as the weight.
After scanning all the functions, it generates an appending module flag containing the data. The format looks like:
```
!llvm.module.flags = !{!0}
!0 = !{i32 5, !"CG Profile", !1}
!1 = !{!2, !3, !4} ; List of edges
!2 = !{void ()* @a, void ()* @b, i64 32} ; Edge from a to b with a weight of 32
!3 = !{void (i1)* @freq, void ()* @a, i64 11}
!4 = !{void (i1)* @freq, void ()* @b, i64 20}
```
Differential Revision: https://reviews.llvm.org/D48105
llvm-svn: 335794
George Karpenkov [Wed, 27 Jun 2018 23:11:24 +0000 (23:11 +0000)]
[libFuzzer] [NFC] [Tests] Mark signal handling tests as UNSUPPORTED on Darwin
Under load, these tests tend to fail sporadically on our bots.
In my understanding, the signal handling is not guaranteed to happen
within 2 seconds, and the test is inherently flaky.
llvm-svn: 335792
Heejin Ahn [Wed, 27 Jun 2018 22:05:09 +0000 (22:05 +0000)]
[analyzer] Add clangFrontend to target_link_libraries
Without this, builds with `-DSHARED_LIB=ON` fail.
llvm-svn: 335791
Petr Hosek [Wed, 27 Jun 2018 21:25:21 +0000 (21:25 +0000)]
[sanitizer] zx_cprng_draw no longer returns any value
Remove the return value check.
Differential Revision: https://reviews.llvm.org/D48671
llvm-svn: 335790
Zachary Turner [Wed, 27 Jun 2018 21:18:15 +0000 (21:18 +0000)]
Move some code from PDBFileBuilder to MSFBuilder.
The code to emit the pieces of the MSF file were actually in
PDBFileBuilder. Move this to MSFBuilder so that we can
theoretically emit an MSF without having a PDB file.
llvm-svn: 335789
Benjamin Kramer [Wed, 27 Jun 2018 21:01:53 +0000 (21:01 +0000)]
[X86] Make folding table checking threadsafe
This is a benign race, but tsan likes to complain about it. Just make it
happy.
llvm-svn: 335788
Craig Topper [Wed, 27 Jun 2018 20:58:46 +0000 (20:58 +0000)]
[X86] In X86DAGToDAGISel::PreprocessISelDAG, make sure we don't access N after we delete it.
If we turn X86ISD::AND into ISD::AND, we delete N. But we were continuing onto the next block of code even though N no longer existed.
Just happened to notice it. I assume asan didn't notice it because we explicitly unpoison deleted nodes and give them a DELETE_NODE opcode.
llvm-svn: 335787
Sameer AbuAsal [Wed, 27 Jun 2018 20:51:42 +0000 (20:51 +0000)]
[RISCV] Add machine function pass to merge base + offset
Summary:
In r333455 we added a peephole to fix the corner cases that result
from separating base + offset lowering of global address.The
peephole didn't handle some of the cases because it only has a basic
block view instead of a function level view.
This patch replaces that logic with a machine function pass. In
addition to handling the original cases it handles uses of the global
address across blocks in function and folding an offset from LW\SW
instruction. This pass won't run for OptNone compilation, so there
will be a negative impact overall vs the old approach at O0.
Reviewers: asb, apazos, mgrang
Reviewed By: asb
Subscribers: MartinMosbeck, brucehoult, the_o, rogfer01, mgorny, rbar, johnrusso, simoncook, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits, edward-jones
Differential Revision: https://reviews.llvm.org/D47857
llvm-svn: 335786
Fangrui Song [Wed, 27 Jun 2018 20:45:11 +0000 (20:45 +0000)]
[llvm-objdump] Add -x --all-headers options
Reviewers: paulsemel, echristo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48622
llvm-svn: 335785
Fangrui Song [Wed, 27 Jun 2018 20:43:23 +0000 (20:43 +0000)]
[ELF] Use %eiz after disassembler change in r335768
llvm-svn: 335784
Eli Friedman [Wed, 27 Jun 2018 20:35:02 +0000 (20:35 +0000)]
[ScopHelper] Cache ScopExpander results.
The number of SCEV expressions is usually linear in the number of IR
instructions being modeled. However, a naive SCEV visitor is not. For
an expression like x*x, "x" will be visited twice. If x is itself an
expression like x*x, that will be visited twice, etc, and the overall
runtime is O(2^N) in the number of SCEV expressions.
To prevent this from happening, add a cache, so we only visit each SCEV
expression once.
Not sure this is the best solution. Maybe we can instead check whether
the SCEV is scop-invariant (in which case we never need to map the
value). But we don't have a utility for that at the moment.
Differential Revision: https://reviews.llvm.org/D47087
llvm-svn: 335783
Richard Smith [Wed, 27 Jun 2018 20:30:36 +0000 (20:30 +0000)]
[www] Update cxx_dr_status for recent DR fixes.
llvm-svn: 335782
Richard Smith [Wed, 27 Jun 2018 20:30:34 +0000 (20:30 +0000)]
DR1687: When overload resolution selects a built-in operator, implicit
conversions are only applied to operands of class type, and the second
standard conversion sequence is not applied.
When diagnosing an invalid builtin binary operator, talk about the
original types rather than the converted types. If these differ by a
user-defined conversion, tell the user what happened.
llvm-svn: 335781
Bruno Cardoso Lopes [Wed, 27 Jun 2018 20:29:36 +0000 (20:29 +0000)]
[Modules][ObjC] Warn on the use of '@import' in framework headers
Using @import in framework headers inhibit the use of such headers
when not using modules, this is specially bad for headers that end
up in the SDK (or any other system framework). Add a warning to give
users some indication that this is discouraged.
rdar://problem/
39192894
llvm-svn: 335780
Richard Smith [Wed, 27 Jun 2018 20:29:32 +0000 (20:29 +0000)]
DR1213: Ignore implicit conversions when determining if an operand of an
array subscript expression is an array prvalue.
Also apply DR1213 to vector prvalues for consistency.
llvm-svn: 335779
Sanjay Patel [Wed, 27 Jun 2018 20:23:47 +0000 (20:23 +0000)]
[InstCombine] add tests for vector-select-of-binops with 2 variables; NFC
llvm-svn: 335778
Vlad Tsyrklevich [Wed, 27 Jun 2018 20:00:55 +0000 (20:00 +0000)]
Another shot at fixing android r335644 failure
The android buildbot moves the build outputs to a different directory
and rewrites the executable path, the DSO passed as an argument does not
get re-written. Use rpaths to load the DSO the same way the
test/cfi/cross-dso/ tests do and test the DSO name differently.
llvm-svn: 335777
Jonas Devlieghere [Wed, 27 Jun 2018 19:58:39 +0000 (19:58 +0000)]
[SymbolFile] Implement GetCompleteObjCClass for .debug_names
When running the test suite with .debug_names a bunch of tests were
failing because GetCompleteObjCClass was not yet implemented for
DebugNamesDWARFIndex. This patch adds the required logic.
We use the .debug_names to find the Objective-C class and then rely on
DW_AT_APPLE_objc_complete_type to find the complete type. If we can't
find it or the attribute is not supported, we return a list of potential
complete types.
Differential revision: https://reviews.llvm.org/D48596
llvm-svn: 335776
Paul Robinson [Wed, 27 Jun 2018 19:58:28 +0000 (19:58 +0000)]
Document the git config for Windows to do line-endings correctly.
Differential Revision: https://reviews.llvm.org/D48494
llvm-svn: 335775
Aaron Enye Shi [Wed, 27 Jun 2018 19:51:42 +0000 (19:51 +0000)]
[HIP] Fix ordering of device-libs linking
Summary:
HIP should link the bitcodes with caller functions before callee functions. Also added lit test to check the ordering of the linked bitcodes is matches.
Reviewers: yaxunl, b-sumner
Reviewed By: yaxunl, b-sumner
Subscribers: cfe-commits, yaxunl, b-sumner, scchan
Differential Revision: https://reviews.llvm.org/D48667
llvm-svn: 335774
Nirav Dave [Wed, 27 Jun 2018 19:41:25 +0000 (19:41 +0000)]
[DAGCombine] Disable TokenFactor simplifications when optnone.
llvm-svn: 335773
Michael Kruse [Wed, 27 Jun 2018 19:39:03 +0000 (19:39 +0000)]
[ADT] drop_begin: use adl_begin/adl_end. NFC.
Summary:
The instantiation of the drop_begin function template usually fails because the functions begin() and end() do not exist. Only when using on a container from the std namespace (or `llvm::iterator_range`s of something derived from `std::iterator`), they are matched to std::begin() and std::end() due to Koenig-lookup.
Explicitly use llvm::adl_begin and llvm::adl_end to make drop_begin applicable to anything iterable (including C-style arrays).
A solution for general `llvm::iterator_range`s was already tried in r244620, but got reverted in r244621 due to MSVC not liking it.
Reviewers: dblaikie, grosbach, aaron.ballman, ruiu
Reviewed By: dblaikie, aaron.ballman
Subscribers: aaron.ballman, llvm-commits
Differential Revision: https://reviews.llvm.org/D48598
llvm-svn: 335772
Fangrui Song [Wed, 27 Jun 2018 19:35:50 +0000 (19:35 +0000)]
[WebAssembly] Try fixing test/CodeGen/WebAssembly/vector_sdiv.ll
llvm-svn: 335771
Ben Hamilton [Wed, 27 Jun 2018 19:13:09 +0000 (19:13 +0000)]
[clang-tidy/ObjC] Add hashing algorithm acronyms to objc-property-declaration
Summary:
This PR adds a few acronyms related to hashing algorithms to the standard
list in `objc-property-declaration`.
Reviewers: Wizard
Reviewed By: Wizard
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D48652
llvm-svn: 335770
Fangrui Song [Wed, 27 Jun 2018 19:12:07 +0000 (19:12 +0000)]
[X86] Fix unmatched parenthesis in r335768
llvm-svn: 335769
Craig Topper [Wed, 27 Jun 2018 19:03:36 +0000 (19:03 +0000)]
[X86] Teach the disassembler to use %eiz/%riz instead of NoRegister when the SIB byte is present, but doesn't encode an index register and there was another shorter encoding that would achieve the same result.
The %eiz/%riz are dummy registers that force the encoder to emit a SIB byte when it normally wouldn't. By emitting them in the disassembly output we ensure that assembling the disassembler output would also produce a SIB byte.
This should match the behavior of objdump from binutils.
llvm-svn: 335768
Daniel Sanders [Wed, 27 Jun 2018 19:03:21 +0000 (19:03 +0000)]
[globalisel][legalizer] Add AtomicOrdering to LegalityQuery and use it in AArch64
Now that we have the ability to legalize based on MMO's. Add support for
legalizing based on AtomicOrdering and use it to correct the legalization
of the atomic instructions.
Also extend all() to be a variadic template as this ruleset now requires
3 and 4 argument versions.
llvm-svn: 335767
Teresa Johnson [Wed, 27 Jun 2018 19:00:35 +0000 (19:00 +0000)]
[ThinLTO] Fix test
Fix test changes added in r335760. Even though we are invoking llvm-lto2
in single threaded mode, the order of processing the modules in the
backend is apparently not deterministic. Handle the expected debug
messages in any order. (The determinism would be good to fix, but not
related to this change.)
This also undoes the change I made in r335764 to help debug this.
llvm-svn: 335766
Aaron Enye Shi [Wed, 27 Jun 2018 18:58:55 +0000 (18:58 +0000)]
[HIP] Support flush denormals bitcode
Summary:
Use oclc_daz_opt_on.amdgcn.bc bitcode when option fcuda-flush-denormal-to-zero is enabled, otherwise use oclc_daz_opt_off.amdgcn.bc bitcode. Added lit tests to verify that the correct bitcode is linked when -fcuda-flush-denormal-to-zero option is enabled or disabled.
Reviewers: yaxunl, scchan, b-sumner
Reviewed By: yaxunl, scchan, b-sumner
Subscribers: cfe-commits, yaxunl
Differential Revision: https://reviews.llvm.org/D48493
llvm-svn: 335765
Teresa Johnson [Wed, 27 Jun 2018 18:36:53 +0000 (18:36 +0000)]
[ThinLTO] Modify test to help diagnose bot failures
I am getting bot failures from r335760 that are difficult to diagnose
since the stderr is getting redirected to FileCheck. Save and dump the
debug output to stderr to help debug the issue.
llvm-svn: 335764
Artem Belevich [Wed, 27 Jun 2018 18:32:51 +0000 (18:32 +0000)]
[CUDA] Use atexit() to call module destructor.
This matches the way NVCC does it. Doing module cleanup at global
destructor phase used to work, but is, apparently, too late for
the CUDA runtime in CUDA-9.2, which ends up crashing with double-free.
Differential Revision: https://reviews.llvm.org/D48613
llvm-svn: 335763
Matt Morehouse [Wed, 27 Jun 2018 18:24:46 +0000 (18:24 +0000)]
[UBSan] Add silence_unsigned_overflow flag.
Summary:
Setting UBSAN_OPTIONS=silence_unsigned_overflow=1 will silence all UIO
reports. This feature, combined with
-fsanitize-recover=unsigned-integer-overflow, is useful for providing
fuzzing signal without the excessive log output.
Helps with https://github.com/google/oss-fuzz/issues/910.
Reviewers: kcc, vsk
Reviewed By: vsk
Subscribers: vsk, kubamracek, Dor1s, llvm-commits
Differential Revision: https://reviews.llvm.org/D48660
llvm-svn: 335762
Sanjay Patel [Wed, 27 Jun 2018 18:16:40 +0000 (18:16 +0000)]
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
As noted in the D44909 review, the transform from (fptosi+sitofp) to ftrunc
can produce -0.0 where the original code does not:
#include <stdio.h>
int main(int argc) {
float x;
x = -0.8 * argc;
printf("%f\n", (float)((int)x));
return 0;
}
$ clang -O0 -mavx fp.c ; ./a.out
0.000000
$ clang -O1 -mavx fp.c ; ./a.out
-0.000000
Ideally, we'd use IR/node flags to predicate the transform, but the IR parser
doesn't currently allow fast-math-flags on the cast instructions. So for now,
just use the function attribute that corresponds to clang's "-fno-signed-zeros"
option.
Differential Revision: https://reviews.llvm.org/D48085
llvm-svn: 335761
Teresa Johnson [Wed, 27 Jun 2018 18:03:39 +0000 (18:03 +0000)]
[ThinLTO] Print names in function import debug messages when available
Summary:
Rather than just print the GUID, when it is available in the index,
print the global name as well in the function import thin link debug
messages. Names will be available when the combined index is being
built by the same process, e.g. a linker or "llvm-lto2 run".
Reviewers: davidxl
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D48612
llvm-svn: 335760
Justin Bogner [Wed, 27 Jun 2018 17:58:32 +0000 (17:58 +0000)]
[Object] Allow iterating over an IRObjectFile's modules
If you've already loaded an IRObjectFile and need access to the
Modules themselves you shouldn't have to reparse a byte stream to do
it. Adds an accessor for the modules in IRObjectFile.
llvm-svn: 335759
Jessica Paquette [Wed, 27 Jun 2018 17:43:27 +0000 (17:43 +0000)]
[MachineOutliner] Don't outline sequences where x16/x17/nzcv are live across
It isn't safe to outline sequences of instructions where x16/x17/nzcv live
across the sequence.
This teaches the outliner to check whether or not a specific canidate has
x16/x17/nzcv live across it and discard the candidate in the case that that is
true.
https://bugs.llvm.org/show_bug.cgi?id=37573
https://reviews.llvm.org/D47655
llvm-svn: 335758
Jonas Devlieghere [Wed, 27 Jun 2018 17:31:59 +0000 (17:31 +0000)]
[DebugInfo] Emit ObjC methods as part of interface
As brought up during the discussion of the DWARF5 accelerator tables,
there is currently no way to associate Objective-C methods with the
interface they belong to, other than the .apple_objc accelerator table.
After due consideration we came to the conclusion that it makes more
sense to follow Pavel's suggestion of just emitting this information in
the .debug_info section. One concern was that categories were
emitted in the .apple_names as well, but it turns out that LLDB doesn't
rely on the accelerator tables for this information.
This patch changes the codegen behavior to emit subprograms for
structure types, like we do for C++. This will result in the
DW_TAG_subprogram being nested as a child under its
DW_TAG_structure_type. This behavior is only enabled for DWARF5 and
later, so we can have a unique code path in LLDB with regards to
obtaining the class methods.
This was tested on the LLDB side and doesn't lead to a regression.
There's already code in place to deal with member functions in C++,
which deals with this transparently.
For more background please refer to the discussion on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2018-June/123986.html
Differential revision: https://reviews.llvm.org/D48241
llvm-svn: 335757
Sanjay Patel [Wed, 27 Jun 2018 17:21:57 +0000 (17:21 +0000)]
[InstCombine] add more tests for shuffle with different binops; NFC
llvm-svn: 335756
Petr Hosek [Wed, 27 Jun 2018 16:49:37 +0000 (16:49 +0000)]
[sanitizer] zx_cprng_draw no longer takes the output argument
The zx_cprng_draw system call no longer takes the output argument.
Differential Revision: https://reviews.llvm.org/D48657
llvm-svn: 335755
Craig Topper [Wed, 27 Jun 2018 16:47:39 +0000 (16:47 +0000)]
[X86] Use bts/btr/btc for single bit set/clear/complement of a variable bit position
If we are just modifying a single bit at a variable bit position we can use the BT* instructions to make the change instead of shifting a 1(or rotating a -1) and doing a binop. These instruction also ignore the upper bits of their index input so we can also remove an and if one is present on the index.
Fixes PR37938.
llvm-svn: 335754
Craig Topper [Wed, 27 Jun 2018 16:47:36 +0000 (16:47 +0000)]
[X86] Add test cases for D48606.
llvm-svn: 335753
Mikhail R. Gadelha [Wed, 27 Jun 2018 16:45:58 +0000 (16:45 +0000)]
Revert "[Analyzer] Moved RangeConstraintManager to header. NFC."
This broke a number of bots.
This reverts commit
5e1a89912d37a21c3b49ccf30600d7f498dffa9c.
llvm-svn: 335752
Jakub Kuderski [Wed, 27 Jun 2018 16:34:30 +0000 (16:34 +0000)]
[AliasSet] Fix UnknownInstructions printing
Summary:
AliasSet::print uses `I->printAsOperand` to print UnknownInstructions. The problem is that not all UnknownInstructions have names (e.g. call instructions). When such instructions are printed, they appear as `<badref>` in AliasSets, which is very confusing, as the values are perfectly valid.
This patch fixes that by printing UnknownInstructions without a name using `print` instead of `printAsOperand`.
Reviewers: asbirlea, chandlerc, sanjoy, grosser
Reviewed By: asbirlea
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48609
llvm-svn: 335751
Francis Visoiu Mistrih [Wed, 27 Jun 2018 16:17:32 +0000 (16:17 +0000)]
[NEON] Remove empty test file from r335734
Fails on Green Dragon:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/50174/consoleFull
UNRESOLVED: Clang :: CodeGen/vld_dup.c (5546 of 38947)
******************** TEST 'Clang :: CodeGen/vld_dup.c' FAILED ********************
Test has no run line!
llvm-svn: 335750
Jonas Devlieghere [Wed, 27 Jun 2018 16:13:40 +0000 (16:13 +0000)]
[dsymutil] Move abstractions into separate files (NFC)
This patch splits off some abstractions used by dsymutil's dwarf linker
and moves them into separate header and implementation files. This
almost halves the number of LOC in DwarfLinker.cpp and makes it a lot
easier to understand what functionality lives where.
Differential revision: https://reviews.llvm.org/D48647
llvm-svn: 335749
Matt Davis [Wed, 27 Jun 2018 16:09:33 +0000 (16:09 +0000)]
[llvm-mca] Register listeners with stages; remove Pipeline dependency from Stage.
Summary:
This patch removes a few callbacks from Pipeline. It comes at the cost of
registering Listeners with all Stages. Not all stages need listeners or issue
callbacks, this registration is a bit redundant. However, as we build-out the
API, this redundancy can disappear.
The main purpose here is to move callback code from the Pipeline and into the
stages that actually issue those callbacks. This removes the back-pointer to
the Pipeline that was put into a few Stage subclasses.
Reviewers: andreadb, courbet, RKSimon
Reviewed By: andreadb, courbet
Subscribers: tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D48576
llvm-svn: 335748
Vedant Kumar [Wed, 27 Jun 2018 16:06:15 +0000 (16:06 +0000)]
[asan] Relax the null_deref.cc test even further
On Darwin/x86_64, asan may report the crashing line of NullDeref as line
19 (i.e the closing brace of the function), whereas on other targets we
see line 15 ("ptr[10]++").
The optimized debug info here isn't reliable enough to check.
rdar://problem/
41526369
llvm-svn: 335747
Simon Pilgrim [Wed, 27 Jun 2018 16:00:53 +0000 (16:00 +0000)]
[X86][SSE] Add missing AVX512 rotation tests
Increase coverage to make sure we're not doing anything stupid without AVX512BW
llvm-svn: 335746
Craig Topper [Wed, 27 Jun 2018 15:57:57 +0000 (15:57 +0000)]
[X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm.
llvm-svn: 335745
Craig Topper [Wed, 27 Jun 2018 15:57:53 +0000 (15:57 +0000)]
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
I think the intrinsics named 'avx512.mask.' should refer to the previous behavior of taking a mask argument in the intrinsic instead of using a 'select' or 'and' instruction in IR to accomplish the masking. This is more consistent with the goal that eventually we will have no intrinsics that have masking builtin. When we reach that goal, we should have no intrinsics named "avx512.mask".
llvm-svn: 335744
Fangrui Song [Wed, 27 Jun 2018 15:56:32 +0000 (15:56 +0000)]
[ELF] Rename RF_PROGBITS_NOT_EXEC_OR_WRITE to RF_RODATA
Post commit review at D48406
llvm-svn: 335743
Stanislav Mekhanoshin [Wed, 27 Jun 2018 15:33:33 +0000 (15:33 +0000)]
[AMDGPU] Convert rcp to rcp_iflag
If a source of rcp instruction is a result of any conversion from
an integer convert it into rcp_iflag instruction. No FP exception
can ever happen except division by zero if a single precision rcp
argument is a representation of an integral number.
Differential Revision: https://reviews.llvm.org/D48569
llvm-svn: 335742
Vedant Kumar [Wed, 27 Jun 2018 14:57:59 +0000 (14:57 +0000)]
[asan] Relax a test which depends on optimized debug info
On some ARM platforms this test depends on debug locations being
present on constant materialization code, which was eliminated in
r335497.
Relax the test to allow two outcomes: the backtrace either contains the
right line numbers, or no line numbers.
llvm-svn: 335741
Alexander Kornienko [Wed, 27 Jun 2018 14:56:12 +0000 (14:56 +0000)]
[analyzer] Allow registering custom statically-linked analyzer checkers
Summary:
Add an extension point to allow registration of statically-linked Clang Static
Analyzer checkers that are not a part of the Clang tree. This extension point
employs the mechanism used when checkers are registered from dynamically loaded
plugins.
Reviewers: george.karpenkov, NoQ, xazax.hun, dcoughlin
Reviewed By: george.karpenkov
Subscribers: mgorny, mikhail.ramalho, rnkovacs, xazax.hun, szepet, a.sidorin, cfe-commits
Differential Revision: https://reviews.llvm.org/D45718
llvm-svn: 335740
Mikhail R. Gadelha [Wed, 27 Jun 2018 14:39:41 +0000 (14:39 +0000)]
[analyzer] Fix string not being formatted with extra arguments
Signed-off-by: Mikhail Ramalho <mikhail.ramalho@gmail.com>
llvm-svn: 335739
George Rimar [Wed, 27 Jun 2018 14:37:02 +0000 (14:37 +0000)]
[ELF] - ICF: Add test case to check many sections case.
Currently, ICF does not enable threading if we have less than 1024
sections in each equivalence class.
And the following code is uncovered by our test cases:
https://github.com/llvm-mirror/lld/blob/master/ELF/ICF.cpp#L404
This patch adds a test case that triggers the mentioned code to execute.
llvm-svn: 335738
Luke Geeson [Wed, 27 Jun 2018 14:34:40 +0000 (14:34 +0000)]
[AArch64] Reverting FP16 vcvth_n_s64_f16 to fix
llvm-svn: 335737
Alexander Kornienko [Wed, 27 Jun 2018 14:30:55 +0000 (14:30 +0000)]
[clang-tidy] Add ExprMutationAnalyzer, that analyzes whether an expression is mutated within a statement.
Summary:
(Originally started as a clang-tidy check but there's already D45444 so shifted to just adding ExprMutationAnalyzer)
`ExprMutationAnalyzer` is a generally useful helper that can be used in different clang-tidy checks for checking whether a given expression is (potentially) mutated within a statement (typically the enclosing compound statement.)
This is a more general and more powerful/accurate version of isOnlyUsedAsConst, which is used in ForRangeCopyCheck, UnnecessaryCopyInitialization.
It should also be possible to construct checks like D45444 (suggest adding const to variable declaration) or https://bugs.llvm.org/show_bug.cgi?id=21981 (suggest adding const to member function) using this helper function.
This function is tested by itself and is intended to stay generally useful instead of tied to any particular check.
Reviewers: hokein, alexfh, aaron.ballman, ilya-biryukov, george.karpenkov
Reviewed By: aaron.ballman
Subscribers: lebedev.ri, shuaiwang, rnkovacs, hokein, alexfh, aaron.ballman, a.sidorin, Eugene.Zelenko, xazax.hun, JonasToth, klimek, mgorny, cfe-commits
Tags: #clang-tools-extra
Patch by Shuai Wang.
Differential Revision: https://reviews.llvm.org/D45679
llvm-svn: 335736
Adhemerval Zanella [Wed, 27 Jun 2018 13:58:46 +0000 (13:58 +0000)]
[AArch64] Add custom lowering for v4i8 trunc store
This patch adds a custom trunc store lowering for v4i8 vector types.
Since there is not v.4b register, the v4i8 is promoted to v4i16 (v.4h)
and default action for v4i8 is to extract each element and issue 4
byte stores.
A better strategy would be to extended the promoted v4i16 to v8i16
(with undef elements) and extract and store the word lane which
represents the v4i8 subvectores. The construction:
define void @foo(<4 x i16> %x, i8* nocapture %p) {
%0 = trunc <4 x i16> %x to <4 x i8>
%1 = bitcast i8* %p to <4 x i8>*
store <4 x i8> %0, <4 x i8>* %1, align 4, !tbaa !2
ret void
}
Can be optimized from:
umov w8, v0.h[3]
umov w9, v0.h[2]
umov w10, v0.h[1]
umov w11, v0.h[0]
strb w8, [x0, #3]
strb w9, [x0, #2]
strb w10, [x0, #1]
strb w11, [x0]
ret
To:
xtn v0.8b, v0.8h
str s0, [x0]
ret
The patch also adjust the memory cost for autovectorization, so the C
code:
void foo (const int *src, int width, unsigned char *dst)
{
for (int i = 0; i < width; i++)
*dst++ = *src++;
}
can be vectorized to:
.LBB0_4: // %vector.body
// =>This Inner Loop Header: Depth=1
ldr q0, [x0], #16
subs x12, x12, #4 // =4
xtn v0.4h, v0.4s
xtn v0.8b, v0.8h
st1 { v0.s }[0], [x2], #4
b.ne .LBB0_4
Instead of byte operations.
llvm-svn: 335735
Ivan A. Kosarev [Wed, 27 Jun 2018 13:58:43 +0000 (13:58 +0000)]
[NEON] Support vldNq intrinsics in AArch32 (Clang part)
This patch reworks the support for dup NEON intrinsics as
described in D48439.
Differential Revision: https://reviews.llvm.org/D48440
llvm-svn: 335734
Ivan A. Kosarev [Wed, 27 Jun 2018 13:57:52 +0000 (13:57 +0000)]
[NEON] Support vldNq intrinsics in AArch32 (LLVM part)
This patch adds support for the q versions of the dup
(load-to-all-lanes) NEON intrinsics, such as vld2q_dup_f16() for
example.
Currently, non-q versions of the dup intrinsics are implemented
in clang by generating IR that first loads the elements of the
structure into the first lane with the lane (to-single-lane)
intrinsics, and then propagating it other lanes. There are at
least two problems with this approach. First, there are no
double-spaced to-single-lane byte-element instructions. For
example, there is no such instruction as 'vld2.8 { d0[0], d2[0]
}, [r0]'. That means we cannot rely on the to-single-lane
intrinsics and instructions to implement the q versions of the
dup intrinsics. Note that to-all-lanes instructions do support
all sizes of data items, including bytes.
The second problem with the current approach is that we need a
separate vdup instruction to propagate the structure to each
lane. So for vld4q_dup_f16() we would need four vdup instructions
in addition to the initial vld instruction.
This patch introduces dup LLVM intrinsics and reworks handling of
the currently supported (non-q) NEON dup intrinsics to expand
them into those LLVM intrinsics, thus eliminating the need for
using to-single-lane intrinsics and instructions.
Additionally, this patch adds support for u64 and s64 dup NEON
intrinsics. These are marked as Arch64-only in the ARM NEON
Reference, but it seems there are no reasons to not support them
in AArch32 mode. Please correct, if that is wrong.
That's what we generate with this patch applied:
vld2q_dup_f16:
vld2.16 {d0[], d2[]}, [r0]
vld2.16 {d1[], d3[]}, [r0]
vld3q_dup_f16:
vld3.16 {d0[], d2[], d4[]}, [r0]
vld3.16 {d1[], d3[], d5[]}, [r0]
vld4q_dup_f16:
vld4.16 {d0[], d2[], d4[], d6[]}, [r0]
vld4.16 {d1[], d3[], d5[], d7[]}, [r0]
Differential Revision: https://reviews.llvm.org/D48439
llvm-svn: 335733
Zaara Syeda [Wed, 27 Jun 2018 13:55:41 +0000 (13:55 +0000)]
[PPC64] Add support for R_PPC64_GOT_DTPREL16* relocations
The local dynamic TLS access on PPC64 ELF v2 ABI uses R_PPC64_GOT_DTPREL16*
relocations when a TLS variables falls outside 2 GB of the thread storage
block. This patch adds support for these relocations by adding a new RelExpr
called R_TLSLD_GOT_OFF which emits a got entry for the TLS variable relative
to the dynamic thread pointer using the relocation R_PPC64_DTPREL64. It then
evaluates the R_PPC64_GOT_DTPREL16* relocations as the got offset for the
R_PPC64_DTPREL64 got entries.
Differential Revision: https://reviews.llvm.org/D48484
llvm-svn: 335732
Gabor Marton [Wed, 27 Jun 2018 13:32:50 +0000 (13:32 +0000)]
Re-apply: [ASTImporter] Import the whole redecl chain of functions
Summary:
With this patch when any `FunctionDecl` of a redeclaration chain is imported
then we bring in the whole declaration chain. This involves functions and
function template specializations. Also friend functions are affected. The
chain is imported as it is in the "from" tu, the order of the redeclarations
are kept. I also changed the lookup logic in order to find friends, but first
making them visible in their declaration context. We may have long
redeclaration chains if all TU contains the same prototype, but our
measurements shows no degradation in time of CTU analysis (Tmux, Xerces,
Bitcoin, Protobuf). Also, as further work we could squash redundant
prototypes, but first ensure that functionality is working properly; then
should we optimize.
This may seem like a huge patch, sorry about that. But, most of the changes are
new tests, changes in the production code is not that much. I also tried to
create a smaller patch which does not affect specializations, but that patch
failed to pass some of the `clang-import-test`s because there we import
function specializations. Also very importantly, we can't just change the
import of `FunctionDecl`s without changing the import of function template
specializations because they are handled as `FunctionDecl`s.
Reviewers: a.sidorin, r.stahl, xazax.hun, balazske, a_sidorin
Reviewed By: a_sidorin
Subscribers: labath, aprantl, a_sidorin, rnkovacs, dkrupp, cfe-commits
Differential Revision: https://reviews.llvm.org/D47532
Re-apply commit rC335480
llvm-svn: 335731
Zaara Syeda [Wed, 27 Jun 2018 13:27:29 +0000 (13:27 +0000)]
[PPC64] Add TLS global dynamic to local exec relaxation
This patch adds the target call back relaxTlsGdToLe to support TLS relaxation
from global dynamic to local exec model.
The relaxation performs the following transformation:
addis r3, r2, x@got@tlsgd@ha --> nop
addi r3, r3, x@got@tlsgd@l --> addis r3, r13, x@tprel@ha
bl __tls_get_addr(x@tlsgd) --> nop
nop --> addi r3, r3, x@tprel@l
Differential Revision: https://reviews.llvm.org/D48082
llvm-svn: 335730
Florian Hahn [Wed, 27 Jun 2018 12:57:51 +0000 (12:57 +0000)]
[ValueLattice] Return false if value range did not change in mergeIn.
llvm-svn: 335729
Dan Liew [Wed, 27 Jun 2018 12:56:34 +0000 (12:56 +0000)]
[CMake] Tidy up the organisation of compiler-rt when configured as a standalone
build with an IDE (e.g. Xcode) as the generator.
Previously the global `USE_FOLDERS` property wasn't set in standalone
builds leading to existing settings of FOLDER not being respected.
In addition to this there were several targets that appeared at the top
level that were not interesting and clustered up the view. These have
been changed to be displayed in "Compiler-RT Misc".
Now when an Xcode project is generated from a standalone compiler-rt
build the project navigator is much less cluttered. The interesting
libraries should appear in "Compiler-RT Libraries" in the IDE.
Differential Revision: https://reviews.llvm.org/D48378
llvm-svn: 335728
Simon Pilgrim [Wed, 27 Jun 2018 12:45:31 +0000 (12:45 +0000)]
[DAGCombiner] visitSDIV - add special case handling for (sdiv X, 1) -> X in pow2 expansion
For divisor = 1, perform a select of X - reduces scalarisation of simple SDIVs
llvm-svn: 335727
Mikhail R. Gadelha [Wed, 27 Jun 2018 12:42:48 +0000 (12:42 +0000)]
[Analyzer] Moved RangeConstraintManager to header. NFC.
Summary: While at it, added a dump method to RangeSet.
Reviewers: george.karpenkov, NoQ
Reviewed By: george.karpenkov
Subscribers: xazax.hun, szepet, a.sidorin
Differential Revision: https://reviews.llvm.org/D48561
llvm-svn: 335726
Nico Weber [Wed, 27 Jun 2018 12:05:06 +0000 (12:05 +0000)]
Add regression test for PR37935.
llvm-svn: 335725
Nico Weber [Wed, 27 Jun 2018 11:52:30 +0000 (11:52 +0000)]
Build TaskQueueTest in threads=on builds, fixes regression from r335608.
llvm-svn: 335724
Sam McCall [Wed, 27 Jun 2018 11:43:54 +0000 (11:43 +0000)]
[clangd] Sema ranking tweaks: downrank keywords and injected names.
Summary:
Injected names being ranked too high was just a bug.
The high boost for keywords was intended, but was too much given how useless
keywords are. We should probably boost them on a case-by-case basis eventually.
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D48368
llvm-svn: 335723
Andrea Di Biagio [Wed, 27 Jun 2018 11:17:07 +0000 (11:17 +0000)]
[llvm-mca] Avoid calling method update() on instructions that are already in the IS_READY state. NFCI
When promoting instructions from the wait queue to the ready queue, we should
check if an instruction has already reached the IS_READY state before
calling method update().
llvm-svn: 335722
Simon Pilgrim [Wed, 27 Jun 2018 10:59:36 +0000 (10:59 +0000)]
[X86][SSE] Include MIN_SIGNED element in non-uniform SDIV pow2 tests
llvm-svn: 335721
Simon Pilgrim [Wed, 27 Jun 2018 10:51:55 +0000 (10:51 +0000)]
[DAGCombiner] visitSDIV - simplify pow2 handling. NFCI.
Use the builtin constant folding of getNode() etc. instead of doing it manually.
llvm-svn: 335720
Simon Pilgrim [Wed, 27 Jun 2018 10:21:06 +0000 (10:21 +0000)]
[DAGCombiner] Fold SDIV(%X, MIN_SIGNED) -> SELECT(%X == MIN_SIGNED, 1, 0)
Fixes PR37569.
llvm-svn: 335719
Ilya Biryukov [Wed, 27 Jun 2018 09:47:20 +0000 (09:47 +0000)]
[clangd] Do not show namespace comments.
Summary:
Comments from namespaces that clangd produces are too noisy and often
not useful.
Namespaces have too many redecls and we don't have a good way of
determining which of the comments are relevant and which should be
ignored (e.g. because they come from code generators like the protobuf
compiler).
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ioeric, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D48211
llvm-svn: 335718
Simon Pilgrim [Wed, 27 Jun 2018 09:41:22 +0000 (09:41 +0000)]
[DAGCombiner] Don't accept signbit sdiv divisors in sdiv-by-pow2 vector expansion (PR37569)
llvm-svn: 335717
Luke Geeson [Wed, 27 Jun 2018 09:23:38 +0000 (09:23 +0000)]
Removing empty CodeGen dir in root
llvm-svn: 335716
Luke Geeson [Wed, 27 Jun 2018 09:20:13 +0000 (09:20 +0000)]
[AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns
llvm-svn: 335715
George Rimar [Wed, 27 Jun 2018 08:08:12 +0000 (08:08 +0000)]
[ELF] - Implement linker script OVERLAYs.
This is PR36768.
Linker script OVERLAYs are described in 4.6.9. Overlay Description of the spec:
https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/4/html/Using_ld_the_GNU_Linker/sections.html
They are used to allow output sections which have different LMAs but the same VAs
and used for embedded programming.
Currently, LLD restricts overlapping of sections and that seems to be the most desired
behaviour for defaults. My thoughts about possible approaches for PR36768 are on the bug page,
this patch implements OVERLAY keyword and allows VAs overlapping for sections that within the overlay.
Differential revision: https://reviews.llvm.org/D44780
llvm-svn: 335714
Rui Ueyama [Wed, 27 Jun 2018 07:56:23 +0000 (07:56 +0000)]
Make -z option check more strict.
llvm-svn: 335713
Rui Ueyama [Wed, 27 Jun 2018 07:22:27 +0000 (07:22 +0000)]
Report an error for an unknown -z option.
This is a less clever version of https://reviews.llvm.org/D48433.
This is a dumb version but I think I prefer this for its simplicity.
Differential Revision: https://reviews.llvm.org/D48621
llvm-svn: 335712
Tatyana Krasnukha [Wed, 27 Jun 2018 07:01:07 +0000 (07:01 +0000)]
Add missing constness.
llvm-svn: 335711
Tatyana Krasnukha [Wed, 27 Jun 2018 06:50:10 +0000 (06:50 +0000)]
Move AddressClass to private enums since API doesn't provide any functions to manage it.
This change allows to make AddressClass strongly typed enum and not to have issues with old versions of SWIG that don't support enum classes.
llvm-svn: 335710
Dave Lee [Wed, 27 Jun 2018 06:46:09 +0000 (06:46 +0000)]
Fix a single typo in SBSymbolContext
Summary: Fix a "Manay" in SBSymbolContext.i
Reviewers: xiaobai
Reviewed By: xiaobai
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D48620
llvm-svn: 335709
Petr Hosek [Wed, 27 Jun 2018 05:50:43 +0000 (05:50 +0000)]
[CMake] Support passing FUCHSIA_SDK as the only variable
Now that the structure of Fuchsia SDK has been formalized, we no
longer need to pass all the different CFLAGS/LDFLAGS to the CMake
build separately, we can simply set the FUCHSIA_SDK variable and
derive all the necessary variables from that one inside the cache
file.
Differential Revision: https://reviews.llvm.org/D48564
llvm-svn: 335708
Konstantin Zhuravlyov [Wed, 27 Jun 2018 05:36:03 +0000 (05:36 +0000)]
AMDGPU/NFC: Fix typo in comment
llvm-svn: 335707
Konstantin Zhuravlyov [Wed, 27 Jun 2018 05:18:50 +0000 (05:18 +0000)]
AMDHSA: Rename RESERVED -> RESERVED0, mark gfx9-specific field
llvm-svn: 335706
Konstantin Zhuravlyov [Wed, 27 Jun 2018 04:56:00 +0000 (04:56 +0000)]
AMDHSA/NFC: Address missed review feedback from
https://reviews.llvm.org/D47566
Change wording from "Must be backwards compatible" to
"Must match hardware definition" for enums that are
defined by hardware.
llvm-svn: 335705
Petr Hosek [Wed, 27 Jun 2018 03:35:53 +0000 (03:35 +0000)]
[CMake] Provide direct support for building sanitized runtimes
This avoids having to rely on magic separators and special parsing.
Differential Revision: https://reviews.llvm.org/D48061
llvm-svn: 335704
Petr Hosek [Wed, 27 Jun 2018 03:14:41 +0000 (03:14 +0000)]
[CMake] Use variables rather than ":" delimiters
This is a more idiomatic CMake.
Differential Revision: https://reviews.llvm.org/D37644
llvm-svn: 335703
Zachary Turner [Wed, 27 Jun 2018 02:49:22 +0000 (02:49 +0000)]
Fix warning about unhandled enumeration in switch.
llvm-svn: 335702
George Karpenkov [Wed, 27 Jun 2018 01:51:55 +0000 (01:51 +0000)]
[analyzer] [NFC] A convenient getter for getting a current stack frame
Differential Revision: https://reviews.llvm.org/D44756
llvm-svn: 335701
George Karpenkov [Wed, 27 Jun 2018 01:51:36 +0000 (01:51 +0000)]
[analyzer] [NFC] Add -verify to malloc checker test
Differential Revision: https://reviews.llvm.org/D48514
llvm-svn: 335700
Richard Smith [Wed, 27 Jun 2018 01:32:04 +0000 (01:32 +0000)]
Diagnose missing 'template' keywords in contexts where a comma is not a
binary operator.
Factor out the checking for a comma within potential angle brackets and
also call it from contexts where we parse a comma-separated list of
arguments or initializers.
llvm-svn: 335699
Justin Bogner [Wed, 27 Jun 2018 00:54:36 +0000 (00:54 +0000)]
[ADT] Pass DerivedT from pointe{e,r}_iterator to iterator_adaptor_base
These were passing the wrong type into iterator_adaptor_base if T was
anything but the default.
llvm-svn: 335698
Matt Davis [Wed, 27 Jun 2018 00:54:11 +0000 (00:54 +0000)]
[llvm-mca] Add a comment to Stage::execute and fix a spelling error. NFC.
llvm-svn: 335697
Vedant Kumar [Wed, 27 Jun 2018 00:47:53 +0000 (00:47 +0000)]
[InstCombine] Avoid creating mis-sized dbg.values in commonCastTransforms()
This prevents InstCombine from creating mis-sized dbg.values when
replacing a sequence of casts with a simpler cast. For example, in:
(fptrunc (floor (fpext X))) -> (floorf X)
We no longer emit dbg.value(X) (with a 32-bit float operand) to describe
(fpext X) (which is a 64-bit float).
This was diagnosed by the debugify check added in r335682.
llvm-svn: 335696
Vedant Kumar [Wed, 27 Jun 2018 00:47:52 +0000 (00:47 +0000)]
[Debugify] Handle failure to get fragment size when checking dbg.values
It's not possible to get the fragment size of some dbg.values. Teach the
mis-sized dbg.value diagnostic to detect this scenario and bail out.
Tested with:
$ find test/Transforms -print -exec opt -debugify-each -instcombine {} \;
llvm-svn: 335695
Craig Topper [Wed, 27 Jun 2018 00:42:24 +0000 (00:42 +0000)]
[X86] Don't store register and memory FMA3 opcodes in the same X86InstrFMA3Group.
Nothing was using this relationship. By splitting them we no longer need to worry about register or memory entries being empty in a group.
The memory folding tables in X86InstrInfo.cpp can be used to access this relationship if needed.
llvm-svn: 335694