platform/upstream/mesa.git
9 years agomesa/main: Pass the data that _mesa_uniform actually wants
Ian Romanick [Thu, 9 Oct 2014 09:00:32 +0000 (11:00 +0200)]
mesa/main: Pass the data that _mesa_uniform actually wants

The GL_ enums were previously used because glsl_types.h couldn't be used
in C code.  That was fixed some time ago (and uniforms.c already
includes glsl_types.h), so this is no longer necessary.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
9 years agoilo: derive fb blending caps at bind time
Chia-I Wu [Mon, 10 Nov 2014 05:44:45 +0000 (13:44 +0800)]
ilo: derive fb blending caps at bind time

Derive whether a RT supports blending, logicop, and the like when
set_framebuffer_state() is called.  This enables us to simplify
gen6_BLEND_STATE().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: remove inlined state functions
Chia-I Wu [Mon, 10 Nov 2014 05:11:40 +0000 (13:11 +0800)]
ilo: remove inlined state functions

We had some inlined state functions for dispatching.  They were not needed
with the new top/bottom split.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: use top/bottom split for state functions
Chia-I Wu [Mon, 10 Nov 2014 04:55:34 +0000 (12:55 +0800)]
ilo: use top/bottom split for state functions

Follow the builder and split state functions into top (vertex processing) and
bottom (pixel processing).

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoi965: Advertise a line width of 40.0 on Cherryview and Skylake.
Kenneth Graunke [Tue, 4 Nov 2014 01:56:38 +0000 (17:56 -0800)]
i965: Advertise a line width of 40.0 on Cherryview and Skylake.

According to the documentation, line widths higher than 40.0 may have
quality problems.  That's already 20 times larger than we've been
exposing, so it seems totally sufficient.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
9 years agoi965: Advertise larger line widths.
Kenneth Graunke [Tue, 4 Nov 2014 01:01:53 +0000 (17:01 -0800)]
i965: Advertise larger line widths.

We've artificially been limiting this to 5 for no particular reason.

On Gen4-5, the limit is [0, 7.5] with a granularity of 0.5 (U3.1).
On Gen6+, the limit is [0, 7.9921875].  Since it's a U3.7, the
granularity should be 0.125 (1/8).

This patch conservatively advertises one granularity smaller than the
hardware's maximum value, just in case there's a problem using the
largest possible value.  On Gen4-5, this is 7.5 - 0.5 = 7.0.  On Gen6+,
this is 8.0 - 0.125 = 7.875.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
9 years agoi965: Use ctx->Const.MaxLineWidth when clamping ctx->Line.Width.
Kenneth Graunke [Tue, 4 Nov 2014 00:26:48 +0000 (16:26 -0800)]
i965: Use ctx->Const.MaxLineWidth when clamping ctx->Line.Width.

Rather than hardcoding platform values in every code path, just use the
maximum value we set.

Currently, ctx->Const.LineWidth == 5, which is smaller than the hardware
limit.  But applications shouldn't be using a value larger than we
support anyway.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
9 years agoi965: Set Line Width correctly on Cherryview and Skylake.
Kenneth Graunke [Tue, 4 Nov 2014 00:10:55 +0000 (16:10 -0800)]
i965: Set Line Width correctly on Cherryview and Skylake.

Line Width moved to DW1 bits 29:12.  It's actually now a U11.7.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
9 years agodocs: add news item and link release notes for mesa 10.3.3
Emil Velikov [Sat, 8 Nov 2014 17:15:42 +0000 (17:15 +0000)]
docs: add news item and link release notes for mesa 10.3.3

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agodocs: Add sha256 sums for the 10.3.3 release
Emil Velikov [Sat, 8 Nov 2014 17:07:34 +0000 (17:07 +0000)]
docs: Add sha256 sums for the 10.3.3 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9cc26056ee13f25c5785fef81b31487f1429baa4)

9 years agoAdd release notes for the 10.3.3 release
Emil Velikov [Sat, 8 Nov 2014 16:43:13 +0000 (16:43 +0000)]
Add release notes for the 10.3.3 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 1a9cc5f50db5d27530a3449743b43aac389d781f)

9 years agoutil/format: Fix clamping to 32bit integers.
José Fonseca [Fri, 7 Nov 2014 21:20:25 +0000 (21:20 +0000)]
util/format: Fix clamping to 32bit integers.

Use clamping constants that guarantee no integer overflows.

As spotted by Chris Forbes.

This causes the code to change as:

-         value |= (uint32_t)CLAMP(src[0], 0.0f, 4294967295.0f);
+         value |= (uint32_t)CLAMP(src[0], 0.0f, 4294967040.0f);

-         value |= (uint32_t)((int32_t)CLAMP(src[0], -2147483648.0f, 2147483647.0f));
+         value |= (uint32_t)((int32_t)CLAMP(src[0], -2147483648.0f, 2147483520.0f));

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
9 years agoutil/format: Generate floating point constants for clamping.
José Fonseca [Fri, 7 Nov 2014 14:26:58 +0000 (14:26 +0000)]
util/format: Generate floating point constants for clamping.

This commit causes the generated C code to change as

            union util_format_r32g32b32a32_sscaled pixel;
  -         pixel.chan.r = (int32_t)CLAMP(src[0], -21474836482147483647);
  -         pixel.chan.g = (int32_t)CLAMP(src[1], -21474836482147483647);
  -         pixel.chan.b = (int32_t)CLAMP(src[2], -21474836482147483647);
  -         pixel.chan.a = (int32_t)CLAMP(src[3], -21474836482147483647);
  +         pixel.chan.r = (int32_t)CLAMP(src[0], -2147483648.0f, 2147483647.0f);
  +         pixel.chan.g = (int32_t)CLAMP(src[1], -2147483648.0f, 2147483647.0f);
  +         pixel.chan.b = (int32_t)CLAMP(src[2], -2147483648.0f, 2147483647.0f);
  +         pixel.chan.a = (int32_t)CLAMP(src[3], -2147483648.0f, 2147483647.0f);
            memcpy(dst, &pixel, sizeof pixel);

which surprisingly makes a difference for MSVC.

Thanks to Juraj Svec for diagnosing this and drafting a fix.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=29661

9 years agoglsl/list: Revert unintentional file mode change in previous commit.
Vinson Lee [Sat, 8 Nov 2014 05:04:08 +0000 (21:04 -0800)]
glsl/list: Revert unintentional file mode change in previous commit.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
9 years agoglsl/list: Move declaration before code.
Vinson Lee [Fri, 7 Nov 2014 23:33:41 +0000 (15:33 -0800)]
glsl/list: Move declaration before code.

Fixes MSVC build error.

shaderapi.c
src\glsl\list.h(535) : error C2143: syntax error : missing ';' before 'type'
src\glsl\list.h(535) : error C2143: syntax error : missing ')' before 'type'
src\glsl\list.h(536) : error C2065: 'node' : undeclared identifier

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86025
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
9 years agoglsl/list: Add an exec_list_validate function
Jason Ekstrand [Wed, 5 Nov 2014 21:57:09 +0000 (13:57 -0800)]
glsl/list: Add an exec_list_validate function

This can be very useful for trying to debug list corruptions.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agollvmpipe: Avoid deadlock when unloading opengl32.dll
José Fonseca [Fri, 7 Nov 2014 16:15:43 +0000 (16:15 +0000)]
llvmpipe: Avoid deadlock when unloading opengl32.dll

On Windows, DllMain calls and thread creation/destruction are
serialized, so when llvmpipe is destroyed from DllMain waiting for the
rasterizer threads to finish will deadlock.

So, instead of waiting for rasterizer threads to have finished, simply wait for the
rasterizer threads to notify they are just about to finish.

Verified with this very simple program:

   #include <windows.h>
   int main() {
      HMODULE hModule = LoadLibraryA("opengl32.dll");
      FreeLibrary(hModule);
   }

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=76252

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
9 years agodocs: Update minimum required LLVM version.
José Fonseca [Fri, 7 Nov 2014 14:39:00 +0000 (14:39 +0000)]
docs: Update minimum required LLVM version.

9 years agoi965: drop the custom gen8_instruction CFLAG
Emil Velikov [Fri, 7 Nov 2014 00:55:46 +0000 (00:55 +0000)]
i965: drop the custom gen8_instruction CFLAG

No longer needed as the file was removed with
commit 8c229d306b3f312adbdfbaf79967ee43fbfc839e
Author: Kenneth Graunke <kenneth@whitecape.org>
Date:   Mon Aug 11 10:07:07 2014 -0700

    i965: Delete the Gen8 code generators.

    We now use the brw_eu_emit.c code instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agogbm/dri: cleanup memory leak on teardown
Emil Velikov [Fri, 7 Nov 2014 03:45:07 +0000 (03:45 +0000)]
gbm/dri: cleanup memory leak on teardown

During teardown we free the driver_configs list pointer, but we forget
to deallocate each config in that list.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoegl_dri2: add a note about dri2_create_screen
Emil Velikov [Fri, 7 Nov 2014 03:42:15 +0000 (03:42 +0000)]
egl_dri2: add a note about dri2_create_screen

The function is not called by platform_drm. As such one needs to
pay special attention at teardown.

v2: Fix the comment block. Spotted by Ken.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
9 years agoegl_dri2: fix double free on drm platforms
Emil Velikov [Fri, 7 Nov 2014 03:33:56 +0000 (03:33 +0000)]
egl_dri2: fix double free on drm platforms

Earlier commit failed to attribure that for drm platforms one does not
call dri2_create_screen, thus it does not create the screen and
driver_configs but inherits them from the "display" - gbm.

As such wrap cleanup in Platform != _EGL_PLATFORM_DRM to prevent
the issue and still cleanup correctly for non-drm platforms.

v2:
 - Drop the ifdef HAVE_DRM_PLATFORM, reindent the code and fix the
comment block. Suggested by Ken.

Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Reported-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
9 years agoilo: tidy up message descriptor decoding
Chia-I Wu [Fri, 7 Nov 2014 08:10:38 +0000 (16:10 +0800)]
ilo: tidy up message descriptor decoding

Move opcode to string mappings to functions of their own.  Have for consistent
outputs for similar opcodes.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: decode INTERFACE_DESCRIPTOR_DATA
Chia-I Wu [Fri, 7 Nov 2014 07:45:25 +0000 (15:45 +0800)]
ilo: decode INTERFACE_DESCRIPTOR_DATA

This is at least much better than decoding as blobs.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoi965/fs: Wire up control flow correctly in predicated break pass.
Matt Turner [Wed, 5 Nov 2014 23:23:05 +0000 (15:23 -0800)]
i965/fs: Wire up control flow correctly in predicated break pass.

When the earlier block ended with control flow, we'd mistakenly remove
some of its links to its children. The same happened with the later
block.

Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965/cfg: Add functions to get first and last non-CF instructions.
Matt Turner [Mon, 27 Oct 2014 21:36:48 +0000 (14:36 -0700)]
i965/cfg: Add functions to get first and last non-CF instructions.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoglsl: Skip loop-too-large heuristic if indexing arrays of a certain size
Kenneth Graunke [Thu, 30 Oct 2014 03:56:07 +0000 (20:56 -0700)]
glsl: Skip loop-too-large heuristic if indexing arrays of a certain size

A pattern in certain shaders is:

   uniform vec4 colors[NUM_LIGHTS];

   for (int i = 0; i < NUM_LIGHTS; i++) {
      ...use colors[i]...
   }

In this case, the application author expects the shader compiler to
unroll the loop.  By doing so, it replaces variable indexing of the
array with constant indexing, which is more efficient.

This patch extends the heuristic to see if arrays accessed within the
loop are indexed by an induction variable, and if the array size exactly
matches the number of loop iterations.  If so, the application author
probably intended us to unroll it.  If not, we rely on the existing
loop-too-large heuristic.

Improves performance in a phong shading microbenchmark by 2.88x, and a
shadow mapping microbenchmark by 1.63x.  Without variable indexing, we
can upload the small uniform arrays as push constants instead of pull
constants, avoiding shader memory access.  Affects several games, but
doesn't appear to impact their performance.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
9 years agoglsl: Lower constant arrays to uniform arrays.
Kenneth Graunke [Sat, 26 Apr 2014 07:18:54 +0000 (00:18 -0700)]
glsl: Lower constant arrays to uniform arrays.

Consider GLSL code such as:

   const ivec2 offsets[] =
      ivec2[](ivec2(-1, -1), ivec2(-1, 0), ivec2(-1, 1),
              ivec2(0, -1),  ivec2(0, 0),  ivec2(0, 1),
              ivec2(1, -1),  ivec2(1, 0),  ivec2(1, 1));

   ivec2 offset = offsets[<non-constant expression>];

Both i965 and nv50 currently handle this very poorly.  On i965, this
becomes a pile of MOVs to load the immediate constants into registers,
a pile of scratch writes to move the whole array to memory, and one
scratch read to actually access the value - effectively the same as if
it were a non-constant array.

We'd much rather upload large blocks of constant data as uniform data,
so drivers can simply upload the data via constbufs, and not have to
populate it via shader instructions.

This is currently non-optional because both i965 and nouveau benefit
from it, and according to Marek radeonsi would benefit today as well.
(According to Tom, radeonsi may want to handle this itself in the long
term, but we can always add a flag when it becomes useful.)

Improves performance in a terrain rendering microbenchmark by about 2x,
and cuts the number of instructions in about half.  Helps a lot of
"Natural Selection 2" shaders, as well as one "HOARD" shader.

total instructions in shared programs: 5473459 -> 5471765 (-0.03%)
instructions in affected programs:     5880 -> 4186 (-28.81%)

v2: Use ir_var_hidden to avoid exposing the new uniform via the GL
    uniform introspection API.

v3: Alphabetize Makefile.sources properly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77957
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoglsl: Add infrastructure for "hidden" uniforms.
Kenneth Graunke [Mon, 27 Oct 2014 23:34:06 +0000 (16:34 -0700)]
glsl: Add infrastructure for "hidden" uniforms.

In the compiler, we'd like to generate implicit uniforms for internal
use.  These should not be visible via the GL uniform introspection API.

To support that, we add a new ir_variable::how_declared value of
ir_var_hidden, and plumb that through to gl_uniform_storage.

v2 (idr): Fix some memory management issues in
move_hidden_uniforms_to_end.  The comment block on the function has more
details.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agomesa: Add SSE 4.1 optimisation for glDrawElements.
Timothy Arceri [Wed, 29 Oct 2014 12:05:59 +0000 (23:05 +1100)]
mesa: Add SSE 4.1 optimisation for glDrawElements.

Makes use of SSE 4.1 to speed up compute of min and max elements.

Callgrind cpu usage results from pts benchmarks:

Openarena 0.8.8: 3.67% -> 1.03%
UrbanTerror: 2.36% -> 0.81%

V5:
- actually make use of the optimisation in android (Emil Velikov)
- set a better array size limit for using SSE and added TODO

V4:
- fixed bugs with incrementing pointer and updating counters

V3:
- Removed sse_minmax.c from Makefile.sources
- handle the first few values without SSE until the pointer is aligned
 and use _mm_load_si128 rather than _mm_loadu_si128
- guard the call to the SSE code better at build time

V2:
- removed GL* types
- use _mm_store_si128() rather than _mm_store_ps()
- add runtime check for SSE
- use aligned attribute for local mix/max
- bunch of tidyups

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
9 years agoi965: Remove non-existent vertical strides from array.
Matt Turner [Tue, 28 Oct 2014 16:04:41 +0000 (09:04 -0700)]
i965: Remove non-existent vertical strides from array.

These never existed, as far as I can tell.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965: Convert stride/width/execution size macros into enums.
Matt Turner [Wed, 27 Aug 2014 05:38:17 +0000 (22:38 -0700)]
i965: Convert stride/width/execution size macros into enums.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965/fs: Remove force uncompressed stack.
Matt Turner [Fri, 31 Oct 2014 18:29:24 +0000 (11:29 -0700)]
i965/fs: Remove force uncompressed stack.

Last use was in shader_time.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965/fs: Use execution size of 1 for some shader_time operations.
Matt Turner [Fri, 31 Oct 2014 18:24:43 +0000 (11:24 -0700)]
i965/fs: Use execution size of 1 for some shader_time operations.

The ADDs depended on dispatch_width, which really isn't what we wanted.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
9 years agoi965/fs: Use mov(4) instructions to read timestamp.
Matt Turner [Fri, 31 Oct 2014 18:12:30 +0000 (11:12 -0700)]
i965/fs: Use mov(4) instructions to read timestamp.

We only want fields 0-2.

9 years agoclover: Fix build after llvm r221375
Jan Vesely [Thu, 6 Nov 2014 16:46:41 +0000 (11:46 -0500)]
clover: Fix build after llvm r221375

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
9 years agoegl_dri2: do not leak dri2_dpy->driver_configs
Emil Velikov [Thu, 23 Oct 2014 16:27:01 +0000 (17:27 +0100)]
egl_dri2: do not leak dri2_dpy->driver_configs

Walk through the list and free each config, and finally free the list
itself. Freeing approx 20KiB of memory, according to valgrind.
Inspired by a similar patch by enpeng xu.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agoilo: add two missing headers to the sources list
Emil Velikov [Thu, 6 Nov 2014 13:19:08 +0000 (13:19 +0000)]
ilo: add two missing headers to the sources list

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
9 years agoReleasing a surfaceless EGL context doesn't release underlying DRI context.
Alexandros Frantzis [Fri, 24 Oct 2014 10:03:13 +0000 (03:03 -0700)]
Releasing a surfaceless EGL context doesn't release underlying DRI context.

driUnbindContext() checks for valid drawables before calling the driver
unbind function. In case of Surfaceless contexts, the drawables are always
Null and we end up not releasing the underlying DRI context. Moving the
call to the driver function before the drawable validity checks fixes things.

Steps to trigger this bug are following:

   - create surfaceless context and make it current
   - make some other context current
   - {another thread} destroy surfaceless context
   - make another context current

Signed-off-by: Alexandros Frantzis <Alexandros.Frantzis@canonical.com>
Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74563

9 years agoilo: let ilo_shader_compile_cs() return a dummy shader
Chia-I Wu [Wed, 5 Nov 2014 02:16:49 +0000 (10:16 +0800)]
ilo: let ilo_shader_compile_cs() return a dummy shader

The dummy shader sends an EOT message to end itself.  There are many more
works need to be done on the compiler side before we can advertise
PIPE_CAP_COMPUTE.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: hook up launch_grid()
Chia-I Wu [Wed, 29 Oct 2014 01:57:23 +0000 (09:57 +0800)]
ilo: hook up launch_grid()

All we need to do is to upload the input data and call
ilo_render_emit_launch_grid() with space checking.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: add ilo_render_emit_launch_grid()
Chia-I Wu [Wed, 29 Oct 2014 01:57:01 +0000 (09:57 +0800)]
ilo: add ilo_render_emit_launch_grid()

ilo_render_emit_launch_grid() emits all the hardware states needed for a
launch_grid() call.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: improve media command helpers
Chia-I Wu [Wed, 29 Oct 2014 01:42:31 +0000 (09:42 +0800)]
ilo: improve media command helpers

They were written for Gen6 but mostly untested.  Make them work for Gen7+.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: disassemble DP DC messages
Chia-I Wu [Wed, 5 Nov 2014 03:08:42 +0000 (11:08 +0800)]
ilo: disassemble DP DC messages

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: disassemble TS messages
Chia-I Wu [Wed, 5 Nov 2014 05:10:25 +0000 (13:10 +0800)]
ilo: disassemble TS messages

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: update genhw headers for media pipeline
Chia-I Wu [Tue, 28 Oct 2014 08:16:45 +0000 (16:16 +0800)]
ilo: update genhw headers for media pipeline

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: add ilo_finalize_compute_states()
Chia-I Wu [Thu, 30 Oct 2014 07:45:05 +0000 (15:45 +0800)]
ilo: add ilo_finalize_compute_states()

It updates the handles of the global bindings.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: use a dynamic array for global bindings
Chia-I Wu [Thu, 30 Oct 2014 06:35:00 +0000 (14:35 +0800)]
ilo: use a dynamic array for global bindings

Use util_dynarray in ilo_set_global_binding() to allow for unlimited number of
global bindings.  Add a comment for global bindings.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: add kernel queries for compute shaders
Chia-I Wu [Thu, 30 Oct 2014 02:03:17 +0000 (10:03 +0800)]
ilo: add kernel queries for compute shaders

We need to know the local/input/private sizes and others.  This is not
complete.  We need many others for CURBE setup.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: fix compute params
Chia-I Wu [Thu, 30 Oct 2014 04:24:01 +0000 (12:24 +0800)]
ilo: fix compute params

Based on beignet, hardware capabilities, and OpenCL requirements.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: add eu_count and thread_count to ilo_dev_info
Chia-I Wu [Tue, 28 Oct 2014 23:49:53 +0000 (07:49 +0800)]
ilo: add eu_count and thread_count to ilo_dev_info

They will be used to report compute params or program compute states.
thread_count can also be used for 3DSTATE_VS.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agoilo: fix intel_bo_wait() on kernel 3.17
Chia-I Wu [Wed, 5 Nov 2014 07:27:42 +0000 (15:27 +0800)]
ilo: fix intel_bo_wait() on kernel 3.17

drm_intel_gem_bo_wait() with negative timeout is broken on kernel 3.17.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
9 years agomesa: Silence unused parameter warning in check_context_limits in non-debug builds
Ian Romanick [Wed, 29 Oct 2014 20:06:15 +0000 (13:06 -0700)]
mesa: Silence unused parameter warning in check_context_limits in non-debug builds

../../src/mesa/main/context.c: In function 'check_context_limits':
../../src/mesa/main/context.c:733:41: warning: unused parameter 'ctx' [-Wunused-parameter]

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoutil: Implement unreachable for MSVC using __assume
Ian Romanick [Wed, 22 Oct 2014 23:41:41 +0000 (16:41 -0700)]
util: Implement unreachable for MSVC using __assume

Based on the description of __assume at:

http://msdn.microsoft.com/en-us/library/1b3fsfxw.aspx

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoi965: Fix sampler state pointer adjustment for nonconst samplers
Chris Forbes [Tue, 4 Nov 2014 17:41:13 +0000 (06:41 +1300)]
i965: Fix sampler state pointer adjustment for nonconst samplers

This started hitting an assertion recently. Only affects Haswell
(Ivybridge doesn't support this meddling with the sampler state pointer,
and ARB_gpu_shader5 is not enabled yet on Broadwell)

14 Piglits crash->pass.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoilo: add drm_configuration for the pipe-target
Nick Sarnie [Wed, 15 Oct 2014 20:08:38 +0000 (16:08 -0400)]
ilo: add drm_configuration for the pipe-target

Allows the driver to advertise DMA-BUF and throttling.

9 years agoi965: Re-enable Z16 on Gen8+.
Kenneth Graunke [Wed, 22 Oct 2014 15:58:59 +0000 (08:58 -0700)]
i965: Re-enable Z16 on Gen8+.

Improves performance in GLBenchmark 2.7 TRex by 3.88889% +/- 0.336383%
(n=80) at 1280x720 on Broadwell GT3.  Together with the previous patch,
it improves performance by 5.42738% +/- 0.541971% (n=10) at 1920x1080.

Note that without the PMA stall fix, this would instead decrease
performance by 22%.

v2: Update comment (noticed by Kristian Høgsberg).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965: Implement the PMA stall fix.
Kenneth Graunke [Wed, 22 Oct 2014 15:58:58 +0000 (08:58 -0700)]
i965: Implement the PMA stall fix.

Certain non-promoted depth cases typically incur stalls.  In very
specific cases, we can enable a workaround which improves performance.

Improves performance in GLBenchmark 2.7 TRex by 1.17762% +/- 0.448765%
(n=75) at 1280x720 on Broadwell GT3.

Haswell has this feature as well, but we can't currently write registers
from userspace batches (and we'd incur additional software batch
scanning overhead as well), so we haven't enabled it.  Broadwell allows
us to write CACHE_MODE_1.  Backporters beware: the formula and flushing
incantation differs between Haswell and Broadwell.

v2: Move pma_stall_bits from brw->state to brw itself (requested by
    Kristian Høgsberg).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965: Add #defines for Broadwell HiZ workarounds in CACHE_MODE_1.
Kenneth Graunke [Wed, 22 Oct 2014 15:58:57 +0000 (08:58 -0700)]
i965: Add #defines for Broadwell HiZ workarounds in CACHE_MODE_1.

This patch adds macros needed for the HiZ PMA stall optimization.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965: Update compaction code to handle Skylake like Cherryview.
Kenneth Graunke [Tue, 4 Nov 2014 06:16:13 +0000 (22:16 -0800)]
i965: Update compaction code to handle Skylake like Cherryview.

Matt requested this in review feedback on the original patch, which I
completely missed when pushing this series.  Kristian also made this
change, but I grabbed the wrong version of the patch.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agomesa: Don't call _mesa_ClipControl from glPopAttrib when unsupported.
Kenneth Graunke [Tue, 4 Nov 2014 02:16:41 +0000 (18:16 -0800)]
mesa: Don't call _mesa_ClipControl from glPopAttrib when unsupported.

Otherwise, calling glPopAttrib on drivers that don't support
ARB_clip_control gives you a GL error, which is surprising at best.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965: Disable fast color clears on Skylake for now.
Kenneth Graunke [Mon, 3 Nov 2014 23:34:56 +0000 (15:34 -0800)]
i965: Disable fast color clears on Skylake for now.

We're not programming the clear values yet, so this won't work.

This patch should be (effectively) reverted eventually.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965/skl: Use new MOCS for SKL
Kristian Høgsberg [Tue, 23 Sep 2014 16:46:28 +0000 (09:46 -0700)]
i965/skl: Use new MOCS for SKL

On Skylake, the MOCS bits are an index into a table of 63 different,
configurable cache configurations.  As for previous GENs, we only care about
WB and WT, which are available in the documented default set.  Define
SKL_MOCS_WB and SKL_MOCS_WT to the indices for those configucations and use
those for the Skylake MOCS values.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Implement workaround for VF Invalidate issue
Jordan Justen [Thu, 1 May 2014 18:03:09 +0000 (11:03 -0700)]
i965/skl: Implement workaround for VF Invalidate issue

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Update Viewport Z Clip Test Enable bits for Skylake.
Kenneth Graunke [Tue, 22 Apr 2014 02:47:07 +0000 (19:47 -0700)]
i965/skl: Update Viewport Z Clip Test Enable bits for Skylake.

Skylake has separate controls for enabling the Z Clip Test for the near
and far planes.  For now, maintain the legacy behavior by setting both.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.
Kenneth Graunke [Tue, 22 Apr 2014 02:43:50 +0000 (19:43 -0700)]
i965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.

Skylake's 3DSTATE_DS packet has a few more fields; we don't support
domain shaders yet though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Init instructions compaction tables for SKL
Kristian Høgsberg [Mon, 22 Sep 2014 10:10:34 +0000 (03:10 -0700)]
i965/skl: Init instructions compaction tables for SKL

They are the same as for BDW, so just add a case for SKL to the init switch.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965/skl: Add fast clear resolve rect multipliers for SKL
Kristian Høgsberg [Sat, 6 Sep 2014 04:19:02 +0000 (21:19 -0700)]
i965/skl: Add fast clear resolve rect multipliers for SKL

SKL updates the resolve rectangle scaling factors again.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Always emit 3DSTATE_BINDING_TABLE_POINTERS_* on Skylake.
Kenneth Graunke [Tue, 29 Apr 2014 22:32:40 +0000 (15:32 -0700)]
i965/skl: Always emit 3DSTATE_BINDING_TABLE_POINTERS_* on Skylake.

On SKL, 3DSTATE_CONSTANT_* command is not committed until we give
the corresponding 3DSTATE_BINDING_TABLE_POINTERS_* command.  If we
fail to do so, the constant buffers wont be read and push constants
will be wrong.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.
Kenneth Graunke [Thu, 24 Apr 2014 20:54:14 +0000 (13:54 -0700)]
i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.

Otherwise they overlap and horrible things happen.  All the new DWords
are for fast color clear values, which we don't do yet.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Refactor surface state allocation.
Kenneth Graunke [Thu, 24 Apr 2014 20:40:53 +0000 (13:40 -0700)]
i965/skl: Refactor surface state allocation.

We will need to allocate more DWords on Skylake.

v2: Don't mark brw_context parameter const.  It's modified.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake.
Kenneth Graunke [Tue, 22 Apr 2014 02:38:18 +0000 (19:38 -0700)]
i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake.

Skylake introduces a new base address for a feature we don't yet expose.
Setting these to 0 should be safe.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Update stencil reference handling for Skylake.
Kenneth Graunke [Tue, 22 Apr 2014 02:30:51 +0000 (19:30 -0700)]
i965/skl: Update stencil reference handling for Skylake.

Skylake uploads the stencil reference values in DW3 of the
3DSTATE_WM_DEPTH_STENCIL packet, rather than in COLOR_CALC_STATE.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Set mask bits in PIPELINE_SELECT on Skylake.
Kenneth Graunke [Mon, 21 Apr 2014 23:37:04 +0000 (16:37 -0700)]
i965/skl: Set mask bits in PIPELINE_SELECT on Skylake.

Skylake has some extra bits in PIPELINE_SELECT, none of which are
interesting for a 3D driver.  In order to selectively change them, it
also introduces new "mask bits" in 15:8.  We care about the "Pipeline
Selection" bits (1:0), so set the mask to 0x3.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Set max OpenGL version the same as gen7/8
Jordan Justen [Mon, 21 Apr 2014 00:31:30 +0000 (17:31 -0700)]
i965/skl: Set max OpenGL version the same as gen7/8

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoi965/skl: Update 3DSTATE_SBE for Skylake.
Damien Lespiau [Wed, 27 Feb 2013 15:05:25 +0000 (15:05 +0000)]
i965/skl: Update 3DSTATE_SBE for Skylake.

This commands has seen the addition of 2 dwords that allow to specify
which channels of which attributes need to be forwarded to the fragment
shader.

v2: Rebase forward a year (done by Ken).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
9 years agoglsl: Improve the CSE pass debugging output.
Kenneth Graunke [Wed, 29 Oct 2014 09:43:29 +0000 (02:43 -0700)]
glsl: Improve the CSE pass debugging output.

The CSE pass now prints out why it thinks a value is not a candidate for
adding to the AE set.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
9 years agoi965/fs: Don't compute_to_mrf() on Gen >= 7.
Matt Turner [Wed, 29 Oct 2014 21:21:14 +0000 (14:21 -0700)]
i965/fs: Don't compute_to_mrf() on Gen >= 7.

No differences in shader-db on Haswell (Gen 7.5).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoglsl: Remove now useless dot optimization on basis vect
Matt Turner [Thu, 30 Oct 2014 22:39:36 +0000 (15:39 -0700)]
glsl: Remove now useless dot optimization on basis vect

The optimization in commit d056863b covers these cases, which were the
first optimizations I added to the GLSL compiler.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoglsl: Emit mul instead of dot if only one component left.
Matt Turner [Fri, 31 Oct 2014 17:33:17 +0000 (10:33 -0700)]
glsl: Emit mul instead of dot if only one component left.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85683
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85691
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoclover: Fix clBuildProgram piglit regression
Tom Stellard [Mon, 3 Nov 2014 14:14:01 +0000 (09:14 -0500)]
clover: Fix clBuildProgram piglit regression

Should trigger CL_INVALID_VALUE if device_list is NULL and num_devices
is greater than zero.

Introduced by e5468dfa523be2a7a0d04bb9efcf8ae780957563

Reported by: EdB

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
9 years agogallivm: Disable frame-pointer-omission on x86 to ensure right stack alignment.
José Fonseca [Fri, 31 Oct 2014 22:58:52 +0000 (22:58 +0000)]
gallivm: Disable frame-pointer-omission on x86 to ensure right stack alignment.

Between release 3.2 and 3.3 LLVM stopped aligning properly when certain
conditions (no allocas, but large number of vectors causing spills to
the stack, and frame pointer omission enabled).

We were already disabling frame-pointer-omission on several build types,
but we now disable it on all build types.

It's not clear whether this affects 32-bits x86 processes only, or if it
can also affect 64-bits x86_64 processes when AVX registers are
available and used.  So disable frame-pointer-omission on both
x86/x86_64 to be on the safe side.

See also:
- http://llvm.org/PR21435

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
9 years agogallivm: When disassemble a function, start by printing out its name.
José Fonseca [Fri, 31 Oct 2014 23:09:02 +0000 (23:09 +0000)]
gallivm: When disassemble a function, start by printing out its name.

To help recognize what's supposed to do.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
10 years agoi965/chv: Increase VS and GS thread counts
Ben Widawsky [Sun, 2 Nov 2014 19:43:24 +0000 (11:43 -0800)]
i965/chv: Increase VS and GS thread counts

AFAICT the number of threads is 80, not 70. I am not sure if Ken knows
something I do not.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
10 years agogallium/docs: fix NRM, NRM4 docs
Brian Paul [Fri, 31 Oct 2014 22:01:25 +0000 (16:01 -0600)]
gallium/docs: fix NRM, NRM4 docs

Need to do a sqrt().

FWIW, the html that Sphinx 1.1.3 generates for the math expressions
looks completely broken.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
10 years agosoftpipe: use the tgsi_free_tokens() function
Brian Paul [Fri, 31 Oct 2014 03:02:19 +0000 (21:02 -0600)]
softpipe: use the tgsi_free_tokens() function

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agotgsi: add a tgsi_free_tokens() function
Brian Paul [Fri, 31 Oct 2014 01:08:59 +0000 (19:08 -0600)]
tgsi: add a tgsi_free_tokens() function

To match tgsi_alloc_tokens().

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agoutil: simplify u_pstipple.c code
Brian Paul [Fri, 31 Oct 2014 01:45:52 +0000 (19:45 -0600)]
util: simplify u_pstipple.c code

Use the new helper functions in the tgsi_transform.h file to emit
declarations and instructions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agoutil: simplify temp register selection in u_pstipple.c
Brian Paul [Fri, 31 Oct 2014 01:38:09 +0000 (19:38 -0600)]
util: simplify temp register selection in u_pstipple.c

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agoutil: simplify util_pstipple_create_fragment_shader() params
Brian Paul [Fri, 31 Oct 2014 01:13:57 +0000 (19:13 -0600)]
util: simplify util_pstipple_create_fragment_shader() params

Pass and return tgsi_token buffers instead of pipe_shader_state.

And update softpipe driver (the only user of this function).

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agosoftpipe: remove unused softpipe_create_fs_variant_exec() parameter
Brian Paul [Fri, 31 Oct 2014 01:11:54 +0000 (19:11 -0600)]
softpipe: remove unused softpipe_create_fs_variant_exec() parameter

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agosoftpipe: check for SP_NEW_STIPPLE when building quad pipeline
Brian Paul [Fri, 31 Oct 2014 02:45:36 +0000 (20:45 -0600)]
softpipe: check for SP_NEW_STIPPLE when building quad pipeline

Fixes polygon stipple if both DO_PSTIPPLE_IN_DRAW_MODULE and
DO_PSTIPPLE_IN_HELPER_MODULE are zero/off.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
10 years agor600g: Fix build with opencl and radeonsi disabled
Tom Stellard [Fri, 31 Oct 2014 20:26:52 +0000 (16:26 -0400)]
r600g: Fix build with opencl and radeonsi disabled

10 years agoclover: Fix bug when binary programs are passed to clBuildProgram() v2
Tom Stellard [Tue, 21 Oct 2014 14:33:21 +0000 (10:33 -0400)]
clover: Fix bug when binary programs are passed to clBuildProgram() v2

This was a regression introduced by
611d66fe4513e53bde052dd2bab95d448c909a2a

Passing a binary program to clBuildProgram() is legal, but passing one
to clCompileProgram() is not.

v2:
  - Code cleanups.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoclover: Factor input validation of clCompileProgram into a new function v2
Tom Stellard [Tue, 21 Oct 2014 14:31:56 +0000 (10:31 -0400)]
clover: Factor input validation of clCompileProgram into a new function v2

This factors out the validation that is common with clBuildProgram().

v2:
  - Code cleanups.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
10 years agoradeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2
Tom Stellard [Fri, 26 Sep 2014 01:11:24 +0000 (18:11 -0700)]
radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2

v2:
  - Drop dependency on LLVM >= 3.5.1
  - Rename si_create_shader() to si_shader_binary_read()

10 years agor600g/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2
Tom Stellard [Fri, 26 Sep 2014 01:10:44 +0000 (18:10 -0700)]
r600g/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2

v2:
  - Drop dependency on LLVM >= 3.5.1

10 years agogallium/radeon: Add query for symbol specific config information
Tom Stellard [Mon, 29 Sep 2014 16:36:42 +0000 (09:36 -0700)]
gallium/radeon: Add query for symbol specific config information

This adds a query which allows drivers to access the config
information of a specific function within the LLVM generated ELF
binary.  This makes it possible for the driver to handle ELF
binaries with multiple kernels / global functions.

10 years agor300g: remove enabled/disabled hyperz and AA compression messages
Marek Olšák [Thu, 30 Oct 2014 20:57:00 +0000 (21:57 +0100)]
r300g: remove enabled/disabled hyperz and AA compression messages

It's annoying with octave. Reported by Michael Burian.

Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
10 years agor600g: Delete unused variable 'max_global_size' in 'r600_get_compute_param'
Dieter Nützel [Thu, 23 Oct 2014 17:59:13 +0000 (19:59 +0200)]
r600g: Delete unused variable 'max_global_size' in 'r600_get_compute_param'

Signed-off-by: Dieter Nützel <Dieter@nuetzel-hh.de>