Saleem Abdulrasool [Tue, 3 Oct 2017 20:22:26 +0000 (20:22 +0000)]
build: use POSITION_INDEPENDENT_CODE instead of -fPIC
Rather than hardcode the flag and check if the compiler supports it, use
the CMake property to get the right flag spelling for the compiler.
This makes it generally more portable.
llvm-svn: 314834
Alexey Bataev [Tue, 3 Oct 2017 20:00:00 +0000 (20:00 +0000)]
[OPENMP] Allow use of declare target directive inside struct
declaration.
Patch allows using of the `#pragma omp declare target`| `#pragma omp end
declare target` directives inside the structures if we need to mark as
declare target only some static members.
llvm-svn: 314833
Alexander Shaposhnikov [Tue, 3 Oct 2017 19:56:21 +0000 (19:56 +0000)]
[lldb] Fix initialization of m_debug_cu_index_map
SymbolFileDWARFDwp contains m_debug_cu_index_map which was previously
initialized incorrectly: before m_debug_cu_index.parse
is called m_debug_cu_index is empty, thus
the map was not actually getting populated properly.
This diff moves this step into a private helper method
and calls it after m_debug_cu_index.parse inside SymbolFileDWARFDwp::Create.
Test plan:
Build a toy test example
main.cpp
clang -gsplit-dwarf -g -O0 main.cpp -o main.exe
llvm-dwp -e main.exe -o main.exe.dwp
Build LLDB with ENABLE_DEBUG_PRINTF set.
Run: lldb -- ./main.exe
Check that the indexes are now correct
(before this change they were empty)
Check that debugging works
(setting breakpoints, printing local variables (this was not working before))
Differential revision: http://reviews.llvm.org/D38492
llvm-svn: 314832
Tim Shen [Tue, 3 Oct 2017 19:39:02 +0000 (19:39 +0000)]
Revert r314820 "[Analyzer] More granular special casing in RetainCountChecker"
The test retain-release.m fails with this patch.
Differential Revision: https://reviews.llvm.org/D38487
llvm-svn: 314831
Craig Topper [Tue, 3 Oct 2017 19:14:23 +0000 (19:14 +0000)]
[InstCombine] Use isSignBitCheck to simplify an if statement. Directly create new sign bit compares instead of manipulating the constant. NFCI
Since we no longer had the direct constant compares, manipulating the constant seemeded less clear.
llvm-svn: 314830
Tim Renouf [Tue, 3 Oct 2017 19:03:52 +0000 (19:03 +0000)]
[AMDGPU] implemented pal metadata
Summary:
For the amdpal OS type:
We write an AMDGPU_PAL_METADATA record in the .note section in the ELF
(or as an assembler directive). It contains key=value pairs of 32 bit
ints. It is a merge of metadata from codegen of the shaders, and
metadata provided by the frontend as _amdgpu_pal_metadata IR metadata.
Where both sources have a key=value with the same key, the two values
are ORed together.
This .note record is part of the amdpal ABI and will be documented in
docs/AMDGPUUsage.rst in a future commit.
Eventually the amdpal OS type will stop generating the .AMDGPU.config
section once the frontend has safely moved over to using the .note
records above instead of .AMDGPU.config.
Reviewers: arsenm, nhaehnle, dstuttard
Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D37753
llvm-svn: 314829
Alexander Timofeev [Tue, 3 Oct 2017 18:55:36 +0000 (18:55 +0000)]
[AMDGPU] Avoid predicated execution of the basic blocks containing scalar
instructions.
Differential revision: https://reviews.llvm.org/D38293
llvm-svn: 314828
Hans Wennborg [Tue, 3 Oct 2017 18:46:57 +0000 (18:46 +0000)]
Update test expectation after r314821
llvm-svn: 314827
Hans Wennborg [Tue, 3 Oct 2017 18:44:12 +0000 (18:44 +0000)]
Fix -Wcovered-switch-default warnings from r314821
llvm-svn: 314826
Hans Wennborg [Tue, 3 Oct 2017 18:39:13 +0000 (18:39 +0000)]
Revert r314817 "[dwarfdump] Add -lookup option"
The test fails on Linux; see follow-up email on the llvm-commits list.
> Add the option to lookup an address in the debug information and print
> out the file, function, block and line table details.
>
> Differential revision: https://reviews.llvm.org/D38409
This also reverts the follow-up r314818:
> [test] Fix llvm-dwarfdump/cmdline.test
>
> Fixes test/tools/llvm-dwarfdump/cmdline.test
llvm-svn: 314825
Hans Wennborg [Tue, 3 Oct 2017 18:32:29 +0000 (18:32 +0000)]
Revert r314806 "[SLP] Vectorize jumbled memory loads."
All the buildbots are red, e.g.
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-lld/builds/2436/
> Summary:
> This patch tries to vectorize loads of consecutive memory accesses, accessed
> in non-consecutive or jumbled way. An earlier attempt was made with patch D26905
> which was reverted back due to some basic issue with representing the 'use mask' of
> jumbled accesses.
>
> This patch fixes the mask representation by recording the 'use mask' in the usertree entry.
>
> Change-Id: I9fe7f5045f065d84c126fa307ef6ebe0787296df
>
> Reviewers: mkuper, loladiro, Ayal, zvi, danielcdh
>
> Reviewed By: Ayal
>
> Subscribers: hans, mzolotukhin
>
> Differential Revision: https://reviews.llvm.org/D36130
llvm-svn: 314824
Reid Kleckner [Tue, 3 Oct 2017 18:30:38 +0000 (18:30 +0000)]
Fix expectations in MC wasm init-fini-array test
llvm-svn: 314823
Reid Kleckner [Tue, 3 Oct 2017 18:30:11 +0000 (18:30 +0000)]
Implement David Blaikie's suggestion for comparison operators
llvm-svn: 314822
Hans Wennborg [Tue, 3 Oct 2017 18:27:22 +0000 (18:27 +0000)]
CodeView: Provide a .def file with the register ids
The list of register ids was previously written out in a couple of dirrent
places. This puts it in a .def file and also adds a few more registers (e.g.
the x87 regs) which should lead to more readable dumps, but I didn't include
the whole list since that seems unnecessary.
X86_MC::initLLVMToSEHAndCVRegMapping is pretty ugly, but at least it's not
relying on magic constants anymore. The TODO of using tablegen still stands.
Differential revision: https://reviews.llvm.org/D38480
llvm-svn: 314821
George Karpenkov [Tue, 3 Oct 2017 18:12:15 +0000 (18:12 +0000)]
[Analyzer] More granular special casing in RetainCountChecker
Only assume that IOBSDNameMatching and friends increment a reference counter
if their return type is a CFMutableDictionaryRef.
Differential Revision: https://reviews.llvm.org/D38487
llvm-svn: 314820
Reid Kleckner [Tue, 3 Oct 2017 17:59:02 +0000 (17:59 +0000)]
[DebugInfo] Correctly coalesce DBG_VALUEs that mix direct and indirect values
Summary:
This should fix a regression introduced by r313786, which switched from
MachineInstr::isIndirectDebugValue() to checking if operand 1 is an
immediate. I didn't have a test case for it until now.
A single UserValue, which approximates a user variable, may have many
DBG_VALUE instructions that disagree about whether the variable is in
memory or in a virtual register. This will become much more common once
we have llvm.dbg.addr, but you can construct such a test case manually
today with llvm.dbg.value.
Before this change, we would get two UserValues: one for direct and one
for indirect DBG_VALUE instructions describing the same variable. If we
build separate interval maps for direct and indirect locations, we will
end up accidentally coalescing identical DBG_VALUE intervals that need
to remain separate because they are broken up by intervals of the
opposite direct-ness.
Reviewers: aprantl
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D37932
llvm-svn: 314819
Jonas Devlieghere [Tue, 3 Oct 2017 17:28:37 +0000 (17:28 +0000)]
[test] Fix llvm-dwarfdump/cmdline.test
Fixes test/tools/llvm-dwarfdump/cmdline.test
llvm-svn: 314818
Jonas Devlieghere [Tue, 3 Oct 2017 17:10:21 +0000 (17:10 +0000)]
[dwarfdump] Add -lookup option
Add the option to lookup an address in the debug information and print
out the file, function, block and line table details.
Differential revision: https://reviews.llvm.org/D38409
llvm-svn: 314817
Jonas Toth [Tue, 3 Oct 2017 17:08:57 +0000 (17:08 +0000)]
[clang-tidy] fix buildbot hicpp-signed-bitwise
To finally fix the buildbot I added one single warning testcase.
llvm-svn: 314816
Simon Pilgrim [Tue, 3 Oct 2017 17:04:36 +0000 (17:04 +0000)]
[X86] Add non-SSE tests for PR15215 as well
llvm-svn: 314815
Geoff Berry [Tue, 3 Oct 2017 16:59:13 +0000 (16:59 +0000)]
Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""
This reverts commit r314729.
Another bug has been encountered in an out-of-tree target reported by Quentin.
llvm-svn: 314814
Simon Pilgrim [Tue, 3 Oct 2017 16:56:57 +0000 (16:56 +0000)]
[X86][SSE] Add bool vector extraction test cases from PR15215
llvm-svn: 314813
Jonas Toth [Tue, 3 Oct 2017 16:53:56 +0000 (16:53 +0000)]
[clang-tidy] potentially fix buildbot
I tried to silence lit with `| count 0`, which did not work.
Other testcases did not have `-- --` but only `--` in the RUN line.
Maybe this fixes the problem.
llvm-svn: 314812
Jonas Toth [Tue, 3 Oct 2017 16:27:41 +0000 (16:27 +0000)]
[clang-tidy] Remove target specification hicpp-signed-bitwise
This patch removes the targetspecification of a testcase, that broke
for ARM. The underlying problem was fixed which makes it unnecessary to
specify the target architecture (problem was the signedness of `char`).
Committing without review was accepted in https://reviews.llvm.org/D38399
by aaron.ballman.
llvm-svn: 314811
Rafael Espindola [Tue, 3 Oct 2017 16:25:48 +0000 (16:25 +0000)]
Use sched_getaffinity instead of std::thread::hardware_concurrency.
The issue with std::thread::hardware_concurrency is that it forwards
to libc and some implementations (like glibc) don't take thread
affinity into consideration.
With this change a llvm program that can execute in only 2 cores will
use 2 threads, even if the machine has 32 cores.
This makes benchmarking a lot easier, but should also help if someone
doesn't want to use all cores for compilation for example.
llvm-svn: 314810
Rafael Espindola [Tue, 3 Oct 2017 16:25:15 +0000 (16:25 +0000)]
Use sched_getaffinity instead of std::thread::hardware_concurrency.
The issue with std::thread::hardware_concurrency is that it forwards
to libc and some implementations (like glibc) don't take thread
affinity into consideration.
With this change a llvm program that can execute in only 2 cores will
use 2 threads, even if the machine has 32 cores.
This makes benchmarking a lot easier, but should also help if someone
doesn't want to use all cores for compilation for example.
llvm-svn: 314809
Jonas Toth [Tue, 3 Oct 2017 16:25:01 +0000 (16:25 +0000)]
[clang-tidy] Fix bug 34747, streaming operators and hicpp-signed-bitwise
The bug happened with stream operations, that were not recognized in all cases.
Even there were already existing test for streaming classes, they did not catch this bug.
Adding the isolated example to the existing tests did not trigger the bug.
Therefore i created a new isolated file that did expose the bug indeed.
Differential: https://reviews.llvm.org/D38399
reviewed by aaron.ballman
llvm-svn: 314808
Dehao Chen [Tue, 3 Oct 2017 15:50:42 +0000 (15:50 +0000)]
Revert the change that accidentally went in r314806.
llvm-svn: 314807
Mohammad Shahid [Tue, 3 Oct 2017 15:28:48 +0000 (15:28 +0000)]
[SLP] Vectorize jumbled memory loads.
Summary:
This patch tries to vectorize loads of consecutive memory accesses, accessed
in non-consecutive or jumbled way. An earlier attempt was made with patch D26905
which was reverted back due to some basic issue with representing the 'use mask' of
jumbled accesses.
This patch fixes the mask representation by recording the 'use mask' in the usertree entry.
Change-Id: I9fe7f5045f065d84c126fa307ef6ebe0787296df
Reviewers: mkuper, loladiro, Ayal, zvi, danielcdh
Reviewed By: Ayal
Subscribers: hans, mzolotukhin
Differential Revision: https://reviews.llvm.org/D36130
llvm-svn: 314806
Jakub Kuderski [Tue, 3 Oct 2017 14:51:31 +0000 (14:51 +0000)]
[Dominators] Don't use default parameter in lambda
... to make GCC buildbots happy.
llvm-svn: 314805
Oliver Stannard [Tue, 3 Oct 2017 14:38:52 +0000 (14:38 +0000)]
[ARM] Use table-gen'd assembly operand diags in ARM asm parser
This switches the ARM AsmParser to use assembly operand diagnostics from
tablegen, rather than a switch statement on the ARMMatchResultTy. It
moves the existing diagnostic strings to tablegen, but adds no new ones,
so this is NFC except for one diagnostic string that had an off-by-1 error
in the hand-written switch statement.
Differential revision: https://reviews.llvm.org/D31607
llvm-svn: 314804
Oliver Stannard [Tue, 3 Oct 2017 14:34:57 +0000 (14:34 +0000)]
[AsmParser] Add DiagnosticString to AsmOperands in tablegen
This adds a DiagnosticString member to the AsmOperand tablegen class, so
that the diagnostic text to be used when an assembly operand is
incorrect can be stored in the tablegen description of the operand,
rather than in a separate switch statement in the AsmParser.
If DiagnosticString is used for any operands, tablegen will emit a
getMatchKindDiag function, to map from diagnostic enums to strings.
Differential revision: https://reviews.llvm.org/D31606
llvm-svn: 314803
Yaxun Liu [Tue, 3 Oct 2017 14:34:29 +0000 (14:34 +0000)]
[OpenCL] Fix checking of vector type casting
Currently clang allows the following code
int a;
int b = (const int) a;
However it does not the following code
int4 a;
int4 b = (const int4) a;
This is because Clang compares the qualified types instead of unqualified types for vector type casting, which causes the inconsistency.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D38463
llvm-svn: 314802
Jakub Kuderski [Tue, 3 Oct 2017 14:33:41 +0000 (14:33 +0000)]
[Dominators] Add DFS number verification
Summary:
This patch teaches the DominatorTree verifier to check DFS In/Out numbers which are used to answer dominance queries.
DFS number verification is done in O(nlogn), so it shouldn't add much overhead on top of the O(n^3) sibling property verification.
This check should detect errors like the one spotted in PR34466 and related bug reports.
The patch also cleans up the DFS calculation a bit, as all constructed trees should have a single root now.
I see 2 new test failures when running check-all after this change:
```
Failing Tests (2):
Polly :: Isl/CodeGen/OpenMP/reference-argument-from-non-affine-region.ll
Polly :: Isl/CodeGen/OpenMP/two-parallel-loops-reference-outer-indvar.ll
```
which seem to happen just after `Create LLVM-IR from SCoPs` -- I XFAILed them in r314800.
Reviewers: dberlin, grosser, davide, zhendongsu, bollu
Reviewed By: dberlin
Subscribers: nandini12396, bollu, Meinersbur, brzycki, llvm-commits
Differential Revision: https://reviews.llvm.org/D38331
llvm-svn: 314801
Jakub Kuderski [Tue, 3 Oct 2017 14:31:53 +0000 (14:31 +0000)]
XFAIL two test that fail VerifyDFSNumbers DominatorTree check
This test XFAILs two test that start to fail when verifying DT's
DFS numbers, as per Tobias' suggestion.
Related VerifyDFSNumbers patch: D38331.
llvm-svn: 314800
Oliver Stannard [Tue, 3 Oct 2017 14:30:58 +0000 (14:30 +0000)]
[ARM, Asm] Use correct source location for register tokens
tryParseRegister advances the lexer, so we need to take copies of the start and
end locations of the register operand before calling it.
Previously, the caret in the diagnostic pointer to the comma after the r0
operand in the test, rather than the start of the operand.
Differential revision: https://reviews.llvm.org/D31537
llvm-svn: 314799
Simon Dardis [Tue, 3 Oct 2017 13:45:49 +0000 (13:45 +0000)]
[mips] Enable spilling and reloading of the dsp register set.
The dsp register class is an alias of the gpr register class, so
we have to define instructions for spilling and reloading.
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D38038
llvm-svn: 314798
Simon Atanasyan [Tue, 3 Oct 2017 13:30:02 +0000 (13:30 +0000)]
[MIPS] Generate thunks for microMIPS code
If symbol has the STO_MIPS_MICROMIPS flag and requires a thunk to perform
call PIC from non-PIC functions, we need to generate a thunk with microMIPS
code.
llvm-svn: 314797
John Brawn [Tue, 3 Oct 2017 13:08:22 +0000 (13:08 +0000)]
[CGP] Make optimizeMemoryInst capable of handling multiple AddrModes
Currently optimizeMemoryInst requires that all of the AddrModes it sees are
identical. This patch makes it capable of tracking multiple AddrModes, so long
as they differ in at most one field.
This patch does nothing by itself, but later patches will make use of it to
insert or reuse phi or select instructions for the differing fields.
Differential Revision: https://reviews.llvm.org/D38278
llvm-svn: 314795
John Brawn [Tue, 3 Oct 2017 13:04:15 +0000 (13:04 +0000)]
[CGP] In optimizeMemoryInst handle select similarly to phi
This lets us optimize away selects that perform the same address computation in
two different ways and is also the first step towards being able to handle
selects between two different, but compatible, address computations.
Differential Revision: https://reviews.llvm.org/D38242
llvm-svn: 314794
Oliver Stannard [Tue, 3 Oct 2017 12:45:18 +0000 (12:45 +0000)]
[ARM, Asm] Fix ubsan failure caused by out-of-range enum value
In this code, we use ~0U as a sentinel value for any operand class that doesn't
have a user-friendly error message, but this value isn't in range of the
MatchClassKind enum, so we need to ensure it does not get passed to isSubclass.
llvm-svn: 314793
Simon Pilgrim [Tue, 3 Oct 2017 12:41:39 +0000 (12:41 +0000)]
[X86][SSE] Add support for decoding PACKSS/PACKUS shuffles masks with UNDEF
llvm-svn: 314792
Oliver Stannard [Tue, 3 Oct 2017 12:28:28 +0000 (12:28 +0000)]
[ARM, Asm] Remove dead code causing MSan failure.
r314779 caused ErrorInfo to be red uninitialised, but also made this code dead,
so it can just be removed.
llvm-svn: 314791
Igor Kudrin [Tue, 3 Oct 2017 12:23:46 +0000 (12:23 +0000)]
[ELF] Avoid promoting an undefined weak entry symbol to global.
Without this patch, lld emits "error: undefined symbol: _start"
if it encountered only weak references to that symbol.
llvm-svn: 314790
Igor Kudrin [Tue, 3 Oct 2017 12:17:59 +0000 (12:17 +0000)]
[ELF] Keep symbols specified by '-u' over LTO.
Differential Revision: https://reviews.llvm.org/D38348
llvm-svn: 314789
Simon Pilgrim [Tue, 3 Oct 2017 12:01:31 +0000 (12:01 +0000)]
[X86][SSE] Add support for lowering shuffles to PACKSS/PACKUS
If the upper bits of a truncation shuffle patterns have at least the minimum number of sign/zero bits on their inputs then we can safely use PACKSS/PACKUS as shuffles.
Partial fix for https://bugs.llvm.org/show_bug.cgi?id=34773
Differential Revision: https://reviews.llvm.org/D38472
llvm-svn: 314788
Evgeny Astigeevich [Tue, 3 Oct 2017 12:00:40 +0000 (12:00 +0000)]
[InlineCost, NFC] Extract code dealing with inbounds GEPs from visitGetElementPtr into a function
The code responsible for analysis of inbounds GEPs is extracted into a separate
function: CallAnalyzer::canFoldInboundsGEP. With the patch SROA
enabling/disabling code is localized at one place instead of spreading across
the code of CallAnalyzer::visitGetElementPtr.
Differential Revision: https://reviews.llvm.org/D38233
llvm-svn: 314787
Dean Michael Berris [Tue, 3 Oct 2017 11:40:54 +0000 (11:40 +0000)]
Revert "[XRay][compiler-rt] Use a hand-written circular buffer in BufferQueue"
This reverts r314766 (rL314766). Unit tests fail in multiple bots.
llvm-svn: 314786
Gabor Horvath [Tue, 3 Oct 2017 11:40:07 +0000 (11:40 +0000)]
[clang-tidy] Fixed a small code example in docs. NFC.
llvm-svn: 314785
Ivan A. Kosarev [Tue, 3 Oct 2017 11:31:42 +0000 (11:31 +0000)]
[CodeGen] Fix propagation of TBAA info for atomic accesses
This patch fixes clang to propagate complete TBAA information for
atomic accesses and not just the final access types. Prepared
against D38456 and requires it to be committed first.
This is part of D37826 reworked to be a separate patch to
simplify review.
Differential Revision: https://reviews.llvm.org/D38460
llvm-svn: 314784
Sam Clegg [Tue, 3 Oct 2017 11:20:28 +0000 (11:20 +0000)]
[WebAssembly] MC: Support for init_array and fini_array
Differential Revision: https://reviews.llvm.org/D37757
llvm-svn: 314783
Sean Eveson [Tue, 3 Oct 2017 11:05:28 +0000 (11:05 +0000)]
[llvm-cov] Hide files with no coverage from the index when filtering by name
Differential Revision: https://reviews.llvm.org/D38457
llvm-svn: 314782
Bjorn Pettersson [Tue, 3 Oct 2017 11:03:02 +0000 (11:03 +0000)]
[DebugInfo] Handle endianness when moving debug info for split integer values (reapplied)
Summary:
Take the target's endianness into account when splitting the
debug information in DAGTypeLegalizer::SetExpandedInteger.
This patch fixes so that, for big-endian targets, the fragment
expression corresponding to the high part of a split integer
value is placed at offset 0, in order to correctly represent
the memory address order.
I have attached a PPC32 reproducer where the resulting DWARF
pieces for a 64-bit integer were incorrectly reversed.
Original patch was reverted due to using -stop-after=isel in
the test case (but that is only working when AMDGPU target
is included in the llc build). The test case has now been
updated to use -stop-before=expand-isel-pseudos instead.
Patch by: dstenb
Reviewers: JDevlieghere, aprantl, dblaikie
Reviewed By: JDevlieghere, aprantl, dblaikie
Subscribers: nemanjai
Differential Revision: https://reviews.llvm.org/D38172
llvm-svn: 314781
Ivan A. Kosarev [Tue, 3 Oct 2017 10:52:39 +0000 (10:52 +0000)]
[CodeGen] Introduce generic TBAA access descriptors
With this patch we implement a concept of TBAA access descriptors
that are capable of representing both scalar and struct-path
accesses in a generic way.
This is part of D37826 reworked to be a separate patch to
simplify review.
Differential Revision: https://reviews.llvm.org/D38456
llvm-svn: 314780
Oliver Stannard [Tue, 3 Oct 2017 10:26:11 +0000 (10:26 +0000)]
[ARM] Use new assembler diags for ARM
This converts the ARM AsmParser to use the new assembly matcher error
reporting mechanism, which allows errors to be reported for multiple
instruction encodings when it is ambiguous which one the user intended
to use.
By itself this doesn't improve many error messages, because we don't have
diagnostic text for most operand types, but as we add that then this will allow
more of those diagnostic strings to be used when they are relevant.
Differential revision: https://reviews.llvm.org/D31530
llvm-svn: 314779
Simon Pilgrim [Tue, 3 Oct 2017 10:01:02 +0000 (10:01 +0000)]
Remove unused variable. NFCI.
llvm-svn: 314778
Simon Pilgrim [Tue, 3 Oct 2017 09:54:03 +0000 (09:54 +0000)]
[X86][SSE] Add support for shuffle combining from PACKSS/PACKUS
Mentioned in D38472
llvm-svn: 314777
Simon Pilgrim [Tue, 3 Oct 2017 09:41:00 +0000 (09:41 +0000)]
[X86][SSE] Add support for PACKSS/PACKUS constant folding
Pulled out of D38472
llvm-svn: 314776
Javed Absar [Tue, 3 Oct 2017 09:35:04 +0000 (09:35 +0000)]
[MiSched] - Simplify ProcResEntry access
Reviewed by: @MatzeB
Differential Revision: https://reviews.llvm.org/D38447
llvm-svn: 314775
Oliver Stannard [Tue, 3 Oct 2017 09:33:12 +0000 (09:33 +0000)]
[Assembler] Report multiple near misses for invalid instructions
The current table-generated assembly instruction matcher returns a
64-bit error code when matching fails. Since multiple instruction
encodings with the same mnemonic can fail for different reasons, it uses
some heuristics to decide which message is important.
This heuristic does not work well for targets that have many encodings
with the same mnemonic but different operands, or which have different
versions of instructions controlled by subtarget features, as it is hard
to know which encoding the user was intending to use.
Instead of trying to improve the heuristic in the table-generated
matcher, this patch changes it to report a list of near-miss encodings.
This list contains an entry for each encoding with the correct mnemonic,
but with exactly one thing preventing it from being valid. This thing
could be a single invalid operand, a missing target feature or a failed
target-specific validation function.
The target-specific assembly parser can then report an error message
giving multiple options for instruction variants that the user may have
been trying to use. For example, I am working on a patch to use this for
ARM, which can give this error for an invalid instruction for ARMv6-M:
<stdin>:8:3: error: invalid instruction, multiple near-miss encodings found
adds r0, r1, #0x8
^
<stdin>:8:3: note: for one encoding: instruction requires: thumb2
adds r0, r1, #0x8
^
<stdin>:8:16: note: for one encoding: expected an integer in range [0, 7]
adds r0, r1, #0x8
^
<stdin>:8:16: note: for one encoding: expected a register in range [r0, r7]
adds r0, r1, #0x8
^
This also allows the target-specific assembly parser to apply its own
heuristics to suppress some errors. For example, the error "instruction
requires: arm-mode" is never going to be useful when targeting an
M-profile architecture (which does not have ARM mode).
This patch just adds the target-independent mechanism for doing this,
all targets still use the old mechanism. I've added a bit in the
AsmParser tablegen class to allow targets to switch to this new
mechanism. To use this, the target-specific assembly parser will have to
be modified for the change in signature of MatchInstructionImpl, and to
report errors based on the list of near-misses.
Differential revision: https://reviews.llvm.org/D27620
llvm-svn: 314774
Sjoerd Meijer [Tue, 3 Oct 2017 08:54:15 +0000 (08:54 +0000)]
ISel type legalization: add debug messages. NFCI.
This adds some more debug messages to the type legalizer and functions
like PromoteNode, ExpandNode, ExpandLibCall in an attempt to make
the debug messages a little bit more informative and useful.
Differential Revision: https://reviews.llvm.org/D38450
llvm-svn: 314773
Alex Bradbury [Tue, 3 Oct 2017 08:41:59 +0000 (08:41 +0000)]
[llvm-readobj][RISCV] Pretty-print RISCV e_flags
llvm-svn: 314772
Alex Bradbury [Tue, 3 Oct 2017 08:03:14 +0000 (08:03 +0000)]
[RISCV] Add missed test case for r314770
Differential Revision: https://reviews.llvm.org/D38311
Patch by https://reviews.llvm.org/D38311
llvm-svn: 314771
Alex Bradbury [Tue, 3 Oct 2017 08:00:47 +0000 (08:00 +0000)]
[RISCV] Parse RISC-V eflags in ObjectYAML
Differential Revision: https://reviews.llvm.org/D38311
Patch by Chih-Mao Chen.
llvm-svn: 314770
Hiroshi Inoue [Tue, 3 Oct 2017 07:28:58 +0000 (07:28 +0000)]
[trivial] fix format, NFC
llvm-svn: 314769
Shoaib Meenai [Tue, 3 Oct 2017 06:35:55 +0000 (06:35 +0000)]
[ObjectYAML] Handle SHF_COMPRESSED
This was previously being silently dropped by obj2yaml and caused
parsing errors with yaml2obj.
Differential Revision: https://reviews.llvm.org/D38490
llvm-svn: 314768
Martin Storsjo [Tue, 3 Oct 2017 06:29:58 +0000 (06:29 +0000)]
[X86] Provide the LSDA pointer with RIP relative addressing if necessary
This makes sure the LSDA pointer isn't truncated to 32 bit.
Make LowerINTRINSIC_WO_CHAIN a member function instead of a static
function, so that it can use the getGlobalWrapperKind method.
This solves the second half of the issues mentioned in PR34720.
Differential Revision: https://reviews.llvm.org/D38343
llvm-svn: 314767
Dean Michael Berris [Tue, 3 Oct 2017 06:15:34 +0000 (06:15 +0000)]
[XRay][compiler-rt] Use a hand-written circular buffer in BufferQueue
Summary:
This change removes the dependency on using a std::deque<...> for the
storage of the buffers in the buffer queue. We instead implement a
fixed-size circular buffer that's resilient to exhaustion, and preserves
the semantics of the BufferQueue.
We're moving away from using std::deque<...> for two reasons:
- We want to remove dependencies on the STL for data structures.
- We want the data structure we use to not require re-allocation in
the normal course of operation.
The internal implementation of the buffer queue uses heap-allocated
arrays that are initialized once when the BufferQueue is created, and
re-uses slots in the buffer array as buffers are returned in order.
We also change the lock used in the implementation to a spinlock
instead of a blocking mutex. We reason that since the release operations
now take very little time in the critical section, that a spinlock would
be appropriate.
This change is related to D38073.
Reviewers: dblaikie, kpw, pelikan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38119
llvm-svn: 314766
Dean Michael Berris [Tue, 3 Oct 2017 06:11:20 +0000 (06:11 +0000)]
fixup: use UNUSED, restore alignment for cache-line friendliness, and report on errors found when pthread_create_key fails
llvm-svn: 314765
Dean Michael Berris [Tue, 3 Oct 2017 06:11:13 +0000 (06:11 +0000)]
[XRay][compiler-rt] Use pthread for initializing thread-local data
Summary:
We avoid using C++11's thread_local keyword on non-trivially
destructible objects because it may introduce deadlocks when the C++
runtime registers destructors calling std::malloc(...). The deadlock may
happen when the allocator implementation is itself XRay instrumented.
To avoid having to call malloc(...) and free(...) in particular, we use
pthread_once, pthread_create_key, and pthread_setspecific to instead
manually register the cleanup implementation we want.
The code this replaces used an RAII type that implements the cleanup
functionality in the destructor, that was then initialized as a
function-local thread_local object. While it works in usual situations,
unfortunately it breaks when using a malloc implementation that itself
is XRay-instrumented.
Reviewers: dblaikie, kpw, pelikan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38073
llvm-svn: 314764
Mikael Holmen [Tue, 3 Oct 2017 06:03:49 +0000 (06:03 +0000)]
[Lint] Avoid failed assertion by fetching the proper pointer type
Summary:
When checking if a constant expression is a noop cast we fetched the
IntPtrType by doing DL->getIntPtrType(V->getType())). However, there can
be cases where V doesn't return a pointer, and then getIntPtrType()
triggers an assertion.
Now we pass DataLayout to isNoopCast so the method itself can determine
what the IntPtrType is.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D37894
llvm-svn: 314763
Craig Topper [Tue, 3 Oct 2017 05:31:07 +0000 (05:31 +0000)]
[InstCombine] Change a bunch of methods to take APInts by reference instead of pointer.
This allows us to remove a bunch of dereferences and only have a few dereferences at the call sites.
llvm-svn: 314762
Craig Topper [Tue, 3 Oct 2017 04:55:04 +0000 (04:55 +0000)]
[InstCombine] Replace an equality compare of two APInt pointers with a compare of the APInts themselves.
Apparently this works by virtue of the fact that the pointers are pointers to the APInts stored inside of the ConstantInt objects. But I really don't think we should be relying on that.
llvm-svn: 314761
Quentin Colombet [Tue, 3 Oct 2017 04:53:56 +0000 (04:53 +0000)]
[Legalizer] Add support for G_OR NarrowScalar.
Legalize bitwise OR:
A = BinOp<Ty> B, C
into:
B1, ..., BN = G_UNMERGE_VALUES B
C1, ..., CN = G_UNMERGE_VALUES C
A1 = BinOp<Ty/N> B1, C2
...
AN = BinOp<Ty/N> BN, CN
A = G_MERGE_VALUES A1, ..., AN
llvm-svn: 314760
NAKAMURA Takumi [Tue, 3 Oct 2017 04:18:46 +0000 (04:18 +0000)]
lldCommon depends on intrinsics_gen, due to llvm/CodeGen/CommandFlags.h
llvm-svn: 314759
Craig Topper [Tue, 3 Oct 2017 03:47:34 +0000 (03:47 +0000)]
[X86] Add AVX512 check lines to the cost model truncate test.
llvm-svn: 314758
Rui Ueyama [Tue, 3 Oct 2017 03:09:05 +0000 (03:09 +0000)]
Rewrite a function so that it doesn't use pointers to pointers. NFC.
Previous code was a bit puzzling because of its use of pointers.
In this patch, we pass a vector and its offsets, instead of pointers to
vector elements.
llvm-svn: 314756
Eric Fiselier [Tue, 3 Oct 2017 02:25:05 +0000 (02:25 +0000)]
Fix test suite misconfiguration on OS X
llvm-svn: 314755
Richard Smith [Tue, 3 Oct 2017 01:58:15 +0000 (01:58 +0000)]
R34811: Allow visibilities other than 'default' for VisibleNoLinkage entities.
llvm-svn: 314754
Faisal Vali [Tue, 3 Oct 2017 01:33:36 +0000 (01:33 +0000)]
Add parens around the boolean condition of one of the added asserts in r314747 ...
... in the hopes of teaching the bots the gift of silence ;)
For quick reference: https://reviews.llvm.org/rL314747
llvm-svn: 314753
Vedant Kumar [Tue, 3 Oct 2017 01:27:26 +0000 (01:27 +0000)]
[ubsan] Skip alignment checks which are folded away
Don't emit alignment checks which the IR constant folder throws away.
I've tested this out on X86FastISel.cpp. While this doesn't decrease
end-to-end compile-time significantly, it results in 122 fewer type
checks (1% reduction) overall, without adding any real complexity.
Differential Revision: https://reviews.llvm.org/D37544
llvm-svn: 314752
Vedant Kumar [Tue, 3 Oct 2017 01:27:26 +0000 (01:27 +0000)]
[ubsan] Save the result of getLLVMContext. NFC.
llvm-svn: 314751
Vedant Kumar [Tue, 3 Oct 2017 01:27:25 +0000 (01:27 +0000)]
[ubsan] Add helpers to decide when null/vptr checks are required. NFC.
llvm-svn: 314750
Vedant Kumar [Tue, 3 Oct 2017 01:27:24 +0000 (01:27 +0000)]
[ubsan] Save a ptrtoint when emitting alignment checks
The alignment check emits a ptrtoint instruction which can be reused in
the call to the diagnostic handler.
llvm-svn: 314749
Faisal Vali [Tue, 3 Oct 2017 01:20:40 +0000 (01:20 +0000)]
Remove an assertion I added from the refactoring of pasteTokens (https://reviews.llvm.org/rL314747).
- it made the bots v angry!
I'm not exactly sure why the assertion doesn't hold - if anyone has any insight - would appreciate it.
Thanks!
llvm-svn: 314748
Faisal Vali [Tue, 3 Oct 2017 00:52:14 +0000 (00:52 +0000)]
[NFC] Refactor PasteTokens so that it can be passed the Token Stream and Index to start concatenating at.
In passing:
- change the name of the function to pasteTokens c/w coding standards
- rename CurToken to CurTokenIdx (since it is not the token, but the index)
- add doxygen comments to document some of pasteTokens' functionality
- use parameter names different from the data member names.
This will be useful for implementing __VA_OPT__ (https://reviews.llvm.org/D35782#inline-322587)
llvm-svn: 314747
Rui Ueyama [Tue, 3 Oct 2017 00:45:24 +0000 (00:45 +0000)]
Add a comment.
llvm-svn: 314746
Peter Collingbourne [Tue, 3 Oct 2017 00:44:21 +0000 (00:44 +0000)]
LTO: Improve error reporting when adding a cache entry.
Move error handling code next to the code that returns the error,
and change the error message in order to distinguish it from a similar
error message elsewhere in this file.
llvm-svn: 314745
Daniel Berlin [Tue, 3 Oct 2017 00:26:21 +0000 (00:26 +0000)]
SparseSolver: Rename getOrInitValueState to getValueState, matching what SCCP calls it
llvm-svn: 314744
Reid Kleckner [Tue, 3 Oct 2017 00:14:03 +0000 (00:14 +0000)]
[clang-cl] Claim ignored /O[12xd] arguments
Fixes PR34809
llvm-svn: 314743
Matt Arsenault [Tue, 3 Oct 2017 00:06:41 +0000 (00:06 +0000)]
AMDGPU: Remove global isGCN predicates
These are problematic because they apply to everything,
and can easily clobber whatever more specific predicate
you are trying to add to a function.
Currently instructions use SubtargetPredicate/PredicateControl
to apply this to patterns applied to an instruction definition,
but not to free standing Pats. Add a wrapper around Pat
so the special PredicateControls requirements can be appended
to the final predicate list like how Mips does it.
llvm-svn: 314742
Haicheng Wu [Mon, 2 Oct 2017 23:43:52 +0000 (23:43 +0000)]
[InstSimplify] teach SimplifySelectInst() to fold more vector selects
Call ConstantFoldSelectInstruction() to fold cases like below
select <2 x i1><i1 true, i1 false>, <2 x i8> <i8 0, i8 1>, <2 x i8> <i8 2, i8 3>
All operands are constants and the condition has mixed true and false conditions.
Differential Revision: https://reviews.llvm.org/D38369
llvm-svn: 314741
Davide Italiano [Mon, 2 Oct 2017 23:39:20 +0000 (23:39 +0000)]
[PassManager] Retire cl::opt that have been set for a while. NFCI.
llvm-svn: 314740
Tim Shen [Mon, 2 Oct 2017 23:20:06 +0000 (23:20 +0000)]
[PowerPC] Revert r314666.
See https://reviews.llvm.org/D38172.
I tried to XFAIL it, but sometimes XPASS triggers the bot. Simply
revert it.
llvm-svn: 314739
Hans Wennborg [Mon, 2 Oct 2017 23:09:37 +0000 (23:09 +0000)]
Build fix: don't try to link in lldConfig
Config was removed in r314719.
llvm-svn: 314736
Eric Fiselier [Mon, 2 Oct 2017 22:52:51 +0000 (22:52 +0000)]
Improve test runner output for broken configurations.
Previously LIT would often fail while attempting to set up/configure
the test compiler; normally when attempting to dump the builtin macros.
This sort of failure provided no useful information about what went
wrong with the compiler, making the actual issues hard --- if not
impossible --- to debug easily.
This patch changes the LIT configuration to report the failure explicitly,
including the failed compile command and the stdout/stderr output.
llvm-svn: 314735
Daniel Berlin [Mon, 2 Oct 2017 22:49:49 +0000 (22:49 +0000)]
Template the sparse propagation solver instead of using void pointers
Summary:
This avoids using void * as the type of the lattice value and ugly casts needed to make that happen.
(If folks want to use references, etc, they can use a reference_wrapper).
Reviewers: davide, mssimpso
Subscribers: sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D38476
llvm-svn: 314734
Richard Smith [Mon, 2 Oct 2017 22:43:36 +0000 (22:43 +0000)]
PR33839: Fix -Wunused handling for structured binding declarations.
We warn about a structured binding declaration being unused only if none of its
bindings are used.
llvm-svn: 314733
Tim Shen [Mon, 2 Oct 2017 22:40:32 +0000 (22:40 +0000)]
[PowerPC] Temporarily disable the test introduced by r314666
See https://reviews.llvm.org/D38172 for details.
llvm-svn: 314732
Jason Molenda [Mon, 2 Oct 2017 22:11:22 +0000 (22:11 +0000)]
Move install_name_tool to a separate make target.
llvm-svn: 314731