Tom Rini [Wed, 11 Jan 2017 13:04:26 +0000 (08:04 -0500)]
Merge tag 'xilinx-for-v2017.03' of git://denx.de/git/u-boot-microblaze
Xilinx changes for v2017.03
- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes
Masahiro Yamada [Tue, 10 Jan 2017 04:32:08 +0000 (13:32 +0900)]
ARM: sunxi: remove bare default for CONFIG_MMC
The bare default entry is wrong. Just remove it since the (real)
entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 10 Jan 2017 04:32:07 +0000 (13:32 +0900)]
mmc: move more driver config options to Kconfig
Move (and rename) the following CONFIG options to Kconfig:
CONFIG_DAVINCI_MMC (renamed to CONFIG_MMC_DAVINCI)
CONFIG_OMAP_HSMMC (renamed to CONFIG_MMC_OMAP_HS)
CONFIG_MXC_MMC (renamed to CONFIG_MMC_MXC)
CONFIG_MXS_MMC (renamed to CONFIG_MMC_MXS)
CONFIG_TEGRA_MMC (renamed to CONFIG_MMC_SDHCI_TEGRA)
CONFIG_SUNXI_MMC (renamed to CONFIG_MMC_SUNXI)
They are the same option names as used in Linux.
This commit was created as follows:
[1] Rename the options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_DAVINCI_MMC/CONFIG_MMC_DAVINCI/g
s/CONFIG_OMAP_HSMMC/CONFIG_MMC_OMAP_HS/g
s/CONFIG_MXC_MMC/CONFIG_MMC_MXC/g
s/CONFIG_MXS_MMC/CONFIG_MMC_MXS/g
s/CONFIG_TEGRA_MMC/CONFIG_MMC_SDHCI_TEGRA/g
s/CONFIG_SUNXI_MMC/CONFIG_MMC_SUNXI/g
'
[2] Commit the changes
[3] Create entries in driver/mmc/Kconfig.
(copied from Linux)
[4] Move the options with the following command
tools/moveconfig.py -y -r HEAD \
MMC_DAVINCI MMC_OMAP_HS MMC_MXC MMC_MXS MMC_SDHCI_TEGRA MMC_SUNXI
[5] Sort and align drivers/mmc/Makefile for readability
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 10 Jan 2017 04:32:06 +0000 (13:32 +0900)]
ARM: davinci: remove unused CONFIG_DAVINCI_MMC_SD1
This CONFIG is not referenced from anywhere.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 10 Jan 2017 04:32:05 +0000 (13:32 +0900)]
mmc: move DesignWare-based drivers to Kconfig
Move (and rename) the following CONFIG options to Kconfig:
CONFIG_EXYNOS_DWMMC (renamed to CONFIG_MMC_DW_EXYNOS)
CONFIG_HIKEY_DWMMC (renamed to CONFIG_MMC_DW_K3)
CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA)
The "HIKEY" is a board name, so it is not suitable for the MMC
controller name. I am following the name used in Linux.
This commit was generated as follows:
[1] Rename the config options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g
s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g
s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g
'
[2] Commit the changes
[3] Create the entries in drivers/mmc/Kconfig
(with default y for EXYNOS and SOCFPGA)
[4] Run the following:
tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA
[5] Sort and align drivers/mmc/Makefile for readability
[6] Clean-up doc/README.socfpga by hand
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 10 Jan 2017 04:32:04 +0000 (13:32 +0900)]
mmc: move CONFIG_DWMMC to Kconfig, renaming to CONFIG_MMC_DW
This commit was created as follows:
[1] Rename the option with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e 's/CONFIG_DWMMC/CONFIG_MMC_DW/g'
[2] create the entry for MMC_DW in drivers/mmc/Kconfig
(the prompt and help were copied from Linux)
[3] run "tools/moveconfig.py -y MMC_DW"
[4] add "depends on MMC_DW" to the MMC_DW_ROCKCHIP entry
[5] Clean-up doc/README.socfpga by hand
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 10 Jan 2017 04:32:03 +0000 (13:32 +0900)]
mmc: rename CONFIG_ROCKCHIP_DWMMC to CONFIG_MMC_DW_ROCKCHIP
I am trying to make all DesignWare-based driver options prefixed
with CONFIG_MMC_DW_.
This commit was generated as follows:
find . -name .git -prune -o -type f -print | \
xargs sed -i -e 's/ROCKCHIP_DWMMC/MMC_DW_ROCKCHIP/g'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 10 Jan 2017 04:32:02 +0000 (13:32 +0900)]
ARM: socfpga: remove unused CONFIG option and cleanup README.socfpga
CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH is defined in the socfpga_common.h,
but not referenced at all. Remove.
Also, clean-up the README.socfpga. CONFIG_MMC should not be defined
in the header since it was moved to Kconfig by commit
c27269953b94
("mmc: complete unfinished move of CONFIG_MMC"). I see no grep hit
for the others.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Jaehoon Chung [Thu, 15 Dec 2016 11:49:50 +0000 (20:49 +0900)]
power: change from meaningless value to error number
'-1' is absolutely meaningless value.
This patch changed from meaningless value to error number.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 30 Dec 2016 14:20:14 +0000 (23:20 +0900)]
mmc: uniphier-sd: fix Kconfig dependency
Some MMC drivers describe operations with the DM_MMC_OPS form, but
there are still several drivers with older implementation. We can
not compile drivers from different groups at the same time because
the core framework is shared with #ifdef CONFIG_DM_MMC_OPS.
Every driver should have "depends on DM_MMC_OPS" (or !DM_MMC_OPS)
explicitly to express which framework it is based on. This will
avoid enabling drivers with incompatible interface at the same time.
It is incorrect to make a driver "select DM_MMC_OPS".
While we are here, add "depends on OF_CONTROL" as well because this
driver can be configured only by Device Tree.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 30 Dec 2016 13:41:46 +0000 (22:41 +0900)]
mmc: sdhci-cadence: add Cadence SD4HC support
Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:21 +0000 (15:30 +0900)]
mmc: sdhci: combine the Host controller v3.0 feature into one condition
It doesn't need to seperate the condition.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:20 +0000 (15:30 +0900)]
mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
Ther is no usage anywhere. It doesn't need to maintain this bit.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:19 +0000 (15:30 +0900)]
mmc: sdhci: use the bitops APIs in sdhci.h
The using the bitops is too easy controlling than now.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:18 +0000 (15:30 +0900)]
mmc: sdhci: move the callback function into sdhci_ops
callback function should be moved into sdhci_ops struct.
Other controller can use these ops for controlling clock or their own
specific register.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:17 +0000 (15:30 +0900)]
mmc: s5p_sdhci: add the s5p_set_clock function
Add the s5p_set_clock function.
It's not good that "set_mmc_clk" is assigned directly.
In future, it should be changed to use the clock framework.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:16 +0000 (15:30 +0900)]
mmc: change the set_ios return type from void to int
To maintain consistency, set_ios type of legacy mmc_ops changed to int.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:15 +0000 (15:30 +0900)]
mmc: sdhci: remove the SDHCI_QUIRK_NO_CD
This quirk doesn't need anymore.
It's replaced to get_cd callback function.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:14 +0000 (15:30 +0900)]
mmc: pic32_sdhci: move the code to pic32_sdhci.c
This code is used for only pic32_sdhci controller.
To remove the "#ifdef", moves to pic32_sdhci.c.
And use the get_cd callback function.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:13 +0000 (15:30 +0900)]
mmc: sdhci: remove the unused code about testing Card detect
This code is dead code..There is no usage anywhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:12 +0000 (15:30 +0900)]
mmc: sdhci: add the get_cd callback function in sdhci_ops
Some SoCs can have their own card dect scheme.
Then they may use this get_cd callback function after implementing init
in their drivers.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 30 Dec 2016 06:30:11 +0000 (15:30 +0900)]
mmc: sdhci: disable the 8bit mode when host doesn't support it
Buswidth is depeneded on Hardware schematic.
Evne though host can support the 8bit buswidth, if hardware doesn't
support 8bit mode, it doesn't work fine.
So the buswidth mode selection leaves a matter in each SoC drivers.
On the contrary to this, hardware supports 8bit mode, but host doesn't
support it. then controller has to disable the MMC_MODE_8BIT.
(Host can check whether 8bit mode is supported or not, since V3.0)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Michal Simek [Tue, 10 Jan 2017 12:47:52 +0000 (13:47 +0100)]
ARM64: zynqmp: Move CONFIG_AHCI from board file
Move configuration option from board file to defconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Kamensky Ivan [Tue, 27 Dec 2016 16:12:23 +0000 (19:12 +0300)]
xilinx_phy: Pass correct pointer to fdtdec_get_int()
This patch fixes incorrect pointer on offset device in device tree blob.
When using with the component "Ethernet 1G/2.5G BASE-X PCS/PMA or SGMII"
it does not understand what type is XAE_PHY_TYPE_1000BASE_X and trying
to change frequency.
Signed-off-by: Kamensky Ivan <kamensky.ivan@mail.ru>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Tue, 10 Jan 2017 13:19:33 +0000 (08:19 -0500)]
Merge git://git.denx.de/u-boot-dm
Tom Rini [Tue, 10 Jan 2017 13:13:55 +0000 (08:13 -0500)]
mips: Use common _AC macro now.
MIPS no longer needs to have its own version of this macro now.
Fixes:
2a6713b09b8d ("move UL() macro from armv8/mmu.h into common.h")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 10 Jan 2017 13:19:21 +0000 (08:19 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Michal Simek [Mon, 9 Jan 2017 09:05:16 +0000 (10:05 +0100)]
ARM64: zynqmp: Generate handoff structure for ATF
Xilinx ATF extending options for passing images from BL2(FSBL)
to BL31. U-Boot SPL is FSBL replacement that's why it should generate
handoff structure the same. Support only one entry which is U-Boot in
EL2 itself. When FIT image is adopted structure generate should be data
driven.
Currently ATF is placing this structure at the beggining of OCM which is
rewriting early parts of ATF which should be unused at that time.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Jan 2017 10:20:54 +0000 (11:20 +0100)]
fpga: Use enum for bitstream command types
Using enum simplify handling of different bitstream command
types.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Tue, 3 Jan 2017 08:47:52 +0000 (09:47 +0100)]
ARM: zynqmp: Make SYS_VENDOR configurable
Add a string description for SYS_VENDOR to allow configuring boards from
other vendors than just "xilinx".
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Moritz Fischer [Thu, 22 Dec 2016 17:36:11 +0000 (09:36 -0800)]
ARM64: zynqmp: Fix i2c node's compatible string
The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
which fixes some silicon bugs that needed software workarounds
in Version 1.0 that was used on Zynq systems.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Moritz Fischer [Thu, 22 Dec 2016 17:36:10 +0000 (09:36 -0800)]
i2c: cdns: Add additional compatible string for r1p14 of the IP.
Adding additional compatible string for version 1.4 of the IP block.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 15 Nov 2016 10:45:42 +0000 (16:15 +0530)]
net: zynq_gem: Use clock driver for ZynqMP
Enable and use the clock driver routine
defined in clock driver toset required
clock appropriately.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 15 Nov 2016 10:45:41 +0000 (16:15 +0530)]
clk: zynqmp: Add clock driver support for zynqmp
Add basic clock driver support for zynqmp which
sets the required clock for GEM controller
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Siva Durga Prasad Paladugu [Thu, 12 May 2016 05:24:41 +0000 (10:54 +0530)]
ARM64: zynqmp: Enable fastboot for first SD/MMC/EMMC device
DNL numbers are not changed that's why fastboot needs to be called with
-i parameter (Xilinx vendor id).
- Show available devices
sudo fastboot -i 0x03fd devices
xilinx_zynqmp_zcu100 fastboot
- Stop fastboot and go back to U-Boot prompt
sudo fastboot -i 0x03fd continue
- Reboot the board
sudo fastboot -i 0x03fd reboot
- Get internal variables
sudo fastboot -i 0x3fd getvar bootloader-version
bootloader-version: U-Boot 2016.07-00026-g19bd53044817
sudo fastboot -i 0x3fd getvar downloadsize
downloadsize: 0x06000000
sudo fastboot -i 0x3fd getvar version
version: 0.4
(regular variables needs to have fastboot. prefix - there is also
serialno variable which should be define as serial#)
- Format SD/MMC/EMMC card
sudo fastboot -i 0x3fd oem format
- Write images to boot and Linux partition
sudo fastboot -i 0x3fd flash boot sd.img
sudo fastboot -i 0x3fd flash Linux os.img
- Creating sd.img or os.img
$ dd if=/dev/zero of=sd.img bs=1024 count=1024
$ mkfs.vfat sd.img
$ mkdir sd-mount
$ mount -o loop sd.img sd-mount
$ echo foo > sd-mount/bar
$ umount sd-mount
partitions setting should be checked by running gpt command.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Stefan Krsmanovic [Fri, 21 Oct 2016 10:44:56 +0000 (12:44 +0200)]
ARM64: zynqmp: Add idle state for ZynqMP
Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0
idle state is added in this patch. References to the idle-states node are
added in all CPU nodes. Time values: entry/exit latencies and min-residency,
needs to be tuned. arm,psci-suspend-param is selected to comply with PSCIv1.0
and Extended StateID format.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 5 Apr 2016 10:01:16 +0000 (12:01 +0200)]
ARM64: zynqmp: Fix usb nodes for dc1 and dc2
Fix DT binding for usb nodes. Setup correct aliases and enable dwc3
nodes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 12:08:55 +0000 (13:08 +0100)]
ARM64: zynqmp: Add missing earlycon for ep108
Just sync between version. Others zynqmp boards have this setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Shubhrajyoti Datta [Fri, 21 Oct 2016 10:42:19 +0000 (16:12 +0530)]
ARM64: zynqmp: clk: Add the clock for watchdog
The watchdog clock node is missing.
Add the same. This solves the below error.
cdns-wdt
fd4d0000.watchdog: input clock not found
cdns-wdt: probe of
fd4d0000.watchdog failed with error -2
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sudeep Holla [Wed, 21 Oct 2015 10:10:16 +0000 (11:10 +0100)]
ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any futher copy-paste
duplication.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 12:16:14 +0000 (13:16 +0100)]
ARM: zynq: Setup modeboot variable based on boot mode
modeboot variable is used for saving inforation which bootmode
is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 21 Nov 2016 09:43:37 +0000 (10:43 +0100)]
ARM: zynq: Remove spi-max-frequency
spi-max-frequency for spi bus depends on devices which are
connected to it. Remove this parameter from dtsi file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 27 Jul 2016 12:44:30 +0000 (14:44 +0200)]
ARM: zynq: Remove CONFIG_BOOTP_SERVERIP
Do the same change which was done in ZynqMP by:
"ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP"
(sha1:
a8b6a156c0f7fb99502229e454bc9c3b38645280)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 10:57:17 +0000 (11:57 +0100)]
ARM: zynq: Move CONFIG_SYS_TEXT_BASE to Kconfig
Enable CONFIG_SYS_TEXT_BASE via Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 09:01:45 +0000 (10:01 +0100)]
fpga: zynqmp: Remove empty functions
Xilinx core files will take care about it.
There is no need to have these functions because they do nothing.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Fri, 18 Nov 2016 04:57:48 +0000 (10:27 +0530)]
ARM64: zynqmp: Add support to save env to FAT
Add support to save environment as a file of FAT filesystem
on to SD card. The file will be saved with name uEnv.txt.
This environment will be retrieved during boot.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Fri, 18 Nov 2016 04:57:47 +0000 (10:27 +0530)]
ARM64: zynqmp: Increase environment size to 32K
Increase environment size to 32K as the current default
environment itself is greater than 4K.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 10 May 2016 11:11:19 +0000 (13:11 +0200)]
microblaze: Enable option to overwrite default variables
Enable overwriting variables out of main config file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 08:12:10 +0000 (09:12 +0100)]
microblaze: Remove hardcoded IP address from config
IP addresses shouldn't be hardcoded in board config.
This patch removes them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sai Pavan Boddu [Tue, 16 Aug 2016 11:42:05 +0000 (17:12 +0530)]
microblaze: Make the board configuration name user definable
Add a prompt for editing in menuconfig
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 12 Dec 2016 08:47:26 +0000 (09:47 +0100)]
net: gem: Use wait_for_bit() instead of private mdio_wait()
Using generic wait_for_bit() implementation instead of
using private wait function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 12 Dec 2016 08:46:09 +0000 (09:46 +0100)]
lib: Add WATCHDOG_RESET to wait_bit.h
wait_for_bit() is missing reset watchdog in case watchdog
is configured.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Mon, 2 Jan 2017 08:40:09 +0000 (09:40 +0100)]
scsi: dm: Unbind all scsi based block devices before new scan
New scan should unbind all block devices not to be listed again.
Without this patch if scsi reset or scan is called new block devices are
created which point to the same id and lun.
For example:
ZynqMP> scsi scan
scsi_scan: if_type=2, devnum=0: sdhci@
ff170000.blk, 6, 0
scsi_scan: if_type=2, devnum=0: ahci@
fd0c0000.id1lun0, 2, 0
scsi_scan: if_type=2, devnum=0: ahci@
fd0c0000.id1lun0, 2, 1
scsi_scan: if_type=2, devnum=0: ahci@
fd0c0000.id1lun0, 2, 2
scsi_scan: if_type=2, devnum=0: ahci@
fd0c0000.id1lun0, 2, 3
scsi_scan: if_type=2, devnum=0: ahci@
fd0c0000.id1lun0, 2, 4
scanning bus for devices...
Device 0: (1:0) Vendor: ATA Prod.: KINGSTON SVP200S Rev: 501A
Type: Hard Disk
Capacity: 57241.8 MB = 55.9 GB (
117231408 x 512)
Reported-by: Ken Ma <make@marvell.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Thu, 17 Nov 2016 09:08:15 +0000 (14:38 +0530)]
defconfig: am335x_evm: enable usb driver model
enable usb driver model for am335x bbb as musb supports
driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Thu, 17 Nov 2016 09:08:14 +0000 (14:38 +0530)]
am335x_evm: enable usb ether gadget as it supports DM_ETH
Since usb ether gadget have support for driver model, so enable
usb ether gadget.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Thu, 17 Nov 2016 09:08:13 +0000 (14:38 +0530)]
am33xx: board: init usb ether gadget for rndis support
Add usb ether gadget device with usb_ether_init() when
CONFIG_DM_ETH and CONFIG_USB_ETHER are defined.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Fri, 18 Nov 2016 05:39:15 +0000 (11:09 +0530)]
drivers: usb: gadget: ether/rndis: convert driver to adopt device driver model
Adopt usb ether gadget and rndis driver to adopt driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Tom Rini [Mon, 9 Jan 2017 16:57:05 +0000 (11:57 -0500)]
Prepare v2017.01
Signed-off-by: Tom Rini <trini@konsulko.com>
Ladislav Michl [Mon, 9 Jan 2017 10:33:28 +0000 (11:33 +0100)]
lib: gitignore *.elf and *.so generated by efi_loader
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tom Rini [Mon, 9 Jan 2017 01:16:00 +0000 (20:16 -0500)]
scripts/config_whitelist.txt: Resync
Signed-off-by: Tom Rini <trini@konsulko.com>
Jagan Teki [Thu, 5 Jan 2017 14:32:50 +0000 (15:32 +0100)]
mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig
Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig
which is missing in below commit
"imx: mx6ull_14x14_evk: add plugin defconfig"
(sha1:
b90ebf49bb8f74afe68f696f59a0e24cc79f2031)
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Andrew F. Davis [Fri, 6 Jan 2017 22:32:12 +0000 (16:32 -0600)]
am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASE
The SPL load address changes based on boot type in HS devices,
ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs
for similar reasons. Add this same logic for AM33xx devices.
Also make the default value for ISW_ENTRY_ADDR correct for GP
devices based on SoC, HS devices already pick the correct
value in their defconfig.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis [Fri, 6 Jan 2017 22:20:02 +0000 (16:20 -0600)]
arm: mach-omap2: Fix secure file generation
When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was
not generated but generate an unsigned one anyway, first fix this
warning to say that it was generated but not secured.
When the user then exports TI_SECURE_DEV_PKG after getting this warning,
and tries to re-build, 'make' will detect the build artifacts as
unchanged and so assume they do not need to be re-generated. This causes
it to fail to sign the files and it will pack unsigned files into the
final image, even though TI_SECURE_DEV_PKG is now correctly defined and
working.
Fix this by using FORCE on the targets causes them to be re-run even if
the dependent files have not changed.
This then causes another issue. We currently rename the signed dtb files
to overwrite the non-signed ones. We do this so the 'mkimage' tool gives
the packaged dtb sections the correct name. If we do not rename the files
then SPL will not find them during boot.
Fix this by renaming the dtb files by appending _HS to the end of the
filename, after the ".dtb", this causes them to still be named correctly
in the FIT blob.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Tom Rini [Thu, 5 Jan 2017 00:41:50 +0000 (19:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Thu, 5 Jan 2017 00:41:23 +0000 (19:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
York Sun [Wed, 28 Dec 2016 16:43:50 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig
Use Kconfig option SYS_PPC64 instead.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:49 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to Kconfig
Use Kconfig option to select chassis version.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:48 +0000 (08:43 -0800)]
powerpc: E6500: Move macro CONFIG_E6500 to Kconfig
Use Kconfig option E6500 and clean up existing usage.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:47 +0000 (08:43 -0800)]
powerpc: mpc85xx: Remove unused ifdef in config header
After most config options are moved to Kconfig, the unused ifdef
or elif can be removed.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:46 +0000 (08:43 -0800)]
ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to Kconfig
Use Kconfig to select DDR version instead of using config header.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:45 +0000 (08:43 -0800)]
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:44 +0000 (08:43 -0800)]
ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig
Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
config header and board header files.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:43 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
Use Kconfig to select errata workaround.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:42 +0000 (08:43 -0800)]
mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig
Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Wed, 28 Dec 2016 16:43:41 +0000 (08:43 -0800)]
arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
Use Kconfig to select errata workaround.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:40 +0000 (08:43 -0800)]
fsl_ddr: Move DDR config options to driver Kconfig
Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s]
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Wed, 28 Dec 2016 16:43:39 +0000 (08:43 -0800)]
powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDS
Remove this macro. It was added by
e622d9ed but actually wasn't used.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:38 +0000 (08:43 -0800)]
powerpc: T2081QDS: Remove macro T2081QDS
Use TARGET_T2081QDS from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:37 +0000 (08:43 -0800)]
powerpc: T2080RDB: Remove macro CONFIG_T2080RDB
Use TARGET_T2080RDB from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:36 +0000 (08:43 -0800)]
powerpc: T2080QDS: Remove macro T2080QDS
Use TARGET_T2080QDS from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:35 +0000 (08:43 -0800)]
powerpc: T1040QDS: Remove macro CONFIG_T1040QDS
Use TARGET_T1040QDS from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:34 +0000 (08:43 -0800)]
powerpc: T1024RDB: Remove macro CONFIG_T1024RDB
Use TARGET_T1024RDB from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Get missing hunk in board/freescale/t102xrdb/ddr.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Wed, 28 Dec 2016 16:43:33 +0000 (08:43 -0800)]
powerpc: T1023RDB: Remove macro CONFIG_T1023RDB
Use TARGET_T1023RDB from Kconfig instead.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:32 +0000 (08:43 -0800)]
powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014
Remove these SoCs from Kconfig because they don't have individual
configuration. Clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:31 +0000 (08:43 -0800)]
crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to Kconfig
Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:30 +0000 (08:43 -0800)]
crypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:29 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to Kconfig
Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate 8572]
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Wed, 28 Dec 2016 16:43:28 +0000 (08:43 -0800)]
powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to Kconfig
Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 28 Dec 2016 16:43:27 +0000 (08:43 -0800)]
powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to Kconfig
Use Kconfig option for E500 and E500MC macros.
Signed-off-by: York Sun <york.sun@nxp.com>
Jagan Teki [Mon, 2 Jan 2017 23:24:36 +0000 (00:24 +0100)]
mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' print
SPL from nand will print 'NAND' in boot_from_devices based on
the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver.
Original behaviour:
-------------------
U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19)
Trying to boot from NANDNAND : 512 MiB
After the fix:
-------------
U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00)
Trying to boot from NAND: 512 MiB
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Vignesh R [Wed, 21 Dec 2016 05:12:33 +0000 (10:42 +0530)]
spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible
According to Section 11.15.4.9.1 Indirect Read Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface reads until the last word of an indirect transfer
So, make sure that QSPI indirect reads are 32 bit sized except for the
final read. If the rxbuf is unaligned then use bounce buffer, so that
readsl() can be used instead of readsb() to avoid non 32-bit accesses.
[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vignesh R [Wed, 21 Dec 2016 05:12:32 +0000 (10:42 +0530)]
spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible
According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC
TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
data interface writes until the last word of an indirect transfer
otherwise indirect writes is known to fails sometimes. So, make sure
that QSPI indirect writes are 32 bit sized except for the last write. If
the txbuf is unaligned then use bounce buffer to avoid data aborts.
So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER
for all boards that use Cadence QSPI driver.
[1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 2 Jan 2017 11:48:45 +0000 (11:48 +0000)]
sunxi: A64: enable SPL
Now that the SPL is ready to be compiled in AArch64 and the DRAM
init code is ready, enable SPL support for the A64 SoC and in the
Pine64 defconfig.
For now we keep the boot0 header in the U-Boot proper, as this allows
to still use boot0 as an SPL replacement without hurting the SPL use
case.
We disable FEL support for now by making its compilation conditional
and disabling it for ARM64, as the code isn't ready yet.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 2 Jan 2017 11:48:44 +0000 (11:48 +0000)]
sunxi: DRAM: fix H3 DRAM size display on aarch64
Fix the output of the DRAM size on AArch64 SPLs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 2 Jan 2017 11:48:43 +0000 (11:48 +0000)]
sunxi: H3/A64: fix non-ODT setting
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Jens Kuske [Mon, 2 Jan 2017 11:48:42 +0000 (11:48 +0000)]
sunxi: A64: use H3 DRAM initialization code for A64 as well
The A64 DRAM controller is very similar to the H3 one,
so the code can be reused with some small changes.
This refactoring does not change the code size for the existing H3 part.
[Andre: rework from #ifdefs to using socid parameters in static
functions, minor fixes, merging in fixes from Jens]
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Philipp Tomsich [Mon, 2 Jan 2017 11:48:41 +0000 (11:48 +0000)]
sunxi: clocks: Use the correct pattern register for PLL11
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Jens Kuske [Mon, 2 Jan 2017 11:48:40 +0000 (11:48 +0000)]
sunxi: H3: add DRAM controller single bit delay support
So far the DRAM driver for the H3 SoC (and apparently boot0/libdram as
well) only applied coarse delay line settings, with one delay value for
all the data lines in each byte lane and one value for the control lines.
Instead of setting the delays for whole bytes only allow setting it for
each individual bit. Also add support for address/command lane delays.
For the purpose of this patch the rules for the existing coarse settings
were just applied to the new scheme, so the actual register writes don't
change for the H3. Other SoCs will utilize this feature later properly.
With a stock GCC 5.3.0 this increases the dram_sun8i_h3.o code size from
2296 to 2344 Bytes.
[Andre: move delay parameters into macros to ease later sharing, use
defines for numbers of delay registers, extend commit message]
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Jens Kuske [Mon, 2 Jan 2017 11:48:39 +0000 (11:48 +0000)]
sunxi: H3: add and rename some DRAM contoller registers
The IOCR registers got renamed to BDLR to match the public
documentation of similar controllers.
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Philipp Tomsich [Mon, 2 Jan 2017 11:48:38 +0000 (11:48 +0000)]
sunxi: H3: Rework MBUS priority setup
So far the MBUS priority setup was done by writing "magic" values taken
from a DRAM controller register dump after a boot0 run.
By peeking at the Linux (sic!) MBUS driver [1] from the Allwinner BSP
kernel, we learned more about the actual meaning of those bits.
Add macros and refactor the setup function to make the MBUS setup much
more readable and meaningful.
The actual values used now are a transformation of the values used
before, which are assembled by the new code to result in the same register
writes. So this rework does not change any settings, also the code size
stays the same.
The respective source files in the BSP kernel had a proper GPL header,
so lifting this code and information into U-Boot is legal.
[Andre: provide a convenience macro to fit definitions on one line]
[1] https://github.com/longsleep/linux-pine64/blob/lichee-dev-v3.10.65/drivers/bus/sunxi_mbus.c
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>