platform/upstream/llvm.git
14 months ago[MLIR][python bindings] Reimplement `replace_all_uses_with` on `PyValue`
max [Wed, 26 Apr 2023 14:55:27 +0000 (09:55 -0500)]
[MLIR][python bindings] Reimplement `replace_all_uses_with` on `PyValue`

Differential Revision: https://reviews.llvm.org/D149261

14 months ago[Clang][AIX] Add back error for -fprofile-sample-generate/use on AIX
Zarko Todorovski [Wed, 26 Apr 2023 17:43:12 +0000 (13:43 -0400)]
[Clang][AIX] Add back error for -fprofile-sample-generate/use on AIX

D148177 also removed the error for sampling based profiling which is not currently
supported on AIX. Adding that error back.

Reviewed By: qiongsiwu1

Differential Revision: https://reviews.llvm.org/D148960

14 months ago[LV] Add extra uniformity tests with LSHR and AND.
Florian Hahn [Wed, 26 Apr 2023 18:51:34 +0000 (19:51 +0100)]
[LV] Add extra uniformity tests with LSHR and AND.

Extra tests for D148841 based on the tests added in
95539186c82604f783.

14 months ago{Flang][OpenMP] Add support for ior, ieor, and iand reduction in worksharing-loop
do [Wed, 26 Apr 2023 18:02:52 +0000 (14:02 -0400)]
{Flang][OpenMP] Add support for ior, ieor, and iand reduction in worksharing-loop

Adds support for .ior., .ieor., and .iand. reductions.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D148994

14 months ago[RISCV] Fix spelling 'Floating Pont' -> 'Floating Point'. NFC
Craig Topper [Wed, 26 Apr 2023 18:24:35 +0000 (11:24 -0700)]
[RISCV] Fix spelling 'Floating Pont' -> 'Floating Point'. NFC

14 months ago[NFC][Clang]Remove a reference on argument since 'Name' is not modified'
Mingming Liu [Wed, 26 Apr 2023 17:55:43 +0000 (10:55 -0700)]
[NFC][Clang]Remove a reference on argument since 'Name' is not modified'

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D149274

14 months agoRemove the empty analysis diagnostics file
Aaron Ballman [Wed, 26 Apr 2023 18:17:13 +0000 (14:17 -0400)]
Remove the empty analysis diagnostics file

This file hasn't had any diagnostics in it since 2012, so I think we're
safe to remove this file.

14 months ago[RISCV] Add version of generateImmOutOfRangeError that takes an SMLoc.
Craig Topper [Wed, 26 Apr 2023 18:00:54 +0000 (11:00 -0700)]
[RISCV] Add version of generateImmOutOfRangeError that takes an SMLoc.

Have the ErrorInfo version call it after looking up ErrorInfo in
the Operands.

Use the new function in a few places that don't have ErrorInfo and
were also generating out of range messages.

14 months ago[HWASAN] Fix TLS + signal handling related crash
Kirill Stoimenov [Mon, 24 Apr 2023 19:25:45 +0000 (19:25 +0000)]
[HWASAN] Fix TLS + signal handling related crash

When a signal is raised before HWASAN has a chance to initialize it's TLS entry the program crashes. This only happens when hwasan-with-tls is true, which is default value. This patch fixes the problem by disabling signals during thread initialization time.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D149085

14 months ago[bazel][mlir] fix for d3f9388ff
Emilio Cota [Wed, 26 Apr 2023 17:47:00 +0000 (13:47 -0400)]
[bazel][mlir] fix for d3f9388ff

14 months ago[RISCV][CSKY][Loong] Pass Twine by const reference instead of by value. NFC
Craig Topper [Wed, 26 Apr 2023 17:41:57 +0000 (10:41 -0700)]
[RISCV][CSKY][Loong] Pass Twine by const reference instead of by value. NFC

I think RISCV was the original here and the CSKY and Loong copied it.

14 months agoInstCombine: Use computeKnownFPClass in is.fpclass combines and pass AC
Matt Arsenault [Mon, 10 Apr 2023 23:35:19 +0000 (19:35 -0400)]
InstCombine: Use computeKnownFPClass in is.fpclass combines and pass AC

The various isKnownNever* calls can be merged into one. This also introduces
the new ability to remove zero/sub/normal checks. Also start passing the
AssumptionCache arguments.

14 months ago[llvm-gsymutil] Switch to OptTable
Alex Brachet [Wed, 26 Apr 2023 16:54:38 +0000 (16:54 +0000)]
[llvm-gsymutil] Switch to OptTable

Differential Revision: https://reviews.llvm.org/D148775

14 months ago[flang] Restore stack after allocas created by TargetRewrite.
Slava Zakharin [Tue, 25 Apr 2023 23:59:46 +0000 (16:59 -0700)]
[flang] Restore stack after allocas created by TargetRewrite.

This resolves issues with running out of stack on examples like
https://fortran-lang.discourse.group/t/modern-fortran-sample-code/2019/18
reported by @clementval.

When target rewrite creates alloca(s) around a call, we need to insert
stacksave/stackrestore to free the allocated stack. Better performant
code may be achieved by placing the alloca(s) outside of loops,
but the placement has to behave correctly with regards to OpenMP/OpenACC/etc.
dialect operations that have special representation for "private"
objects. This is a concervative fix for correctness issue.

Differential Revision: https://reviews.llvm.org/D149222

14 months ago[lldb] Add support for specifying language when setting watchpoint by expression
Alex Langford [Mon, 24 Apr 2023 23:58:18 +0000 (16:58 -0700)]
[lldb] Add support for specifying language when setting watchpoint by expression

This is useful in contexts where you have multiple languages in play:
You may be stopped in a frame for language A, but want to set a watchpoint
with an expression using language B. The current way to do this is to
use the setting `target.language` while setting the watchpoint and
unset it after the watchpoint is set, but that's kind of clunky and
somewhat error-prone. This should add a better way to do this.

rdar://108202559

Differential Revision: https://reviews.llvm.org/D149111

14 months ago[RISCV] Make Zicntr and Zihpm imply Zicsr.
Craig Topper [Wed, 26 Apr 2023 17:11:14 +0000 (10:11 -0700)]
[RISCV] Make Zicntr and Zihpm imply Zicsr.

Zicntr and Zihpm are names for groups of CSRs so they should imply
that CSRs exist.

Reviewed By: asb, kito-cheng

Differential Revision: https://reviews.llvm.org/D148962

14 months ago[RISCV] Accept zicntr and zihpm command line options
Craig Topper [Wed, 26 Apr 2023 17:11:07 +0000 (10:11 -0700)]
[RISCV] Accept zicntr and zihpm command line options

This change adds the definition of the two extensions, but does not either a) make any register definitions conditional on them or b) enabled the extensions by default.

This is somewhat analogous to https://reviews.llvm.org/D143953, but with some key differences.  The best discussion I can find on status is here: https://github.com/riscv/riscv-profiles/issues/43.  These were removed between document version 2.1 and 2.2, but were not defined as new extensions in 2.2.  That addition came later - in March 2022.

According to https://drive.google.com/file/d/1qa57pePesOiDOrNzxuuGFhCL4Rbi9AYB/view these were ratified in March 2023.

Reviewed By: asb, reames

Differential Revision: https://reviews.llvm.org/D144215

14 months agoAMDGPU: Reduce number of calls to computeKnownFPClass and pass all arguments
Matt Arsenault [Tue, 11 Apr 2023 20:08:42 +0000 (16:08 -0400)]
AMDGPU: Reduce number of calls to computeKnownFPClass and pass all arguments

Makes assumes work for this case.

14 months ago[OpenMP][Flang][MLIR] Add lowering of TargetOp for host codegen to LLVM-IR
Jan Sjodin [Mon, 3 Apr 2023 14:46:21 +0000 (10:46 -0400)]
[OpenMP][Flang][MLIR] Add lowering of TargetOp for host codegen to LLVM-IR

This patch adds lowering of TargetOps for the host. The lowering outlines the
target region function and uses the OpenMPIRBuilder support functions to emit
the function and call. Code generation for offloading will be done in later
patches.

Reviewed By: kiranchandramohan, jdoerfert, agozillon

Differential Revision: https://reviews.llvm.org/D147172

14 months agoValueTracking: Add baseline computeKnownFPClass tests for minimum/maximum
Matt Arsenault [Mon, 10 Apr 2023 13:24:51 +0000 (09:24 -0400)]
ValueTracking: Add baseline computeKnownFPClass tests for minimum/maximum

14 months agoValueTracking: Fix computeKnownFPClass handling for copysign
Matt Arsenault [Tue, 25 Apr 2023 16:16:21 +0000 (12:16 -0400)]
ValueTracking: Fix computeKnownFPClass handling for copysign

We need to expand the set of possible classes to the opposite
sign for the first operand if we don't know the sign of the second
operand.

14 months ago[InlineAsm][AArch64]Add backend support for flag output parameters
Mingming Liu [Sun, 23 Apr 2023 19:23:33 +0000 (12:23 -0700)]
[InlineAsm][AArch64]Add backend support for flag output parameters

- The set of flag is from https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Flag-Output-Operands

Before:
- ARM64 GCC supports flag output constraints, while Clang doesn't parse condition code, as shown in https://gcc.godbolt.org/z/7jzMEK796
- LLVM ISel won't lower them either (as shown in https://gcc.godbolt.org/z/Pv4PPf56c)

After:
- Given flag output constraints in LLVM IR, condition code is parsed and flag output is lowered to 'cset'.
- Clang parse is not added in this patch.

Differential Revision: https://reviews.llvm.org/D149032

14 months ago[AMDGPU] Add GFX11 ds_min_f32 / ds_max_f32 tests
Jay Foad [Wed, 26 Apr 2023 16:09:12 +0000 (17:09 +0100)]
[AMDGPU] Add GFX11 ds_min_f32 / ds_max_f32 tests

14 months ago[Headers] Revise conditional for rdrand64_step
Paul Robinson [Wed, 26 Apr 2023 15:55:51 +0000 (08:55 -0700)]
[Headers] Revise conditional for rdrand64_step

Downstream doc tooling doesn't like an #if between the doc and the
function prototype. This change also guarantees that the prototype
stays the same for 32/64 bit users.

14 months ago[RISCV] Make SCS prologue interrupt safe on RISC-V
Paul Kirth [Mon, 24 Apr 2023 21:03:21 +0000 (21:03 +0000)]
[RISCV] Make SCS prologue interrupt safe on RISC-V

Prior to this patch the SCS prologue used the following instruction
sequence.

```
s[w|d]  ra, 0(gp)
addi    gp, gp, [4|8]
```

The problem with this sequence is that an interrupt occurring between the
store and the increment could clobber the value just written to the SCS.

https://reviews.llvm.org/D84414#inline-813203 pointed out a similar
issues that could have affected the epilogue.

This patch changes the instruction sequence in the prologue to:

```
addi    gp, gp, [4|8]
s[w|d]  ra, -[4|8](gp)
```

The downside to this is that there is now a data dependency between the
add and the store.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D149099

14 months ago[flang] Recognize unused dummy arguments during lowering with HLFIR.
Slava Zakharin [Wed, 26 Apr 2023 05:03:57 +0000 (22:03 -0700)]
[flang] Recognize unused dummy arguments during lowering with HLFIR.

So far we've relied on AllocaOp to represent the dummy arguments
not declared for the current entry. With HLFIR we have to account
for hlfir::DeclareOp.

Differential Revision: https://reviews.llvm.org/D149231

14 months ago[IR] Add interface to remove a CallBase string function attribute
Teresa Johnson [Wed, 26 Apr 2023 13:35:12 +0000 (06:35 -0700)]
[IR] Add interface to remove a CallBase string function attribute

Adds an interface to remove a string function attribute attached to a
CallBase, and a corresponding unittest.

This was extracted from D141077, and will be used by a follow on patch
that removes memprof attributes when needed.

Reviewed By: snehasish

Differential Revision: https://reviews.llvm.org/D149192

14 months ago[libc][Docs] Begin improving documentation for the GPU libc
Joseph Huber [Tue, 25 Apr 2023 21:23:07 +0000 (16:23 -0500)]
[libc][Docs] Begin improving documentation for the GPU libc

This patch updates some of the documentation for the GPU libc project.
There is a lot of work still to be done, but this sets the general
outline.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D149194

14 months ago[dataflow] HTMLLogger - show the value of the current expr
Sam McCall [Fri, 21 Apr 2023 19:03:43 +0000 (21:03 +0200)]
[dataflow] HTMLLogger - show the value of the current expr

Differential Revision: https://reviews.llvm.org/D148949

14 months agoMake debug counters available in non-assert builds as well
Mehdi Amini [Wed, 26 Apr 2023 05:21:34 +0000 (22:21 -0700)]
Make debug counters available in non-assert builds as well

Differential Revision: https://reviews.llvm.org/D149232

14 months ago[Headers][doc] Add "gather" intrinsic descriptions to avx2intrin.h
Paul Robinson [Tue, 25 Apr 2023 21:28:42 +0000 (14:28 -0700)]
[Headers][doc] Add "gather" intrinsic descriptions to avx2intrin.h

Differential Revision: https://reviews.llvm.org/D149205

14 months ago[clang-rename] Exit gracefully when no input provided
Shivam Gupta [Wed, 26 Apr 2023 12:15:27 +0000 (17:45 +0530)]
[clang-rename] Exit gracefully when no input provided

clang-rename on a non existing file segfaults

Command to run -
$ clang-rename -offset=0 -new-name=plop asdasd

Error while processing llvm-project/asdasd.
clang-rename: llvm-project/llvm/include/llvm/Support/ErrorOr.h:237:
llvm::ErrorOr<T>::storage_type* llvm::ErrorOr<T>::getStorage()
[with T = const clang::FileEntry*; llvm::ErrorOr<T>::storage_type = const clang::FileEntry*]:
Assertion `!HasError && "Cannot get value when an error exists!"' failed.

[1]    827497 IOT instruction  clang-rename -offset=0 -new-name=plop asdasd

This fixes https://github.com/llvm/llvm-project/issues/36471.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D148439

14 months agoTableGen: Replace `IntrinsicEmitter::ComputeFixedEncoding()` and cleanup
NAKAMURA Takumi [Thu, 9 Mar 2023 00:09:47 +0000 (09:09 +0900)]
TableGen: Replace `IntrinsicEmitter::ComputeFixedEncoding()` and cleanup

Depends on D146915

Differential Revision: https://reviews.llvm.org/D145937

14 months agoTableGen: Implement TypeSig generator in `Intrinsics.td`
NAKAMURA Takumi [Wed, 8 Mar 2023 23:38:52 +0000 (08:38 +0900)]
TableGen: Implement TypeSig generator in `Intrinsics.td`

This commit doesn't replace `IntrinsicEmitter::ComputeFixedEncoding()`,
but compares outputs to it, to make sure implementation correct.

Depends on D145871, D145872, D145874, and D146914

Differential Revision: https://reviews.llvm.org/D146915

14 months agoTableGen: Prune convertInitListSlice and VarListElementInit
NAKAMURA Takumi [Sat, 11 Mar 2023 18:46:58 +0000 (03:46 +0900)]
TableGen: Prune convertInitListSlice and VarListElementInit

They were dedicated to constant version of list slice.

Depends on D147401

Differential Revision: https://reviews.llvm.org/D145872

14 months agoTableGen: Let expressions available to list subscriptions and list slices
NAKAMURA Takumi [Sat, 4 Mar 2023 10:53:52 +0000 (19:53 +0900)]
TableGen: Let expressions available to list subscriptions and list slices

This enables indexing in `!foreach` and permutation with `list[permlist]`.

Enhancements in syntax:

  - `list<int>` is applicable as a slice element.
  - `list[int,]` is evaluated as not `ElemType` but `list<ElemType>`
    with a single element.

Part of D145872

FIXME: I didn't apply new semantics to BitSlice.

14 months agoReformat
NAKAMURA Takumi [Wed, 26 Apr 2023 13:36:40 +0000 (22:36 +0900)]
Reformat

14 months agoAdd failure testcases as llvm/test/TableGen/ListSlices-fail.td
NAKAMURA Takumi [Sat, 1 Apr 2023 22:43:18 +0000 (07:43 +0900)]
Add failure testcases as llvm/test/TableGen/ListSlices-fail.td

Differential Revision: https://reviews.llvm.org/D147401

14 months agoTableGen/ProgRef.rst: Fix copypasto in the description of `!range`
NAKAMURA Takumi [Wed, 26 Apr 2023 13:53:57 +0000 (22:53 +0900)]
TableGen/ProgRef.rst: Fix copypasto in the description of `!range`

14 months ago[AMDGPU] Delete test for illegal v_cndmask_b16_dpp
Joe Nash [Tue, 25 Apr 2023 19:24:35 +0000 (15:24 -0400)]
[AMDGPU] Delete test for illegal v_cndmask_b16_dpp

There are no VOP2 or VOP2 with dpp forms of v_cndmask_b16. Delete the
test. NFC.

Reviewed By: critson

Differential Revision: https://reviews.llvm.org/D149184

14 months ago[mlir][llvm] Use cached constants when importing landingpad instructions
Victor Perez [Wed, 26 Apr 2023 08:58:13 +0000 (09:58 +0100)]
[mlir][llvm] Use cached constants when importing landingpad instructions

Not using cached constants when importing instructions may lead to
undesired results, as breaking dominance rules in the translated MLIR
module.

Signed-off-by: Victor Perez <victor.perez@codeplay.com>
Differential Revision: https://reviews.llvm.org/D149247

14 months ago[AMDGPU] Fix negative offset values interpretation in getMemOperandsWithOffset for DS
Janek van Oirschot [Wed, 26 Apr 2023 13:05:06 +0000 (14:05 +0100)]
[AMDGPU] Fix negative offset values interpretation in getMemOperandsWithOffset for DS

The offset values may result in an erroneous scheduling of a load before write for a memory location if the offset values are represented as negative values in MIR, despite actually being unsigned values. This representation in MIR happens as SelectionDAG::getConstant could go through APInt to represent the encoding which assumes the MSB of the encoding as a sign-bit, regardless of whether it is supposed to be a signed value. The 8-bit negative (interpreted) value gets cast to an unsigned 32 bit value in getMemOperandsWithOffset used for comparisons in areMemAccessesTriviallyDisjoint eventually leading to an erroneous schedule in the machine scheduler.

Reviewed By: arsenm, foad

Differential Revision: https://reviews.llvm.org/D149080

14 months ago[analyzer] Fix comparison logic in ArrayBoundCheckerV2
Donát Nagy [Fri, 14 Apr 2023 10:31:06 +0000 (12:31 +0200)]
[analyzer] Fix comparison logic in ArrayBoundCheckerV2

The prototype checker alpha.security.ArrayBoundV2 performs two
comparisons to check that in an expression like Array[Index]
    0 <= Index < length(Array)
holds. These comparisons are handled by almost identical logic: the
inequality is first rearranged by getSimplifiedOffsets(), then evaluated
with evalBinOpNN().

However the simplification used "naive" elementary mathematical
schematics, but evalBinOpNN() performed the signed -> unsigned
conversions described in the C/C++ standards, and this confusion led to
wildly inaccurate results: false positives from the lower bound check
and false negatives from the upper bound check.

This commit eliminates the code duplication by moving the comparison
logic into a separate function, then adds an explicit check to this
unified code path, which handles the problematic case separately.

In addition to this, the commit also cleans up a testcase that was
demonstrating the presence of this problem. Note that while that
testcase was failing with an overflow error, its actual problem was in
the underflow handler logic:
(0) The testcase introduces a five-element array "char a[5]" and an
    unknown argument "size_t len"; then evaluates "a[len+1]".
(1) The underflow check tries to determine whether "len+1 < 0" holds.
(2) This inequality is rearranged to "len < -1".
(3) evalBinOpNN() evaluates this with the schematics of C/C++ and
    converts -1 to the size_t value SIZE_MAX.
(4) The engine concludes that len == SIZE_MAX, because otherwise we'd
    have an underflow here.
(5) The overflow check tries to determine whether "len+1 >= 5".
(6) This inequality is rearranged to "len >= 4".
(7) The engine substitutes len == SIZE_MAX and reports that we have
    an overflow.

Differential Revision: https://reviews.llvm.org/D135375

14 months ago[NFC] Wrap entire debug logging loop in LLVM_DEBUG
Jordan Rupprecht [Wed, 26 Apr 2023 12:28:15 +0000 (05:28 -0700)]
[NFC] Wrap entire debug logging loop in LLVM_DEBUG

14 months ago[DebugLocEntry][nfc] Remove redundant cast
Felipe de Azevedo Piovezan [Tue, 25 Apr 2023 19:06:10 +0000 (15:06 -0400)]
[DebugLocEntry][nfc] Remove redundant cast

A cast from DIExpression->DIExpression is not needed.

Differential Revision: https://reviews.llvm.org/D149178

14 months ago[Support][Parallel] Add sequential mode to TaskGroup::spawn().
Alexey Lapshin [Tue, 18 Apr 2023 18:22:55 +0000 (20:22 +0200)]
[Support][Parallel] Add sequential mode to TaskGroup::spawn().

This patch allows to specify that some part of tasks should be
done in sequential order. It makes it possible to not use
condition operator for separating sequential tasks:

TaskGroup tg;
for () {
  if(condition)      ==>   tg.spawn([](){fn();}, condition)
    fn();
  else
    tg.spawn([](){fn();});
}

It also prevents execution on main thread. Which allows adding
checks for getThreadIndex() function discussed in D142318.

The patch also replaces std::stack with std::deque in the
ThreadPoolExecutor to have natural execution order in case
(parallel::strategy.ThreadsRequested == 1).

Differential Revision: https://reviews.llvm.org/D148728

14 months ago[LangRef] Improve wording DW_OP_LLVM_entry_value
Felipe de Azevedo Piovezan [Tue, 25 Apr 2023 15:08:13 +0000 (11:08 -0400)]
[LangRef] Improve wording DW_OP_LLVM_entry_value

This commit simplifies the text of DW_OP_LLVM_entry_value by making it
terser, replacing a verbose example with a more concrete one, providing
an explicit conclusion on the meaning of N=1, and by transforming the
description of which passes generate this op into a list (which enables
future expansion of this list).

Differential Revision: https://reviews.llvm.org/D149177

14 months ago[AMDGPU][Disassembler] Fix a spurious error message in an instruction comment.
Ivan Kosarev [Wed, 26 Apr 2023 11:21:50 +0000 (12:21 +0100)]
[AMDGPU][Disassembler] Fix a spurious error message in an instruction comment.

The patch prevents pollution of instruction comments with error messages
generated during unsuccessful decoding attempts.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D149049

14 months ago[AMDGPU][Disassembler] Pre-commit a test on an error message generated in an instruct...
Ivan Kosarev [Mon, 24 Apr 2023 09:16:29 +0000 (10:16 +0100)]
[AMDGPU][Disassembler] Pre-commit a test on an error message generated in an instruction comment.

14 months ago[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors
Simon Pilgrim [Wed, 26 Apr 2023 11:32:57 +0000 (12:32 +0100)]
[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors

Replacement for D144903

If we're concatenating freeze(undef) subvector ops with multiple uses then we can't treat them as a wider freeze(undef), but we can replace them with a zero subvector, which is cheap on AVX

Differential Revision: https://reviews.llvm.org/D149249

14 months ago[Test] Add test showing bug in SCEV::getBackedgeTakenInfo (NFC)
Dmitry Makogon [Wed, 26 Apr 2023 11:20:14 +0000 (18:20 +0700)]
[Test] Add test showing bug in SCEV::getBackedgeTakenInfo (NFC)

Test for https://github.com/llvm/llvm-project/issues/62380/.

14 months ago[flang]Add more tests for loop versioning
Mats Petersson [Tue, 18 Apr 2023 17:39:33 +0000 (18:39 +0100)]
[flang]Add more tests for loop versioning

These two tests were created from little snippets added late
in the review of the loop versioning work. The code was fixed
to cope with the situation and correctly compile these samples.

This adds tests to avoid regressions in this area.

Reviewed By: tblah

Differential Revision: https://reviews.llvm.org/D148649

14 months ago[clangd] Fix the window buildbot test failures
Haojian Wu [Wed, 26 Apr 2023 10:59:45 +0000 (12:59 +0200)]
[clangd] Fix the window buildbot test failures

14 months ago[analyzer] Show taint origin and propagation correctly
Daniel Krupp [Fri, 3 Mar 2023 11:33:18 +0000 (12:33 +0100)]
[analyzer] Show taint origin and propagation correctly

This patch improves the diagnostics of the alpha.security.taint.TaintPropagation
checker and taint related checkers by showing the "Taint originated here" note
at the correct place, where the attacker may inject it. This greatly improves
the understandability of the taint reports.

In the baseline the taint source was pointing to an invalid location, typically
somewhere between the real taint source and sink.

After the fix, the "Taint originated here" tag is correctly shown at the taint
source. This is the function call where the attacker can inject a malicious data
(e.g. reading from environment variable, reading from file, reading from
standard input etc.).

This patch removes the BugVisitor from the implementation and replaces it with 2
new NoteTags. One, in the taintOriginTrackerTag() prints the "taint originated
here" Note and the other in taintPropagationExplainerTag() explaining how the
taintedness is propagating from argument to argument or to the return value
("Taint propagated to the Xth argument"). This implementation uses the
interestingess BugReport utility to track back the tainted symbols through
propagating function calls to the point where the taintedness was introduced by
a source function call.

The checker which wishes to emit a Taint related diagnostic must use the
categories::TaintedData BugType category and must mark the tainted symbols as
interesting. Then the TaintPropagationChecker will automatically generate the
"Taint originated here" and the "Taint propagated to..." diagnostic notes.

14 months ago[LoopDistribute] Convert tests to opaque pointers (NFC)
Nikita Popov [Wed, 26 Apr 2023 10:29:50 +0000 (12:29 +0200)]
[LoopDistribute] Convert tests to opaque pointers (NFC)

14 months ago[Assignment Tracking] Remove overly defensive AllocaInst assertion
OCHyams [Wed, 26 Apr 2023 10:15:37 +0000 (11:15 +0100)]
[Assignment Tracking] Remove overly defensive AllocaInst assertion

Remove assert from AssignmentTrackingAnalysis that fires if a local variable
has non-alloca storage. The analysis can emit these locations but the
assignment tracking code in SelectionDAG isn't ready to handle non-alloca
storage for locals yet. The AssignmentTrackingPass (pass that adds assignment
tracking metadata) ignores non-alloca dbg.declares, so the only variables
affected are those who's backing storage is changed from an alloca during
optimisation, and the result is the variables are dropped.

Fixes: https://ci.chromium.org/ui/p/pigweed/builders/toolchain/
                 toolchain-ci-pigweed-linux/b8783274592206481489/overview

Reviewed By: StephenTozer

Differential Revision: https://reviews.llvm.org/D149135

14 months agoValueTracking: Handle frem in computeKnownFPClass
Matt Arsenault [Tue, 18 Apr 2023 22:14:21 +0000 (18:14 -0400)]
ValueTracking: Handle frem in computeKnownFPClass

I barely understand what this does, but try to
handle the last case required to delete cannotBeOrderedLessThanZeroImpl.
Also improve by following fdiv handling for nans and identical operand case.

14 months agoValueTracking: Add new tests for computeKnownFPClass copysign handling
Matt Arsenault [Tue, 25 Apr 2023 16:22:36 +0000 (12:22 -0400)]
ValueTracking: Add new tests for computeKnownFPClass copysign handling

It's currently broken

14 months agoValueTracking: fdiv sign handling in computeKnownFPClass
Matt Arsenault [Tue, 18 Apr 2023 11:36:37 +0000 (07:36 -0400)]
ValueTracking: fdiv sign handling in computeKnownFPClass

Copy what cannotBeOrderedLessThanZeroImpl checks for fdiv.

14 months agoValueTracking: Add baseline tests for frem computeKnownFPClass
Matt Arsenault [Tue, 18 Apr 2023 22:57:15 +0000 (18:57 -0400)]
ValueTracking: Add baseline tests for frem computeKnownFPClass

14 months ago[Assignment Tracking] Fix faulty assertion inside std::sort predicate
OCHyams [Wed, 26 Apr 2023 09:53:57 +0000 (10:53 +0100)]
[Assignment Tracking] Fix faulty assertion inside std::sort predicate

The vectors being sorted here shouldn't contain duplicate entries. Prior to
this patch this was checked with an assert within the `std::sort`
predicate. However, `std::sort` may compare an element against itself which
causes the assert to fire (false positive). Move the assert outside of the sort
predicate to avoid such issues.

Reviewed By: StephenTozer

Differential Revision: https://reviews.llvm.org/D149045

14 months ago[mlir][test][Integration] Refactor Arm emulator configuration
Cullen Rhodes [Wed, 26 Apr 2023 08:07:44 +0000 (08:07 +0000)]
[mlir][test][Integration] Refactor Arm emulator configuration

The logic enabling the Arm SVE (and now SME) integration tests for
various dialects, that may run under emulation, is now duplicated in
several places.

This patch moves the configuration to the top-level MLIR integration
tests Lit config and renames the '%lli' substitution in contexts where
it will run exclusively (ArmSVE, ArmSME) on AArch64 (and possibly under
emulation) to '%lli_aarch64_cmd', and '%lli_host_or_aarch64_cmd' for
contexts where it may run AArch64 (also possibly under emulation). The
latter is for integration tests that have target-specific and
target-agnostic codepaths such as SparseTensor, which supports scalable
vectors.

The two substitutions have the same effect but the names are different to
convey this information. The '%lli_aarch64_cmd' substitution could be
used in the SparseTensor tests but that would be a misnomer if the host
were x86 and the MLIR_RUN_SVE_TESTS=OFF.

The reason for renaming the '%lli' substitution is to not prevent running other
target-specific integration tests at the same time, since the same substitution
'%lli' is used for lli in other integration tests:

  * mlir/test/Integration/Dialect/Vector/CPU/X86Vector              - (AVX emulation via Intel SDE)
  * mlir/test/Integration/Dialect/Vector/CPU/AMX                    - (AMX emulation via Intel SDE)
  * mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir - (RISCV emulation via QEMU if supported, native otherwise)

and substituting '%lli' at the top-level with Arm specific logic would override
this.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D148929

14 months agoFix docs bot after D140989
OCHyams [Wed, 26 Apr 2023 09:51:28 +0000 (10:51 +0100)]
Fix docs bot after D140989

Commit a93c4239719382e5b17335f3452e9095937ed6b7 broke docs buildbot:
https://lab.llvm.org/buildbot/#/builders/30/builds/34525

14 months ago[llvm][docs] Correct chose to choose in the builder docs
David Spickett [Wed, 26 Apr 2023 09:47:11 +0000 (09:47 +0000)]
[llvm][docs] Correct chose to choose in the builder docs

14 months ago[X86] LowerBUILD_VECTOR - fold build_vector(undef,freeze(undef),zero) -> zero vector
Simon Pilgrim [Wed, 26 Apr 2023 09:44:49 +0000 (10:44 +0100)]
[X86] LowerBUILD_VECTOR - fold build_vector(undef,freeze(undef),zero) -> zero vector

426db6b4eb2e9298598 added the build_vector(undef,freeze(undef)) -> freeze(undef) fold, but failed to account for cases where the scalar freeze(undef) had multiple uses, in those cases we can only only safely fold to a zero vector

https://alive2.llvm.org/ce/z/87jG8K

14 months ago[DebugInfo] Update SourceLevelDebugging.rst to better explain kill locations
OCHyams [Wed, 26 Apr 2023 09:27:40 +0000 (10:27 +0100)]
[DebugInfo] Update SourceLevelDebugging.rst to better explain kill locations

Reviewed By: scott.linder, jryans

Differential Revision: https://reviews.llvm.org/D140989

14 months agoFix buildbots after D140901
OCHyams [Wed, 26 Apr 2023 09:24:06 +0000 (10:24 +0100)]
Fix buildbots after D140901

Commit 3feea34d77f65f0b68520bb7bf372580a72794ad (D140901) should not have
removed the debug label handling code.

Buildbot: https://lab.llvm.org/buildbot/#/builders/139/builds/39813

14 months agoValueTracking: Improve trunc handling in computeKnownFPClass
Matt Arsenault [Mon, 17 Apr 2023 14:18:25 +0000 (10:18 -0400)]
ValueTracking: Improve trunc handling in computeKnownFPClass

14 months agoValueTracking: Handle powi in computeKnownFPClass
Matt Arsenault [Sun, 9 Apr 2023 11:16:04 +0000 (07:16 -0400)]
ValueTracking: Handle powi in computeKnownFPClass

Extract the handling from cannotBeOrderedLessThanZeroImpl and
avoid the mentioned -0 bug.

14 months agoValueTracking: Add baseline tests for powi computeKnownFPClass
Matt Arsenault [Tue, 18 Apr 2023 16:32:50 +0000 (12:32 -0400)]
ValueTracking: Add baseline tests for powi computeKnownFPClass

14 months agoValueTracking: Implement computeKnownFPClass for log
Matt Arsenault [Sun, 9 Apr 2023 11:15:20 +0000 (07:15 -0400)]
ValueTracking: Implement computeKnownFPClass for log

14 months agoValueTracking: Add baseline tests for log computeKnownFPClass
Matt Arsenault [Mon, 17 Apr 2023 17:51:18 +0000 (13:51 -0400)]
ValueTracking: Add baseline tests for log computeKnownFPClass

14 months agoValueTracking: Add computeKnownFPClass baseline tests for rounding intrinsics
Matt Arsenault [Mon, 10 Apr 2023 12:22:29 +0000 (08:22 -0400)]
ValueTracking: Add computeKnownFPClass baseline tests for rounding intrinsics

14 months ago[RISCV][NFC] Remove outdated TODOs about extension versions in RISCVISAInfo
Alex Bradbury [Wed, 26 Apr 2023 08:56:14 +0000 (09:56 +0100)]
[RISCV][NFC] Remove outdated TODOs about extension versions in RISCVISAInfo

As was documented in D147183, we don't currently intend to support
multiple versions of specifications simultaneously. While external
circumstances might mean exceptions to this are needed, the TODOs about
reflecting version numbers in the feature strings no longer make sense.

14 months ago[DebugInfo] Do not delete debug intrinsics with empty metadata operands
OCHyams [Wed, 26 Apr 2023 08:11:41 +0000 (09:11 +0100)]
[DebugInfo] Do not delete debug intrinsics with empty metadata operands

A ValueAsMetadata may be replaced with nullptr for several reasons including
deleting (certain) values and value remapping a use-before-def. In the case of
a MetadataAsValue user, handleChangedOperand intercepts and replaces the
metadata with an empty tuple (!{}).

At the moment, an empty metadata operand in a debug intrinsics signals that it
can be deleted.

Given that we end up with empty metadata operands in circumstances where the
Value has been "lost" the current behaviour can lead to incorrect variable
locations. Instead, we should treat empty metadata as meaning "there is no
location for the variable" (the same as we currently treat undef operands).

This patch removes the deletion logic from wouldInstructionBeTriviallyDead.

Related to https://discourse.llvm.org/t/auto-undef-debug-uses-of-a-deleted-value

Reviewed By: StephenTozer

Differential Revision: https://reviews.llvm.org/D140901

14 months ago[clang[[Interp][NFC] Make some Descriptor pointers const
Timm Bäder [Wed, 26 Apr 2023 08:52:01 +0000 (10:52 +0200)]
[clang[[Interp][NFC] Make some Descriptor pointers const

14 months ago[Sema] Fix _Alignas/isCXX11Attribute() FIXME
Richard Sandiford [Tue, 25 Apr 2023 12:16:29 +0000 (13:16 +0100)]
[Sema] Fix _Alignas/isCXX11Attribute() FIXME

When doing https://reviews.llvm.org/D148105 , I hadn't noticed that
there was also a FIXME about the misclassification of _Alignas in
ProcessDeclAttribute.

Differential Revision: https://reviews.llvm.org/D149148

14 months ago[clangd] Deduplicate missing-include findings
Kadir Cetinkaya [Tue, 25 Apr 2023 16:50:20 +0000 (18:50 +0200)]
[clangd] Deduplicate missing-include findings

Differential Revision: https://reviews.llvm.org/D149165

14 months ago[JITLink][AArch64] Implement R_AARCH64_CONDBR19
Job Noorman [Wed, 26 Apr 2023 07:44:35 +0000 (09:44 +0200)]
[JITLink][AArch64] Implement R_AARCH64_CONDBR19

This relocation is used for the 19-bit immediate in conditional branch
and compare and branch instructions.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D149138

14 months ago[DebugInfo] Treat empty metadata operands the same as undef operands in SelectionDAG
OCHyams [Tue, 25 Apr 2023 16:19:44 +0000 (17:19 +0100)]
[DebugInfo] Treat empty metadata operands the same as undef operands in SelectionDAG

Without this patch SelectionDAG silently drops dbg.values using `!{}` operands.

Related to https://discourse.llvm.org/t/auto-undef-debug-uses-of-a-deleted-value

Reviewed By: StephenTozer

Differential Revision: https://reviews.llvm.org/D140990

14 months ago[InstSimplify] with logical ops: (X & Y) == -1 ? X : -1 --> -1
Zhongyunde [Wed, 26 Apr 2023 07:52:28 +0000 (15:52 +0800)]
[InstSimplify] with logical ops: (X & Y) == -1 ? X : -1 --> -1

Use simplifySelectWithICmpEq to handle the implied equalities from the icmp-and,
then both of ICMP_NE and ICMP_EQ will be addressed including vector type.
    (X & Y) == -1 ?  X : -1 --> -1 (commuted 2 ways)
    (X & Y) != -1 ? -1 :  X --> -1 (commuted 2 ways)
This is a supplement to the icmp-or scenario on D148986.

Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D149229

14 months ago[tests] precommit tests for D149229
Zhongyunde [Wed, 26 Apr 2023 07:48:32 +0000 (15:48 +0800)]
[tests] precommit tests for D149229

Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D149230

14 months ago[LoopVectorize] Preserve SCEV
Nikita Popov [Tue, 25 Apr 2023 10:20:52 +0000 (12:20 +0200)]
[LoopVectorize] Preserve SCEV

As far as I can tell, LoopVectorize preserves SCEV, mainly by dint
of forgetting the loop being vectorized. We should mark it as
preserved in the pass manager.

This is a very small compile-time improvement.

Differential Revision: https://reviews.llvm.org/D149147

14 months ago[clang][Interp] Fix post-inc/dec operator result
Timm Bäder [Fri, 21 Apr 2023 07:52:43 +0000 (09:52 +0200)]
[clang][Interp] Fix post-inc/dec operator result

We pushed the wrong value on the stack, always leaving a 0 behind.

Differential Revision: https://reviews.llvm.org/D148901

14 months ago[LICM] Don't try to constant fold instructions
Nikita Popov [Tue, 25 Apr 2023 08:04:49 +0000 (10:04 +0200)]
[LICM] Don't try to constant fold instructions

This was introduced in 030f02021b6359ec5641622cf1aa63d873ecf55a as
an alleged compile-time optimization. In reality, trying to constant
fold instructions is more expensive than just hoisting them. In a
standard pipeline, LICM tends to run either after a run of
LoopInstSimplify or InstCombine, so LICM doesn't really see constant
foldable instructions in the first place, and the attempted fold
is futile.

This makes for a very minor compile-time improvement.

Differential Revision: https://reviews.llvm.org/D149134

14 months ago[clang-tidy] Modernize ClangTidyValue (NFC)
Kazu Hirata [Wed, 26 Apr 2023 06:58:24 +0000 (23:58 -0700)]
[clang-tidy] Modernize ClangTidyValue (NFC)

14 months ago[llvm] Replace None with std::nullopt in comments (NFC)
Kazu Hirata [Wed, 26 Apr 2023 06:53:32 +0000 (23:53 -0700)]
[llvm] Replace None with std::nullopt in comments (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

14 months ago[test][sanitizer] Use both allocators in test
Vitaly Buka [Wed, 26 Apr 2023 06:20:32 +0000 (23:20 -0700)]
[test][sanitizer] Use both allocators in test

14 months ago[TailDuplicator] Don't constrain register classes due to debug instructions
Mikael Holmen [Fri, 21 Apr 2023 09:30:28 +0000 (11:30 +0200)]
[TailDuplicator] Don't constrain register classes due to debug instructions

If cloning a DBG_VALUE instruction, register uses in that instruction could
lead to constraining of a virtual register that would not happen if the
DBG_VALUE was not present at all. This lead to different code with/without
debug info.

Now we only do that register class constraining if we dealing with a non
debug instruction.

Differential Revision: https://reviews.llvm.org/D149146

14 months agoAdd entry to mailmap
Med Ismail Bennani [Wed, 26 Apr 2023 06:14:29 +0000 (23:14 -0700)]
Add entry to mailmap

Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>
14 months ago[lldb] Add entry to code owner
Med Ismail Bennani [Wed, 26 Apr 2023 06:14:02 +0000 (23:14 -0700)]
[lldb] Add entry to code owner

Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>
14 months ago[X86] Remove unused SmallString. Fold a Twine local variable into call. NFC
Craig Topper [Wed, 26 Apr 2023 05:33:58 +0000 (22:33 -0700)]
[X86] Remove unused SmallString. Fold a Twine local variable into call. NFC

14 months ago[clang-repl] Only enable dynamic-library test on x86_64
Anubhab Ghosh [Wed, 26 Apr 2023 04:15:03 +0000 (09:45 +0530)]
[clang-repl] Only enable dynamic-library test on x86_64

This test includes a precompiled library for x86_64 Linux

14 months ago[MemRefToLLVM] Add a method in MemRefDescriptor to get the buffer addr
Quentin Colombet [Fri, 21 Apr 2023 18:09:25 +0000 (20:09 +0200)]
[MemRefToLLVM] Add a method in MemRefDescriptor to get the buffer addr

This patch pushes the computation of the start address of a memref in one
place (a method in MemRefDescriptor.)

This allows all the (indirect) users of this method to produce the start
address in the same way.

Thanks to this change, we expose more CSEs opportunities and thanks to
that, the backend is able to properly find the `llvm.assume` expression
related to the base address as demonstrated in the added test.

Differential Revision: https://reviews.llvm.org/D148947

14 months ago[RISCV] Remove one use restriction on the scalar from combineBinOpToReduce.
Craig Topper [Wed, 26 Apr 2023 04:10:58 +0000 (21:10 -0700)]
[RISCV] Remove one use restriction on the scalar from combineBinOpToReduce.

If multiple reductions use the neutral start value, this prevented
us from optimizing any of them.

This increases the number of scalar->vector operations but reduces
the number of scalar operations.

Note, we were already inconsistent about the one use check when we
peeked through INSERT_SUBVECTORs.

Reviewed By: fakepaper56

Differential Revision: https://reviews.llvm.org/D149181

14 months ago[MemRefToLLVM] Fix the lowering of memref.assume_alignment
Quentin Colombet [Thu, 20 Apr 2023 19:29:29 +0000 (21:29 +0200)]
[MemRefToLLVM] Fix the lowering of memref.assume_alignment

`memref.assume_alignment` annotates the alignment of the source buffer
not the base pointer.
Put diffrently, prior to this patch `memref.assume_alignment` would lower
to `llvm.assume %buffer.base.isAligned(X)` whereas what we want is
`llvm.assume (%buffer.base + %buffer.offset).isAligned(X)`.
In other words, we were missing to include the offset in the expression
checked by the `llvm.assume`.

Differential Revision: https://reviews.llvm.org/D148930

14 months ago[flang][openacc] Add support for allocatable and pointer in data operand
Valentin Clement [Wed, 26 Apr 2023 04:05:53 +0000 (21:05 -0700)]
[flang][openacc] Add support for allocatable and pointer in data operand

Add lowering support for allocatable and pointer array sections
to acc.bounds and acc data operations.

Reviewed By: razvanlupusoru

Differential Revision: https://reviews.llvm.org/D149189

14 months ago[clang-repl] Fix dynamic library test to avoid cstdio and linker
Anubhab Ghosh [Sat, 22 Apr 2023 13:44:29 +0000 (19:14 +0530)]
[clang-repl] Fix dynamic library test to avoid cstdio and linker

Some platforms do not have a working linker present. The goal is to
only test the loading of a shared library in clang-repl. A precompiled
library is used instead.

The cstdio header may also not be present. We only need printf.

Related discussion in D141824

Differential Revision: https://reviews.llvm.org/D148992

14 months agoFix path on Windows for test modified in daad48d.
Douglas Yung [Wed, 26 Apr 2023 03:28:07 +0000 (20:28 -0700)]
Fix path on Windows for test modified in daad48d.

This should fix the failure on the PS5 Windows build bot.

14 months ago[NFC][HWASAN] Check TagMaskByte instead of TargetTriple
Vitaly Buka [Wed, 26 Apr 2023 02:59:25 +0000 (19:59 -0700)]
[NFC][HWASAN] Check TagMaskByte instead of TargetTriple

We need to apply mask for x86_64 because the mask is not full byte. So
instead checking the arch we can check the mask.