platform/upstream/llvm.git
3 years ago[RISCV] Add test cases for SRO/SLO with shift amounts masked to bitwidth-1. NFC
Craig Topper [Sat, 23 Jan 2021 23:45:51 +0000 (15:45 -0800)]
[RISCV] Add test cases for SRO/SLO with shift amounts masked to bitwidth-1. NFC

The sro/slo instructions ignore extra bits in the shift amount,
so we can ignore the mask just like we do for sll, srl, and sra.

3 years ago[RISCV] Add isel patterns to remove (and X, 31) from sllw/srlw/sraw shift amounts.
Craig Topper [Sat, 23 Jan 2021 22:41:42 +0000 (14:41 -0800)]
[RISCV] Add isel patterns to remove (and X, 31) from sllw/srlw/sraw shift amounts.

We try to do this during DAG combine with SimplifyDemandedBits,
but it fails if there are multiple nodes using the AND. For
example, multiple shifts using the same shift amount.

3 years ago[libomptarget][amdgpu][nfc] Update comments
Jon Chesterfield [Sat, 23 Jan 2021 22:53:57 +0000 (22:53 +0000)]
[libomptarget][amdgpu][nfc] Update comments

[libomptarget][amdgpu][nfc] Update comments

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95295

3 years ago[mlir][CAPI] Add result type inference to the CAPI.
Stella Laurenzo [Sat, 23 Jan 2021 02:43:50 +0000 (18:43 -0800)]
[mlir][CAPI] Add result type inference to the CAPI.

* Adds a flag to MlirOperationState to enable result type inference using the InferTypeOpInterface.
* I chose this level of implementation for a couple of reasons:
  a) In the creation flow is naturally where generated and custom builder code will be invoking such a thing
  b) it is a bit more efficient to share the data structure and unpacking vs having a standalone entry-point
  c) we can always decide to expose more of these interfaces with first-class APIs, but that doesn't preclude that we will always want to use this one in this way (and less API surface area for common things is better for API stability and evolution).
* I struggled to find an appropriate way to test it since we don't link the test dialect into anything CAPI accessible at present. I opted instead for one of the simplest ops I found in a regular dialect which implements the interface.
* This does not do any trait-based type selection. That will be left to generated tablegen wrappers.

Differential Revision: https://reviews.llvm.org/D95283

3 years ago[NFC][SimplifyCFG] Extract CloneInstructionsIntoPredecessorBlockAndUpdateSSAUses...
Roman Lebedev [Sat, 23 Jan 2021 21:49:27 +0000 (00:49 +0300)]
[NFC][SimplifyCFG] Extract CloneInstructionsIntoPredecessorBlockAndUpdateSSAUses() out of PerformBranchToCommonDestFolding()

To be used in PerformValueComparisonIntoPredecessorFolding()

3 years ago[NFC][SimplifyCFG] Perform early-continue in FoldValueComparisonIntoPredecessors...
Roman Lebedev [Sat, 23 Jan 2021 19:01:41 +0000 (22:01 +0300)]
[NFC][SimplifyCFG] Perform early-continue in FoldValueComparisonIntoPredecessors() per-pred loop

3 years ago[NFC][SimplifyCFG] Extract PerformValueComparisonIntoPredecessorFolding() out of...
Roman Lebedev [Sat, 23 Jan 2021 18:55:37 +0000 (21:55 +0300)]
[NFC][SimplifyCFG] Extract PerformValueComparisonIntoPredecessorFolding() out of FoldValueComparisonIntoPredecessors()

Less nested code is much easier to follow and modify.

3 years ago[IR] Add NoAliasScopeDeclInst (NFC)
Nikita Popov [Sat, 23 Jan 2021 21:38:43 +0000 (22:38 +0100)]
[IR] Add NoAliasScopeDeclInst (NFC)

Add an intrinsic type class to represent the
llvm.experimental.noalias.scope.decl intrinsic, to make code
working with it a bit nicer by hiding the metadata extraction
from view.

3 years ago[NewPM][opt] Make -enable-new-pm default to LLVM_ENABLE_NEW_PASS_MANAGER
Arthur Eubanks [Fri, 22 Jan 2021 19:11:03 +0000 (11:11 -0800)]
[NewPM][opt] Make -enable-new-pm default to LLVM_ENABLE_NEW_PASS_MANAGER

This is controlled by the ENABLE_EXPERIMENTAL_NEW_PASS_MANAGER CMake flag.

https://lists.llvm.org/pipermail/llvm-dev/2021-January/147993.html

Reviewed By: ychen, asbirlea

Differential Revision: https://reviews.llvm.org/D95254

3 years ago[test] Pin dead-calls-willreturn.ll to legacy PM
Arthur Eubanks [Sat, 23 Jan 2021 20:19:37 +0000 (12:19 -0800)]
[test] Pin dead-calls-willreturn.ll to legacy PM

The new PM inliner does not delete dead calls.

3 years ago[libomptarget][cuda] Call v2 functions explicitly
Jon Chesterfield [Sat, 23 Jan 2021 20:33:12 +0000 (20:33 +0000)]
[libomptarget][cuda] Call v2 functions explicitly

[libomptarget][cuda] Call v2 functions explicitly

rtl.cpp calls functions like cuMemFree that are replaced by a macro
in cuda.h with cuMemFree_v2. This patch changes the source to use
the v2 names consistently.

See also D95104, D95155 for the idea. Alternatives are to use a mixture,
e.g. call the macro names and explictly dlopen the _v2 names, or to keep
the current status where the symbols are replaced by macros in both files

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95274

3 years ago[PhaseOrdering] Add tests for PR44461 and PR48844 (NFC)
Nikita Popov [Sat, 23 Jan 2021 17:22:17 +0000 (18:22 +0100)]
[PhaseOrdering] Add tests for PR44461 and PR48844 (NFC)

In both cases, optimization is prevented because
"br X == C || X == C2" is converted into a switch. In one case
loop rotation is blocked, in the other vectorization.

3 years ago[SimplifyCFG] Regenerate test checks (NFC)
Nikita Popov [Sat, 23 Jan 2021 20:21:59 +0000 (21:21 +0100)]
[SimplifyCFG] Regenerate test checks (NFC)

3 years ago[Clang][OpenMP][NVPTX] Replace `libomptarget-nvptx-path` with `libomptarget-nvptx...
Shilei Tian [Sat, 23 Jan 2021 19:42:32 +0000 (14:42 -0500)]
[Clang][OpenMP][NVPTX] Replace `libomptarget-nvptx-path` with `libomptarget-nvptx-bc-path`

D94700 removed the static library so we no longer need to pass
`-llibomptarget-nvptx` to `nvlink`. Since the bitcode library is the only device
runtime for now, instead of emitting a warning when it is not found, an error
should be raised. We also set a new option `libomptarget-nvptx-bc-path` to let
user choose which bitcode library is being used.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95161

3 years agoRevert "[Target] Use llvm::append_range (NFC)"
Kazu Hirata [Sat, 23 Jan 2021 19:23:54 +0000 (11:23 -0800)]
Revert "[Target] Use llvm::append_range (NFC)"

This reverts commit cc7a23828657f35f706343982cf96bb6583d4d73.

The X86WinEHState.cpp hunk seems to break certain builds.

3 years ago[libc++] Remove invalid C++20 code from a test.
Mark de Wever [Sat, 23 Jan 2021 19:10:17 +0000 (20:10 +0100)]
[libc++] Remove invalid C++20 code from a test.

During the review of D91986 it has been discovered the in C++11
deprecated `throw()` exception specification has been removed in
C++20. Removed the part of the test code using this feature.

3 years ago[FuzzMutate] Add mutator to modify instruction flags.
Florian Hahn [Sat, 23 Jan 2021 15:28:57 +0000 (15:28 +0000)]
[FuzzMutate] Add mutator to modify instruction flags.

This patch adds a new InstModificationIRStrategy to mutate flags/options
for instructions. For example, it may add or remove nuw/nsw flags from
add, mul, sub, shl instructions or change the predicate for icmp
instructions.

Subtle changes such as those mentioned above should lead to a more
interesting range of inputs. The presence or absence of overflow flags
can expose subtle bugs, for example.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D94905

3 years ago[Polly] Track defined behavior for PHI predecessor computation.
Michael Kruse [Fri, 22 Jan 2021 03:20:53 +0000 (21:20 -0600)]
[Polly] Track defined behavior for PHI predecessor computation.

ZoneAlgorithms's computePHI relies on being provided with consistent a
schedule to compute the statement prodecessors of a statement containing
PHINodes. Otherwise unexpected results such as PHI nodes with multiple
predecessors can occur which would result in problems in the
algorithms expecting consistent data.

In the added test case, statement instances are scrubbed from the
SCoP their execution would result in undefined behavior (Due to a nsw
overflow). As already being undefined behavior in LLVM-IR, neither
AssumedContext nor InvalidContext are updated, giving computePHI no
means to avoid these cases.

Intoduce a new SCoP property, the DefinedBehaviorContext, that among
the runtime-checked conditions, also tracks the assumptions not needing
a runtime check, in particular those affecting the assumed control flow.
This replaces the manual combination of the 3 other contexts that was
already done in computePHI and setNewAccessRelation. Currently, the only
additional assumption is that loop induction variables will nsw flag for
not wrap, but potentially more can be added. Use in
hasFeasibleRuntimeContext, isl::ast_build and gisting are other
potential uses.

To limit computational complexity, the DefinedBehaviorContext is not
availabe if it grows too large (atm hardcoded to 8 disjuncts).

Possible other fixes include bailing out in computePHI when
inconsistencies are detected, choose an arbitrary value for inconsistent
cases (since it is undefined behavior anyways), or make the code
receiving the result from ComputePHI handle inconsistent data. All of
them reduce the quality of implementation having to bail out more often
and disabling the ability to assert on actually wrong results.

This fixes llvm.org/PR48783.

3 years ago[Polly] Allow param sets for dumpPw().
Michael Kruse [Sat, 23 Jan 2021 18:28:26 +0000 (12:28 -0600)]
[Polly] Allow param sets for dumpPw().

3 years ago[Polly] Clean up hasFeasibleRuntimeContext.
Michael Kruse [Fri, 22 Jan 2021 04:36:18 +0000 (22:36 -0600)]
[Polly] Clean up hasFeasibleRuntimeContext.

3 years ago[Polly] Gist new access relations using the SCoP context.
Michael Kruse [Thu, 21 Jan 2021 22:54:46 +0000 (16:54 -0600)]
[Polly] Gist new access relations using the SCoP context.

This simplifies the access relations.

3 years ago[llvm] Use pop_back_val (NFC)
Kazu Hirata [Sat, 23 Jan 2021 18:56:33 +0000 (10:56 -0800)]
[llvm] Use pop_back_val (NFC)

3 years ago[Target] Use llvm::append_range (NFC)
Kazu Hirata [Sat, 23 Jan 2021 18:56:31 +0000 (10:56 -0800)]
[Target] Use llvm::append_range (NFC)

3 years ago[llvm] Forward-declare ICFLoopSafetyInfo (NFC)
Kazu Hirata [Sat, 23 Jan 2021 18:56:29 +0000 (10:56 -0800)]
[llvm] Forward-declare ICFLoopSafetyInfo (NFC)

LoopUtils.h needs ICFLoopSafetyInfo but relies on a forward
declaration of ICFLoopSafetyInfo in IVDescriptors.h.  This patch adds
a forward declaration right in LoopUtils.h.

While we are at it, this patch removes the one in IVDescriptors.h,
where it is unnecessary.

3 years ago[InstCombine] Set MadeIRChange in replaceInstUsesWith.
Florian Hahn [Sat, 23 Jan 2021 17:42:18 +0000 (17:42 +0000)]
[InstCombine] Set MadeIRChange in replaceInstUsesWith.

Some utilities used by InstCombine, like SimplifyLibCalls, may add new
instructions and replace the uses of a call, but return nullptr because
the inserted call produces multiple results.

Previously, the replaced library calls would get removed by
InstCombine's deleter, but after
292077072ec1279d89d21873fe900061e55ef936 this may not happen, if the
willreturn attribute is missing.

As a work-around, update replaceInstUsesWith to set MadeIRChange, if it
replaces any uses. This catches the cases where it is used as replacer
by utilities used by InstCombine and seems useful in general; updating
uses will modify the IR.

This fixes an expensive-check failure when replacing
@__sinpif/@__cospifi with @__sincospif_sret.

3 years ago[libc++] Implements concept destructible
Mark de Wever [Tue, 24 Nov 2020 15:12:34 +0000 (16:12 +0100)]
[libc++] Implements concept destructible

Implements parts of:
- P0898R3 Standard Library Concepts
- P1754 Rename concepts to standard_case for C++20, while we still can

Reviewed By: ldionne, miscco, #libc

Differential Revision: https://reviews.llvm.org/D91004

3 years ago[ASan] Fix broken Windows build due to 596d534ac3524052df210be8d3c01a33b2260a42.
Dan Liew [Sat, 23 Jan 2021 17:09:06 +0000 (09:09 -0800)]
[ASan] Fix broken Windows build due to 596d534ac3524052df210be8d3c01a33b2260a42.

In that change I forgot to update the call to
`AsanThread::ThreadStart()` in `asan_win.cpp`.

3 years ago[AVR] Optimize 16-bit comparison with constant
Ben Shi [Sat, 23 Jan 2021 16:38:57 +0000 (00:38 +0800)]
[AVR] Optimize 16-bit comparison with constant

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D93976

3 years ago[SLP] fix fast-math-flag propagation on FP reductions
Sanjay Patel [Sat, 23 Jan 2021 15:37:55 +0000 (10:37 -0500)]
[SLP] fix fast-math-flag propagation on FP reductions

As shown in the test diffs, we could miscompile by
propagating flags that did not exist in the original
code.

The flags required for fmin/fmax reductions will be
fixed in a follow-up patch.

3 years ago[SLP] add reduction test with mixed fast-math-flags; NFC
Sanjay Patel [Sat, 23 Jan 2021 15:31:23 +0000 (10:31 -0500)]
[SLP] add reduction test with mixed fast-math-flags; NFC

3 years ago[Local] Treat calls that may not return as being alive.
Florian Hahn [Sat, 23 Jan 2021 12:42:46 +0000 (12:42 +0000)]
[Local] Treat calls that may not return as being alive.

With the addition of the `willreturn` attribute, functions that may
not return (e.g. due to an infinite loop) are well defined, if they are
not marked as `willreturn`.

This patch updates `wouldInstructionBeTriviallyDead` to not consider
calls that may not return as dead.

This patch still provides an escape hatch for intrinsics, which are
still assumed as willreturn unconditionally. It will be removed once
all intrinsics definitions have been reviewed and updated.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94106

3 years ago[AVR] Optimize 8-bit logic left/right shifts
Ben Shi [Sat, 23 Jan 2021 15:54:16 +0000 (23:54 +0800)]
[AVR] Optimize 8-bit logic left/right shifts

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D89047

3 years ago[lldb/Lua] add 'Lua' before naming versions
Pedro Tammela [Sat, 23 Jan 2021 15:20:54 +0000 (15:20 +0000)]
[lldb/Lua] add 'Lua' before naming versions

NFC

3 years ago[lldb/Lua] add initial Lua typemaps
Pedro Tammela [Mon, 18 Jan 2021 23:33:43 +0000 (23:33 +0000)]
[lldb/Lua] add initial Lua typemaps

This patch adds the integer handling typemaps and the typemap for
string returning functions.

The integer handling typemaps overrides SWIG's own typemaps to distinct
the handling of integers from floating point.

The typemap for string returning functions is a port of Python's
typemap.

Differential Revision: https://reviews.llvm.org/D94937

3 years ago[gn build] Port 0057cc5a215e
LLVM GN Syncbot [Sat, 23 Jan 2021 14:07:39 +0000 (14:07 +0000)]
[gn build] Port 0057cc5a215e

3 years agoRevert "[Clang] Move assembler into a separate file"
Ayke van Laethem [Sat, 23 Jan 2021 14:04:27 +0000 (15:04 +0100)]
Revert "[Clang] Move assembler into a separate file"

This reverts commit 2325157c0568ffd16f3318ad54f947e4e2109ef6.

Unfortunately this commit produces linker errors on some builds:
http://lab.llvm.org:8011/#/builders/57/builds/3704
http://lab.llvm.org:8011/#/builders/112/builds/3216
http://lab.llvm.org:8011/#/builders/121/builds/3900

3 years ago[SimplifyCFG] Change 'LoopHeaders' to be ArrayRef<WeakVH>, not a naked set, thus...
Roman Lebedev [Sat, 23 Jan 2021 13:23:11 +0000 (16:23 +0300)]
[SimplifyCFG] Change 'LoopHeaders' to be ArrayRef<WeakVH>, not a naked set, thus avoiding dangling pointers

If i change it to AssertingVH instead, a number of existing tests fail,
which means we don't consistently remove from the set when deleting blocks,
which means newly-created blocks may happen to appear in that set
if they happen to occupy the same memory chunk as did some block
that was in the set originally.

There are many places where we delete blocks,
and while we could probably consistently delete from LoopHeaders
when deleting a block in transforms located in SimplifyCFG.cpp itself,
transforms located elsewhere (Local.cpp/BasicBlockUtils.cpp) also may
delete blocks, and it doesn't seem good to teach them to deal with it.

Since we at most only ever delete from LoopHeaders,
let's just delegate to WeakVH to do that automatically.

But to be honest, personally, i'm not sure that the idea
behind LoopHeaders is sound.

3 years ago[gn build] Port 2325157c0568
LLVM GN Syncbot [Sat, 23 Jan 2021 13:38:51 +0000 (13:38 +0000)]
[gn build] Port 2325157c0568

3 years ago[Clang] Move assembler into a separate file
Ayke van Laethem [Sat, 23 Jan 2021 10:53:24 +0000 (11:53 +0100)]
[Clang] Move assembler into a separate file

This change adds an AssemblerInvocation class, similar to the
CompilerInvocation class. It can be used to invoke cc1as directly.

The project I'm working on wants to compile Clang and use it as a static
library. For that to work, there must be a way to invoke the assembler
programmatically, using the same arguments as you would otherwise pass
to cc1as.

Differential Revision: https://reviews.llvm.org/D63852

3 years ago[LSR] Add test for PR46943 (NFC)
Nikita Popov [Sat, 23 Jan 2021 12:06:46 +0000 (13:06 +0100)]
[LSR] Add test for PR46943 (NFC)

LSR should be dropping nowrap flags when adding new postinc users.

3 years ago[LTO] Store target attributes as vector of strings (NFC).
Florian Hahn [Sat, 23 Jan 2021 12:09:29 +0000 (12:09 +0000)]
[LTO] Store target attributes as vector of strings (NFC).

The target features are obtained as a list of features/attributes.
Instead of storing them in a single string, store the vector. This
matches lto::Config's behavior and simplifies the transition to
lto::backend().

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D95224

3 years ago[InlineFunction] Use llvm.experimental.noalias.scope.decl for noalias arguments.
Jeroen Dobbelaere [Sat, 23 Jan 2021 11:10:57 +0000 (12:10 +0100)]
[InlineFunction] Use llvm.experimental.noalias.scope.decl for noalias arguments.

Insert a llvm.experimental.noalias.scope.decl intrinsic that identifies where a noalias argument was inlined.

This patch includes some refactorings from D90104.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93040

3 years ago[Support] TrigramIndex::insert - pass std::String argument by const reference. NFCI.
Simon Pilgrim [Sat, 23 Jan 2021 11:03:43 +0000 (11:03 +0000)]
[Support] TrigramIndex::insert - pass std::String argument by const reference. NFCI.

Avoid string copies and fix clang-tidy warning.

3 years ago[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them...
Roger Ferrer Ibanez [Sat, 23 Jan 2021 07:30:30 +0000 (07:30 +0000)]
[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer

In RISC-V there is a single addressing mode of the form imm(reg) where
imm is a signed integer of 12-bit with a range of [-2048..2047] bytes
from reg.

The test MultiSource/UnitTests/C++11/frame_layout of the LLVM test-suite
exercises several scenarios with the stack, including function calls
where the stack will need to be realigned to to a local variable having
a large alignment of 4096 bytes.

In situations of large stacks, the RISC-V backend (in
RISCVFrameLowering) reserves an extra emergency spill slot which can be
used (if no free register is found) by the register scavenger after the
frame indexes have been eliminated. PrologEpilogInserter already takes
care of keeping the emergency spill slots as close as possible to the
stack pointer or frame pointer (depending on what the function will
use). However there is a final alignment step to honour the maximum
alignment of the stack that, when using the stack pointer to access the
emergency spill slots, has the side effect of setting them farther from
the stack pointer.

In the case of the frame_layout testcase, the net result is that we do
have an emergency spill slot but it is so far from the stack pointer
(more than 2048 bytes due to the extra alignment of a variable to 4096
bytes) that it becomes unreachable via any immediate offset.

During elimination of the frame index, many (regular) offsets of the
stack may be immediately unreachable already. Their address needs to be
computed using a register. A virtual register is created and later
RegisterScavenger should be able to find an unused (physical) register.
However if no register is available, RegisterScavenger will pick a
physical register and spill it onto an emergency stack slot, while we
compute the offset (restoring the chosen register after all this). This
assumes that the emergency stack slot is easily reachable (this is,
without requiring another register!).

This is the assumption we seem to break when we perform the extra
alignment in PrologEpilogInserter.

We can "float" the emergency spill slots by increasing (in absolute
value) their offsets from the incoming stack pointer. This way the
emergency spill slots will remain close to the stack pointer (once the
function has allocated storage for the stack, including the needed
realignment). The new size computed in PrologEpilogInserter is padding
so it should be OK to move the emergency spill slots there. Also because
we're increasing the alignment, the new location should stay aligned for
the purpose of the emergency spill slots.

Note that this change also impacts other backends as shown by the tests.
Changes are minor adjustments to the emergency stack slot offset.

Differential Revision: https://reviews.llvm.org/D89239

3 years ago[llvm-link] Fix for an assertion when linking global with appending linkage
Sergey Dmitriev [Sat, 23 Jan 2021 03:33:27 +0000 (19:33 -0800)]
[llvm-link] Fix for an assertion when linking global with appending linkage

This patch fixes llvm-link assertion when linking external variable
declaration with a definition with appending linkage.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95126

3 years ago[ASan] Stop blocking child thread progress from parent thread in `pthread_create...
Dan Liew [Thu, 7 Jan 2021 01:41:46 +0000 (17:41 -0800)]
[ASan] Stop blocking child thread progress from parent thread in `pthread_create` interceptor.

Previously in ASan's `pthread_create` interceptor we would block in the
`pthread_create` interceptor waiting for the child thread to start.

Unfortunately this has bad performance characteristics because the OS
scheduler doesn't know the relationship between the parent and child
thread (i.e. the parent thread cannot make progress until the child
thread makes progress) and may make the wrong scheduling decision which
stalls progress.

It turns out that ASan didn't use to block in this interceptor but was
changed to do so to try to address
http://llvm.org/bugs/show_bug.cgi?id=21621/.

In that bug the problem being addressed was a LeakSanitizer false
positive. That bug concerns a heap object being passed
as `arg` to `pthread_create`. If:

* The calling thread loses a live reference to the object (e.g.
  `pthread_create` finishes and the thread no longer has a live
  reference to the object).
* Leak checking is triggered.
* The child thread has not yet started (once it starts it will have a
  live reference).

then the heap object will incorrectly appear to be leaked.

This bug is covered by the `lsan/TestCases/leak_check_before_thread_started.cpp` test case.

In b029c5101fb49b3577a1c322f42ef9fc616f25bf ASan was changed to block
in `pthread_create()` until the child thread starts so that `arg` is
kept alive for the purposes of leaking check.

While this change "works" its problematic due to the performance
problems it causes. The change is also completely unnecessary if leak
checking is disabled (via detect_leaks runtime option or
CAN_SANITIZE_LEAKS compile time config).

This patch does two things:

1. Takes a different approach to solving the leak false positive by
   making LSan's leak checking mechanism treat the `arg` pointer of
   created but not started threads as reachable.  This is done by
   implementing the `ForEachRegisteredThreadContextCb` callback for
   ASan.

2. Removes the blocking behaviour in the ASan `pthread_create`
   interceptor.

rdar://problem/63537240

Differential Revision: https://reviews.llvm.org/D95184

3 years ago[llvm] Use static_assert instead of assert (NFC)
Kazu Hirata [Sat, 23 Jan 2021 07:25:05 +0000 (23:25 -0800)]
[llvm] Use static_assert instead of assert (NFC)

Identified with misc-static-assert.

3 years ago[llvm] Use isAlpha/isAlnum (NFC)
Kazu Hirata [Sat, 23 Jan 2021 07:25:03 +0000 (23:25 -0800)]
[llvm] Use isAlpha/isAlnum (NFC)

3 years ago[Analysis] Use llvm::append_range (NFC)
Kazu Hirata [Sat, 23 Jan 2021 07:25:01 +0000 (23:25 -0800)]
[Analysis] Use llvm::append_range (NFC)

3 years ago[PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets
George Koehler [Sat, 23 Jan 2021 05:13:36 +0000 (00:13 -0500)]
[PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets

In the PPC32 SVR4 ABI, a va_list has copies of registers from the function call.
va_arg looked in the wrong registers for (the pointer representation of) an
object in Objective-C, and for some types in C++. Fix va_arg to look in the
general-purpose registers, not the floating-point registers. Also fix va_arg
for some C++ types, like a member function pointer, that are aggregates for
the ABI.

Anthony Richardby found the problem in Objective-C. Eli Friedman suggested
part of this fix.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47921

Reviewed By: efriedma, nemanjai

Differential Revision: https://reviews.llvm.org/D90329

3 years ago[Coroutine] Improve coro-elide-musttail.ll test
Xun Li [Sat, 23 Jan 2021 04:23:30 +0000 (20:23 -0800)]
[Coroutine] Improve coro-elide-musttail.ll test

The test wasn't sensitive to alias analysis. As you can seen from D95117 when AA is added by default this is affected.
Updating the test so that it coveres both cases for AA analysis.
Note that this patch depends on D95117 to land first.

Differential Revision: https://reviews.llvm.org/D95247

3 years ago[TargetLowering] Use isOneConstant to simplify some code. NFC
Craig Topper [Sat, 23 Jan 2021 03:15:31 +0000 (19:15 -0800)]
[TargetLowering] Use isOneConstant to simplify some code. NFC

3 years ago[LSan] Introduce a callback mechanism to allow adding data reachable from ThreadConte...
Dan Liew [Thu, 21 Jan 2021 23:48:41 +0000 (15:48 -0800)]
[LSan] Introduce a callback mechanism to allow adding data reachable from ThreadContexts to the frontier.

This mechanism is intended to provide a way to treat the `arg` pointer
of a created (but not yet started) thread as reachable. In future
patches this will be implemented in `GetAdditionalThreadContextPtrs`.

A separate implementation of `GetAdditionalThreadContextPtrs` exists
for ASan and LSan runtimes because they need to be implemented
differently in future patches.

rdar://problem/63537240

Differential Revision: https://reviews.llvm.org/D95183

3 years ago[test] Add -mtriple
Fangrui Song [Sat, 23 Jan 2021 03:07:02 +0000 (19:07 -0800)]
[test] Add -mtriple

3 years ago[ELF][test] Add a test about --exclude-libs applying to version symbols
Fangrui Song [Sat, 23 Jan 2021 02:46:56 +0000 (18:46 -0800)]
[ELF][test] Add a test about --exclude-libs applying to version symbols

D94280 also fixed PR48702.

3 years agoRecommit "[AArch64][GlobalISel] Make G_USUBO legal and select it."
Cassie Jones [Sat, 23 Jan 2021 01:29:10 +0000 (17:29 -0800)]
Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it."

The expansion for wide subtractions includes G_USUBO.

Differential Revision: https://reviews.llvm.org/D95032

This was miscompiling on ubsan bots.

3 years ago[InstCombine] remove incompatible attribute when simplifying some lib calls
Zequan Wu [Sat, 23 Jan 2021 01:06:41 +0000 (17:06 -0800)]
[InstCombine] remove incompatible attribute when simplifying some lib calls

Like D95088, remove incompatible attribute in more lib calls.

Differential Revision: https://reviews.llvm.org/D95278

3 years ago[OpenMP] Remove unnecessary pointer checks in a few locations
Hansang Bae [Sat, 23 Jan 2021 01:18:50 +0000 (19:18 -0600)]
[OpenMP] Remove unnecessary pointer checks in a few locations

Also, return NULL from unsuccessful OMPT function lookup.

Differential Revision: https://reviews.llvm.org/D95277

3 years ago[RISCV] Add RV64 test cases for vsoxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:32 +0000 (23:40 +0800)]
[RISCV] Add RV64 test cases for vsoxseg.

Differential Revision: https://reviews.llvm.org/D95195

3 years ago[RISCV] Add RV32 test cases for vsoxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:15 +0000 (23:40 +0800)]
[RISCV] Add RV32 test cases for vsoxseg.

Differential Revision: https://reviews.llvm.org/D95194

3 years ago[RISCV] Add RV64 test cases for vsuxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:41:12 +0000 (23:41 +0800)]
[RISCV] Add RV64 test cases for vsuxseg.

Differential Revision: https://reviews.llvm.org/D95197

3 years ago[RISCV] Add RV32 test cases for vsuxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:50 +0000 (23:40 +0800)]
[RISCV] Add RV32 test cases for vsuxseg.

Differential Revision: https://reviews.llvm.org/D95196

3 years ago[RISCV] Implement vsoxseg/vsuxseg intrinsics.
Hsiangkai Wang [Tue, 19 Jan 2021 02:47:44 +0000 (10:47 +0800)]
[RISCV] Implement vsoxseg/vsuxseg intrinsics.

Define vsoxseg/vsuxseg intrinsics and pseudo instructions.
Lower vsoxseg/vsuxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94940

3 years ago[RISCV] Add RV64 test cases for vloxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:39:37 +0000 (23:39 +0800)]
[RISCV] Add RV64 test cases for vloxseg.

Differential Revision: https://reviews.llvm.org/D95192

3 years ago[RISCV] Add RV32 test cases for vloxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:39:13 +0000 (23:39 +0800)]
[RISCV] Add RV32 test cases for vloxseg.

Differential Revision: https://reviews.llvm.org/D95191

3 years ago[RISCV] Add RV64 test cases for vluxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:37:05 +0000 (23:37 +0800)]
[RISCV] Add RV64 test cases for vluxseg.

Differential Revision: https://reviews.llvm.org/D95190

3 years ago[RISCV] Add RV32 test cases for vluxseg.
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:00 +0000 (23:40 +0800)]
[RISCV] Add RV32 test cases for vluxseg.

Differential Revision: https://reviews.llvm.org/D95193

3 years ago[RISCV] Implement vloxseg/vluxseg intrinsics.
Hsiangkai Wang [Mon, 18 Jan 2021 02:02:40 +0000 (10:02 +0800)]
[RISCV] Implement vloxseg/vluxseg intrinsics.

Define vloxseg/vluxseg intrinsics and pseudo instructions.
Lower vloxseg/vluxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94903

3 years ago[LoopDeletion] Handle inner loops w/untaken backedges
Philip Reames [Sat, 23 Jan 2021 00:31:29 +0000 (16:31 -0800)]
[LoopDeletion] Handle inner loops w/untaken backedges

This builds on the restricted after initial revert form of D93906, and adds back support for breaking backedges of inner loops. It turns out the original invalidation logic wasn't quite right, specifically around the handling of LCSSA.

When breaking the backedge of an inner loop, we can cause blocks which were in the outer loop only because they were also included in a sub-loop to be removed from both loops. This results in the exit block set for our original parent loop changing, and thus a need for new LCSSA phi nodes.

This case happens when the inner loop has an exit block which is also an exit block of the parent, and there's a block in the child which reaches an exit to said block without also reaching an exit to the parent loop.

(I'm describing this in terms of the immediate parent, but the problem is general for any transitive parent in the nest.)

The approach implemented here involves a potentially expensive LCSSA rebuild.  Perf testing during review didn't show anything concerning, but we may end up needing to revert this if anyone encounters a practical compile time issue.

Differential Revision: https://reviews.llvm.org/D94378

3 years agoADT: Use 'using' to inherit assign and append in SmallString
Duncan P. N. Exon Smith [Fri, 22 Jan 2021 00:53:26 +0000 (16:53 -0800)]
ADT: Use 'using' to inherit assign and append in SmallString

Rather than reimplement, use a `using` declaration to bring in
`SmallVectorImpl<char>`'s assign and append implementations in
`SmallString`.

The `SmallString` versions were missing reference invalidation
assertions from `SmallVector`. This patch also fixes a bug in
`llvm::FileCollector::addFileImpl`, which was a copy/paste from
`clang::ModuleDependencyCollector::copyToRoot`, both caught by the
no-longer-skipped assertions.

As a drive-by, this also sinks the `const SmallVectorImpl&` versions of
these methods down into `SmallVectorImpl`, since I imagine they'd be
useful elsewhere.

Differential Revision: https://reviews.llvm.org/D95202

3 years ago[libomptarget] Build cuda plugin without cuda installed locally
Jon Chesterfield [Sat, 23 Jan 2021 00:15:03 +0000 (00:15 +0000)]
[libomptarget] Build cuda plugin without cuda installed locally

[libomptarget] Build cuda plugin without cuda installed locally

Compiles a new file, `plugins/cuda/dynamic_cuda/cuda.cpp`, to an object file that exposes the same symbols that the plugin presently uses from libcuda. The object file contains dlopen of libcuda and cached dlsym calls. Also provides a cuda.h containing the subset that is used.

This lets the cmake file choose between the system cuda and a dlopen shim, with no changes to rtl.cpp.

The corresponding change to amdgpu is postponed until after a refactor of the plugin to reduce the size of the hsa.h stub required

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95155

3 years agoChange static buffer to be BSS instead of DATA in HandlePacket_qSpeedTest
Jason Molenda [Sat, 23 Jan 2021 00:11:47 +0000 (16:11 -0800)]
Change static buffer to be BSS instead of DATA in HandlePacket_qSpeedTest

Having this 4MB buffer with a compile-time initialized string forced it
into the DATA section and it took up 4MB of space in the binary, which
accounts for like 80% of debugserver's footprint on disk.  Change it to
BSS and strcpy in the initial value at runtime instead.

<rdar://problem/73503892>

3 years ago[AMDGPU] Fix FP materialization/resolve with flat scratch
Stanislav Mekhanoshin [Fri, 22 Jan 2021 19:06:14 +0000 (11:06 -0800)]
[AMDGPU] Fix FP materialization/resolve with flat scratch

Differential Revision: https://reviews.llvm.org/D95266

3 years agoChange materializeFrameBaseRegister() to return register
Stanislav Mekhanoshin [Fri, 22 Jan 2021 23:02:36 +0000 (15:02 -0800)]
Change materializeFrameBaseRegister() to return register

The only caller of this function is in the LocalStackSlotAllocation
and it creates base register of class returned by the target's
getPointerRegClass(). AMDGPU wants to use a different reg class
here so let materializeFrameBaseRegister to just create and return
whatever it wants.

Differential Revision: https://reviews.llvm.org/D95268

3 years agoPR47682: Merge the DeclContext of a merged FunctionDecl before we inherit
Richard Smith [Fri, 22 Jan 2021 23:43:47 +0000 (15:43 -0800)]
PR47682: Merge the DeclContext of a merged FunctionDecl before we inherit
default arguments.

When a function is declared with a qualified name, its eventual semantic
DeclContext may differ from the scope specified by the qualifier if it
redeclares a function in an inline namespace. In this case, we need to
update the DeclContext to be that of the previous declaration, and we
need to do so before we decide whether to inherit default arguments from
that previous declaration, because we only inherit default arguments
from declarations in the same scope.

3 years ago[CodeComplete] Add ranged for loops code pattern.
Nathan James [Fri, 22 Jan 2021 23:40:35 +0000 (23:40 +0000)]
[CodeComplete] Add ranged for loops code pattern.

Add code pattersn for c++ `range for` loops and objective c `for...in` loops.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D95131

3 years ago[RGT][TextAPI] Remove a zero-trip loop and the assertions within it
Paul Robinson [Fri, 15 Jan 2021 17:11:31 +0000 (09:11 -0800)]
[RGT][TextAPI] Remove a zero-trip loop and the assertions within it

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95259

3 years ago[RGT] Don't use EXPECT* macros in a subprocess that exits by signalling
Paul Robinson [Fri, 15 Jan 2021 16:52:58 +0000 (08:52 -0800)]
[RGT] Don't use EXPECT* macros in a subprocess that exits by signalling

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95256

3 years ago[lldb] FixFileSystem::GetExternalPath for VFS API change
Jonas Devlieghere [Fri, 22 Jan 2021 23:04:11 +0000 (15:04 -0800)]
[lldb] FixFileSystem::GetExternalPath for VFS API change

3 years ago[RGT][ADT] Remove test assertion that will not be executed
Paul Robinson [Fri, 15 Jan 2021 16:29:35 +0000 (08:29 -0800)]
[RGT][ADT] Remove test assertion that will not be executed

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95255

3 years ago[RISCV] Add more cmov isel patterns to handle seteq/ne with a small non-zero immediate.
Craig Topper [Fri, 22 Jan 2021 21:53:37 +0000 (13:53 -0800)]
[RISCV] Add more cmov isel patterns to handle seteq/ne with a small non-zero immediate.

Similar to our free standing setcc patterns, we can use ADDI to
subtract the immediate from the other operand. Then the cmov
can check if the result is zero or non-zero.

Reviewed By: mundaym

Differential Revision: https://reviews.llvm.org/D95169

3 years ago[mlir][Linalg] Make Fill operation work on tensors.
MaheshRavishankar [Fri, 22 Jan 2021 22:38:47 +0000 (14:38 -0800)]
[mlir][Linalg] Make Fill operation work on tensors.

Depends on D95109

3 years ago[Matrix] Propagate shape information through fneg
Francis Visoiu Mistrih [Fri, 22 Jan 2021 19:16:11 +0000 (11:16 -0800)]
[Matrix] Propagate shape information through fneg

Similar to binary operators like fadd/fmul/fsub, propagate shape info
through unary operators (fneg is the only one?).

Differential Revision: https://reviews.llvm.org/D95252

3 years agoRevert "[AArch64][GlobalISel] Make G_USUBO legal and select it."
Mitch Phillips [Fri, 22 Jan 2021 19:50:35 +0000 (11:50 -0800)]
Revert "[AArch64][GlobalISel] Make G_USUBO legal and select it."

This reverts commit 3dedad475da45c05bc4f66cd14e9f44581edf0bc.

Broke UBSan on Android:
http://lab.llvm.org:8011/#/builders/77/builds/3082

More details at: https://reviews.llvm.org/D95032

3 years agoRevert "[AArch64][GlobalISel] Implement widenScalar for signed overflow"
Mitch Phillips [Fri, 22 Jan 2021 19:49:51 +0000 (11:49 -0800)]
Revert "[AArch64][GlobalISel] Implement widenScalar for signed overflow"

This reverts commit 541d98efa222b00e16c67348810898c2fa11f398.

Reason: Dependent patch 3dedad475da45c05bc4f66cd14e9f44581edf0bc broke
UBSan on Android: http://lab.llvm.org:8011/#/builders/77/builds/3082

3 years agoRevert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method"
Mitch Phillips [Fri, 22 Jan 2021 22:25:31 +0000 (14:25 -0800)]
Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method"

This reverts commit 2bb92bf451d7eb2c817f3e5403353e7c0c14d350.

Dependent patch broke UBSan on Android:
3dedad475da45c05bc4f66cd14e9f44581edf0bc

3 years ago[SimplifyCFG] FoldBranchToCommonDest(): re-lift restrictions on liveout uses of bonus...
Roman Lebedev [Fri, 22 Jan 2021 19:18:34 +0000 (22:18 +0300)]
[SimplifyCFG] FoldBranchToCommonDest(): re-lift restrictions on liveout uses of bonus instructions

I have previously tried doing that in
b33fbbaa34f0fe9fb16789afc72ae424c1825b69 / d38205144febf4dc42c9270c6aa3d978f1ef65e1,
but eventually it was pointed out that the approach taken there
was just broken wrt how the uses of bonus instructions are updated
to account for the fact that they should now use either bonus instruction
or the cloned bonus instruction. In particluar, all that manual handling
of PHI nodes in successors was just wrong.

But, the fix is actually much much simpler than my initial approach:
just tell SSAUpdate about both instances of bonus instruction,
and let it deal with all the PHI handling.

Alive2 confirms that the reproducers from the original bugs (@pr48450*)
are now handled correctly.

This effectively reverts commit 59560e85897afc50090b6c3d920bacfd28b49d06,
effectively relanding b33fbbaa34f0fe9fb16789afc72ae424c1825b69.

3 years ago[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move instruction cloning to...
Roman Lebedev [Fri, 22 Jan 2021 20:35:30 +0000 (23:35 +0300)]
[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move instruction cloning to after CFG update

This simplifies follow-up patch, and is NFC otherwise.

3 years ago[NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce complexity of @pr48450*...
Roman Lebedev [Fri, 22 Jan 2021 19:13:56 +0000 (22:13 +0300)]
[NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce complexity of @pr48450* test

We don't need that many iterations there,
having less iterations helps alive2 verify it.

3 years ago[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix instruction name preservation
Roman Lebedev [Fri, 22 Jan 2021 19:03:13 +0000 (22:03 +0300)]
[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix instruction name preservation

NewBonusInst just took name from BonusInst, so BonusInst has no name,
so BonusInst.getName() makes no sense.
So we need to ask NewBonusInst for the name.

3 years ago[VFS] Fix inconsistencies between relative paths and fallthrough.
Jonas Devlieghere [Fri, 22 Jan 2021 21:51:59 +0000 (13:51 -0800)]
[VFS] Fix inconsistencies between relative paths and fallthrough.

This patch addresses inconsistencies in the way fallthrough is handled
in the RedirectingFileSystem. Rather than trying to change the working
directory of the external filesystem, the RedirectingFileSystem will
canonicalize every path before handing it down. This guarantees that
relative paths are resolved relative to the RedirectingFileSystem's
working directory.

This allows us to have a strictly virtual working directory, and still
fallthrough for absolute paths, but not for relative paths that would
get resolved incorrectly at the lower layer (for example, in case of the
RealFileSystem, because the strictly virtual path does not exist).

Differential revision: https://reviews.llvm.org/D95188

3 years ago[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method
Cassie Jones [Fri, 22 Jan 2021 21:36:58 +0000 (13:36 -0800)]
[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method

The widenScalar implementation for signed and unsigned overflowing
operations were very similar: both are checked by truncating the result
and then re-sign/zero-extending it and checking that it matches the
computed operation.

Using a truncate + zero-extend for the unsigned case instead of manually
producing the AND instruction like before leads to an extra copy
instruction during legalization, but this should be harmless.

Differential Revision: https://reviews.llvm.org/D95035

3 years ago[RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted...
Craig Topper [Fri, 22 Jan 2021 21:30:12 +0000 (13:30 -0800)]
[RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32.

Add tests to make sure common instructions are accepted in RV64
and not just RV32.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D95150

3 years ago[lld-macho] Ignore -lto_library
Jez Ng [Fri, 22 Jan 2021 21:48:50 +0000 (16:48 -0500)]
[lld-macho] Ignore -lto_library

Just getting rid of some logspew as I test LLD under existing build
systems.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D95213

3 years ago[gn build] Port 622eaa4a4cea
LLVM GN Syncbot [Fri, 22 Jan 2021 21:40:40 +0000 (21:40 +0000)]
[gn build] Port 622eaa4a4cea

3 years ago[Inline] Precommit tests for dead calls and willreturn.
Florian Hahn [Tue, 5 Jan 2021 18:46:17 +0000 (18:46 +0000)]
[Inline] Precommit tests for dead calls and willreturn.

precommit tests for D94106.

3 years ago[RISCV] Add isel patterns for SH*ADD(.UW)
Craig Topper [Fri, 22 Jan 2021 20:54:02 +0000 (12:54 -0800)]
[RISCV] Add isel patterns for SH*ADD(.UW)

This adds an initial set of patterns for these instructions. Its
more complicated that I would like for the sh*add.uw instructions
because there is no guaranteed canonicalization for shl/and with
constants.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D95106

3 years ago[Analysis] Support AIX vec_malloc routines
Shimin Cui [Fri, 22 Jan 2021 20:59:29 +0000 (15:59 -0500)]
[Analysis] Support AIX vec_malloc routines

This is to support the memory routines vec_malloc, vec_calloc, vec_realloc, and vec_free. These routines manage memory that is 16-byte aligned. And they are only available on AIX.

Differential Revision: https://reviews.llvm.org/D94710

3 years ago[InstSimplify] Add willreturn to more libcall tests (NFC)
Nikita Popov [Fri, 22 Jan 2021 20:55:34 +0000 (21:55 +0100)]
[InstSimplify] Add willreturn to more libcall tests (NFC)

Annotate more math libcalls with willreturn. The attribute would
have been added by the InferFuncAttrs.

3 years ago[mlir][Linalg] Disable fusion of tensor_reshape op by expansion when unit-dims are...
MaheshRavishankar [Fri, 22 Jan 2021 20:53:27 +0000 (12:53 -0800)]
[mlir][Linalg] Disable fusion of tensor_reshape op by expansion when unit-dims are involved

Fusion of generic/indexed_generic operations with tensor_reshape by
expansion when the latter just adds/removes unit-dimensions is
disabled since it just adds unit-trip count loops.

Differential Revision: https://reviews.llvm.org/D94626