platform/upstream/llvm.git
21 months ago[InstCombine] add tests for logical selects; NFC
Sanjay Patel [Thu, 20 Oct 2022 19:48:57 +0000 (15:48 -0400)]
[InstCombine] add tests for logical selects; NFC

21 months ago[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers
Caroline Concatto [Mon, 17 Oct 2022 10:46:32 +0000 (11:46 +0100)]
[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers

This patch adds the assembly/disassembly for the following instructions:
  ADD (to vector): Add replicated single vector to multi-vector with multi-vector result.
  SQDMULH (multiple and single vector): Multi-vector signed saturating doubling multiply high by vector.
for 2 and 4 ZA SVE registers.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

It also adds more size for the multiple register tuple:
  ZZ_b_mul_r,  ZZ_h_mul_r,
  ZZZZ_b_mul_r,  ZZZZ_h_mul_r,
for 8 bits and 16 bits with 2 and 4 ZA registers.

Depends on: D135468

With a fix for Mips for this test:
llvm/test/MC/Mips/mips64r6/valid.s

Differential Revision: https://reviews.llvm.org/D135563

21 months ago[lldb][CPlusPlus] Add abi_tag support to the CPlusPlusNameParser
Michael Buch [Wed, 19 Oct 2022 14:08:00 +0000 (15:08 +0100)]
[lldb][CPlusPlus] Add abi_tag support to the CPlusPlusNameParser

This patch teaches the `CPlusPlusNameParser` to parse the
demangled/prettified [[gnu::abi_tag(...)]] attribute. The demangled format
isn't standardized and the additions to the parser were mainly driven
using Clang (and the limited information on this from the official
Clang docs).

This change is motivated by multiple failures around step-in
behaviour for libcxx APIs (many of which have ABI tags as of recently).
LLDB determines whether the `step-avoid-regexp` matches the current
frame by parsing the scope-qualified name out of the demangled
function symbol. On failure, the `CPlusPlusNameParser` will simply
return the fully demangled name (which can include the return type)
to the caller, which in `FrameMatchesAvoidCriteria` means we will
not correctly decide whether we should stop at a frame or not if
the function has an abi_tag.

Ideally we wouldn't want to rely on the non-standard format
of demangled attributes. Alternatives would be:

1. Use the mangle tree API to do the parsing for us
2. Reconstruct the scope-qualified name from DWARF instead of parsing
   the demangled name

(1) isn't feasible without a significant refactor of `lldb_private::Mangled`,
if we want to do this efficiently.

(2) could be feasible in cases where debug-info for a frame is
available. But it does mean we certain operations (such as step-in regexp,
and frame function names) won't work with/won't show ABI tags.

**Testing**

* Un-XFAILed step-in API test
* Added parser unit-tests

Differential Revision: https://reviews.llvm.org/D136306

21 months ago[flang] Handle fir.class pointer and allocatable in fir.dispatch code gen
Valentin Clement [Fri, 21 Oct 2022 12:34:37 +0000 (14:34 +0200)]
[flang] Handle fir.class pointer and allocatable in fir.dispatch code gen

fir.dispatch code generation was not handling fir.class pointer and
allocatable types. Update the code generation part to rertieve correctly the
the type info from those types.

Depends on D136426

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D136429

21 months ago[flang] Lower and code gen for allocate on polymorphic entities
Valentin Clement [Fri, 21 Oct 2022 12:33:36 +0000 (14:33 +0200)]
[flang] Lower and code gen for allocate on polymorphic entities

When allocating a polymorphic entity, its type descriptor can come
from the declared type or can be provided in the allocate statement.
This patch adds lowering for allocate on polymorphic by calling
the `AllocatableInitDerived` runtime function with the correct
type descriptor. Some adaptation are made in the code generation
to accept fir.class where it is appropriate.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D136426

21 months agoUpdate links to googletest documentation
Sylvestre Ledru [Fri, 21 Oct 2022 11:55:44 +0000 (13:55 +0200)]
Update links to googletest documentation

Update links to googletest documentation
No automatic tests, but local manual test: i click it, it opens the googletest documentation.

Reviewed By: sylvestre.ledru

Differential Revision: https://reviews.llvm.org/D136424

21 months ago[flang] fix shared library builds after D136428
Jean Perier [Fri, 21 Oct 2022 11:43:03 +0000 (04:43 -0700)]
[flang] fix shared library builds after D136428

https://reviews.llvm.org/D136428 introduced the need for FIRBuilder
library to link against HLFIRDialect to satisfy shared builds.

The PrintFlangFunctionNames failure is unrelated, it is a build
race because many of the headers included in FrontendAction are
tablegen generated. So PrintFlangFunctionNames must wait until its
headers can be safely used. See
https://lab.llvm.org/buildbot/#/builders/191/builds/10340

21 months ago[Clang] Add __has_constexpr_builtin support
Evgeny Shulgin [Fri, 21 Oct 2022 11:22:50 +0000 (11:22 +0000)]
[Clang] Add __has_constexpr_builtin support

The `__has_constexpr_builtin` macro can be used to check
whether the builtin in constant-evaluated by Clang frontend.

Reviewed By: aaron.ballman, shafik

Differential Revision: https://reviews.llvm.org/D136036

21 months ago[flang] add hlfir::FortranEntity class
Jean Perier [Fri, 21 Oct 2022 11:14:17 +0000 (13:14 +0200)]
[flang] add hlfir::FortranEntity class

Add hlfir::FortranEntity class and a first helper to convert it to
fir::ExtendedValue.

The hlfir::FortranEntity will be the core class of the new expression
lowering. It is conceptually very similar to what fir::ExtendedValue
is today, except that it is wrapping single mlir::Value: it holds the
SSA value for a lowered Fortran variable or expression value.

Differential Revision: https://reviews.llvm.org/D136428

21 months agoDelete dead code in Inliner
Tres Popp [Fri, 21 Oct 2022 11:08:51 +0000 (13:08 +0200)]
Delete dead code in Inliner

This code, on all platforms was a use-after-move violation that resulted
in the if-statement always returning false. As several core tests specifically
tested that this code did not execute, we assume that is the intent and
match behavior to existing behavior without relying on use-after-move
results.

21 months ago[flang] Add High level Fortran IR dialect
Jean Perier [Fri, 21 Oct 2022 11:10:52 +0000 (13:10 +0200)]
[flang] Add High level Fortran IR dialect

This patch adds the basic dialect definition of the HLFIR dialect that
was described in https://reviews.llvm.org/D134285.

It adds the definition of the hlfir.expr type and related tests so that
it can be verified that the dialect is properly hooked up by the tools.

Operations will be added as progress is made in the expression
lowering update.

Differential Revision: https://reviews.llvm.org/D136328

21 months ago[libc++] type_traits: fix short-circuiting in std::conjunction.
Aaron Jacobs [Fri, 21 Oct 2022 11:08:30 +0000 (13:08 +0200)]
[libc++] type_traits: fix short-circuiting in std::conjunction.

Replace the two-level implementation with a simpler one that directly subclasses
the predicates, avoiding the instantiation of the template to get the `type`
member in a situation where we should short-circuit. This prevents incorrect
diagnostics when the instantiated predicate contains a static assertion.

Add a test case that reproduced the previous problem. The existing test case
involving `HasNoValue` didn't catch the problem because `HasNoValue` was in the
final position. The bug comes up when the predicate that shouldn't be
instantiated is after the short-circuit position but there is more to follow,
because then `__conjunction_impl<False, BadPredicate, ...>` instantiates
`__conjunction_impl<BadPredicate, ...>` (in order to obtain its `type` member),
which in turn instantiates `BadPredicate` in order to obtain its `value` member.

In contrast the new implementation doesn't recurse in instantiation any further
than it needs to, because it doesn't require particular members of the recursive
case.

I've also updated the test cases for `std::disjunction` to match,
although it doesn't have the same particular bug (its implementation is
quite different).

Fixes #58490.

Reviewed By: #libc, ldionne, philnik

Spies: philnik, ldionne, libcxx-commits

Differential Revision: https://reviews.llvm.org/D136318

21 months ago[MachineCombiner][RISCV] Relax optimization level requirement
Anton Sidorenko [Wed, 19 Oct 2022 13:30:41 +0000 (16:30 +0300)]
[MachineCombiner][RISCV] Relax optimization level requirement

Enable Machine Combiner for O1/O2/O3 optimization levels. It makes RISCV
consistent with other targets running Machine Combiner.

Originally it was enabled only for -O3, however I looked through time reports
and usually it takes 0.1%-0.4% of total time, and never takes more than 1.0%.

Differential Revision: https://reviews.llvm.org/D136339

21 months ago[ModuleSummaryAnalysis] Use helper methods to check readnone/readonly (NFC)
Nikita Popov [Fri, 21 Oct 2022 10:16:57 +0000 (12:16 +0200)]
[ModuleSummaryAnalysis] Use helper methods to check readnone/readonly (NFC)

This makes sure that this code continue working when switching to
the memory attribute.

A caveat here is that onlyReadsMemory() will also true for readnone.
To be conservative, I'm explicitly excluding that case here.

21 months ago[IndVars] Forget SCEV for value after simplifying condition.
Florian Hahn [Fri, 21 Oct 2022 10:18:01 +0000 (11:18 +0100)]
[IndVars] Forget SCEV for value after simplifying condition.

Additional SCEV verification highlighted a case where the cached loop
dispositions where incorrect after simplifying a condition in IndVars
and moving the user in LoopDeletion. Fix it by invalidating ICmp and all
its users.

Fixes #58515.

21 months ago[IR] Add support for memory attribute
Nikita Popov [Mon, 10 Oct 2022 12:33:13 +0000 (14:33 +0200)]
[IR] Add support for memory attribute

This implements IR and bitcode support for the memory attribute,
as specified in https://reviews.llvm.org/D135597.

The new attribute is not used for anything yet (and as such, the
old memory attributes are unaffected).

Differential Revision: https://reviews.llvm.org/D135592

21 months ago[LangRef] Add memory attribute
Nikita Popov [Mon, 10 Oct 2022 15:58:16 +0000 (17:58 +0200)]
[LangRef] Add memory attribute

This adds the LangRef wording for the memory attribute proposed at
https://discourse.llvm.org/t/rfc-unify-memory-effect-attributes/65579.

The old attributes are not removed from LangRef until the migration
is finished.

Differential Revision: https://reviews.llvm.org/D135597

21 months ago[clang] Fix typo in error message
Paulo Matos [Fri, 21 Oct 2022 10:06:28 +0000 (12:06 +0200)]
[clang] Fix typo in error message

21 months ago[Bitcode] Remove redundant intrinsic remangling (NFCI)
Nikita Popov [Fri, 21 Oct 2022 09:49:42 +0000 (11:49 +0200)]
[Bitcode] Remove redundant intrinsic remangling (NFCI)

UpgradeIntrinsicFunction() is supposed to handle this already.

21 months ago[X86] Fold scalar_to_vector(i64 zext(x)) -> bitcast(vzext_movl(scalar_to_vector(i32...
Simon Pilgrim [Fri, 21 Oct 2022 09:39:57 +0000 (10:39 +0100)]
[X86] Fold scalar_to_vector(i64 zext(x)) -> bitcast(vzext_movl(scalar_to_vector(i32 x)))

Extends existing anyextend fold to make use of the implicit zero-extension of the movd instruction

This also helps replace some nasty xmm->gpr->xmm traffic with a shuffle pattern instead

Noticed while looking at D130953

21 months ago[LoongArch] Stack realignment support
wanglei [Fri, 21 Oct 2022 09:03:37 +0000 (17:03 +0800)]
[LoongArch] Stack realignment support

This patch adds support for stack realignment while adding support for
variable sized objects.

Differential Revision: https://reviews.llvm.org/D136074

21 months ago[DebugInfo] Fix MSVC warning: "truncation from 'double' to 'float'"
Simon Pilgrim [Fri, 21 Oct 2022 09:16:27 +0000 (10:16 +0100)]
[DebugInfo] Fix MSVC warning: "truncation from 'double' to 'float'"

21 months ago[ARM] Fix the type for v4f16 duplane
David Green [Fri, 21 Oct 2022 09:10:35 +0000 (10:10 +0100)]
[ARM] Fix the type for v4f16 duplane

This was previously using the 32bit variant of the instruction, instead
of the 16bit as intended.

Fixes #58512

Differential Revision: https://reviews.llvm.org/D136422

21 months ago[flang] Rename hypotf on MSVC platforms
Diana Picus [Tue, 11 Oct 2022 12:38:08 +0000 (12:38 +0000)]
[flang] Rename hypotf on MSVC platforms

The single precision `hypot` intrinsic is lowered to a call to the libm
`hypotf` function.  However, the MSVC runtime lacks a hypotf function
and instead uses `_hypotf` (*). This patch tries to find and rewrite
calls to `hypotf` if we're on a MSVC platform.

Calls to libm functions can be introduced even after lowering (**).
Therefore, we try to do the rewriting at the very end of FIR to LLVM
lowering.

Fixes https://github.com/llvm/llvm-project/issues/57563

(*) More specifically, MSVC's headers define hypotf as an inline
function that just calls _hypotf. This works fine for clang, since it
will include those headers, but flang only links with the CRT so we
don't get a free ride.

(**) https://github.com/llvm/llvm-project/blob/56f94ede2af9a327e59fe84dbf8cbbb7bb1dfa79/flang/lib/Optimizer/CodeGen/CodeGen.cpp#L3391

Differential Revision: https://reviews.llvm.org/D135853

21 months ago[AutoUpgrade] Fix remangling when upgrading struct return type
Nikita Popov [Fri, 21 Oct 2022 09:05:53 +0000 (11:05 +0200)]
[AutoUpgrade] Fix remangling when upgrading struct return type

This was remangling the old function rather than the new one, and
could result in failures when we were performing both a struct
return upgrade and an opaque pointer upgrade.

21 months ago[Verifier] Relieve intrinsics parameter alignment size constrain
Luo, Yuanke [Thu, 20 Oct 2022 09:49:47 +0000 (17:49 +0800)]
[Verifier] Relieve intrinsics parameter alignment size constrain

In D121898 we restrict parameter alignment size in IR since DAGISel
only have 4 bits to hold the alignment value. However intrinsics
won't be lowered to call instruction, so we can remove the constrain
for intrinsics.

Differential Revision: https://reviews.llvm.org/D136330

21 months ago[LoongArch] Modify ParserMethod for the simm26_b operand type
wanglei [Fri, 21 Oct 2022 08:35:23 +0000 (16:35 +0800)]
[LoongArch] Modify ParserMethod for the simm26_b operand type

Modify the ParserMethod of `simm26_b` operand type to `parseImmediate`.

Before that, for the `simm26_b` operand type, the same ParserMethod
was used as `simm26_bl`. When using the internal assembler to process
the blockaddress with `asm` instruction, the wrong blockaddress symbol
would be generated due to the call to the `getOrCreateSymbol()`
interface.

Differential Revision: https://reviews.llvm.org/D136073

21 months ago[LLParser] Remove redundant remangling (NFCI)
Nikita Popov [Fri, 21 Oct 2022 08:53:24 +0000 (10:53 +0200)]
[LLParser] Remove redundant remangling (NFCI)

UpgradeCallsToIntrinsic() is already intended to perform remangling
in case no other upgrades are necessary. The additional
remangleIntrinsicFunction() calls are not needed and can hide bugs
in the UpgradeCallsToIntrinsic() implementation.

21 months ago[AutoUpgrade] Fix length check for intrinsic upgrade
Nikita Popov [Fri, 21 Oct 2022 08:49:45 +0000 (10:49 +0200)]
[AutoUpgrade] Fix length check for intrinsic upgrade

The shortest intrinsics that can be upgraded via remangling have
8 characters (like "llvm.abs"). Make sure these go through the
upgrade code.

I think that currently this change is not observable from in-tree
callers of UpgradeIntrinsicFunction(), because callers do
redundant remangling checks. However, this issue shows up in
existing tests if those checks are removed (which I will do in
followup changes).

21 months ago[clang][Interp] Support base class constructors
Timm Bäder [Fri, 14 Oct 2022 06:19:53 +0000 (08:19 +0200)]
[clang][Interp] Support base class constructors

Differential Revision: https://reviews.llvm.org/D135025

21 months ago[clang][Interp] Array initialization via ImplicitValueInitExpr
Timm Bäder [Fri, 14 Oct 2022 06:19:30 +0000 (08:19 +0200)]
[clang][Interp] Array initialization via ImplicitValueInitExpr

Differential Revision: https://reviews.llvm.org/D135013

21 months ago[clang][Interp][NFC] Remove some unused aliases.
Timm Bäder [Thu, 20 Oct 2022 13:44:09 +0000 (15:44 +0200)]
[clang][Interp][NFC] Remove some unused aliases.

21 months ago[ARM] Regnereate armv8.2a-fp16-vector-intrinsics.ll test. NFC
David Green [Fri, 21 Oct 2022 08:35:39 +0000 (09:35 +0100)]
[ARM] Regnereate armv8.2a-fp16-vector-intrinsics.ll test. NFC

21 months ago[VPlan] Print predicates for widened cmp instructions (NFC).
Florian Hahn [Fri, 21 Oct 2022 07:54:10 +0000 (08:54 +0100)]
[VPlan] Print predicates for widened cmp instructions (NFC).

21 months ago[clang-format] Add option for aligning requires clause body
Danil Sidoruk [Thu, 29 Sep 2022 07:24:55 +0000 (10:24 +0300)]
[clang-format] Add option for aligning requires clause body

Adds an option whether requires clause body should be aligned with
the `requires` keyword.
This option is now the default, both without configuration and in LLVM
style.

Fixes https://github.com/llvm/llvm-project/issues/56283

Differential Revision: https://reviews.llvm.org/D129443

Co-authored-by: Emilia Dreamer <emilia@rymiel.space>
21 months ago[AMDGPU][GISel] Constrain selected operands in selectG_BUILD_VECTOR
Pierre van Houtryve [Wed, 19 Oct 2022 09:01:19 +0000 (09:01 +0000)]
[AMDGPU][GISel] Constrain selected operands in selectG_BUILD_VECTOR

Small bugfix. Currently harmless but a case in D134354 triggers it.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D136235

21 months ago[clang][Bazel] Port a7183a158d68d97902aeb2015a5cac5e36ae84c5
Adrian Kuegel [Fri, 21 Oct 2022 06:46:14 +0000 (08:46 +0200)]
[clang][Bazel] Port a7183a158d68d97902aeb2015a5cac5e36ae84c5

21 months ago[AMDGPU][GISel] Re-enable some working tests
Pierre van Houtryve [Thu, 20 Oct 2022 12:14:30 +0000 (12:14 +0000)]
[AMDGPU][GISel] Re-enable some working tests

These tests had been commented out but seem to not be crashing.
Not sure if codegen is perfect in each of them, but even if it's not I think it's better to put a TODO to fix codegen than remove the test outright, unless codegen is plain wrong (then I'd still rather XFAIL rather than hide it)

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D136341

21 months ago[AMDGPU][DAG] Fix trunc/shift combine condition
Pierre van Houtryve [Mon, 17 Oct 2022 07:56:20 +0000 (07:56 +0000)]
[AMDGPU][DAG] Fix trunc/shift combine condition

The condition needs to be different for right-shifts, else we may lose information in some cases.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D136059

21 months agoDon't emit `-Wnullability-completeness` warnings on `weak` Objective-C properties.
Michael Wyman [Wed, 19 Oct 2022 20:11:41 +0000 (13:11 -0700)]
Don't emit `-Wnullability-completeness` warnings on `weak` Objective-C properties.

Zeroing weak references are by definition `nullable`, and adding
`nonnull` or `_Nullable` yields a mutual-exclusivity error. When
`-Wnullability-completeness` is enabled, however, non-audited header
regions require adding the `nullable` property keyword to avoid a
warning. This should be unnecessary, since it restates known nullability
of the `weak` property.

Additionally, the fix-it hints are both non-idiomatic Objective-C
(adding `_Nullable` to the property's pointer type rather than in the
`@property` attributes) and suggest the option of adding `_Nonnull`,
which would be an error.

Differential Revision: https://reviews.llvm.org/D128031

21 months ago[gn build] Port 0332a8e7d6da
LLVM GN Syncbot [Fri, 21 Oct 2022 04:55:54 +0000 (04:55 +0000)]
[gn build] Port 0332a8e7d6da

21 months ago[llvm-debuginfo-analyzer] (05/09) - Select elements
Carlos Alberto Enciso [Thu, 20 Oct 2022 07:49:21 +0000 (08:49 +0100)]
[llvm-debuginfo-analyzer] (05/09) - Select elements

llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level
format.

The code has been divided into the following patches:

1) Interval tree
2) Driver and documentation
3) Logical elements
4) Locations and ranges
5) Select elements
6) Warning and internal options
7) Compare elements
8) ELF Reader
9) CodeView Reader

Full details:
https://discourse.llvm.org/t/llvm-dev-rfc-llvm-dva-debug-information-visual-analyzer/62570

This patch:

Select elements
- Support for logical elements selection:
  LVPatterns

Reviewed By: psamolysov, probinson

Differential Revision: https://reviews.llvm.org/D125780

21 months ago[RISCV] Add vscale x 1 cost model tests for compares. NFC
Craig Topper [Fri, 21 Oct 2022 04:35:47 +0000 (21:35 -0700)]
[RISCV] Add vscale x 1 cost model tests for compares. NFC

21 months ago[LoongArch] Report error in AsmParser when rd == rk or rd == rj for AM* instructions
Weining Lu [Fri, 21 Oct 2022 01:56:27 +0000 (09:56 +0800)]
[LoongArch] Report error in AsmParser when rd == rk or rd == rj for AM* instructions

Do this check because the ISA manual says (edited from the original translation):

> If the AM* instruction has its rd == rj, an Instruction Non-defined Exception will be triggered when the instruction is executed.
>
> If the AM* instruction has its rd == rk, the execution result is unpredictable. It is software's responsibility to avoid this situation.

Note that binutils does the same check except when rd == r0 but this
is undocumented.

Differential Revision: https://reviews.llvm.org/D136076

21 months ago[mlir][sparse] update doc for sparse_tensor.foreach operator.
Peiming Liu [Fri, 21 Oct 2022 00:28:02 +0000 (00:28 +0000)]
[mlir][sparse] update doc for sparse_tensor.foreach operator.

Clarify that sparse_tensor.foreach iterates sparse_tensor in stored dim order.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136401

21 months ago[mlir][sparse] support foreach on dense tensor.
Peiming Liu [Thu, 20 Oct 2022 22:05:28 +0000 (22:05 +0000)]
[mlir][sparse] support foreach on dense tensor.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136384

21 months ago[libc][Obvious] Add few missing license headers.
Siva Chandra Reddy [Fri, 21 Oct 2022 00:01:16 +0000 (00:01 +0000)]
[libc][Obvious] Add few missing license headers.

21 months ago[mlir][sparse] Fix getUnorderedCOOFromType for rank 1 tensor.
bixia1 [Thu, 20 Oct 2022 22:43:03 +0000 (15:43 -0700)]
[mlir][sparse] Fix getUnorderedCOOFromType for rank 1 tensor.

Previously, it used DimLevelType::SingletonNo to represent an unorder COO
tensor of rank 1 while it should use DimLevelType::CompressedNuNo.

Reviewed By: Peiming, wrengr

Differential Revision: https://reviews.llvm.org/D136387

21 months ago[libc][obvious] fix comparison test cmake
Michael Jones [Thu, 20 Oct 2022 22:39:55 +0000 (15:39 -0700)]
[libc][obvious] fix comparison test cmake

The name of the libc target changed, this patch updates the cmake for
the string to float comparison test to use the correct name.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D136388

21 months ago[mlir-opt] Add a '-dump-pass-pipeline' option
rkayaith [Tue, 11 Oct 2022 21:39:34 +0000 (17:39 -0400)]
[mlir-opt] Add a '-dump-pass-pipeline' option

Add an option to dump the pipeline that will be run to stderr. A
dedicated option is needed since the existing `test-dump-pipeline`
pipeline won't be usable with `-pass-pipeline` after D135745.

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D135747

21 months ago[X86][AVX] Eliminate redundant movzbl instruction.
Luo, Yuanke [Wed, 19 Oct 2022 00:32:13 +0000 (08:32 +0800)]
[X86][AVX] Eliminate redundant movzbl instruction.

The movzbl instruction can be combined to vpinsrb or vmovd, when it is
actual lowered from anyext.

Differential Revision: https://reviews.llvm.org/D130953

21 months ago[mlir] Include anchor op when printing pass managers
rkayaith [Sun, 25 Sep 2022 20:47:39 +0000 (16:47 -0400)]
[mlir] Include anchor op when printing pass managers

Previously a pipeline nested on `anchor-op` would print as just
`'pipeline'`, now it will print as `'anchor-op(pipeline)'`. This ensures
the text form includes all information needed to reconstruct the pass
manager.

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D134622

21 months ago[clang][lex] Avoid `DirectoryLookup` copies
Jan Svoboda [Sat, 15 Oct 2022 15:42:27 +0000 (08:42 -0700)]
[clang][lex] Avoid `DirectoryLookup` copies

This patch fixes a performance regression introduced in D121685 that was caused by copying `DirectoryLookup`.

rdar://101206790

Reviewed By: ributzka

Differential Revision: https://reviews.llvm.org/D136019

21 months ago[clang] Correct sanitizer behavior in union FAMs
Bill Wendling [Thu, 20 Oct 2022 23:08:01 +0000 (16:08 -0700)]
[clang] Correct sanitizer behavior in union FAMs

Clang doesn't have the same behavior as GCC does with union flexible
array members. (Technically, union FAMs are probably not acceptable in
C99 and are an extension of GCC and Clang.)

Both Clang and GCC treat *all* arrays at the end of a structure as FAMs.
GCC does the same with unions. Clang does it for some arrays in unions
(incomplete, '0', and '1'), but not for all. Instead of having this
half-supported feature, sync Clang's behavior with GCC's.

Reviewed By: kees

Differential Revision: https://reviews.llvm.org/D135727

21 months ago[HLSL] Disable integer promotion to avoid int16_t being promoted to int for HLSL.
Xiang Li [Tue, 18 Oct 2022 16:22:46 +0000 (09:22 -0700)]
[HLSL] Disable integer promotion to avoid int16_t being promoted to int for HLSL.

short will be promoted to int in UsualUnaryConversions.
Disable it for HLSL to keep int16_t as 16bit.

Reviewed By: aaron.ballman, rjmccall

Differential Revision: https://reviews.llvm.org/D133668

21 months ago[mlir][tosa] Add broadcasting case for tosa.resize degenerate case
Rob Suderman [Thu, 20 Oct 2022 21:16:10 +0000 (14:16 -0700)]
[mlir][tosa] Add broadcasting case for tosa.resize degenerate case

When the resize is ?x1x1x?, the tosa.resize operation broadcasts the
input and (when quantized) applies a scaling factor. Updated the resize
operation to not use a tensor.extract operation, instead broadcasting
the only positional value as necessary.

Moved the tosa.resize tests to their own mlir test due to increased
complexity. Also corrected a bug where tosa.resize for bilinear-floating
point was not applying the correct scaling.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D136299

21 months agoRevert "[lldb] Fix member access in GetExpressionPath"
Jonas Devlieghere [Thu, 20 Oct 2022 22:20:50 +0000 (15:20 -0700)]
Revert "[lldb] Fix member access in GetExpressionPath"

This reverts commit 0205aa4a02570dfeda5807f66756ebdbb102744b because it
breaks TestArray.py:

  a->c = <parent failed to evaluate: parent is NULL>

I decided to revert instead of disable the test because it looks like a
legitimate issue with the patch.

21 months ago[Arm64EC] Refer to dllimport'ed functions correctly.
Eli Friedman [Thu, 20 Oct 2022 22:06:20 +0000 (15:06 -0700)]
[Arm64EC] Refer to dllimport'ed functions correctly.

Arm64EC has two different ways to refer to dllimport'ed functions in an
object file. One is using the usual __imp_ prefix, the other is using an
Arm64EC-specific prefix __imp_aux_. As far as I can tell, if a function
is in an x64 DLL, __imp_aux_ refers to the actual x64 address, while
__imp_ points to some linker-generated code that calls the exit thunk.
So __imp_aux_ is used to refer to the address in non-call contexts,
while __imp_ is used for calls to avoid the indirect call checker.

There's one twist to this, though: if an object refers to a symbol using
the __imp_aux_ prefix, the object file's symbol table must also contain
the symbol with the usual __imp_ prefix. The symbol doesn't actually
have to be used anywhere, it just has to exist; otherwise, the linker's
symbol lookup in x64 import libraries doesn't work correctly. Currently,
this is handled by emitting a .globl __imp_foo directive; we could try
to design some better way to handle this.

One minor quirk I haven't figured out: apparently, in Arm64EC mode, MSVC
prefers to use a linker-synthesized stub to call dllimport'ed functions,
instead of branching directly. The linker stub appears to do the same
thing that inline code would do, so not sure if it's just a code-size
optimization, or if the synthesized stub can actually do something other
than just load from the import table in some circumstances.

Differential Revision: https://reviews.llvm.org/D136202

21 months ago[mlir][sparse] introduce new op for querying number of stored entries
Aart Bik [Thu, 20 Oct 2022 21:39:34 +0000 (14:39 -0700)]
[mlir][sparse] introduce new op for querying number of stored entries

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D136382

21 months ago[clang-tidy] Skip private default ctors in modernize-use-equals-default
Alexander Shaposhnikov [Thu, 20 Oct 2022 21:45:22 +0000 (21:45 +0000)]
[clang-tidy] Skip private default ctors in modernize-use-equals-default

For c++17 (i.e. before c++20) making a private default ctor explicitly defaulted
might expose the previously intentionally disallowed initializations, e.g.
class Tag { Tag() {} friend class Widget; }; is not equivalent to
class Tag { Tag() = default; friend class Widget; };
since in the latter case Tag is treated as an aggregate despite having a declaration
of the default constructor. This diff makes modernize-use-equals-default skip
in-class empty nonpublic default ctors to avoid code breakages.

Test plan: ninja check-all

Differential revision: https://reviews.llvm.org/D136224

21 months ago[lldb] Don't check environment default char signedness when creating clang type for...
Arthur Eubanks [Sat, 15 Oct 2022 04:07:49 +0000 (21:07 -0700)]
[lldb] Don't check environment default char signedness when creating clang type for "char"

With -f(un)signed-char, the die corresponding to "char" may be the opposite DW_ATE_(un)signed_char from the default platform signedness.
Ultimately we should determine whether a type is the unspecified signedness char by looking if its name is "char" (as opposed to "signed char"/"unsigned char") and not care about DW_ATE_(un)signed_char matching the platform default.

Fixes #23443

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D136011

21 months ago[MachineFrameInfo][RISCV] Call ensureStackAlignment for objects created with scalable...
Craig Topper [Thu, 20 Oct 2022 21:05:22 +0000 (14:05 -0700)]
[MachineFrameInfo][RISCV] Call ensureStackAlignment for objects created with scalable vector stack id.

This is an alternative to fix PR57939 for RISC-V. It definitely
can be argued that the stack temporaries for RISC-V are being created
with an unnecessarily large alignment. But ignoring the alignment
in MachineFrameInfo also seems bad.

Looking at the test update that go with the current ID==0 check,
it was intending to exclude things like the NoAlloc stackid. So I'm
not sure if scalable vectors are intentionally being excluded.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D135913

21 months ago[mlir][sparse] attach bufferizableOpInterface to InsertOp
Peiming Liu [Thu, 20 Oct 2022 19:40:24 +0000 (19:40 +0000)]
[mlir][sparse] attach bufferizableOpInterface to InsertOp

To fix D136286

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136372

21 months ago[lldb][trace] Correctly treat kernel CPUs as individual threads
Sujin Park [Thu, 20 Oct 2022 20:35:45 +0000 (13:35 -0700)]
[lldb][trace] Correctly treat kernel CPUs as individual threads

Resolved a bug in kernel decoding and correctly treat kernel CPUs as
individual threads.

Differential Revision: https://reviews.llvm.org/D136371

21 months ago[NFC] [DirectX backend] move ResourceClass into llvm.
Xiang Li [Wed, 19 Oct 2022 23:23:39 +0000 (16:23 -0700)]
[NFC] [DirectX backend] move ResourceClass into llvm.

Move ResourceClass into llvm/Frontend/HLSL/HLSLResource.h so it could be shared between clang and DirectX backend.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D136134

21 months ago[clang][AIX] Fix mcount name and call arguments
Michael Francis [Tue, 18 Oct 2022 15:47:53 +0000 (15:47 +0000)]
[clang][AIX] Fix mcount name and call arguments

Currently, compiling a program with the `-pg` flag will result in an
undefined symbol error for `.mcount`. This revision fixes the call to
use `__mcount`, which requires a pointer argument to a pointer-sized
object (unique per inserted call) on AIX.

This is only a partial fix. This patch should fix the `-pg` flag's
behaviour on AIX to work with code you are compiling, but it will not
link against standard libraries with `mcount` instrumentation calls. The
next step is to add profiled libraries to the linker search paths in the
Clang driver for the AIX toolchain when linking with `-pg`.

Differential Review: https://reviews.llvm.org/D135384

21 months ago[mlir][sparse] Fix the codegen for the convert operator to handle hidden nop convert.
bixia1 [Thu, 20 Oct 2022 19:05:36 +0000 (12:05 -0700)]
[mlir][sparse] Fix the codegen for the convert operator to handle hidden nop convert.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136291

21 months ago[clang][AIX] Omitting Explicit Debugger Tuning Option
Qiongsi Wu [Thu, 20 Oct 2022 19:16:31 +0000 (15:16 -0400)]
[clang][AIX] Omitting Explicit Debugger Tuning Option

On AIX, the default debugger is `dbx` so it is not necessary to explicitly set `-debugger-tuning=dbx` in the presence of `-g`.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D136187

21 months ago[clang][Sema] Use correct array size for diagnostic
Bill Wendling [Thu, 20 Oct 2022 18:55:38 +0000 (11:55 -0700)]
[clang][Sema] Use correct array size for diagnostic

The diagnostic was confusing and reporting that an array contains far
more elements than it is defined to have, due to casting.

For example, this code:

  double foo[4096];
  ((char*)foo)[sizeof(foo)];

warns that the "index 32768 is past the end of the array (which contains
32768 elements)."

Reviewed By: serge-sans-paille, aaron.ballman

Differential Revision: https://reviews.llvm.org/D135920

21 months agoRevert "[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers"
Caroline Concatto [Thu, 20 Oct 2022 18:38:18 +0000 (19:38 +0100)]
Revert "[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers"

This reverts commit 4c4909703d74883e5cc49edcbd22b783135d2897.

This patch was breaking this test:

llvm/test/MC/Mips/mips64r6/valid.s

I will push again when fixed

21 months agoRevert "[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources"
Caroline Concatto [Thu, 20 Oct 2022 18:37:56 +0000 (19:37 +0100)]
Revert "[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources"

This reverts commit 3fee9358baab54e4ed646a106297e7fb6f1b4cff.

21 months ago[Polly] Ensure -polly-detect-keep-going still eventually rejects invalid regions.
Michael Kruse [Thu, 20 Oct 2022 16:49:38 +0000 (11:49 -0500)]
[Polly] Ensure -polly-detect-keep-going still eventually rejects invalid regions.

Fixes #58484

21 months ago[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources
Caroline Concatto [Thu, 20 Oct 2022 17:57:33 +0000 (18:57 +0100)]
[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources

This patch adds the assembly/disassembly for the following instructions:
  INT:
     SMLAL
     SMLSL
     UMLAL
     UMLSL
  FP:
    BFMLAL
    BFMLSL
    FMLAL
    FMLSL
For multiple and indexed vector, Multiple and Single vector and
Multi vectors, for 1, 2 and 4 ZA registers.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

It also adds a new immediate:
  uimm3s2range for off3
  uimm2s2range for off2
to represent the vector select offset.
The new operands have the range between the first and the last vector position.

Depends on: D135563

Reviewed By: aemerson, sdesmalen

Differential Revision: https://reviews.llvm.org/D135785

21 months ago[mlir][sparse] add source materizalization callback for sparse tensor codegen type...
Peiming Liu [Thu, 20 Oct 2022 16:53:56 +0000 (16:53 +0000)]
[mlir][sparse] add source materizalization callback for sparse tensor codegen type converter.

Required by scf.for to achieve 1:N type conversion (See D136314).

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136367

21 months ago[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers
Caroline Concatto [Mon, 17 Oct 2022 10:46:32 +0000 (11:46 +0100)]
[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers

This patch adds the assembly/disassembly for the following instructions:
  ADD (to vector): Add replicated single vector to multi-vector with multi-vector result.
  SQDMULH (multiple and single vector): Multi-vector signed saturating doubling multiply high by vector.
for 2 and 4 ZA SVE registers.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

It also adds more size for the multiple register tuple:
  ZZ_b_mul_r,  ZZ_h_mul_r,
  ZZZZ_b_mul_r,  ZZZZ_h_mul_r,
for 8 bits and 16 bits with 2 and 4 ZA registers.

Depends on: D135468

Differential Revision: https://reviews.llvm.org/D135563

21 months ago[tblgen-lsp-server] Fix various ASAN issues
River Riddle [Wed, 19 Oct 2022 23:21:10 +0000 (16:21 -0700)]
[tblgen-lsp-server] Fix various ASAN issues

* Properly use virtual destructors for index symbols
* Clear the index before initializing it

21 months ago[AArch64] Fix scheduler crash in fusion code.
Eli Friedman [Thu, 20 Oct 2022 17:47:44 +0000 (10:47 -0700)]
[AArch64] Fix scheduler crash in fusion code.

Make sure we don't call getReg() on the first operand of instruction
without knowing that operand is actually a register.

(This codepath isn't enabled for most CPUs; only triggers on certain
CPUs, like Cortex-X1.)

Differential Revision: https://reviews.llvm.org/D136296

21 months ago[AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers
Caroline Concatto [Mon, 17 Oct 2022 09:27:12 +0000 (10:27 +0100)]
[AArch64]SME2 Multiple vector ternary int/float 2 and 4 registers

This patch adds the assembly/disassembly for the following instructions:
       For INT:
               ADD(array results, multiple vectors): Add multi-vector to multi-vector with ZA array vector results.
               SUB(array results, multiple vectors): Subtract multi-vector from multi-vector with ZA array vector results.
       For FP:
              FMLA (multiple vectors): Multi-vector floating-point fused multiply-add.
              FMLS (multiple vectors): Multi-vector floating-point fused multiply-subtract.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

   This patch also adds a  register operand to represent multiples of ZA multi-vectors.
They are:
        ZZ_s_mul_r, ZZ_d_mul_r, ZZZZ_s_mul_r and ZZZZ_d_mul_r
and represent the Zn or Zm times 2 or 4 according to the vector group.

Depends on: D135455

Differential Revision: https://reviews.llvm.org/D135468

21 months ago[InstCombine] Canonicalize GEP of GEP by swapping constant-indexed GEP to the back
William Huang [Wed, 12 Oct 2022 17:49:24 +0000 (17:49 +0000)]
[InstCombine] Canonicalize GEP of GEP by swapping constant-indexed GEP to the back

Canonicalize GEP of GEP by swapping GEP with some suffix constant indices to the back (and GEP with all constant indices to the back of that), this allows more constant index GEP merging to happen. Exceptions are: If swapping violates use-def relations, or anti-optimizes LICM

For constant indexed GEP of GEP, if they cannot be merged directly, they will be casted to i8* and merged.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D125845

21 months ago[mlir] Set pattern that resolves tensor dimensions as having bounded recursion.
Mahesh Ravishankar [Thu, 20 Oct 2022 16:59:10 +0000 (16:59 +0000)]
[mlir] Set pattern that resolves tensor dimensions as having bounded recursion.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D136200

21 months ago[AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add
zhongyunde [Thu, 20 Oct 2022 16:33:28 +0000 (00:33 +0800)]
[AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add

Change the costmodel to lower a = b * C where C = (1 + 2^m) * (1 + 2^n) to
      add   w8, w0, w0, lsl #m
      add   w0, w8, w8, lsl #n
Note: The latency can vary depending on the shirt amount

Reviewed By: efriedma, dmgreen
Differential Revision: https://reviews.llvm.org/D135441

21 months ago[HLSL] Add groupshare address space.
Xiang Li [Wed, 19 Oct 2022 19:40:39 +0000 (12:40 -0700)]
[HLSL] Add groupshare address space.

Added keyword, LangAS and TypeAttrbute for groupshared.

Tanslate it to LangAS with asHLSLLangAS.

Make sure it translated into address space 3 for DirectX target.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D135060

21 months ago[OpenMP] Remove `-Bsymbolic` flag for device linking in the GNU toolchain
Joseph Huber [Thu, 20 Oct 2022 15:38:27 +0000 (10:38 -0500)]
[OpenMP] Remove `-Bsymbolic` flag for device linking in the GNU toolchain

Previously, OpenMP linking would be done explicitly in a linker stage.
For `x86_64` offloading this would just use the host linker, which could
be the `bfd` linker. This linker had problems linking relocations
against variables with protected visibility so we force `-Bsymbolic`
when linking. After the deprecation of the old offloading driver this
code is no longer used and can be removed.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D136363

21 months ago[Libomptarget] Build plugins with protected visibility by default
Joseph Huber [Thu, 20 Oct 2022 15:51:46 +0000 (10:51 -0500)]
[Libomptarget] Build plugins with protected visibility by default

The plugins all define the same interface symbols. This is generally not
a problem when calling the plugin directly from the dynamic library's
handle. However, when calling from within the plugin itself it is
possible for another plugin's symbols to preempt the symbols. This was
observed with the `__tgt_rtl_is_valid_binary` call in the
`__tgt_rtl_is_valid_binary_info` function being mapped to the x86_64
plugin.

This patch changes the default visibility to `protected` intead. This
visibility ensures that these symbols are all externally visible from
the plugin, but ensures their definitions are fixed within the shared
library. Having protected visiiblity makes such symbol preemption
impossible.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D136365

21 months ago[mlir] Fix incorrect temporary file handling on windows
Denys Shabalin [Thu, 20 Oct 2022 15:50:26 +0000 (17:50 +0200)]
[mlir] Fix incorrect temporary file handling on windows

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136364

21 months ago[gn build] Port a48007355a03
LLVM GN Syncbot [Thu, 20 Oct 2022 15:30:49 +0000 (15:30 +0000)]
[gn build] Port a48007355a03

21 months ago[libc++][format] Implements string escaping.
Mark de Wever [Thu, 5 May 2022 06:03:58 +0000 (08:03 +0200)]
[libc++][format] Implements string escaping.

Implements parts of
- P2286R8 Formatting Ranges

Reviewed By: #libc, tahonermann

Differential Revision: https://reviews.llvm.org/D134036

21 months ago[libc++][CI] Reorder jobs.
Mark de Wever [Wed, 19 Oct 2022 18:01:57 +0000 (20:01 +0200)]
[libc++][CI] Reorder jobs.

In the second leg of the CI the steps take about:
- C++2b              10m
- C++11              8m
- C++03              6m
- Modular build      10m
- GCC 12 / C++latest 20m
So the slowest job is scheduled last. The CI will wait to start the
third leg until that job is done. The current order increases the
latency of the current job, instead start the slow jobs earlier.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D136276

21 months ago[RISCV] Remove EEW from some sched classes.
Craig Topper [Thu, 20 Oct 2022 15:13:25 +0000 (08:13 -0700)]
[RISCV] Remove EEW from some sched classes.

This removes the EEW from unit stride load/store and whole register
load, store, move.

It seems reasonable that implementations of these instructions wouldn't
usually be affected by element width.

We likely need to add LMUL information to our scheduling classes so
I thought it might be good to remove a few before they got multiplied
by LMUL.

Reviewed By: reames, michaelmaitland

Differential Revision: https://reviews.llvm.org/D135992

21 months ago[mlgo] Fix test post-D136040
Mircea Trofin [Thu, 20 Oct 2022 15:21:19 +0000 (08:21 -0700)]
[mlgo] Fix test post-D136040

Instruction opcodes bumped, trivial fix.

21 months ago[NFC] Fix a few whitespace inconsistencies.
Paul Walker [Thu, 20 Oct 2022 11:53:58 +0000 (11:53 +0000)]
[NFC] Fix a few whitespace inconsistencies.

21 months ago[ModRef] Default to ModRef in MemoryEffects ctors (NFC)
Nikita Popov [Thu, 20 Oct 2022 14:40:38 +0000 (16:40 +0200)]
[ModRef] Default to ModRef in MemoryEffects ctors (NFC)

Allow writing something like MemoryEffects::argMemOnly() implying
MemoryEffects::argMemOnly(ModRefInfo::ModRef). Having to write this
out is a bit of an annoying than porting code using the existing
attributes in D135780.

21 months agoDetect Visual Studio automatically in Windows packaging script
Pierrick Bouvier [Thu, 20 Oct 2022 14:29:15 +0000 (16:29 +0200)]
Detect Visual Studio automatically in Windows packaging script

Instead of hardcoding several VS paths, use vswhere.exe (available from
VS 2017) to get latest version available.

Reviewed By: hans, thieta

Differential Revision: https://reviews.llvm.org/D135873

21 months ago[NFC] Add DebugVariable constructor that takes DbgVariableIntrinsic pointer
OCHyams [Thu, 20 Oct 2022 14:26:40 +0000 (15:26 +0100)]
[NFC] Add DebugVariable constructor that takes DbgVariableIntrinsic pointer

Note: The constructor definition cannot be inline without some refactoring as
it introduces a circular dependency between the headers
llvm/IR/DebugInfoMetadata.h (this file) and llvm/IR/IntrinsicInst.h (where
DbgVariableIntrinsic is defined).

Reviewed By: jryans

Differential Revision: https://reviews.llvm.org/D133286

21 months ago[DebugInfo][NFC] Refactor debug intrinsic copy and delete to instead just move
OCHyams [Thu, 20 Oct 2022 13:17:47 +0000 (14:17 +0100)]
[DebugInfo][NFC] Refactor debug intrinsic copy and delete to instead just move

Reviewed By: jryans

Differential Revision: https://reviews.llvm.org/D133304

21 months agoRevert D136292 "[libc] mem* framework v3"
Guillaume Chatelet [Thu, 20 Oct 2022 13:52:30 +0000 (13:52 +0000)]
Revert D136292 "[libc] mem* framework v3"

This breaks llvm-libc build bots:
 - libc-x86_64-debian-dbg-asan
 - libc-x86_64-debian-fullbuild-dbg-asan
Address sanitizers fail with "AddressSanitizer: invalid alignment requested in aligned_alloc: 64, alignment must be a power of two and the requested size 0x41 must be a multiple of alignment (thread T0)"
 - libc-aarch64-ubuntu-dbg
 - libc-aarch64-ubuntu-fullbuild-dbg
https://lab.llvm.org/buildbot/#/builders/223/builds/8877/steps/7/logs/stdio
 - libc-arm32-debian-dbg
https://lab.llvm.org/buildbot/#/builders/229/builds/5201/steps/7/logs/stdio

This reverts commit 903cc71a82431d79e5fb541946a9e7c93750e374.

21 months ago[mlir][nfc] Clean-up usage of kDynamicSize.
Aliia Khasanova [Thu, 20 Oct 2022 12:39:03 +0000 (12:39 +0000)]
[mlir][nfc] Clean-up usage of kDynamicSize.

This patch prepares MLIR code base to change the value of kDynamicSize.
https://discourse.llvm.org/t/rfc-unify-kdynamicsize-and-kdynamicstrideoroffset/64534/4

Differential Revision: https://reviews.llvm.org/D136327

21 months ago[mlir] Fix and test python bindings for dump_to_object_file
Denys Shabalin [Thu, 20 Oct 2022 10:58:49 +0000 (12:58 +0200)]
[mlir] Fix and test python bindings for dump_to_object_file

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136334

21 months ago[libc] mem* framework v3
Guillaume Chatelet [Wed, 19 Oct 2022 20:52:45 +0000 (20:52 +0000)]
[libc] mem* framework v3

This version is more composable and also simpler at the expense of being more explicit and more verbose.

This patch provides rationale for the framework, implementation and unit tests but the functions themselves are still using the previous version. The change in implementation will come in a follow up patch.

Differential Revision: https://reviews.llvm.org/D136292

21 months ago[LV] Use buildScalarSteps to also handle VF = 1. (NFCI)
Florian Hahn [Thu, 20 Oct 2022 13:30:01 +0000 (14:30 +0100)]
[LV] Use buildScalarSteps to also handle VF = 1. (NFCI)

The code in buildScalarSteps already properly handles creating the
scalar induction values with VF = 1. Use it directly instead of using
extra code to handle that case.

Suggested by @Ayal in D133760.