glsl: add sparse texture image load builtin functions

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

glsl: add _texelFetch related sparse texture builtin function

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

glsl: add _textureCubeArrayShadow related sparse texture builtin func

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

glsl: add _texture related sparse texture builtin functions

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

glsl: ir_texture support sprase texture

Sparse ir_texture will set is_sparse and use struct type to
hold both residency code and sampled texel.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

glsl: add ARB_sparse_texture2 extension

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Singed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

mesa/main: relax alignment check when ARB_sparse_texture2 available

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

mesa: add ARB_sparse_texture2 extension

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

gallium: add PIPE_CAP_QUERY_SPARSE_TEXTURE_RESIDENCY

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

gallium/dd_debug: add get_sparse_texture_virtual_page_size

Otherwise GALLIUM_DDEBUG=always crash when sparse texture is used.

Fixes: eed8421bbac ("gallium: add screen get_sparse_texture_virtual_page_size callback")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Sigend-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

nir: fix nir_tex_instr hash not count is_sparse field

This fixes nir_opt_cse miss replace a non-sparse tex instruction
with a sparse tex instruction and fail the nir_validate_shader().

Fixes: 3a7972f72a53 ("nir,spirv: add sparse texture fetches")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>

ac/surface: allow displayable DCC with any resolution (e.g. 8K)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14529>

tu: support VK_EXT_primitive_topology_list_restart

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14556>

nir/unsigned_upper_bound: don't follow 64-bit f2u32()

Fixes Doom Eternal crash.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 72ac3f60261 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14555>

egl/dri2: short-circuit dri2_make_current when possible

If an application calls eglMakeCurrent with the same context and the same
draw and read surfaces as the current ones, there is no need to go
through all the work of unbinding/flushing the old context and binding
the new one.

While the EGL spec is a bit ambiguous here, it seems that the implicit
flush of the outgoing context only needs to be done when the context is
actually changed.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14379>

egl/dri2: remove superfluous flush when changing the context

The flush of the outgoing GL context, as required by the EGL spec for
eglMakeCurrent and extended by KHR_context_flush_control, is already
performed in the unbindContext call. There is no need to pierce through
the layers and unconditionally call glFlush() here.

Getting the out-fence FD for explicit fencing needs to move behind the
unbindContext, to make sure we are getting the fence for the most
recently flushed commands.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14379>

radv/winsys: fix zero submit if no timeline semaphore support

Kernels that don't support timeline semaphores also don't support
transferring syncobjs. Use export/import instead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5845
Fixes: 967fc415fc4 ("radv: Add new submission path for use by the common sync framework.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14538>

nir: Apply nir_opt_offsets to nir_intrinsic_load_uniform as well.

Doing this for ir3 required adding a struct for limits of how much base to
fold in (which NTT wants as well for its case of shared vars), otherwise
the later work to lower to the 1<<9 word limit would emit more
instructions.

The shader-db results are that sometimes the reduction in NIR instruction
count results in the fewer sampler prefetches due to the shader being
estimated to be shorter (dota2, nexuiz):

total instructions in shared programs: 8996651 -> 8996776 (<.01%)
total cat5 in shared programs: 86561 -> 86577 (0.02%)

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>

freedreno/ir3: Use nir_opt_offset for removing constant adds for shared vars.

Saves some work in carchase and manhattan31:

instructions in affected programs: 2842 -> 2818 (-0.84%)
nops in affected programs: 1131 -> 1105 (-2.30%)
non-nops in affected programs: 1236 -> 1238 (0.16%)
mov in affected programs: 57 -> 61 (7.02%)
dwords in affected programs: 2144 -> 2150 (0.28%)
cat0 in affected programs: 1195 -> 1169 (-2.18%)
cat1 in affected programs: 151 -> 155 (2.65%)
cat2 in affected programs: 142 -> 140 (-1.41%)
sstall in affected programs: 190 -> 178 (-6.32%)
(ss) in affected programs: 63 -> 63 (0.00%)
systall in affected programs: 532 -> 511 (-3.95%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>

agx: Handle discard intrinsics

Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...

Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>

agx: Add sample_mask instruction

Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>

asahi: Route sample mask from shader

Compiler-controlled bit in the cmdstream.

Some other magic bits are needed for sample mask writes to work
properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>

asahi: Rectify confusing XML comment

The field was split up...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>

asahi: Break out Fragment Parameters word

What the other 31 bits are for is anyone's guess.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>

asahi: Add XML for unknown 0x4a packet

Enough bits of this packet are known that open-coding hex bytes for it
is annoying. Add some XML correpsonding to what we know.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>

asahi: Warn when hacks mode is enabled

I don't want your pesky bug report.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14579>

asahi: Fake more CAPs with dEQP hacks mode

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14579>

frontend/va: Setting the size of VADRMPRIMESurfaceDescriptor

Issue: objects[i].size is returned as '0' for all

Root cause: The value of objects.size is hard coded to '0' in
vlVaExportSurfaceHandle()

Fix: Assigning the value by multiplying height and width of the surface

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14313>

frontends/va: use un-padded width/height in ExportSurfaceHandle

Issue: VADRMPRIMESurfaceDescriptor width and height are rounded up to
macroblock size (16).

Rootcause: surf->buffer's width/height are rounded up to macroblock size (16),
so they shouldn't be used here.

Fix: Using surf->templ's width/height instead fixes incorrect surface
dimensions being sent via VADRMPRIMESurfaceDescriptor.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14313>

bin/gen_calendar_entries: fix newlines on windows

The documentation[1] for the csv module specifies that we should specify
newline='' when opening the output file. Without that, the module
garbles the newlines, writing them as \r\r\n on Windows instead of \r\n.

So let's do what the documentation says, and specify newline=''

[1]: https://docs.python.org/3/library/csv.html#id3

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12405>

ensure csv-files are crlf on disk

According to RFC 4189 CSV files should be encoded using CRLF newlines,
not LF. This helps compatibility with tools, like python's csv module,
who always uses CRLF.

While we're at it, normalize the one CSV that was CRLF in-repo to LF,
and let git do the newline-normalization when needed instead.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12405>

pan/bi: Schedule around blend shader register clobbering

By software ABI, a blend shader is permitted to clobber registers
R0-R15. The scheduler needs to be aware of this, to avoid moving a write
to one of these registers past the BLEND itself. Otherwise the schedule
is invalid.

This bug affects GLES3.0, but is rare enough in practice that we had
missed it. It requires a fragment shader to write to multiple render
targets with attached blend shaders, and have temporaries register
allocated to R0-R15 that are not read by the blend shader, but are sunk
past the BLEND instruction by the scheduler. Prevents a regression when
switching boolean representations on:

dEQP-GLES31.functional.shaders.builtin_functions.integer.uaddcarry.uvec4_lowp_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14577>

pan/decode: Disassemble Bifrost quietly

Although Bifrost clause packing and register assignment is tricky, the
relevant code is by now extensively tested, and there's no remaining
reverse-engineering here. So disassembling verbosely just adds tons of
noise to pandecode without increasing the useful information.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Don't print Preload twice

It's already printed in the RSD itself, no need to print it out-of-band
a second time. Removes noise in the pandecode.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

panfrost: Remove FBD pointer on Bifrost XML

It's a pointer to a thread storage descriptor, not a framebuffer
descriptor. Unlike Midgard, these don't have to alias. The FBD pointer
was unused anyway, so remove it to reduce noise in pandecode dumps.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Decode Valhall surface descriptor

Instead of incorrectly falling down the Bifrost path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Add pandecode_dump_mappings

Add a helper to dump all mapped GPU memory. This is a blunt, seldom
useful instrument ... but when it /is/ useful it's your only option.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Add hexdump helper

I think I originally wrote this for Asahi? Should probably be moved to
util/...

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Track mmaps with a red-black tree

Rather than emulating page tables, poorly, with a hash table, use a
red-black tree and store the intervals directly. This is deterministic
instead of probabilistic, attaining O(log n) performance for n mapped
intervals which is good enough. Unlike the hash table approach, this
allows us to iterate intervals easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Include addresses for jobs

Helpful for contextualizing fault pointers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

pan/decode: Remove hierarchy mask check

This has never been meaningful.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>

mesa: Remove unused src/mesa/x86-64

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa: Remove unused _mesa_set_sampler_{filters,srgb_decode,wrap}

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa: Remove unused _mesa_is_front_buffer_{draw,read}ing

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa: Remove unused _mesa_is_alpha_to_coverage_enabled

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa/math: Remove unused m_translate.c

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa: Remove unused _mesa_delete_nameless_texture

meta was the last user.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa: Remove unused _mesa_all_varyings_in_vbos

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

mesa: Remove unused _mesa_convert_colors

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>

freedreno/decode: Handle chip-id

For cmdstream traces from newer devices, we need to identify the gpu
based on chip-id.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14564>

driconf: Fix unhandled tags in static conf

A rule with executable_regexp tag would match every executable
without this fix and force_glsl_extensions_warn would be always
set to true which breaks some dEQP tests.

Fixes: 5740ac37014 ("xmlconfig: Add static driconfig support")

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14562>

anv: Don't fill lowered_storage_image_param on SKL+

The switch statement in anv_descriptor_data_for_type() shows that this
field isn't used on SKL+.

On XeHP, this avoids assert failures by preventing
isl_surf_fill_image_param() from being called. That function doesn't
expect Tile4 surfaces.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14546>

pps: increase intel.cfg buffer size

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

iris: utrace/perfetto support

v2: Fixup gpu_id computation, use minor of /dev/dri/* % 128 since we
    don't know whether we get card0 or renderD128 for instance.
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

tools/pps: limit intel cfg to 250ms of sampling

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

pps: enable anv source in example config file

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

anv: add perfetto source

v2: Increase custom stall data (Felix)
    Fixup build (Felix)

v3: Add API enum (Rohan)
    Fixup old comment (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

util/u_process: protect entrypoints for c++

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/ds: use a per GPU clock ID

Multi-GPU setups :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/ds: use the right i915_drm.h include location

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/ds: don't forget to reset upper dword timestamp read

This could lead to confusing if the 32bits roll over (every ~6mn or
so).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ef6698a265fd9 ("intel/ds: drop timestamp correlation code")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/ds: allow user to select metric set at start time

Rather than using always the same metric set, let the user choose when
starting the producer with :

  INTEL_PERFETTO_METRIC_SET=RasterizerAndPixelBackend ./build/src/tool/pps/pps-producer

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/ds: reuse intel_ioctl()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

anv: implement u_trace support

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/blorp: add measure_end entry point

Will be useful to figure out when blorp operations end.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/dev,perf: Use a single timescale function

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

anv: expose a couple of emit helper to build utrace buffer copies

We'll want to copy timestamp buffers when commands buffers are
resubmitted multiple times.

v2: Merge a couple of #if GFX_VER >= 8 (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

isl: add helpers to printout ops

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

blorp: add description & helpers to printout ops

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>

intel/fs: disable VRS when omask is written

As indicated by
VkPhysicalDeviceFragmentShadingRatePropertiesKHR::fragmentShadingRateWithShaderSampleMask
our implementation will clamp to 1x1 when reading samplemask or
writing to samplemask.

This fixes vkd3d-proton tests test_sample_mask_dxbc & test_sample_mask_dxil

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b6332fc4a8ae58 ("intel/compiler: handle coarse pixel in render target writes descriptors")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14553>

anv,lavapipe,v3dv: use wsi_common_get_image

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (anv)
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v3dv)
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (lavapipe)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14544>

vulkan/wsi: add wsi_common_get_image

This can be useful with VkBindImageMemorySwapchainInfoKHR.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14544>

docs: Update d3d12 feature list

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14504>

d3d12: Support ARB_framebuffer_no_attachments

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14504>

d3d12: When no framebuffer attachments are present, the viewport must be clamped to framebuffer size

GL has separate no-attachment framebuffer size parameters, but
D3D uses the viewport. Clamp the viewport dimensions to lie within
GL's default framebuffer sizes.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14504>

d3d12: When no framebuffer attachments are present, use ForcedSampleCount instead of SampleDesc.Count for MSAA

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14504>

zink: update gfx_pipeline_state.vertex_strides when necessary

only necessary without any of the dynamic states and still doesn't fix
the problem, but it's a step

cc: mesa-stable

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14561>

docs: Update d3d12 features

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Enable draw and multi-draw indirect

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Add a compute transformation to handle indirect draws that need draw params

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Handle indirect twoface draws

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Handle draw indirect and multi-draw indirect

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Add a command signature cache for indirect draws

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Enable base instance and draw params extensions

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Upgrade first vertex state var into all vertex draw params

Add in base instance, draw ID, and is-indexed-draw

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Declare support for inverted conditional render

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Predication fix: For boolean queries used for predication, D3D12 uses uint64, so clear at least a uint64 in the result

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Predication fix: re-enable after restarting a batch if needed

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Fix re-enabling predication after temporary disablement

The equal-zero vs not-equal-zero property was previously lost

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

d3d12: Export d3d12_get_state_var from d3d12_nir_passes.c

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14486>

spirv,radv: Fix some GL enum comments

GL_LINE_STRIP_ADJACENCY is 0xB.  0xA is GL_LINES_ADJACENCY.  While we're
here, drop the ARB prefixes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14157>

intel/fs: Use compare_func for wm_prog_key::alpha_test_func

Because 0 is no longer a recognizable value (it's NEVER, which isn't a
good default), we add an emit_alpha_test bool to tell the back-end when
to bother alpha testing.  This lets us only touch crocus with the
change.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14157>

intel/compiler: Stop using GLuint in brw_compiler.h

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14157>

aux/trace: add pipe_context::fence_server_signal tracing

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14539>

tu: implement wsi hook to decide if we can present directly on device

This will prevent the driver to take the prime blit path for presentation
in scenarios where it can avoid it.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11091>

vulkan/wsi: create a common function to compare drm devices

Effectively moves most of v3dv_wsi_can_present_on_device to the
common code to be used in other drivers.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11091>

intel/devinfo: deal with i915 topology query change

i915 does not report slices accurately anymore on Gfx12.5+. Since this
is information we need to have for performance queries, we need to
rebuild it here.

v2: Remove invalid change to pixel pipes computations (Jordan)

v3: Fix index calculation (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>

intel/devinfo: split out l3/pixelpipes counting

v2: fix up subslice_total store (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v1)
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>

intel/devinfo: Adjust L3 banks for DG2

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Co-Authored-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>

intel/dev: extract slice/subslice total computation

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14297>